1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012-2017 Hideep, Inc.
6 #include <linux/module.h>
8 #include <linux/firmware.h>
9 #include <linux/delay.h>
10 #include <linux/gpio/consumer.h>
11 #include <linux/i2c.h>
12 #include <linux/acpi.h>
13 #include <linux/interrupt.h>
14 #include <linux/regmap.h>
15 #include <linux/sysfs.h>
16 #include <linux/input.h>
17 #include <linux/input/mt.h>
18 #include <linux/input/touchscreen.h>
19 #include <linux/regulator/consumer.h>
20 #include <asm/unaligned.h>
22 #define HIDEEP_TS_NAME "HiDeep Touchscreen"
23 #define HIDEEP_I2C_NAME "hideep_ts"
25 #define HIDEEP_MT_MAX 10
26 #define HIDEEP_KEY_MAX 3
28 /* count(2) + touch data(100) + key data(6) */
29 #define HIDEEP_MAX_EVENT 108UL
31 #define HIDEEP_TOUCH_EVENT_INDEX 2
32 #define HIDEEP_KEY_EVENT_INDEX 102
34 /* Touch & key event */
35 #define HIDEEP_EVENT_ADDR 0x240
38 #define HIDEEP_RESET_CMD 0x9800
41 #define HIDEEP_MT_RELEASED BIT(4)
42 #define HIDEEP_KEY_PRESSED BIT(7)
43 #define HIDEEP_KEY_FIRST_PRESSED BIT(8)
44 #define HIDEEP_KEY_PRESSED_MASK (HIDEEP_KEY_PRESSED | \
45 HIDEEP_KEY_FIRST_PRESSED)
47 #define HIDEEP_KEY_IDX_MASK 0x0f
50 #define HIDEEP_YRAM_BASE 0x40000000
51 #define HIDEEP_PERIPHERAL_BASE 0x50000000
52 #define HIDEEP_ESI_BASE (HIDEEP_PERIPHERAL_BASE + 0x00000000)
53 #define HIDEEP_FLASH_BASE (HIDEEP_PERIPHERAL_BASE + 0x01000000)
54 #define HIDEEP_SYSCON_BASE (HIDEEP_PERIPHERAL_BASE + 0x02000000)
56 #define HIDEEP_SYSCON_MOD_CON (HIDEEP_SYSCON_BASE + 0x0000)
57 #define HIDEEP_SYSCON_SPC_CON (HIDEEP_SYSCON_BASE + 0x0004)
58 #define HIDEEP_SYSCON_CLK_CON (HIDEEP_SYSCON_BASE + 0x0008)
59 #define HIDEEP_SYSCON_CLK_ENA (HIDEEP_SYSCON_BASE + 0x000C)
60 #define HIDEEP_SYSCON_RST_CON (HIDEEP_SYSCON_BASE + 0x0010)
61 #define HIDEEP_SYSCON_WDT_CON (HIDEEP_SYSCON_BASE + 0x0014)
62 #define HIDEEP_SYSCON_WDT_CNT (HIDEEP_SYSCON_BASE + 0x0018)
63 #define HIDEEP_SYSCON_PWR_CON (HIDEEP_SYSCON_BASE + 0x0020)
64 #define HIDEEP_SYSCON_PGM_ID (HIDEEP_SYSCON_BASE + 0x00F4)
66 #define HIDEEP_FLASH_CON (HIDEEP_FLASH_BASE + 0x0000)
67 #define HIDEEP_FLASH_STA (HIDEEP_FLASH_BASE + 0x0004)
68 #define HIDEEP_FLASH_CFG (HIDEEP_FLASH_BASE + 0x0008)
69 #define HIDEEP_FLASH_TIM (HIDEEP_FLASH_BASE + 0x000C)
70 #define HIDEEP_FLASH_CACHE_CFG (HIDEEP_FLASH_BASE + 0x0010)
71 #define HIDEEP_FLASH_PIO_SIG (HIDEEP_FLASH_BASE + 0x400000)
73 #define HIDEEP_ESI_TX_INVALID (HIDEEP_ESI_BASE + 0x0008)
75 #define HIDEEP_PERASE 0x00040000
76 #define HIDEEP_WRONLY 0x00100000
78 #define HIDEEP_NVM_MASK_OFS 0x0000000C
79 #define HIDEEP_NVM_DEFAULT_PAGE 0
80 #define HIDEEP_NVM_SFR_WPAGE 1
81 #define HIDEEP_NVM_SFR_RPAGE 2
83 #define HIDEEP_PIO_SIG 0x00400000
84 #define HIDEEP_PROT_MODE 0x03400000
86 #define HIDEEP_NVM_PAGE_SIZE 128
88 #define HIDEEP_DWZ_INFO 0x000002C0
139 __be32 payload[HIDEEP_NVM_PAGE_SIZE / sizeof(__be32)];
142 #define HIDEEP_XFER_BUF_SIZE sizeof(struct pgm_packet)
145 struct i2c_client *client;
146 struct input_dev *input_dev;
149 struct touchscreen_properties prop;
151 struct gpio_desc *reset_gpio;
153 struct regulator *vcc_vdd;
154 struct regulator *vcc_vid;
156 struct mutex dev_mutex;
162 * Data buffer to read packet from the device (contacts and key
163 * states). We align it on double-word boundary to keep word-sized
164 * fields in contact data and double-word-sized fields in program
167 u8 xfer_buf[HIDEEP_XFER_BUF_SIZE] __aligned(4);
170 u32 key_codes[HIDEEP_KEY_MAX];
172 struct dwz_info dwz_info;
174 unsigned int fw_size;
178 static int hideep_pgm_w_mem(struct hideep_ts *ts, u32 addr,
179 const __be32 *data, size_t count)
181 struct pgm_packet *packet = (void *)ts->xfer_buf;
182 size_t len = count * sizeof(*data);
183 struct i2c_msg msg = {
184 .addr = ts->client->addr,
185 .len = len + sizeof(packet->header.len) +
186 sizeof(packet->header.addr),
187 .buf = &packet->header.len,
191 if (len > HIDEEP_NVM_PAGE_SIZE)
194 packet->header.len = 0x80 | (count - 1);
195 packet->header.addr = cpu_to_be32(addr);
196 memcpy(packet->payload, data, len);
198 ret = i2c_transfer(ts->client->adapter, &msg, 1);
200 return ret < 0 ? ret : -EIO;
205 static int hideep_pgm_r_mem(struct hideep_ts *ts, u32 addr,
206 __be32 *data, size_t count)
208 struct pgm_packet *packet = (void *)ts->xfer_buf;
209 size_t len = count * sizeof(*data);
210 struct i2c_msg msg[] = {
212 .addr = ts->client->addr,
213 .len = sizeof(packet->header.len) +
214 sizeof(packet->header.addr),
215 .buf = &packet->header.len,
218 .addr = ts->client->addr,
226 if (len > HIDEEP_NVM_PAGE_SIZE)
229 packet->header.len = count - 1;
230 packet->header.addr = cpu_to_be32(addr);
232 ret = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg));
233 if (ret != ARRAY_SIZE(msg))
234 return ret < 0 ? ret : -EIO;
239 static int hideep_pgm_r_reg(struct hideep_ts *ts, u32 addr, u32 *val)
244 error = hideep_pgm_r_mem(ts, addr, &data, 1);
246 dev_err(&ts->client->dev,
247 "read of register %#08x failed: %d\n",
252 *val = be32_to_cpu(data);
256 static int hideep_pgm_w_reg(struct hideep_ts *ts, u32 addr, u32 val)
258 __be32 data = cpu_to_be32(val);
261 error = hideep_pgm_w_mem(ts, addr, &data, 1);
263 dev_err(&ts->client->dev,
264 "write to register %#08x (%#08x) failed: %d\n",
272 #define SW_RESET_IN_PGM(clk) \
274 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CNT, (clk)); \
275 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x03); \
276 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x01); \
279 #define SET_FLASH_PIO(ce) \
280 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, \
283 #define SET_PIO_SIG(x, y) \
284 hideep_pgm_w_reg(ts, HIDEEP_FLASH_PIO_SIG + (x), (y))
286 #define SET_FLASH_HWCONTROL() \
287 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, 0x00)
289 #define NVM_W_SFR(x, y) \
296 static void hideep_pgm_set(struct hideep_ts *ts)
298 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x00);
299 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_SPC_CON, 0x00);
300 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_ENA, 0xFF);
301 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_CON, 0x01);
302 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_PWR_CON, 0x01);
303 hideep_pgm_w_reg(ts, HIDEEP_FLASH_TIM, 0x03);
304 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CACHE_CFG, 0x00);
307 static int hideep_pgm_get_pattern(struct hideep_ts *ts, u32 *pattern)
313 error = regmap_bulk_write(ts->reg, p1, &p2, 1);
315 dev_err(&ts->client->dev,
316 "%s: regmap_bulk_write() failed with %d\n",
321 usleep_range(1000, 1100);
323 /* flush invalid Tx load register */
324 error = hideep_pgm_w_reg(ts, HIDEEP_ESI_TX_INVALID, 0x01);
328 error = hideep_pgm_r_reg(ts, HIDEEP_SYSCON_PGM_ID, pattern);
335 static int hideep_enter_pgm(struct hideep_ts *ts)
337 int retry_count = 10;
341 while (retry_count--) {
342 error = hideep_pgm_get_pattern(ts, &pattern);
344 dev_err(&ts->client->dev,
345 "hideep_pgm_get_pattern failed: %d\n", error);
346 } else if (pattern != 0x39AF9DDF) {
347 dev_err(&ts->client->dev, "%s: bad pattern: %#08x\n",
350 dev_dbg(&ts->client->dev, "found magic code");
353 usleep_range(1000, 1100);
359 dev_err(&ts->client->dev, "failed to enter pgm mode\n");
360 SW_RESET_IN_PGM(1000);
364 static int hideep_nvm_unlock(struct hideep_ts *ts)
369 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_RPAGE);
370 error = hideep_pgm_r_reg(ts, 0x0000000C, &unmask_code);
371 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE);
375 /* make it unprotected code */
376 unmask_code &= ~HIDEEP_PROT_MODE;
378 /* compare unmask code */
379 if (unmask_code != ts->nvm_mask)
380 dev_warn(&ts->client->dev,
381 "read mask code different %#08x vs %#08x",
382 unmask_code, ts->nvm_mask);
384 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_WPAGE);
387 NVM_W_SFR(HIDEEP_NVM_MASK_OFS, ts->nvm_mask);
388 SET_FLASH_HWCONTROL();
389 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE);
394 static int hideep_check_status(struct hideep_ts *ts)
401 error = hideep_pgm_r_reg(ts, HIDEEP_FLASH_STA, &status);
402 if (!error && status)
405 usleep_range(1000, 1100);
411 static int hideep_program_page(struct hideep_ts *ts, u32 addr,
412 const __be32 *ucode, size_t xfer_count)
417 error = hideep_check_status(ts);
421 addr &= ~(HIDEEP_NVM_PAGE_SIZE - 1);
427 SET_PIO_SIG(HIDEEP_PERASE | addr, 0xFFFFFFFF);
431 error = hideep_check_status(ts);
438 val = be32_to_cpu(ucode[0]);
439 SET_PIO_SIG(HIDEEP_WRONLY | addr, val);
441 hideep_pgm_w_mem(ts, HIDEEP_FLASH_PIO_SIG | HIDEEP_WRONLY,
444 val = be32_to_cpu(ucode[xfer_count - 1]);
445 SET_PIO_SIG(124, val);
449 usleep_range(1000, 1100);
451 error = hideep_check_status(ts);
455 SET_FLASH_HWCONTROL();
460 static int hideep_program_nvm(struct hideep_ts *ts,
461 const __be32 *ucode, size_t ucode_len)
463 struct pgm_packet *packet_r = (void *)ts->xfer_buf;
464 __be32 *current_ucode = packet_r->payload;
470 error = hideep_nvm_unlock(ts);
474 while (ucode_len > 0) {
475 xfer_len = min_t(size_t, ucode_len, HIDEEP_NVM_PAGE_SIZE);
476 xfer_count = xfer_len / sizeof(*ucode);
478 error = hideep_pgm_r_mem(ts, 0x00000000 + addr,
479 current_ucode, xfer_count);
481 dev_err(&ts->client->dev,
482 "%s: failed to read page at offset %#08x: %d\n",
483 __func__, addr, error);
487 /* See if the page needs updating */
488 if (memcmp(ucode, current_ucode, xfer_len)) {
489 error = hideep_program_page(ts, addr,
492 dev_err(&ts->client->dev,
493 "%s: iwrite failure @%#08x: %d\n",
494 __func__, addr, error);
498 usleep_range(1000, 1100);
503 ucode_len -= xfer_len;
509 static int hideep_verify_nvm(struct hideep_ts *ts,
510 const __be32 *ucode, size_t ucode_len)
512 struct pgm_packet *packet_r = (void *)ts->xfer_buf;
513 __be32 *current_ucode = packet_r->payload;
520 while (ucode_len > 0) {
521 xfer_len = min_t(size_t, ucode_len, HIDEEP_NVM_PAGE_SIZE);
522 xfer_count = xfer_len / sizeof(*ucode);
524 error = hideep_pgm_r_mem(ts, 0x00000000 + addr,
525 current_ucode, xfer_count);
527 dev_err(&ts->client->dev,
528 "%s: failed to read page at offset %#08x: %d\n",
529 __func__, addr, error);
533 if (memcmp(ucode, current_ucode, xfer_len)) {
534 const u8 *ucode_bytes = (const u8 *)ucode;
535 const u8 *current_bytes = (const u8 *)current_ucode;
537 for (i = 0; i < xfer_len; i++)
538 if (ucode_bytes[i] != current_bytes[i])
539 dev_err(&ts->client->dev,
540 "%s: mismatch @%#08x: (%#02x vs %#02x)\n",
550 ucode_len -= xfer_len;
556 static int hideep_load_dwz(struct hideep_ts *ts)
561 error = hideep_enter_pgm(ts);
567 error = hideep_pgm_r_mem(ts, HIDEEP_DWZ_INFO,
568 (void *)&ts->dwz_info,
569 sizeof(ts->dwz_info) / sizeof(__be32));
575 dev_err(&ts->client->dev,
576 "failed to fetch DWZ data: %d\n", error);
580 product_code = be16_to_cpu(ts->dwz_info.product_code);
582 switch (product_code & 0xF0) {
584 dev_dbg(&ts->client->dev, "used crimson IC");
585 ts->fw_size = 1024 * 48;
586 ts->nvm_mask = 0x00310000;
589 dev_dbg(&ts->client->dev, "used lime IC");
590 ts->fw_size = 1024 * 64;
591 ts->nvm_mask = 0x0030027B;
594 dev_err(&ts->client->dev, "product code is wrong: %#04x",
599 dev_dbg(&ts->client->dev, "firmware release version: %#04x",
600 be16_to_cpu(ts->dwz_info.release_ver));
605 static int hideep_flash_firmware(struct hideep_ts *ts,
606 const __be32 *ucode, size_t ucode_len)
611 while (retry_cnt--) {
612 error = hideep_program_nvm(ts, ucode, ucode_len);
614 error = hideep_verify_nvm(ts, ucode, ucode_len);
623 static int hideep_update_firmware(struct hideep_ts *ts,
624 const __be32 *ucode, size_t ucode_len)
628 dev_dbg(&ts->client->dev, "starting firmware update");
630 /* enter program mode */
631 error = hideep_enter_pgm(ts);
635 error = hideep_flash_firmware(ts, ucode, ucode_len);
637 dev_err(&ts->client->dev,
638 "firmware update failed: %d\n", error);
640 dev_dbg(&ts->client->dev, "firmware updated successfully\n");
642 SW_RESET_IN_PGM(1000);
644 error2 = hideep_load_dwz(ts);
646 dev_err(&ts->client->dev,
647 "failed to load dwz after firmware update: %d\n",
650 return error ?: error2;
653 static int hideep_power_on(struct hideep_ts *ts)
657 error = regulator_enable(ts->vcc_vdd);
659 dev_err(&ts->client->dev,
660 "failed to enable 'vdd' regulator: %d", error);
662 usleep_range(999, 1000);
664 error = regulator_enable(ts->vcc_vid);
666 dev_err(&ts->client->dev,
667 "failed to enable 'vcc_vid' regulator: %d",
672 if (ts->reset_gpio) {
673 gpiod_set_value_cansleep(ts->reset_gpio, 0);
675 error = regmap_write(ts->reg, HIDEEP_RESET_CMD, 0x01);
677 dev_err(&ts->client->dev,
678 "failed to send 'reset' command: %d\n", error);
686 static void hideep_power_off(void *data)
688 struct hideep_ts *ts = data;
691 gpiod_set_value(ts->reset_gpio, 1);
693 regulator_disable(ts->vcc_vid);
694 regulator_disable(ts->vcc_vdd);
697 #define __GET_MT_TOOL_TYPE(type) ((type) == 0x01 ? MT_TOOL_FINGER : MT_TOOL_PEN)
699 static void hideep_report_slot(struct input_dev *input,
700 const struct hideep_event *event)
702 input_mt_slot(input, event->index & 0x0f);
703 input_mt_report_slot_state(input,
704 __GET_MT_TOOL_TYPE(event->type),
705 !(event->flag & HIDEEP_MT_RELEASED));
706 if (!(event->flag & HIDEEP_MT_RELEASED)) {
707 input_report_abs(input, ABS_MT_POSITION_X,
708 le16_to_cpup(&event->x));
709 input_report_abs(input, ABS_MT_POSITION_Y,
710 le16_to_cpup(&event->y));
711 input_report_abs(input, ABS_MT_PRESSURE,
712 le16_to_cpup(&event->z));
713 input_report_abs(input, ABS_MT_TOUCH_MAJOR, event->w);
717 static void hideep_parse_and_report(struct hideep_ts *ts)
719 const struct hideep_event *events =
720 (void *)&ts->xfer_buf[HIDEEP_TOUCH_EVENT_INDEX];
721 const u8 *keys = &ts->xfer_buf[HIDEEP_KEY_EVENT_INDEX];
722 int touch_count = ts->xfer_buf[0];
723 int key_count = ts->xfer_buf[1] & 0x0f;
724 int lpm_count = ts->xfer_buf[1] & 0xf0;
727 /* get touch event count */
728 dev_dbg(&ts->client->dev, "mt = %d, key = %d, lpm = %02x",
729 touch_count, key_count, lpm_count);
731 touch_count = min(touch_count, HIDEEP_MT_MAX);
732 for (i = 0; i < touch_count; i++)
733 hideep_report_slot(ts->input_dev, events + i);
735 key_count = min(key_count, HIDEEP_KEY_MAX);
736 for (i = 0; i < key_count; i++) {
737 u8 key_data = keys[i * 2];
739 input_report_key(ts->input_dev,
740 ts->key_codes[key_data & HIDEEP_KEY_IDX_MASK],
741 key_data & HIDEEP_KEY_PRESSED_MASK);
744 input_mt_sync_frame(ts->input_dev);
745 input_sync(ts->input_dev);
748 static irqreturn_t hideep_irq(int irq, void *handle)
750 struct hideep_ts *ts = handle;
753 BUILD_BUG_ON(HIDEEP_MAX_EVENT > HIDEEP_XFER_BUF_SIZE);
755 error = regmap_bulk_read(ts->reg, HIDEEP_EVENT_ADDR,
756 ts->xfer_buf, HIDEEP_MAX_EVENT / 2);
758 dev_err(&ts->client->dev, "failed to read events: %d\n", error);
762 hideep_parse_and_report(ts);
768 static int hideep_get_axis_info(struct hideep_ts *ts)
773 error = regmap_bulk_read(ts->reg, 0x28, val, ARRAY_SIZE(val));
777 ts->prop.max_x = le16_to_cpup(val);
778 ts->prop.max_y = le16_to_cpup(val + 1);
780 dev_dbg(&ts->client->dev, "X: %d, Y: %d",
781 ts->prop.max_x, ts->prop.max_y);
786 static int hideep_init_input(struct hideep_ts *ts)
788 struct device *dev = &ts->client->dev;
792 ts->input_dev = devm_input_allocate_device(dev);
793 if (!ts->input_dev) {
794 dev_err(dev, "failed to allocate input device\n");
798 ts->input_dev->name = HIDEEP_TS_NAME;
799 ts->input_dev->id.bustype = BUS_I2C;
800 input_set_drvdata(ts->input_dev, ts);
802 input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_X);
803 input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_Y);
804 input_set_abs_params(ts->input_dev, ABS_MT_PRESSURE, 0, 65535, 0, 0);
805 input_set_abs_params(ts->input_dev, ABS_MT_TOUCH_MAJOR, 0, 255, 0, 0);
806 input_set_abs_params(ts->input_dev, ABS_MT_TOOL_TYPE,
807 0, MT_TOOL_MAX, 0, 0);
808 touchscreen_parse_properties(ts->input_dev, true, &ts->prop);
810 if (ts->prop.max_x == 0 || ts->prop.max_y == 0) {
811 error = hideep_get_axis_info(ts);
816 error = input_mt_init_slots(ts->input_dev, HIDEEP_MT_MAX,
821 ts->key_num = device_property_count_u32(dev, "linux,keycodes");
822 if (ts->key_num > HIDEEP_KEY_MAX) {
823 dev_err(dev, "too many keys defined: %d\n",
828 if (ts->key_num <= 0) {
830 "missing or malformed 'linux,keycodes' property\n");
832 error = device_property_read_u32_array(dev, "linux,keycodes",
836 dev_dbg(dev, "failed to read keymap: %d", error);
841 ts->input_dev->keycode = ts->key_codes;
842 ts->input_dev->keycodesize = sizeof(ts->key_codes[0]);
843 ts->input_dev->keycodemax = ts->key_num;
845 for (i = 0; i < ts->key_num; i++)
846 input_set_capability(ts->input_dev, EV_KEY,
851 error = input_register_device(ts->input_dev);
853 dev_err(dev, "failed to register input device: %d", error);
860 static ssize_t hideep_update_fw(struct device *dev,
861 struct device_attribute *attr,
862 const char *buf, size_t count)
864 struct i2c_client *client = to_i2c_client(dev);
865 struct hideep_ts *ts = i2c_get_clientdata(client);
866 const struct firmware *fw_entry;
871 error = kstrtoint(buf, 0, &mode);
875 fw_name = kasprintf(GFP_KERNEL, "/*(DEBLOBBED)*/",
876 be16_to_cpu(ts->dwz_info.product_id));
880 error = reject_firmware(&fw_entry, fw_name, dev);
882 dev_err(dev, "failed to request firmware %s: %d",
884 goto out_free_fw_name;
887 if (fw_entry->size % sizeof(__be32)) {
888 dev_err(dev, "invalid firmware size %zu\n", fw_entry->size);
893 if (fw_entry->size > ts->fw_size) {
894 dev_err(dev, "fw size (%zu) is too big (memory size %d)\n",
895 fw_entry->size, ts->fw_size);
900 mutex_lock(&ts->dev_mutex);
901 disable_irq(client->irq);
903 error = hideep_update_firmware(ts, (const __be32 *)fw_entry->data,
906 enable_irq(client->irq);
907 mutex_unlock(&ts->dev_mutex);
910 release_firmware(fw_entry);
914 return error ?: count;
917 static ssize_t hideep_fw_version_show(struct device *dev,
918 struct device_attribute *attr, char *buf)
920 struct i2c_client *client = to_i2c_client(dev);
921 struct hideep_ts *ts = i2c_get_clientdata(client);
924 mutex_lock(&ts->dev_mutex);
925 len = scnprintf(buf, PAGE_SIZE, "%04x\n",
926 be16_to_cpu(ts->dwz_info.release_ver));
927 mutex_unlock(&ts->dev_mutex);
932 static ssize_t hideep_product_id_show(struct device *dev,
933 struct device_attribute *attr, char *buf)
935 struct i2c_client *client = to_i2c_client(dev);
936 struct hideep_ts *ts = i2c_get_clientdata(client);
939 mutex_lock(&ts->dev_mutex);
940 len = scnprintf(buf, PAGE_SIZE, "%04x\n",
941 be16_to_cpu(ts->dwz_info.product_id));
942 mutex_unlock(&ts->dev_mutex);
947 static DEVICE_ATTR(version, 0664, hideep_fw_version_show, NULL);
948 static DEVICE_ATTR(product_id, 0664, hideep_product_id_show, NULL);
949 static DEVICE_ATTR(update_fw, 0664, NULL, hideep_update_fw);
951 static struct attribute *hideep_ts_sysfs_entries[] = {
952 &dev_attr_version.attr,
953 &dev_attr_product_id.attr,
954 &dev_attr_update_fw.attr,
958 static const struct attribute_group hideep_ts_attr_group = {
959 .attrs = hideep_ts_sysfs_entries,
962 static int __maybe_unused hideep_suspend(struct device *dev)
964 struct i2c_client *client = to_i2c_client(dev);
965 struct hideep_ts *ts = i2c_get_clientdata(client);
967 disable_irq(client->irq);
968 hideep_power_off(ts);
973 static int __maybe_unused hideep_resume(struct device *dev)
975 struct i2c_client *client = to_i2c_client(dev);
976 struct hideep_ts *ts = i2c_get_clientdata(client);
979 error = hideep_power_on(ts);
981 dev_err(&client->dev, "power on failed");
985 enable_irq(client->irq);
990 static SIMPLE_DEV_PM_OPS(hideep_pm_ops, hideep_suspend, hideep_resume);
992 static const struct regmap_config hideep_regmap_config = {
994 .reg_format_endian = REGMAP_ENDIAN_LITTLE,
996 .val_format_endian = REGMAP_ENDIAN_LITTLE,
997 .max_register = 0xffff,
1000 static int hideep_probe(struct i2c_client *client,
1001 const struct i2c_device_id *id)
1003 struct hideep_ts *ts;
1007 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
1008 dev_err(&client->dev, "check i2c device error");
1012 if (client->irq <= 0) {
1013 dev_err(&client->dev, "missing irq: %d\n", client->irq);
1017 ts = devm_kzalloc(&client->dev, sizeof(*ts), GFP_KERNEL);
1021 ts->client = client;
1022 i2c_set_clientdata(client, ts);
1023 mutex_init(&ts->dev_mutex);
1025 ts->reg = devm_regmap_init_i2c(client, &hideep_regmap_config);
1026 if (IS_ERR(ts->reg)) {
1027 error = PTR_ERR(ts->reg);
1028 dev_err(&client->dev,
1029 "failed to initialize regmap: %d\n", error);
1033 ts->vcc_vdd = devm_regulator_get(&client->dev, "vdd");
1034 if (IS_ERR(ts->vcc_vdd))
1035 return PTR_ERR(ts->vcc_vdd);
1037 ts->vcc_vid = devm_regulator_get(&client->dev, "vid");
1038 if (IS_ERR(ts->vcc_vid))
1039 return PTR_ERR(ts->vcc_vid);
1041 ts->reset_gpio = devm_gpiod_get_optional(&client->dev,
1042 "reset", GPIOD_OUT_HIGH);
1043 if (IS_ERR(ts->reset_gpio))
1044 return PTR_ERR(ts->reset_gpio);
1046 error = hideep_power_on(ts);
1048 dev_err(&client->dev, "power on failed: %d\n", error);
1052 error = devm_add_action_or_reset(&client->dev, hideep_power_off, ts);
1056 error = hideep_load_dwz(ts);
1058 dev_err(&client->dev, "failed to load dwz: %d", error);
1062 error = hideep_init_input(ts);
1066 error = devm_request_threaded_irq(&client->dev, client->irq,
1067 NULL, hideep_irq, IRQF_ONESHOT,
1070 dev_err(&client->dev, "failed to request irq %d: %d\n",
1071 client->irq, error);
1075 error = devm_device_add_group(&client->dev, &hideep_ts_attr_group);
1077 dev_err(&client->dev,
1078 "failed to add sysfs attributes: %d\n", error);
1085 static const struct i2c_device_id hideep_i2c_id[] = {
1086 { HIDEEP_I2C_NAME, 0 },
1089 MODULE_DEVICE_TABLE(i2c, hideep_i2c_id);
1092 static const struct acpi_device_id hideep_acpi_id[] = {
1096 MODULE_DEVICE_TABLE(acpi, hideep_acpi_id);
1100 static const struct of_device_id hideep_match_table[] = {
1101 { .compatible = "hideep,hideep-ts" },
1104 MODULE_DEVICE_TABLE(of, hideep_match_table);
1107 static struct i2c_driver hideep_driver = {
1109 .name = HIDEEP_I2C_NAME,
1110 .of_match_table = of_match_ptr(hideep_match_table),
1111 .acpi_match_table = ACPI_PTR(hideep_acpi_id),
1112 .pm = &hideep_pm_ops,
1114 .id_table = hideep_i2c_id,
1115 .probe = hideep_probe,
1118 module_i2c_driver(hideep_driver);
1120 MODULE_DESCRIPTION("Driver for HiDeep Touchscreen Controller");
1121 MODULE_AUTHOR("anthony.kim@hideep.com");
1122 MODULE_LICENSE("GPL v2");