2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/types.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/serio.h>
22 #include <linux/err.h>
23 #include <linux/rcupdate.h>
24 #include <linux/platform_device.h>
25 #include <linux/i8042.h>
26 #include <linux/slab.h>
27 #include <linux/suspend.h>
31 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
32 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
33 MODULE_LICENSE("GPL");
35 static bool i8042_nokbd;
36 module_param_named(nokbd, i8042_nokbd, bool, 0);
37 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
39 static bool i8042_noaux;
40 module_param_named(noaux, i8042_noaux, bool, 0);
41 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
43 static bool i8042_nomux;
44 module_param_named(nomux, i8042_nomux, bool, 0);
45 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
47 static bool i8042_unlock;
48 module_param_named(unlock, i8042_unlock, bool, 0);
49 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
51 enum i8042_controller_reset_mode {
55 #define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM
57 static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT;
58 static int i8042_set_reset(const char *val, const struct kernel_param *kp)
60 enum i8042_controller_reset_mode *arg = kp->arg;
65 error = kstrtobool(val, &reset);
72 *arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER;
76 static const struct kernel_param_ops param_ops_reset_param = {
77 .flags = KERNEL_PARAM_OPS_FL_NOARG,
78 .set = i8042_set_reset,
80 #define param_check_reset_param(name, p) \
81 __param_check(name, p, enum i8042_controller_reset_mode)
82 module_param_named(reset, i8042_reset, reset_param, 0);
83 MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both");
85 static bool i8042_direct;
86 module_param_named(direct, i8042_direct, bool, 0);
87 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
89 static bool i8042_dumbkbd;
90 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
91 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
93 static bool i8042_noloop;
94 module_param_named(noloop, i8042_noloop, bool, 0);
95 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
97 static bool i8042_notimeout;
98 module_param_named(notimeout, i8042_notimeout, bool, 0);
99 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
101 static bool i8042_kbdreset;
102 module_param_named(kbdreset, i8042_kbdreset, bool, 0);
103 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port");
106 static bool i8042_dritek;
107 module_param_named(dritek, i8042_dritek, bool, 0);
108 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
112 static bool i8042_nopnp;
113 module_param_named(nopnp, i8042_nopnp, bool, 0);
114 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
119 static bool i8042_debug;
120 module_param_named(debug, i8042_debug, bool, 0600);
121 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
123 static bool i8042_unmask_kbd_data;
124 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600);
125 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]");
128 static bool i8042_present;
129 static bool i8042_bypass_aux_irq_test;
130 static char i8042_kbd_firmware_id[128];
131 static char i8042_aux_firmware_id[128];
136 * i8042_lock protects serialization between i8042_command and
137 * the interrupt handler.
139 static DEFINE_SPINLOCK(i8042_lock);
142 * Writers to AUX and KBD ports as well as users issuing i8042_command
143 * directly should acquire i8042_mutex (by means of calling
144 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
145 * they do not disturb each other (unfortunately in many i8042
146 * implementations write to one of the ports will immediately abort
147 * command that is being processed by another port).
149 static DEFINE_MUTEX(i8042_mutex);
159 #define I8042_KBD_PORT_NO 0
160 #define I8042_AUX_PORT_NO 1
161 #define I8042_MUX_PORT_NO 2
162 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
164 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
166 static unsigned char i8042_initial_ctr;
167 static unsigned char i8042_ctr;
168 static bool i8042_mux_present;
169 static bool i8042_kbd_irq_registered;
170 static bool i8042_aux_irq_registered;
171 static unsigned char i8042_suppress_kbd_ack;
172 static struct platform_device *i8042_platform_device;
173 static struct notifier_block i8042_kbd_bind_notifier_block;
175 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
176 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
177 struct serio *serio);
179 void i8042_lock_chip(void)
181 mutex_lock(&i8042_mutex);
183 EXPORT_SYMBOL(i8042_lock_chip);
185 void i8042_unlock_chip(void)
187 mutex_unlock(&i8042_mutex);
189 EXPORT_SYMBOL(i8042_unlock_chip);
191 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
192 struct serio *serio))
197 spin_lock_irqsave(&i8042_lock, flags);
199 if (i8042_platform_filter) {
204 i8042_platform_filter = filter;
207 spin_unlock_irqrestore(&i8042_lock, flags);
210 EXPORT_SYMBOL(i8042_install_filter);
212 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
218 spin_lock_irqsave(&i8042_lock, flags);
220 if (i8042_platform_filter != filter) {
225 i8042_platform_filter = NULL;
228 spin_unlock_irqrestore(&i8042_lock, flags);
231 EXPORT_SYMBOL(i8042_remove_filter);
234 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
235 * be ready for reading values from it / writing values to it.
236 * Called always with i8042_lock held.
239 static int i8042_wait_read(void)
243 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
247 return -(i == I8042_CTL_TIMEOUT);
250 static int i8042_wait_write(void)
254 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
258 return -(i == I8042_CTL_TIMEOUT);
262 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
263 * of the i8042 down the toilet.
266 static int i8042_flush(void)
269 unsigned char data, str;
273 spin_lock_irqsave(&i8042_lock, flags);
275 while ((str = i8042_read_status()) & I8042_STR_OBF) {
276 if (count++ < I8042_BUFFER_SIZE) {
278 data = i8042_read_data();
279 dbg("%02x <- i8042 (flush, %s)\n",
280 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
287 spin_unlock_irqrestore(&i8042_lock, flags);
293 * i8042_command() executes a command on the i8042. It also sends the input
294 * parameter(s) of the commands to it, and receives the output value(s). The
295 * parameters are to be stored in the param array, and the output is placed
296 * into the same array. The number of the parameters and output values is
297 * encoded in bits 8-11 of the command number.
300 static int __i8042_command(unsigned char *param, int command)
304 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
307 error = i8042_wait_write();
311 dbg("%02x -> i8042 (command)\n", command & 0xff);
312 i8042_write_command(command & 0xff);
314 for (i = 0; i < ((command >> 12) & 0xf); i++) {
315 error = i8042_wait_write();
318 dbg("%02x -> i8042 (parameter)\n", param[i]);
319 i8042_write_data(param[i]);
322 for (i = 0; i < ((command >> 8) & 0xf); i++) {
323 error = i8042_wait_read();
325 dbg(" -- i8042 (timeout)\n");
329 if (command == I8042_CMD_AUX_LOOP &&
330 !(i8042_read_status() & I8042_STR_AUXDATA)) {
331 dbg(" -- i8042 (auxerr)\n");
335 param[i] = i8042_read_data();
336 dbg("%02x <- i8042 (return)\n", param[i]);
342 int i8042_command(unsigned char *param, int command)
350 spin_lock_irqsave(&i8042_lock, flags);
351 retval = __i8042_command(param, command);
352 spin_unlock_irqrestore(&i8042_lock, flags);
356 EXPORT_SYMBOL(i8042_command);
359 * i8042_kbd_write() sends a byte out through the keyboard interface.
362 static int i8042_kbd_write(struct serio *port, unsigned char c)
367 spin_lock_irqsave(&i8042_lock, flags);
369 if (!(retval = i8042_wait_write())) {
370 dbg("%02x -> i8042 (kbd-data)\n", c);
374 spin_unlock_irqrestore(&i8042_lock, flags);
380 * i8042_aux_write() sends a byte out through the aux interface.
383 static int i8042_aux_write(struct serio *serio, unsigned char c)
385 struct i8042_port *port = serio->port_data;
387 return i8042_command(&c, port->mux == -1 ?
389 I8042_CMD_MUX_SEND + port->mux);
394 * i8042_aux_close attempts to clear AUX or KBD port state by disabling
395 * and then re-enabling it.
398 static void i8042_port_close(struct serio *serio)
402 const char *port_name;
404 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
405 irq_bit = I8042_CTR_AUXINT;
406 disable_bit = I8042_CTR_AUXDIS;
409 irq_bit = I8042_CTR_KBDINT;
410 disable_bit = I8042_CTR_KBDDIS;
414 i8042_ctr &= ~irq_bit;
415 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
416 pr_warn("Can't write CTR while closing %s port\n", port_name);
420 i8042_ctr &= ~disable_bit;
421 i8042_ctr |= irq_bit;
422 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
423 pr_err("Can't reactivate %s port\n", port_name);
426 * See if there is any data appeared while we were messing with
429 i8042_interrupt(0, NULL);
433 * i8042_start() is called by serio core when port is about to finish
434 * registering. It will mark port as existing so i8042_interrupt can
435 * start sending data through it.
437 static int i8042_start(struct serio *serio)
439 struct i8042_port *port = serio->port_data;
441 spin_lock_irq(&i8042_lock);
443 spin_unlock_irq(&i8042_lock);
449 * i8042_stop() marks serio port as non-existing so i8042_interrupt
450 * will not try to send data to the port that is about to go away.
451 * The function is called by serio core as part of unregister procedure.
453 static void i8042_stop(struct serio *serio)
455 struct i8042_port *port = serio->port_data;
457 spin_lock_irq(&i8042_lock);
458 port->exists = false;
460 spin_unlock_irq(&i8042_lock);
463 * We need to make sure that interrupt handler finishes using
464 * our serio port before we return from this function.
465 * We synchronize with both AUX and KBD IRQs because there is
466 * a (very unlikely) chance that AUX IRQ is raised for KBD port
469 synchronize_irq(I8042_AUX_IRQ);
470 synchronize_irq(I8042_KBD_IRQ);
474 * i8042_filter() filters out unwanted bytes from the input data stream.
475 * It is called from i8042_interrupt and thus is running with interrupts
476 * off and i8042_lock held.
478 static bool i8042_filter(unsigned char data, unsigned char str,
481 if (unlikely(i8042_suppress_kbd_ack)) {
482 if ((~str & I8042_STR_AUXDATA) &&
483 (data == 0xfa || data == 0xfe)) {
484 i8042_suppress_kbd_ack--;
485 dbg("Extra keyboard ACK - filtered out\n");
490 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
491 dbg("Filtered out by platform filter\n");
499 * i8042_interrupt() is the most important function in this driver -
500 * it handles the interrupts from the i8042, and sends incoming bytes
501 * to the upper layers.
504 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
506 struct i8042_port *port;
509 unsigned char str, data;
511 unsigned int port_no;
515 spin_lock_irqsave(&i8042_lock, flags);
517 str = i8042_read_status();
518 if (unlikely(~str & I8042_STR_OBF)) {
519 spin_unlock_irqrestore(&i8042_lock, flags);
521 dbg("Interrupt %d, without any data\n", irq);
526 data = i8042_read_data();
528 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
529 static unsigned long last_transmit;
530 static unsigned char last_str;
533 if (str & I8042_STR_MUXERR) {
534 dbg("MUX error, status is %02x, data is %02x\n",
537 * When MUXERR condition is signalled the data register can only contain
538 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
539 * it is not always the case. Some KBCs also report 0xfc when there is
540 * nothing connected to the port while others sometimes get confused which
541 * port the data came from and signal error leaving the data intact. They
542 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
543 * to legacy mode yet, when we see one we'll add proper handling).
544 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
545 * rest assume that the data came from the same serio last byte
546 * was transmitted (if transmission happened not too long ago).
551 if (time_before(jiffies, last_transmit + HZ/10)) {
555 /* fall through - report timeout */
558 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
559 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
563 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
565 last_transmit = jiffies;
568 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
569 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
571 port_no = (str & I8042_STR_AUXDATA) ?
572 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
575 port = &i8042_ports[port_no];
576 serio = port->exists ? port->serio : NULL;
578 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n",
580 dfl & SERIO_PARITY ? ", bad parity" : "",
581 dfl & SERIO_TIMEOUT ? ", timeout" : "");
583 filtered = i8042_filter(data, str, serio);
585 spin_unlock_irqrestore(&i8042_lock, flags);
587 if (likely(serio && !filtered))
588 serio_interrupt(serio, data, dfl);
591 return IRQ_RETVAL(ret);
595 * i8042_enable_kbd_port enables keyboard port on chip
598 static int i8042_enable_kbd_port(void)
600 i8042_ctr &= ~I8042_CTR_KBDDIS;
601 i8042_ctr |= I8042_CTR_KBDINT;
603 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
604 i8042_ctr &= ~I8042_CTR_KBDINT;
605 i8042_ctr |= I8042_CTR_KBDDIS;
606 pr_err("Failed to enable KBD port\n");
614 * i8042_enable_aux_port enables AUX (mouse) port on chip
617 static int i8042_enable_aux_port(void)
619 i8042_ctr &= ~I8042_CTR_AUXDIS;
620 i8042_ctr |= I8042_CTR_AUXINT;
622 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
623 i8042_ctr &= ~I8042_CTR_AUXINT;
624 i8042_ctr |= I8042_CTR_AUXDIS;
625 pr_err("Failed to enable AUX port\n");
633 * i8042_enable_mux_ports enables 4 individual AUX ports after
634 * the controller has been switched into Multiplexed mode
637 static int i8042_enable_mux_ports(void)
642 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
643 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
644 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
647 return i8042_enable_aux_port();
651 * i8042_set_mux_mode checks whether the controller has an
652 * active multiplexor and puts the chip into Multiplexed (true)
653 * or Legacy (false) mode.
656 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
659 unsigned char param, val;
661 * Get rid of bytes in the queue.
667 * Internal loopback test - send three bytes, they should come back from the
668 * mouse interface, the last should be version.
672 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
674 param = val = multiplex ? 0x56 : 0xf6;
675 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
677 param = val = multiplex ? 0xa4 : 0xa5;
678 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
682 * Workaround for interference with USB Legacy emulation
683 * that causes a v10.12 MUX to be found.
689 *mux_version = param;
695 * i8042_check_mux() checks whether the controller supports the PS/2 Active
696 * Multiplexing specification by Synaptics, Phoenix, Insyde and
700 static int __init i8042_check_mux(void)
702 unsigned char mux_version;
704 if (i8042_set_mux_mode(true, &mux_version))
707 pr_info("Detected active multiplexing controller, rev %d.%d\n",
708 (mux_version >> 4) & 0xf, mux_version & 0xf);
711 * Disable all muxed ports by disabling AUX.
713 i8042_ctr |= I8042_CTR_AUXDIS;
714 i8042_ctr &= ~I8042_CTR_AUXINT;
716 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
717 pr_err("Failed to disable AUX port, can't use MUX\n");
721 i8042_mux_present = true;
727 * The following is used to test AUX IRQ delivery.
729 static struct completion i8042_aux_irq_delivered __initdata;
730 static bool i8042_irq_being_tested __initdata;
732 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
735 unsigned char str, data;
738 spin_lock_irqsave(&i8042_lock, flags);
739 str = i8042_read_status();
740 if (str & I8042_STR_OBF) {
741 data = i8042_read_data();
742 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
743 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
744 if (i8042_irq_being_tested &&
745 data == 0xa5 && (str & I8042_STR_AUXDATA))
746 complete(&i8042_aux_irq_delivered);
749 spin_unlock_irqrestore(&i8042_lock, flags);
751 return IRQ_RETVAL(ret);
755 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
756 * verifies success by readinng CTR. Used when testing for presence of AUX
759 static int __init i8042_toggle_aux(bool on)
764 if (i8042_command(¶m,
765 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
768 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
769 for (i = 0; i < 100; i++) {
772 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
775 if (!(param & I8042_CTR_AUXDIS) == on)
783 * i8042_check_aux() applies as much paranoia as it can at detecting
784 * the presence of an AUX interface.
787 static int __init i8042_check_aux(void)
790 bool irq_registered = false;
791 bool aux_loop_broken = false;
796 * Get rid of bytes in the queue.
802 * Internal loopback test - filters out AT-type i8042's. Unfortunately
803 * SiS screwed up and their 5597 doesn't support the LOOP command even
804 * though it has an AUX port.
808 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
809 if (retval || param != 0x5a) {
812 * External connection test - filters out AT-soldered PS/2 i8042's
813 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
814 * 0xfa - no error on some notebooks which ignore the spec
815 * Because it's common for chipsets to return error on perfectly functioning
816 * AUX ports, we test for this only when the LOOP command failed.
819 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
820 (param && param != 0xfa && param != 0xff))
824 * If AUX_LOOP completed without error but returned unexpected data
828 aux_loop_broken = true;
832 * Bit assignment test - filters out PS/2 i8042's in AT mode
835 if (i8042_toggle_aux(false)) {
836 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
837 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
840 if (i8042_toggle_aux(true))
844 * Reset keyboard (needed on some laptops to successfully detect
845 * touchpad, e.g., some Gigabyte laptop models with Elantech
848 if (i8042_kbdreset) {
849 pr_warn("Attempting to reset device connected to KBD port\n");
850 i8042_kbd_write(NULL, (unsigned char) 0xff);
854 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
855 * used it for a PCI card or somethig else.
858 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
860 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
861 * is working and hope we are right.
867 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
868 "i8042", i8042_platform_device))
871 irq_registered = true;
873 if (i8042_enable_aux_port())
876 spin_lock_irqsave(&i8042_lock, flags);
878 init_completion(&i8042_aux_irq_delivered);
879 i8042_irq_being_tested = true;
882 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
884 spin_unlock_irqrestore(&i8042_lock, flags);
889 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
890 msecs_to_jiffies(250)) == 0) {
892 * AUX IRQ was never delivered so we need to flush the controller to
893 * get rid of the byte we put there; otherwise keyboard may not work.
895 dbg(" -- i8042 (aux irq test timeout)\n");
903 * Disable the interface.
906 i8042_ctr |= I8042_CTR_AUXDIS;
907 i8042_ctr &= ~I8042_CTR_AUXINT;
909 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
913 free_irq(I8042_AUX_IRQ, i8042_platform_device);
918 static int i8042_controller_check(void)
921 pr_info("No controller found\n");
928 static int i8042_controller_selftest(void)
934 * We try this 5 times; on some really fragile systems this does not
935 * take the first time...
939 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
940 pr_err("i8042 controller selftest timeout\n");
944 if (param == I8042_RET_CTL_TEST)
947 dbg("i8042 controller selftest: %#x != %#x\n",
948 param, I8042_RET_CTL_TEST);
954 * On x86, we don't fail entire i8042 initialization if controller
955 * reset fails in hopes that keyboard port will still be functional
956 * and user will still get a working keyboard. This is especially
957 * important on netbooks. On other arches we trust hardware more.
959 pr_info("giving up on controller selftest, continuing anyway...\n");
962 pr_err("i8042 controller selftest failed\n");
968 * i8042_controller init initializes the i8042 controller, and,
969 * most importantly, sets it into non-xlated mode if that's
973 static int i8042_controller_init(void)
977 unsigned char ctr[2];
980 * Save the CTR for restore on unload / reboot.
985 pr_err("Unable to get stable CTR read\n");
992 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
993 pr_err("Can't read CTR while initializing i8042\n");
997 } while (n < 2 || ctr[0] != ctr[1]);
999 i8042_initial_ctr = i8042_ctr = ctr[0];
1002 * Disable the keyboard interface and interrupt.
1005 i8042_ctr |= I8042_CTR_KBDDIS;
1006 i8042_ctr &= ~I8042_CTR_KBDINT;
1012 spin_lock_irqsave(&i8042_lock, flags);
1013 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
1015 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
1017 pr_warn("Warning: Keylock active\n");
1019 spin_unlock_irqrestore(&i8042_lock, flags);
1022 * If the chip is configured into nontranslated mode by the BIOS, don't
1023 * bother enabling translating and be happy.
1026 if (~i8042_ctr & I8042_CTR_XLATE)
1027 i8042_direct = true;
1030 * Set nontranslated mode for the kbd interface if requested by an option.
1031 * After this the kbd interface becomes a simple serial in/out, like the aux
1032 * interface is. We don't do this by default, since it can confuse notebook
1037 i8042_ctr &= ~I8042_CTR_XLATE;
1043 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1044 pr_err("Can't write CTR while initializing i8042\n");
1049 * Flush whatever accumulated while we were disabling keyboard port.
1059 * Reset the controller and reset CRT to the original value set by BIOS.
1062 static void i8042_controller_reset(bool s2r_wants_reset)
1067 * Disable both KBD and AUX interfaces so they don't get in the way
1070 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1071 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1073 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1074 pr_warn("Can't write CTR while resetting\n");
1077 * Disable MUX mode if present.
1080 if (i8042_mux_present)
1081 i8042_set_mux_mode(false, NULL);
1084 * Reset the controller if requested.
1087 if (i8042_reset == I8042_RESET_ALWAYS ||
1088 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1089 i8042_controller_selftest();
1093 * Restore the original control register setting.
1096 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1097 pr_warn("Can't restore CTR\n");
1102 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1103 * when kernel panics. Flashing LEDs is useful for users running X who may
1104 * not see the console and will help distinguishing panics from "real"
1107 * Note that DELAY has a limit of 10ms so we will not get stuck here
1108 * waiting for KBC to free up even if KBD interrupt is off
1111 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1113 static long i8042_panic_blink(int state)
1118 led = (state) ? 0x01 | 0x04 : 0;
1119 while (i8042_read_status() & I8042_STR_IBF)
1121 dbg("%02x -> i8042 (panic blink)\n", 0xed);
1122 i8042_suppress_kbd_ack = 2;
1123 i8042_write_data(0xed); /* set leds */
1125 while (i8042_read_status() & I8042_STR_IBF)
1128 dbg("%02x -> i8042 (panic blink)\n", led);
1129 i8042_write_data(led);
1137 static void i8042_dritek_enable(void)
1139 unsigned char param = 0x90;
1142 error = i8042_command(¶m, 0x1059);
1144 pr_warn("Failed to enable DRITEK extension: %d\n", error);
1151 * Here we try to reset everything back to a state we had
1152 * before suspending.
1155 static int i8042_controller_resume(bool s2r_wants_reset)
1159 error = i8042_controller_check();
1163 if (i8042_reset == I8042_RESET_ALWAYS ||
1164 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1165 error = i8042_controller_selftest();
1171 * Restore original CTR value and disable all ports
1174 i8042_ctr = i8042_initial_ctr;
1176 i8042_ctr &= ~I8042_CTR_XLATE;
1177 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1178 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1179 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1180 pr_warn("Can't write CTR to resume, retrying...\n");
1182 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1183 pr_err("CTR write retry failed\n");
1191 i8042_dritek_enable();
1194 if (i8042_mux_present) {
1195 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1196 pr_warn("failed to resume active multiplexor, mouse won't work\n");
1197 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1198 i8042_enable_aux_port();
1200 if (i8042_ports[I8042_KBD_PORT_NO].serio)
1201 i8042_enable_kbd_port();
1203 i8042_interrupt(0, NULL);
1209 * Here we try to restore the original BIOS settings to avoid
1213 static int i8042_pm_suspend(struct device *dev)
1217 if (pm_suspend_via_firmware())
1218 i8042_controller_reset(true);
1220 /* Set up serio interrupts for system wakeup. */
1221 for (i = 0; i < I8042_NUM_PORTS; i++) {
1222 struct serio *serio = i8042_ports[i].serio;
1224 if (serio && device_may_wakeup(&serio->dev))
1225 enable_irq_wake(i8042_ports[i].irq);
1231 static int i8042_pm_resume_noirq(struct device *dev)
1233 if (!pm_resume_via_firmware())
1234 i8042_interrupt(0, NULL);
1239 static int i8042_pm_resume(struct device *dev)
1244 for (i = 0; i < I8042_NUM_PORTS; i++) {
1245 struct serio *serio = i8042_ports[i].serio;
1247 if (serio && device_may_wakeup(&serio->dev))
1248 disable_irq_wake(i8042_ports[i].irq);
1252 * If platform firmware was not going to be involved in suspend, we did
1253 * not restore the controller state to whatever it had been at boot
1254 * time, so we do not need to do anything.
1256 if (!pm_suspend_via_firmware())
1260 * We only need to reset the controller if we are resuming after handing
1261 * off control to the platform firmware, otherwise we can simply restore
1264 want_reset = pm_resume_via_firmware();
1266 return i8042_controller_resume(want_reset);
1269 static int i8042_pm_thaw(struct device *dev)
1271 i8042_interrupt(0, NULL);
1276 static int i8042_pm_reset(struct device *dev)
1278 i8042_controller_reset(false);
1283 static int i8042_pm_restore(struct device *dev)
1285 return i8042_controller_resume(false);
1288 static const struct dev_pm_ops i8042_pm_ops = {
1289 .suspend = i8042_pm_suspend,
1290 .resume_noirq = i8042_pm_resume_noirq,
1291 .resume = i8042_pm_resume,
1292 .thaw = i8042_pm_thaw,
1293 .poweroff = i8042_pm_reset,
1294 .restore = i8042_pm_restore,
1297 #endif /* CONFIG_PM */
1300 * We need to reset the 8042 back to original mode on system shutdown,
1301 * because otherwise BIOSes will be confused.
1304 static void i8042_shutdown(struct platform_device *dev)
1306 i8042_controller_reset(false);
1309 static int __init i8042_create_kbd_port(void)
1311 struct serio *serio;
1312 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1314 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1318 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1319 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
1320 serio->start = i8042_start;
1321 serio->stop = i8042_stop;
1322 serio->close = i8042_port_close;
1323 serio->ps2_cmd_mutex = &i8042_mutex;
1324 serio->port_data = port;
1325 serio->dev.parent = &i8042_platform_device->dev;
1326 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1327 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1328 strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
1329 sizeof(serio->firmware_id));
1331 port->serio = serio;
1332 port->irq = I8042_KBD_IRQ;
1337 static int __init i8042_create_aux_port(int idx)
1339 struct serio *serio;
1340 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1341 struct i8042_port *port = &i8042_ports[port_no];
1343 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1347 serio->id.type = SERIO_8042;
1348 serio->write = i8042_aux_write;
1349 serio->start = i8042_start;
1350 serio->stop = i8042_stop;
1351 serio->ps2_cmd_mutex = &i8042_mutex;
1352 serio->port_data = port;
1353 serio->dev.parent = &i8042_platform_device->dev;
1355 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1356 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1357 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1358 sizeof(serio->firmware_id));
1359 serio->close = i8042_port_close;
1361 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1362 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1363 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1364 sizeof(serio->firmware_id));
1367 port->serio = serio;
1369 port->irq = I8042_AUX_IRQ;
1374 static void __init i8042_free_kbd_port(void)
1376 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1377 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1380 static void __init i8042_free_aux_ports(void)
1384 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1385 kfree(i8042_ports[i].serio);
1386 i8042_ports[i].serio = NULL;
1390 static void __init i8042_register_ports(void)
1394 for (i = 0; i < I8042_NUM_PORTS; i++) {
1395 struct serio *serio = i8042_ports[i].serio;
1398 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1400 (unsigned long) I8042_DATA_REG,
1401 (unsigned long) I8042_COMMAND_REG,
1402 i8042_ports[i].irq);
1403 serio_register_port(serio);
1404 device_set_wakeup_capable(&serio->dev, true);
1409 static void i8042_unregister_ports(void)
1413 for (i = 0; i < I8042_NUM_PORTS; i++) {
1414 if (i8042_ports[i].serio) {
1415 serio_unregister_port(i8042_ports[i].serio);
1416 i8042_ports[i].serio = NULL;
1421 static void i8042_free_irqs(void)
1423 if (i8042_aux_irq_registered)
1424 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1425 if (i8042_kbd_irq_registered)
1426 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1428 i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1431 static int __init i8042_setup_aux(void)
1433 int (*aux_enable)(void);
1437 if (i8042_check_aux())
1440 if (i8042_nomux || i8042_check_mux()) {
1441 error = i8042_create_aux_port(-1);
1443 goto err_free_ports;
1444 aux_enable = i8042_enable_aux_port;
1446 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1447 error = i8042_create_aux_port(i);
1449 goto err_free_ports;
1451 aux_enable = i8042_enable_mux_ports;
1454 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1455 "i8042", i8042_platform_device);
1457 goto err_free_ports;
1459 error = aux_enable();
1463 i8042_aux_irq_registered = true;
1467 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1469 i8042_free_aux_ports();
1473 static int __init i8042_setup_kbd(void)
1477 error = i8042_create_kbd_port();
1481 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1482 "i8042", i8042_platform_device);
1486 error = i8042_enable_kbd_port();
1490 i8042_kbd_irq_registered = true;
1494 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1496 i8042_free_kbd_port();
1500 static int i8042_kbd_bind_notifier(struct notifier_block *nb,
1501 unsigned long action, void *data)
1503 struct device *dev = data;
1504 struct serio *serio = to_serio_port(dev);
1505 struct i8042_port *port = serio->port_data;
1507 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio)
1511 case BUS_NOTIFY_BOUND_DRIVER:
1512 port->driver_bound = true;
1515 case BUS_NOTIFY_UNBIND_DRIVER:
1516 port->driver_bound = false;
1523 static int __init i8042_probe(struct platform_device *dev)
1527 i8042_platform_device = dev;
1529 if (i8042_reset == I8042_RESET_ALWAYS) {
1530 error = i8042_controller_selftest();
1535 error = i8042_controller_init();
1541 i8042_dritek_enable();
1545 error = i8042_setup_aux();
1546 if (error && error != -ENODEV && error != -EBUSY)
1551 error = i8042_setup_kbd();
1556 * Ok, everything is ready, let's register all serio ports
1558 i8042_register_ports();
1563 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1565 i8042_controller_reset(false);
1566 i8042_platform_device = NULL;
1571 static int i8042_remove(struct platform_device *dev)
1573 i8042_unregister_ports();
1575 i8042_controller_reset(false);
1576 i8042_platform_device = NULL;
1581 static struct platform_driver i8042_driver = {
1585 .pm = &i8042_pm_ops,
1588 .remove = i8042_remove,
1589 .shutdown = i8042_shutdown,
1592 static struct notifier_block i8042_kbd_bind_notifier_block = {
1593 .notifier_call = i8042_kbd_bind_notifier,
1596 static int __init i8042_init(void)
1598 struct platform_device *pdev;
1603 err = i8042_platform_init();
1605 return (err == -ENODEV) ? 0 : err;
1607 err = i8042_controller_check();
1609 goto err_platform_exit;
1611 /* Set this before creating the dev to allow i8042_command to work right away */
1612 i8042_present = true;
1614 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
1616 err = PTR_ERR(pdev);
1617 goto err_platform_exit;
1620 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1621 panic_blink = i8042_panic_blink;
1626 i8042_platform_exit();
1630 static void __exit i8042_exit(void)
1635 platform_device_unregister(i8042_platform_device);
1636 platform_driver_unregister(&i8042_driver);
1637 i8042_platform_exit();
1639 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1643 module_init(i8042_init);
1644 module_exit(i8042_exit);