1 // SPDX-License-Identifier: GPL-2.0-only
3 * i8042 keyboard and mouse controller driver for Linux
5 * Copyright (c) 1999-2004 Vojtech Pavlik
9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11 #include <linux/types.h>
12 #include <linux/delay.h>
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
15 #include <linux/ioport.h>
16 #include <linux/init.h>
17 #include <linux/serio.h>
18 #include <linux/err.h>
19 #include <linux/rcupdate.h>
20 #include <linux/platform_device.h>
21 #include <linux/i8042.h>
22 #include <linux/slab.h>
23 #include <linux/suspend.h>
24 #include <linux/property.h>
28 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
29 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
30 MODULE_LICENSE("GPL");
32 static bool i8042_nokbd;
33 module_param_named(nokbd, i8042_nokbd, bool, 0);
34 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
36 static bool i8042_noaux;
37 module_param_named(noaux, i8042_noaux, bool, 0);
38 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
40 static bool i8042_nomux;
41 module_param_named(nomux, i8042_nomux, bool, 0);
42 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
44 static bool i8042_unlock;
45 module_param_named(unlock, i8042_unlock, bool, 0);
46 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
48 static bool i8042_probe_defer;
49 module_param_named(probe_defer, i8042_probe_defer, bool, 0);
50 MODULE_PARM_DESC(probe_defer, "Allow deferred probing.");
52 enum i8042_controller_reset_mode {
56 #define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM
58 static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT;
59 static int i8042_set_reset(const char *val, const struct kernel_param *kp)
61 enum i8042_controller_reset_mode *arg = kp->arg;
66 error = kstrtobool(val, &reset);
73 *arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER;
77 static const struct kernel_param_ops param_ops_reset_param = {
78 .flags = KERNEL_PARAM_OPS_FL_NOARG,
79 .set = i8042_set_reset,
81 #define param_check_reset_param(name, p) \
82 __param_check(name, p, enum i8042_controller_reset_mode)
83 module_param_named(reset, i8042_reset, reset_param, 0);
84 MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both");
86 static bool i8042_direct;
87 module_param_named(direct, i8042_direct, bool, 0);
88 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
90 static bool i8042_dumbkbd;
91 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
92 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
94 static bool i8042_noloop;
95 module_param_named(noloop, i8042_noloop, bool, 0);
96 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
98 static bool i8042_notimeout;
99 module_param_named(notimeout, i8042_notimeout, bool, 0);
100 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
102 static bool i8042_kbdreset;
103 module_param_named(kbdreset, i8042_kbdreset, bool, 0);
104 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port");
107 static bool i8042_dritek;
108 module_param_named(dritek, i8042_dritek, bool, 0);
109 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
113 static bool i8042_nopnp;
114 module_param_named(nopnp, i8042_nopnp, bool, 0);
115 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
120 static bool i8042_debug;
121 module_param_named(debug, i8042_debug, bool, 0600);
122 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
124 static bool i8042_unmask_kbd_data;
125 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600);
126 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]");
129 static bool i8042_present;
130 static bool i8042_bypass_aux_irq_test;
131 static char i8042_kbd_firmware_id[128];
132 static char i8042_aux_firmware_id[128];
133 static struct fwnode_handle *i8042_kbd_fwnode;
138 * i8042_lock protects serialization between i8042_command and
139 * the interrupt handler.
141 static DEFINE_SPINLOCK(i8042_lock);
144 * Writers to AUX and KBD ports as well as users issuing i8042_command
145 * directly should acquire i8042_mutex (by means of calling
146 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
147 * they do not disturb each other (unfortunately in many i8042
148 * implementations write to one of the ports will immediately abort
149 * command that is being processed by another port).
151 static DEFINE_MUTEX(i8042_mutex);
161 #define I8042_KBD_PORT_NO 0
162 #define I8042_AUX_PORT_NO 1
163 #define I8042_MUX_PORT_NO 2
164 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
166 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
168 static unsigned char i8042_initial_ctr;
169 static unsigned char i8042_ctr;
170 static bool i8042_mux_present;
171 static bool i8042_kbd_irq_registered;
172 static bool i8042_aux_irq_registered;
173 static unsigned char i8042_suppress_kbd_ack;
174 static struct platform_device *i8042_platform_device;
175 static struct notifier_block i8042_kbd_bind_notifier_block;
177 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
178 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
179 struct serio *serio);
181 void i8042_lock_chip(void)
183 mutex_lock(&i8042_mutex);
185 EXPORT_SYMBOL(i8042_lock_chip);
187 void i8042_unlock_chip(void)
189 mutex_unlock(&i8042_mutex);
191 EXPORT_SYMBOL(i8042_unlock_chip);
193 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
194 struct serio *serio))
199 spin_lock_irqsave(&i8042_lock, flags);
201 if (i8042_platform_filter) {
206 i8042_platform_filter = filter;
209 spin_unlock_irqrestore(&i8042_lock, flags);
212 EXPORT_SYMBOL(i8042_install_filter);
214 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
220 spin_lock_irqsave(&i8042_lock, flags);
222 if (i8042_platform_filter != filter) {
227 i8042_platform_filter = NULL;
230 spin_unlock_irqrestore(&i8042_lock, flags);
233 EXPORT_SYMBOL(i8042_remove_filter);
236 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
237 * be ready for reading values from it / writing values to it.
238 * Called always with i8042_lock held.
241 static int i8042_wait_read(void)
245 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
249 return -(i == I8042_CTL_TIMEOUT);
252 static int i8042_wait_write(void)
256 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
260 return -(i == I8042_CTL_TIMEOUT);
264 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
265 * of the i8042 down the toilet.
268 static int i8042_flush(void)
271 unsigned char data, str;
275 spin_lock_irqsave(&i8042_lock, flags);
277 while ((str = i8042_read_status()) & I8042_STR_OBF) {
278 if (count++ < I8042_BUFFER_SIZE) {
280 data = i8042_read_data();
281 dbg("%02x <- i8042 (flush, %s)\n",
282 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
289 spin_unlock_irqrestore(&i8042_lock, flags);
295 * i8042_command() executes a command on the i8042. It also sends the input
296 * parameter(s) of the commands to it, and receives the output value(s). The
297 * parameters are to be stored in the param array, and the output is placed
298 * into the same array. The number of the parameters and output values is
299 * encoded in bits 8-11 of the command number.
302 static int __i8042_command(unsigned char *param, int command)
306 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
309 error = i8042_wait_write();
313 dbg("%02x -> i8042 (command)\n", command & 0xff);
314 i8042_write_command(command & 0xff);
316 for (i = 0; i < ((command >> 12) & 0xf); i++) {
317 error = i8042_wait_write();
319 dbg(" -- i8042 (wait write timeout)\n");
322 dbg("%02x -> i8042 (parameter)\n", param[i]);
323 i8042_write_data(param[i]);
326 for (i = 0; i < ((command >> 8) & 0xf); i++) {
327 error = i8042_wait_read();
329 dbg(" -- i8042 (wait read timeout)\n");
333 if (command == I8042_CMD_AUX_LOOP &&
334 !(i8042_read_status() & I8042_STR_AUXDATA)) {
335 dbg(" -- i8042 (auxerr)\n");
339 param[i] = i8042_read_data();
340 dbg("%02x <- i8042 (return)\n", param[i]);
346 int i8042_command(unsigned char *param, int command)
354 spin_lock_irqsave(&i8042_lock, flags);
355 retval = __i8042_command(param, command);
356 spin_unlock_irqrestore(&i8042_lock, flags);
360 EXPORT_SYMBOL(i8042_command);
363 * i8042_kbd_write() sends a byte out through the keyboard interface.
366 static int i8042_kbd_write(struct serio *port, unsigned char c)
371 spin_lock_irqsave(&i8042_lock, flags);
373 if (!(retval = i8042_wait_write())) {
374 dbg("%02x -> i8042 (kbd-data)\n", c);
378 spin_unlock_irqrestore(&i8042_lock, flags);
384 * i8042_aux_write() sends a byte out through the aux interface.
387 static int i8042_aux_write(struct serio *serio, unsigned char c)
389 struct i8042_port *port = serio->port_data;
391 return i8042_command(&c, port->mux == -1 ?
393 I8042_CMD_MUX_SEND + port->mux);
398 * i8042_port_close attempts to clear AUX or KBD port state by disabling
399 * and then re-enabling it.
402 static void i8042_port_close(struct serio *serio)
406 const char *port_name;
408 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
409 irq_bit = I8042_CTR_AUXINT;
410 disable_bit = I8042_CTR_AUXDIS;
413 irq_bit = I8042_CTR_KBDINT;
414 disable_bit = I8042_CTR_KBDDIS;
418 i8042_ctr &= ~irq_bit;
419 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
420 pr_warn("Can't write CTR while closing %s port\n", port_name);
424 i8042_ctr &= ~disable_bit;
425 i8042_ctr |= irq_bit;
426 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
427 pr_err("Can't reactivate %s port\n", port_name);
430 * See if there is any data appeared while we were messing with
433 i8042_interrupt(0, NULL);
437 * i8042_start() is called by serio core when port is about to finish
438 * registering. It will mark port as existing so i8042_interrupt can
439 * start sending data through it.
441 static int i8042_start(struct serio *serio)
443 struct i8042_port *port = serio->port_data;
445 device_set_wakeup_capable(&serio->dev, true);
448 * On platforms using suspend-to-idle, allow the keyboard to
449 * wake up the system from sleep by enabling keyboard wakeups
450 * by default. This is consistent with keyboard wakeup
451 * behavior on many platforms using suspend-to-RAM (ACPI S3)
454 if (pm_suspend_default_s2idle() &&
455 serio == i8042_ports[I8042_KBD_PORT_NO].serio) {
456 device_set_wakeup_enable(&serio->dev, true);
459 spin_lock_irq(&i8042_lock);
461 spin_unlock_irq(&i8042_lock);
467 * i8042_stop() marks serio port as non-existing so i8042_interrupt
468 * will not try to send data to the port that is about to go away.
469 * The function is called by serio core as part of unregister procedure.
471 static void i8042_stop(struct serio *serio)
473 struct i8042_port *port = serio->port_data;
475 spin_lock_irq(&i8042_lock);
476 port->exists = false;
478 spin_unlock_irq(&i8042_lock);
481 * We need to make sure that interrupt handler finishes using
482 * our serio port before we return from this function.
483 * We synchronize with both AUX and KBD IRQs because there is
484 * a (very unlikely) chance that AUX IRQ is raised for KBD port
487 synchronize_irq(I8042_AUX_IRQ);
488 synchronize_irq(I8042_KBD_IRQ);
492 * i8042_filter() filters out unwanted bytes from the input data stream.
493 * It is called from i8042_interrupt and thus is running with interrupts
494 * off and i8042_lock held.
496 static bool i8042_filter(unsigned char data, unsigned char str,
499 if (unlikely(i8042_suppress_kbd_ack)) {
500 if ((~str & I8042_STR_AUXDATA) &&
501 (data == 0xfa || data == 0xfe)) {
502 i8042_suppress_kbd_ack--;
503 dbg("Extra keyboard ACK - filtered out\n");
508 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
509 dbg("Filtered out by platform filter\n");
517 * i8042_interrupt() is the most important function in this driver -
518 * it handles the interrupts from the i8042, and sends incoming bytes
519 * to the upper layers.
522 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
524 struct i8042_port *port;
527 unsigned char str, data;
529 unsigned int port_no;
533 spin_lock_irqsave(&i8042_lock, flags);
535 str = i8042_read_status();
536 if (unlikely(~str & I8042_STR_OBF)) {
537 spin_unlock_irqrestore(&i8042_lock, flags);
539 dbg("Interrupt %d, without any data\n", irq);
544 data = i8042_read_data();
546 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
547 static unsigned long last_transmit;
548 static unsigned char last_str;
551 if (str & I8042_STR_MUXERR) {
552 dbg("MUX error, status is %02x, data is %02x\n",
555 * When MUXERR condition is signalled the data register can only contain
556 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
557 * it is not always the case. Some KBCs also report 0xfc when there is
558 * nothing connected to the port while others sometimes get confused which
559 * port the data came from and signal error leaving the data intact. They
560 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
561 * to legacy mode yet, when we see one we'll add proper handling).
562 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
563 * rest assume that the data came from the same serio last byte
564 * was transmitted (if transmission happened not too long ago).
569 if (time_before(jiffies, last_transmit + HZ/10)) {
573 fallthrough; /* report timeout */
576 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
577 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
581 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
583 last_transmit = jiffies;
586 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
587 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
589 port_no = (str & I8042_STR_AUXDATA) ?
590 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
593 port = &i8042_ports[port_no];
594 serio = port->exists ? port->serio : NULL;
596 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n",
598 dfl & SERIO_PARITY ? ", bad parity" : "",
599 dfl & SERIO_TIMEOUT ? ", timeout" : "");
601 filtered = i8042_filter(data, str, serio);
603 spin_unlock_irqrestore(&i8042_lock, flags);
605 if (likely(serio && !filtered))
606 serio_interrupt(serio, data, dfl);
609 return IRQ_RETVAL(ret);
613 * i8042_enable_kbd_port enables keyboard port on chip
616 static int i8042_enable_kbd_port(void)
618 i8042_ctr &= ~I8042_CTR_KBDDIS;
619 i8042_ctr |= I8042_CTR_KBDINT;
621 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
622 i8042_ctr &= ~I8042_CTR_KBDINT;
623 i8042_ctr |= I8042_CTR_KBDDIS;
624 pr_err("Failed to enable KBD port\n");
632 * i8042_enable_aux_port enables AUX (mouse) port on chip
635 static int i8042_enable_aux_port(void)
637 i8042_ctr &= ~I8042_CTR_AUXDIS;
638 i8042_ctr |= I8042_CTR_AUXINT;
640 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
641 i8042_ctr &= ~I8042_CTR_AUXINT;
642 i8042_ctr |= I8042_CTR_AUXDIS;
643 pr_err("Failed to enable AUX port\n");
651 * i8042_enable_mux_ports enables 4 individual AUX ports after
652 * the controller has been switched into Multiplexed mode
655 static int i8042_enable_mux_ports(void)
660 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
661 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
662 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
665 return i8042_enable_aux_port();
669 * i8042_set_mux_mode checks whether the controller has an
670 * active multiplexor and puts the chip into Multiplexed (true)
671 * or Legacy (false) mode.
674 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
677 unsigned char param, val;
679 * Get rid of bytes in the queue.
685 * Internal loopback test - send three bytes, they should come back from the
686 * mouse interface, the last should be version.
690 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
692 param = val = multiplex ? 0x56 : 0xf6;
693 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
695 param = val = multiplex ? 0xa4 : 0xa5;
696 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
700 * Workaround for interference with USB Legacy emulation
701 * that causes a v10.12 MUX to be found.
707 *mux_version = param;
713 * i8042_check_mux() checks whether the controller supports the PS/2 Active
714 * Multiplexing specification by Synaptics, Phoenix, Insyde and
718 static int i8042_check_mux(void)
720 unsigned char mux_version;
722 if (i8042_set_mux_mode(true, &mux_version))
725 pr_info("Detected active multiplexing controller, rev %d.%d\n",
726 (mux_version >> 4) & 0xf, mux_version & 0xf);
729 * Disable all muxed ports by disabling AUX.
731 i8042_ctr |= I8042_CTR_AUXDIS;
732 i8042_ctr &= ~I8042_CTR_AUXINT;
734 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
735 pr_err("Failed to disable AUX port, can't use MUX\n");
739 i8042_mux_present = true;
745 * The following is used to test AUX IRQ delivery.
747 static struct completion i8042_aux_irq_delivered;
748 static bool i8042_irq_being_tested;
750 static irqreturn_t i8042_aux_test_irq(int irq, void *dev_id)
753 unsigned char str, data;
756 spin_lock_irqsave(&i8042_lock, flags);
757 str = i8042_read_status();
758 if (str & I8042_STR_OBF) {
759 data = i8042_read_data();
760 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
761 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
762 if (i8042_irq_being_tested &&
763 data == 0xa5 && (str & I8042_STR_AUXDATA))
764 complete(&i8042_aux_irq_delivered);
767 spin_unlock_irqrestore(&i8042_lock, flags);
769 return IRQ_RETVAL(ret);
773 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
774 * verifies success by readinng CTR. Used when testing for presence of AUX
777 static int i8042_toggle_aux(bool on)
782 if (i8042_command(¶m,
783 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
786 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
787 for (i = 0; i < 100; i++) {
790 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
793 if (!(param & I8042_CTR_AUXDIS) == on)
801 * i8042_check_aux() applies as much paranoia as it can at detecting
802 * the presence of an AUX interface.
805 static int i8042_check_aux(void)
808 bool irq_registered = false;
809 bool aux_loop_broken = false;
814 * Get rid of bytes in the queue.
820 * Internal loopback test - filters out AT-type i8042's. Unfortunately
821 * SiS screwed up and their 5597 doesn't support the LOOP command even
822 * though it has an AUX port.
826 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
827 if (retval || param != 0x5a) {
830 * External connection test - filters out AT-soldered PS/2 i8042's
831 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
832 * 0xfa - no error on some notebooks which ignore the spec
833 * Because it's common for chipsets to return error on perfectly functioning
834 * AUX ports, we test for this only when the LOOP command failed.
837 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
838 (param && param != 0xfa && param != 0xff))
842 * If AUX_LOOP completed without error but returned unexpected data
846 aux_loop_broken = true;
850 * Bit assignment test - filters out PS/2 i8042's in AT mode
853 if (i8042_toggle_aux(false)) {
854 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
855 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
858 if (i8042_toggle_aux(true))
862 * Reset keyboard (needed on some laptops to successfully detect
863 * touchpad, e.g., some Gigabyte laptop models with Elantech
866 if (i8042_kbdreset) {
867 pr_warn("Attempting to reset device connected to KBD port\n");
868 i8042_kbd_write(NULL, (unsigned char) 0xff);
872 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
873 * used it for a PCI card or somethig else.
876 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
878 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
879 * is working and hope we are right.
885 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
886 "i8042", i8042_platform_device))
889 irq_registered = true;
891 if (i8042_enable_aux_port())
894 spin_lock_irqsave(&i8042_lock, flags);
896 init_completion(&i8042_aux_irq_delivered);
897 i8042_irq_being_tested = true;
900 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
902 spin_unlock_irqrestore(&i8042_lock, flags);
907 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
908 msecs_to_jiffies(250)) == 0) {
910 * AUX IRQ was never delivered so we need to flush the controller to
911 * get rid of the byte we put there; otherwise keyboard may not work.
913 dbg(" -- i8042 (aux irq test timeout)\n");
921 * Disable the interface.
924 i8042_ctr |= I8042_CTR_AUXDIS;
925 i8042_ctr &= ~I8042_CTR_AUXINT;
927 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
931 free_irq(I8042_AUX_IRQ, i8042_platform_device);
936 static int i8042_controller_check(void)
939 pr_info("No controller found\n");
946 static int i8042_controller_selftest(void)
952 * We try this 5 times; on some really fragile systems this does not
953 * take the first time...
957 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
958 pr_err("i8042 controller selftest timeout\n");
962 if (param == I8042_RET_CTL_TEST)
965 dbg("i8042 controller selftest: %#x != %#x\n",
966 param, I8042_RET_CTL_TEST);
972 * On x86, we don't fail entire i8042 initialization if controller
973 * reset fails in hopes that keyboard port will still be functional
974 * and user will still get a working keyboard. This is especially
975 * important on netbooks. On other arches we trust hardware more.
977 pr_info("giving up on controller selftest, continuing anyway...\n");
980 pr_err("i8042 controller selftest failed\n");
986 * i8042_controller init initializes the i8042 controller, and,
987 * most importantly, sets it into non-xlated mode if that's
991 static int i8042_controller_init(void)
995 unsigned char ctr[2];
998 * Save the CTR for restore on unload / reboot.
1003 pr_err("Unable to get stable CTR read\n");
1010 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
1011 pr_err("Can't read CTR while initializing i8042\n");
1012 return i8042_probe_defer ? -EPROBE_DEFER : -EIO;
1015 } while (n < 2 || ctr[0] != ctr[1]);
1017 i8042_initial_ctr = i8042_ctr = ctr[0];
1020 * Disable the keyboard interface and interrupt.
1023 i8042_ctr |= I8042_CTR_KBDDIS;
1024 i8042_ctr &= ~I8042_CTR_KBDINT;
1030 spin_lock_irqsave(&i8042_lock, flags);
1031 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
1033 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
1035 pr_warn("Warning: Keylock active\n");
1037 spin_unlock_irqrestore(&i8042_lock, flags);
1040 * If the chip is configured into nontranslated mode by the BIOS, don't
1041 * bother enabling translating and be happy.
1044 if (~i8042_ctr & I8042_CTR_XLATE)
1045 i8042_direct = true;
1048 * Set nontranslated mode for the kbd interface if requested by an option.
1049 * After this the kbd interface becomes a simple serial in/out, like the aux
1050 * interface is. We don't do this by default, since it can confuse notebook
1055 i8042_ctr &= ~I8042_CTR_XLATE;
1061 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1062 pr_err("Can't write CTR while initializing i8042\n");
1067 * Flush whatever accumulated while we were disabling keyboard port.
1077 * Reset the controller and reset CRT to the original value set by BIOS.
1080 static void i8042_controller_reset(bool s2r_wants_reset)
1085 * Disable both KBD and AUX interfaces so they don't get in the way
1088 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1089 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1091 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1092 pr_warn("Can't write CTR while resetting\n");
1095 * Disable MUX mode if present.
1098 if (i8042_mux_present)
1099 i8042_set_mux_mode(false, NULL);
1102 * Reset the controller if requested.
1105 if (i8042_reset == I8042_RESET_ALWAYS ||
1106 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1107 i8042_controller_selftest();
1111 * Restore the original control register setting.
1114 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1115 pr_warn("Can't restore CTR\n");
1120 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1121 * when kernel panics. Flashing LEDs is useful for users running X who may
1122 * not see the console and will help distinguishing panics from "real"
1125 * Note that DELAY has a limit of 10ms so we will not get stuck here
1126 * waiting for KBC to free up even if KBD interrupt is off
1129 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1131 static long i8042_panic_blink(int state)
1136 led = (state) ? 0x01 | 0x04 : 0;
1137 while (i8042_read_status() & I8042_STR_IBF)
1139 dbg("%02x -> i8042 (panic blink)\n", 0xed);
1140 i8042_suppress_kbd_ack = 2;
1141 i8042_write_data(0xed); /* set leds */
1143 while (i8042_read_status() & I8042_STR_IBF)
1146 dbg("%02x -> i8042 (panic blink)\n", led);
1147 i8042_write_data(led);
1155 static void i8042_dritek_enable(void)
1157 unsigned char param = 0x90;
1160 error = i8042_command(¶m, 0x1059);
1162 pr_warn("Failed to enable DRITEK extension: %d\n", error);
1169 * Here we try to reset everything back to a state we had
1170 * before suspending.
1173 static int i8042_controller_resume(bool s2r_wants_reset)
1177 error = i8042_controller_check();
1181 if (i8042_reset == I8042_RESET_ALWAYS ||
1182 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1183 error = i8042_controller_selftest();
1189 * Restore original CTR value and disable all ports
1192 i8042_ctr = i8042_initial_ctr;
1194 i8042_ctr &= ~I8042_CTR_XLATE;
1195 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1196 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1197 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1198 pr_warn("Can't write CTR to resume, retrying...\n");
1200 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1201 pr_err("CTR write retry failed\n");
1209 i8042_dritek_enable();
1212 if (i8042_mux_present) {
1213 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1214 pr_warn("failed to resume active multiplexor, mouse won't work\n");
1215 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1216 i8042_enable_aux_port();
1218 if (i8042_ports[I8042_KBD_PORT_NO].serio)
1219 i8042_enable_kbd_port();
1221 i8042_interrupt(0, NULL);
1227 * Here we try to restore the original BIOS settings to avoid
1231 static int i8042_pm_suspend(struct device *dev)
1235 if (pm_suspend_via_firmware())
1236 i8042_controller_reset(true);
1238 /* Set up serio interrupts for system wakeup. */
1239 for (i = 0; i < I8042_NUM_PORTS; i++) {
1240 struct serio *serio = i8042_ports[i].serio;
1242 if (serio && device_may_wakeup(&serio->dev))
1243 enable_irq_wake(i8042_ports[i].irq);
1249 static int i8042_pm_resume_noirq(struct device *dev)
1251 if (!pm_resume_via_firmware())
1252 i8042_interrupt(0, NULL);
1257 static int i8042_pm_resume(struct device *dev)
1262 for (i = 0; i < I8042_NUM_PORTS; i++) {
1263 struct serio *serio = i8042_ports[i].serio;
1265 if (serio && device_may_wakeup(&serio->dev))
1266 disable_irq_wake(i8042_ports[i].irq);
1270 * If platform firmware was not going to be involved in suspend, we did
1271 * not restore the controller state to whatever it had been at boot
1272 * time, so we do not need to do anything.
1274 if (!pm_suspend_via_firmware())
1278 * We only need to reset the controller if we are resuming after handing
1279 * off control to the platform firmware, otherwise we can simply restore
1282 want_reset = pm_resume_via_firmware();
1284 return i8042_controller_resume(want_reset);
1287 static int i8042_pm_thaw(struct device *dev)
1289 i8042_interrupt(0, NULL);
1294 static int i8042_pm_reset(struct device *dev)
1296 i8042_controller_reset(false);
1301 static int i8042_pm_restore(struct device *dev)
1303 return i8042_controller_resume(false);
1306 static const struct dev_pm_ops i8042_pm_ops = {
1307 .suspend = i8042_pm_suspend,
1308 .resume_noirq = i8042_pm_resume_noirq,
1309 .resume = i8042_pm_resume,
1310 .thaw = i8042_pm_thaw,
1311 .poweroff = i8042_pm_reset,
1312 .restore = i8042_pm_restore,
1315 #endif /* CONFIG_PM */
1318 * We need to reset the 8042 back to original mode on system shutdown,
1319 * because otherwise BIOSes will be confused.
1322 static void i8042_shutdown(struct platform_device *dev)
1324 i8042_controller_reset(false);
1327 static int i8042_create_kbd_port(void)
1329 struct serio *serio;
1330 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1332 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1336 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1337 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
1338 serio->start = i8042_start;
1339 serio->stop = i8042_stop;
1340 serio->close = i8042_port_close;
1341 serio->ps2_cmd_mutex = &i8042_mutex;
1342 serio->port_data = port;
1343 serio->dev.parent = &i8042_platform_device->dev;
1344 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1345 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1346 strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
1347 sizeof(serio->firmware_id));
1348 set_primary_fwnode(&serio->dev, i8042_kbd_fwnode);
1350 port->serio = serio;
1351 port->irq = I8042_KBD_IRQ;
1356 static int i8042_create_aux_port(int idx)
1358 struct serio *serio;
1359 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1360 struct i8042_port *port = &i8042_ports[port_no];
1362 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1366 serio->id.type = SERIO_8042;
1367 serio->write = i8042_aux_write;
1368 serio->start = i8042_start;
1369 serio->stop = i8042_stop;
1370 serio->ps2_cmd_mutex = &i8042_mutex;
1371 serio->port_data = port;
1372 serio->dev.parent = &i8042_platform_device->dev;
1374 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1375 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1376 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1377 sizeof(serio->firmware_id));
1378 serio->close = i8042_port_close;
1380 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1381 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1382 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1383 sizeof(serio->firmware_id));
1386 port->serio = serio;
1388 port->irq = I8042_AUX_IRQ;
1393 static void i8042_free_kbd_port(void)
1395 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1396 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1399 static void i8042_free_aux_ports(void)
1403 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1404 kfree(i8042_ports[i].serio);
1405 i8042_ports[i].serio = NULL;
1409 static void i8042_register_ports(void)
1413 for (i = 0; i < I8042_NUM_PORTS; i++) {
1414 struct serio *serio = i8042_ports[i].serio;
1419 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1421 (unsigned long) I8042_DATA_REG,
1422 (unsigned long) I8042_COMMAND_REG,
1423 i8042_ports[i].irq);
1424 serio_register_port(serio);
1428 static void i8042_unregister_ports(void)
1432 for (i = 0; i < I8042_NUM_PORTS; i++) {
1433 if (i8042_ports[i].serio) {
1434 serio_unregister_port(i8042_ports[i].serio);
1435 i8042_ports[i].serio = NULL;
1440 static void i8042_free_irqs(void)
1442 if (i8042_aux_irq_registered)
1443 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1444 if (i8042_kbd_irq_registered)
1445 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1447 i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1450 static int i8042_setup_aux(void)
1452 int (*aux_enable)(void);
1456 if (i8042_check_aux())
1459 if (i8042_nomux || i8042_check_mux()) {
1460 error = i8042_create_aux_port(-1);
1462 goto err_free_ports;
1463 aux_enable = i8042_enable_aux_port;
1465 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1466 error = i8042_create_aux_port(i);
1468 goto err_free_ports;
1470 aux_enable = i8042_enable_mux_ports;
1473 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1474 "i8042", i8042_platform_device);
1476 goto err_free_ports;
1478 error = aux_enable();
1482 i8042_aux_irq_registered = true;
1486 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1488 i8042_free_aux_ports();
1492 static int i8042_setup_kbd(void)
1496 error = i8042_create_kbd_port();
1500 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1501 "i8042", i8042_platform_device);
1505 error = i8042_enable_kbd_port();
1509 i8042_kbd_irq_registered = true;
1513 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1515 i8042_free_kbd_port();
1519 static int i8042_kbd_bind_notifier(struct notifier_block *nb,
1520 unsigned long action, void *data)
1522 struct device *dev = data;
1523 struct serio *serio = to_serio_port(dev);
1524 struct i8042_port *port = serio->port_data;
1526 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio)
1530 case BUS_NOTIFY_BOUND_DRIVER:
1531 port->driver_bound = true;
1534 case BUS_NOTIFY_UNBIND_DRIVER:
1535 port->driver_bound = false;
1542 static int i8042_probe(struct platform_device *dev)
1546 i8042_platform_device = dev;
1548 if (i8042_reset == I8042_RESET_ALWAYS) {
1549 error = i8042_controller_selftest();
1554 error = i8042_controller_init();
1560 i8042_dritek_enable();
1564 error = i8042_setup_aux();
1565 if (error && error != -ENODEV && error != -EBUSY)
1570 error = i8042_setup_kbd();
1575 * Ok, everything is ready, let's register all serio ports
1577 i8042_register_ports();
1582 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1584 i8042_controller_reset(false);
1585 i8042_platform_device = NULL;
1590 static int i8042_remove(struct platform_device *dev)
1592 i8042_unregister_ports();
1594 i8042_controller_reset(false);
1595 i8042_platform_device = NULL;
1600 static struct platform_driver i8042_driver = {
1604 .pm = &i8042_pm_ops,
1607 .probe = i8042_probe,
1608 .remove = i8042_remove,
1609 .shutdown = i8042_shutdown,
1612 static struct notifier_block i8042_kbd_bind_notifier_block = {
1613 .notifier_call = i8042_kbd_bind_notifier,
1616 static int __init i8042_init(void)
1622 err = i8042_platform_init();
1624 return (err == -ENODEV) ? 0 : err;
1626 err = i8042_controller_check();
1628 goto err_platform_exit;
1630 /* Set this before creating the dev to allow i8042_command to work right away */
1631 i8042_present = true;
1633 err = platform_driver_register(&i8042_driver);
1635 goto err_platform_exit;
1637 i8042_platform_device = platform_device_alloc("i8042", -1);
1638 if (!i8042_platform_device) {
1640 goto err_unregister_driver;
1643 err = platform_device_add(i8042_platform_device);
1645 goto err_free_device;
1647 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1648 panic_blink = i8042_panic_blink;
1653 platform_device_put(i8042_platform_device);
1654 err_unregister_driver:
1655 platform_driver_unregister(&i8042_driver);
1657 i8042_platform_exit();
1661 static void __exit i8042_exit(void)
1666 platform_device_unregister(i8042_platform_device);
1667 platform_driver_unregister(&i8042_driver);
1668 i8042_platform_exit();
1670 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1674 module_init(i8042_init);
1675 module_exit(i8042_exit);