2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/types.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/serio.h>
22 #include <linux/err.h>
23 #include <linux/rcupdate.h>
24 #include <linux/platform_device.h>
25 #include <linux/i8042.h>
26 #include <linux/slab.h>
27 #include <linux/suspend.h>
31 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
32 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
33 MODULE_LICENSE("GPL");
35 static bool i8042_nokbd;
36 module_param_named(nokbd, i8042_nokbd, bool, 0);
37 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
39 static bool i8042_noaux;
40 module_param_named(noaux, i8042_noaux, bool, 0);
41 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
43 static bool i8042_nomux;
44 module_param_named(nomux, i8042_nomux, bool, 0);
45 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
47 static bool i8042_unlock;
48 module_param_named(unlock, i8042_unlock, bool, 0);
49 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
51 enum i8042_controller_reset_mode {
55 #define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM
57 static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT;
58 static int i8042_set_reset(const char *val, const struct kernel_param *kp)
60 enum i8042_controller_reset_mode *arg = kp->arg;
65 error = kstrtobool(val, &reset);
72 *arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER;
76 static const struct kernel_param_ops param_ops_reset_param = {
77 .flags = KERNEL_PARAM_OPS_FL_NOARG,
78 .set = i8042_set_reset,
80 #define param_check_reset_param(name, p) \
81 __param_check(name, p, enum i8042_controller_reset_mode)
82 module_param_named(reset, i8042_reset, reset_param, 0);
83 MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both");
85 static bool i8042_direct;
86 module_param_named(direct, i8042_direct, bool, 0);
87 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
89 static bool i8042_dumbkbd;
90 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
91 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
93 static bool i8042_noloop;
94 module_param_named(noloop, i8042_noloop, bool, 0);
95 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
97 static bool i8042_notimeout;
98 module_param_named(notimeout, i8042_notimeout, bool, 0);
99 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
101 static bool i8042_kbdreset;
102 module_param_named(kbdreset, i8042_kbdreset, bool, 0);
103 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port");
106 static bool i8042_dritek;
107 module_param_named(dritek, i8042_dritek, bool, 0);
108 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
112 static bool i8042_nopnp;
113 module_param_named(nopnp, i8042_nopnp, bool, 0);
114 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
119 static bool i8042_debug;
120 module_param_named(debug, i8042_debug, bool, 0600);
121 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
123 static bool i8042_unmask_kbd_data;
124 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600);
125 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]");
128 static bool i8042_present;
129 static bool i8042_bypass_aux_irq_test;
130 static char i8042_kbd_firmware_id[128];
131 static char i8042_aux_firmware_id[128];
136 * i8042_lock protects serialization between i8042_command and
137 * the interrupt handler.
139 static DEFINE_SPINLOCK(i8042_lock);
142 * Writers to AUX and KBD ports as well as users issuing i8042_command
143 * directly should acquire i8042_mutex (by means of calling
144 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
145 * they do not disturb each other (unfortunately in many i8042
146 * implementations write to one of the ports will immediately abort
147 * command that is being processed by another port).
149 static DEFINE_MUTEX(i8042_mutex);
159 #define I8042_KBD_PORT_NO 0
160 #define I8042_AUX_PORT_NO 1
161 #define I8042_MUX_PORT_NO 2
162 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
164 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
166 static unsigned char i8042_initial_ctr;
167 static unsigned char i8042_ctr;
168 static bool i8042_mux_present;
169 static bool i8042_kbd_irq_registered;
170 static bool i8042_aux_irq_registered;
171 static unsigned char i8042_suppress_kbd_ack;
172 static struct platform_device *i8042_platform_device;
173 static struct notifier_block i8042_kbd_bind_notifier_block;
175 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
176 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
177 struct serio *serio);
179 void i8042_lock_chip(void)
181 mutex_lock(&i8042_mutex);
183 EXPORT_SYMBOL(i8042_lock_chip);
185 void i8042_unlock_chip(void)
187 mutex_unlock(&i8042_mutex);
189 EXPORT_SYMBOL(i8042_unlock_chip);
191 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
192 struct serio *serio))
197 spin_lock_irqsave(&i8042_lock, flags);
199 if (i8042_platform_filter) {
204 i8042_platform_filter = filter;
207 spin_unlock_irqrestore(&i8042_lock, flags);
210 EXPORT_SYMBOL(i8042_install_filter);
212 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
218 spin_lock_irqsave(&i8042_lock, flags);
220 if (i8042_platform_filter != filter) {
225 i8042_platform_filter = NULL;
228 spin_unlock_irqrestore(&i8042_lock, flags);
231 EXPORT_SYMBOL(i8042_remove_filter);
234 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
235 * be ready for reading values from it / writing values to it.
236 * Called always with i8042_lock held.
239 static int i8042_wait_read(void)
243 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
247 return -(i == I8042_CTL_TIMEOUT);
250 static int i8042_wait_write(void)
254 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
258 return -(i == I8042_CTL_TIMEOUT);
262 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
263 * of the i8042 down the toilet.
266 static int i8042_flush(void)
269 unsigned char data, str;
273 spin_lock_irqsave(&i8042_lock, flags);
275 while ((str = i8042_read_status()) & I8042_STR_OBF) {
276 if (count++ < I8042_BUFFER_SIZE) {
278 data = i8042_read_data();
279 dbg("%02x <- i8042 (flush, %s)\n",
280 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
287 spin_unlock_irqrestore(&i8042_lock, flags);
293 * i8042_command() executes a command on the i8042. It also sends the input
294 * parameter(s) of the commands to it, and receives the output value(s). The
295 * parameters are to be stored in the param array, and the output is placed
296 * into the same array. The number of the parameters and output values is
297 * encoded in bits 8-11 of the command number.
300 static int __i8042_command(unsigned char *param, int command)
304 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
307 error = i8042_wait_write();
311 dbg("%02x -> i8042 (command)\n", command & 0xff);
312 i8042_write_command(command & 0xff);
314 for (i = 0; i < ((command >> 12) & 0xf); i++) {
315 error = i8042_wait_write();
317 dbg(" -- i8042 (wait write timeout)\n");
320 dbg("%02x -> i8042 (parameter)\n", param[i]);
321 i8042_write_data(param[i]);
324 for (i = 0; i < ((command >> 8) & 0xf); i++) {
325 error = i8042_wait_read();
327 dbg(" -- i8042 (wait read timeout)\n");
331 if (command == I8042_CMD_AUX_LOOP &&
332 !(i8042_read_status() & I8042_STR_AUXDATA)) {
333 dbg(" -- i8042 (auxerr)\n");
337 param[i] = i8042_read_data();
338 dbg("%02x <- i8042 (return)\n", param[i]);
344 int i8042_command(unsigned char *param, int command)
352 spin_lock_irqsave(&i8042_lock, flags);
353 retval = __i8042_command(param, command);
354 spin_unlock_irqrestore(&i8042_lock, flags);
358 EXPORT_SYMBOL(i8042_command);
361 * i8042_kbd_write() sends a byte out through the keyboard interface.
364 static int i8042_kbd_write(struct serio *port, unsigned char c)
369 spin_lock_irqsave(&i8042_lock, flags);
371 if (!(retval = i8042_wait_write())) {
372 dbg("%02x -> i8042 (kbd-data)\n", c);
376 spin_unlock_irqrestore(&i8042_lock, flags);
382 * i8042_aux_write() sends a byte out through the aux interface.
385 static int i8042_aux_write(struct serio *serio, unsigned char c)
387 struct i8042_port *port = serio->port_data;
389 return i8042_command(&c, port->mux == -1 ?
391 I8042_CMD_MUX_SEND + port->mux);
396 * i8042_port_close attempts to clear AUX or KBD port state by disabling
397 * and then re-enabling it.
400 static void i8042_port_close(struct serio *serio)
404 const char *port_name;
406 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
407 irq_bit = I8042_CTR_AUXINT;
408 disable_bit = I8042_CTR_AUXDIS;
411 irq_bit = I8042_CTR_KBDINT;
412 disable_bit = I8042_CTR_KBDDIS;
416 i8042_ctr &= ~irq_bit;
417 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
418 pr_warn("Can't write CTR while closing %s port\n", port_name);
422 i8042_ctr &= ~disable_bit;
423 i8042_ctr |= irq_bit;
424 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
425 pr_err("Can't reactivate %s port\n", port_name);
428 * See if there is any data appeared while we were messing with
431 i8042_interrupt(0, NULL);
435 * i8042_start() is called by serio core when port is about to finish
436 * registering. It will mark port as existing so i8042_interrupt can
437 * start sending data through it.
439 static int i8042_start(struct serio *serio)
441 struct i8042_port *port = serio->port_data;
443 spin_lock_irq(&i8042_lock);
445 spin_unlock_irq(&i8042_lock);
451 * i8042_stop() marks serio port as non-existing so i8042_interrupt
452 * will not try to send data to the port that is about to go away.
453 * The function is called by serio core as part of unregister procedure.
455 static void i8042_stop(struct serio *serio)
457 struct i8042_port *port = serio->port_data;
459 spin_lock_irq(&i8042_lock);
460 port->exists = false;
462 spin_unlock_irq(&i8042_lock);
465 * We need to make sure that interrupt handler finishes using
466 * our serio port before we return from this function.
467 * We synchronize with both AUX and KBD IRQs because there is
468 * a (very unlikely) chance that AUX IRQ is raised for KBD port
471 synchronize_irq(I8042_AUX_IRQ);
472 synchronize_irq(I8042_KBD_IRQ);
476 * i8042_filter() filters out unwanted bytes from the input data stream.
477 * It is called from i8042_interrupt and thus is running with interrupts
478 * off and i8042_lock held.
480 static bool i8042_filter(unsigned char data, unsigned char str,
483 if (unlikely(i8042_suppress_kbd_ack)) {
484 if ((~str & I8042_STR_AUXDATA) &&
485 (data == 0xfa || data == 0xfe)) {
486 i8042_suppress_kbd_ack--;
487 dbg("Extra keyboard ACK - filtered out\n");
492 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
493 dbg("Filtered out by platform filter\n");
501 * i8042_interrupt() is the most important function in this driver -
502 * it handles the interrupts from the i8042, and sends incoming bytes
503 * to the upper layers.
506 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
508 struct i8042_port *port;
511 unsigned char str, data;
513 unsigned int port_no;
517 spin_lock_irqsave(&i8042_lock, flags);
519 str = i8042_read_status();
520 if (unlikely(~str & I8042_STR_OBF)) {
521 spin_unlock_irqrestore(&i8042_lock, flags);
523 dbg("Interrupt %d, without any data\n", irq);
528 data = i8042_read_data();
530 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
531 static unsigned long last_transmit;
532 static unsigned char last_str;
535 if (str & I8042_STR_MUXERR) {
536 dbg("MUX error, status is %02x, data is %02x\n",
539 * When MUXERR condition is signalled the data register can only contain
540 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
541 * it is not always the case. Some KBCs also report 0xfc when there is
542 * nothing connected to the port while others sometimes get confused which
543 * port the data came from and signal error leaving the data intact. They
544 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
545 * to legacy mode yet, when we see one we'll add proper handling).
546 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
547 * rest assume that the data came from the same serio last byte
548 * was transmitted (if transmission happened not too long ago).
553 if (time_before(jiffies, last_transmit + HZ/10)) {
557 /* fall through - report timeout */
560 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
561 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
565 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
567 last_transmit = jiffies;
570 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
571 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
573 port_no = (str & I8042_STR_AUXDATA) ?
574 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
577 port = &i8042_ports[port_no];
578 serio = port->exists ? port->serio : NULL;
580 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n",
582 dfl & SERIO_PARITY ? ", bad parity" : "",
583 dfl & SERIO_TIMEOUT ? ", timeout" : "");
585 filtered = i8042_filter(data, str, serio);
587 spin_unlock_irqrestore(&i8042_lock, flags);
589 if (likely(serio && !filtered))
590 serio_interrupt(serio, data, dfl);
593 return IRQ_RETVAL(ret);
597 * i8042_enable_kbd_port enables keyboard port on chip
600 static int i8042_enable_kbd_port(void)
602 i8042_ctr &= ~I8042_CTR_KBDDIS;
603 i8042_ctr |= I8042_CTR_KBDINT;
605 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
606 i8042_ctr &= ~I8042_CTR_KBDINT;
607 i8042_ctr |= I8042_CTR_KBDDIS;
608 pr_err("Failed to enable KBD port\n");
616 * i8042_enable_aux_port enables AUX (mouse) port on chip
619 static int i8042_enable_aux_port(void)
621 i8042_ctr &= ~I8042_CTR_AUXDIS;
622 i8042_ctr |= I8042_CTR_AUXINT;
624 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
625 i8042_ctr &= ~I8042_CTR_AUXINT;
626 i8042_ctr |= I8042_CTR_AUXDIS;
627 pr_err("Failed to enable AUX port\n");
635 * i8042_enable_mux_ports enables 4 individual AUX ports after
636 * the controller has been switched into Multiplexed mode
639 static int i8042_enable_mux_ports(void)
644 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
645 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
646 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
649 return i8042_enable_aux_port();
653 * i8042_set_mux_mode checks whether the controller has an
654 * active multiplexor and puts the chip into Multiplexed (true)
655 * or Legacy (false) mode.
658 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
661 unsigned char param, val;
663 * Get rid of bytes in the queue.
669 * Internal loopback test - send three bytes, they should come back from the
670 * mouse interface, the last should be version.
674 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
676 param = val = multiplex ? 0x56 : 0xf6;
677 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
679 param = val = multiplex ? 0xa4 : 0xa5;
680 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
684 * Workaround for interference with USB Legacy emulation
685 * that causes a v10.12 MUX to be found.
691 *mux_version = param;
697 * i8042_check_mux() checks whether the controller supports the PS/2 Active
698 * Multiplexing specification by Synaptics, Phoenix, Insyde and
702 static int __init i8042_check_mux(void)
704 unsigned char mux_version;
706 if (i8042_set_mux_mode(true, &mux_version))
709 pr_info("Detected active multiplexing controller, rev %d.%d\n",
710 (mux_version >> 4) & 0xf, mux_version & 0xf);
713 * Disable all muxed ports by disabling AUX.
715 i8042_ctr |= I8042_CTR_AUXDIS;
716 i8042_ctr &= ~I8042_CTR_AUXINT;
718 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
719 pr_err("Failed to disable AUX port, can't use MUX\n");
723 i8042_mux_present = true;
729 * The following is used to test AUX IRQ delivery.
731 static struct completion i8042_aux_irq_delivered __initdata;
732 static bool i8042_irq_being_tested __initdata;
734 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
737 unsigned char str, data;
740 spin_lock_irqsave(&i8042_lock, flags);
741 str = i8042_read_status();
742 if (str & I8042_STR_OBF) {
743 data = i8042_read_data();
744 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
745 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
746 if (i8042_irq_being_tested &&
747 data == 0xa5 && (str & I8042_STR_AUXDATA))
748 complete(&i8042_aux_irq_delivered);
751 spin_unlock_irqrestore(&i8042_lock, flags);
753 return IRQ_RETVAL(ret);
757 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
758 * verifies success by readinng CTR. Used when testing for presence of AUX
761 static int __init i8042_toggle_aux(bool on)
766 if (i8042_command(¶m,
767 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
770 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
771 for (i = 0; i < 100; i++) {
774 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
777 if (!(param & I8042_CTR_AUXDIS) == on)
785 * i8042_check_aux() applies as much paranoia as it can at detecting
786 * the presence of an AUX interface.
789 static int __init i8042_check_aux(void)
792 bool irq_registered = false;
793 bool aux_loop_broken = false;
798 * Get rid of bytes in the queue.
804 * Internal loopback test - filters out AT-type i8042's. Unfortunately
805 * SiS screwed up and their 5597 doesn't support the LOOP command even
806 * though it has an AUX port.
810 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
811 if (retval || param != 0x5a) {
814 * External connection test - filters out AT-soldered PS/2 i8042's
815 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
816 * 0xfa - no error on some notebooks which ignore the spec
817 * Because it's common for chipsets to return error on perfectly functioning
818 * AUX ports, we test for this only when the LOOP command failed.
821 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
822 (param && param != 0xfa && param != 0xff))
826 * If AUX_LOOP completed without error but returned unexpected data
830 aux_loop_broken = true;
834 * Bit assignment test - filters out PS/2 i8042's in AT mode
837 if (i8042_toggle_aux(false)) {
838 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
839 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
842 if (i8042_toggle_aux(true))
846 * Reset keyboard (needed on some laptops to successfully detect
847 * touchpad, e.g., some Gigabyte laptop models with Elantech
850 if (i8042_kbdreset) {
851 pr_warn("Attempting to reset device connected to KBD port\n");
852 i8042_kbd_write(NULL, (unsigned char) 0xff);
856 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
857 * used it for a PCI card or somethig else.
860 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
862 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
863 * is working and hope we are right.
869 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
870 "i8042", i8042_platform_device))
873 irq_registered = true;
875 if (i8042_enable_aux_port())
878 spin_lock_irqsave(&i8042_lock, flags);
880 init_completion(&i8042_aux_irq_delivered);
881 i8042_irq_being_tested = true;
884 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
886 spin_unlock_irqrestore(&i8042_lock, flags);
891 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
892 msecs_to_jiffies(250)) == 0) {
894 * AUX IRQ was never delivered so we need to flush the controller to
895 * get rid of the byte we put there; otherwise keyboard may not work.
897 dbg(" -- i8042 (aux irq test timeout)\n");
905 * Disable the interface.
908 i8042_ctr |= I8042_CTR_AUXDIS;
909 i8042_ctr &= ~I8042_CTR_AUXINT;
911 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
915 free_irq(I8042_AUX_IRQ, i8042_platform_device);
920 static int i8042_controller_check(void)
923 pr_info("No controller found\n");
930 static int i8042_controller_selftest(void)
936 * We try this 5 times; on some really fragile systems this does not
937 * take the first time...
941 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
942 pr_err("i8042 controller selftest timeout\n");
946 if (param == I8042_RET_CTL_TEST)
949 dbg("i8042 controller selftest: %#x != %#x\n",
950 param, I8042_RET_CTL_TEST);
956 * On x86, we don't fail entire i8042 initialization if controller
957 * reset fails in hopes that keyboard port will still be functional
958 * and user will still get a working keyboard. This is especially
959 * important on netbooks. On other arches we trust hardware more.
961 pr_info("giving up on controller selftest, continuing anyway...\n");
964 pr_err("i8042 controller selftest failed\n");
970 * i8042_controller init initializes the i8042 controller, and,
971 * most importantly, sets it into non-xlated mode if that's
975 static int i8042_controller_init(void)
979 unsigned char ctr[2];
982 * Save the CTR for restore on unload / reboot.
987 pr_err("Unable to get stable CTR read\n");
994 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
995 pr_err("Can't read CTR while initializing i8042\n");
999 } while (n < 2 || ctr[0] != ctr[1]);
1001 i8042_initial_ctr = i8042_ctr = ctr[0];
1004 * Disable the keyboard interface and interrupt.
1007 i8042_ctr |= I8042_CTR_KBDDIS;
1008 i8042_ctr &= ~I8042_CTR_KBDINT;
1014 spin_lock_irqsave(&i8042_lock, flags);
1015 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
1017 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
1019 pr_warn("Warning: Keylock active\n");
1021 spin_unlock_irqrestore(&i8042_lock, flags);
1024 * If the chip is configured into nontranslated mode by the BIOS, don't
1025 * bother enabling translating and be happy.
1028 if (~i8042_ctr & I8042_CTR_XLATE)
1029 i8042_direct = true;
1032 * Set nontranslated mode for the kbd interface if requested by an option.
1033 * After this the kbd interface becomes a simple serial in/out, like the aux
1034 * interface is. We don't do this by default, since it can confuse notebook
1039 i8042_ctr &= ~I8042_CTR_XLATE;
1045 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1046 pr_err("Can't write CTR while initializing i8042\n");
1051 * Flush whatever accumulated while we were disabling keyboard port.
1061 * Reset the controller and reset CRT to the original value set by BIOS.
1064 static void i8042_controller_reset(bool s2r_wants_reset)
1069 * Disable both KBD and AUX interfaces so they don't get in the way
1072 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1073 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1075 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1076 pr_warn("Can't write CTR while resetting\n");
1079 * Disable MUX mode if present.
1082 if (i8042_mux_present)
1083 i8042_set_mux_mode(false, NULL);
1086 * Reset the controller if requested.
1089 if (i8042_reset == I8042_RESET_ALWAYS ||
1090 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1091 i8042_controller_selftest();
1095 * Restore the original control register setting.
1098 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1099 pr_warn("Can't restore CTR\n");
1104 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1105 * when kernel panics. Flashing LEDs is useful for users running X who may
1106 * not see the console and will help distinguishing panics from "real"
1109 * Note that DELAY has a limit of 10ms so we will not get stuck here
1110 * waiting for KBC to free up even if KBD interrupt is off
1113 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1115 static long i8042_panic_blink(int state)
1120 led = (state) ? 0x01 | 0x04 : 0;
1121 while (i8042_read_status() & I8042_STR_IBF)
1123 dbg("%02x -> i8042 (panic blink)\n", 0xed);
1124 i8042_suppress_kbd_ack = 2;
1125 i8042_write_data(0xed); /* set leds */
1127 while (i8042_read_status() & I8042_STR_IBF)
1130 dbg("%02x -> i8042 (panic blink)\n", led);
1131 i8042_write_data(led);
1139 static void i8042_dritek_enable(void)
1141 unsigned char param = 0x90;
1144 error = i8042_command(¶m, 0x1059);
1146 pr_warn("Failed to enable DRITEK extension: %d\n", error);
1153 * Here we try to reset everything back to a state we had
1154 * before suspending.
1157 static int i8042_controller_resume(bool s2r_wants_reset)
1161 error = i8042_controller_check();
1165 if (i8042_reset == I8042_RESET_ALWAYS ||
1166 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1167 error = i8042_controller_selftest();
1173 * Restore original CTR value and disable all ports
1176 i8042_ctr = i8042_initial_ctr;
1178 i8042_ctr &= ~I8042_CTR_XLATE;
1179 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1180 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1181 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1182 pr_warn("Can't write CTR to resume, retrying...\n");
1184 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1185 pr_err("CTR write retry failed\n");
1193 i8042_dritek_enable();
1196 if (i8042_mux_present) {
1197 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1198 pr_warn("failed to resume active multiplexor, mouse won't work\n");
1199 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1200 i8042_enable_aux_port();
1202 if (i8042_ports[I8042_KBD_PORT_NO].serio)
1203 i8042_enable_kbd_port();
1205 i8042_interrupt(0, NULL);
1211 * Here we try to restore the original BIOS settings to avoid
1215 static int i8042_pm_suspend(struct device *dev)
1219 if (pm_suspend_via_firmware())
1220 i8042_controller_reset(true);
1222 /* Set up serio interrupts for system wakeup. */
1223 for (i = 0; i < I8042_NUM_PORTS; i++) {
1224 struct serio *serio = i8042_ports[i].serio;
1226 if (serio && device_may_wakeup(&serio->dev))
1227 enable_irq_wake(i8042_ports[i].irq);
1233 static int i8042_pm_resume_noirq(struct device *dev)
1235 if (!pm_resume_via_firmware())
1236 i8042_interrupt(0, NULL);
1241 static int i8042_pm_resume(struct device *dev)
1246 for (i = 0; i < I8042_NUM_PORTS; i++) {
1247 struct serio *serio = i8042_ports[i].serio;
1249 if (serio && device_may_wakeup(&serio->dev))
1250 disable_irq_wake(i8042_ports[i].irq);
1254 * If platform firmware was not going to be involved in suspend, we did
1255 * not restore the controller state to whatever it had been at boot
1256 * time, so we do not need to do anything.
1258 if (!pm_suspend_via_firmware())
1262 * We only need to reset the controller if we are resuming after handing
1263 * off control to the platform firmware, otherwise we can simply restore
1266 want_reset = pm_resume_via_firmware();
1268 return i8042_controller_resume(want_reset);
1271 static int i8042_pm_thaw(struct device *dev)
1273 i8042_interrupt(0, NULL);
1278 static int i8042_pm_reset(struct device *dev)
1280 i8042_controller_reset(false);
1285 static int i8042_pm_restore(struct device *dev)
1287 return i8042_controller_resume(false);
1290 static const struct dev_pm_ops i8042_pm_ops = {
1291 .suspend = i8042_pm_suspend,
1292 .resume_noirq = i8042_pm_resume_noirq,
1293 .resume = i8042_pm_resume,
1294 .thaw = i8042_pm_thaw,
1295 .poweroff = i8042_pm_reset,
1296 .restore = i8042_pm_restore,
1299 #endif /* CONFIG_PM */
1302 * We need to reset the 8042 back to original mode on system shutdown,
1303 * because otherwise BIOSes will be confused.
1306 static void i8042_shutdown(struct platform_device *dev)
1308 i8042_controller_reset(false);
1311 static int __init i8042_create_kbd_port(void)
1313 struct serio *serio;
1314 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1316 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1320 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1321 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
1322 serio->start = i8042_start;
1323 serio->stop = i8042_stop;
1324 serio->close = i8042_port_close;
1325 serio->ps2_cmd_mutex = &i8042_mutex;
1326 serio->port_data = port;
1327 serio->dev.parent = &i8042_platform_device->dev;
1328 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1329 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1330 strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
1331 sizeof(serio->firmware_id));
1333 port->serio = serio;
1334 port->irq = I8042_KBD_IRQ;
1339 static int __init i8042_create_aux_port(int idx)
1341 struct serio *serio;
1342 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1343 struct i8042_port *port = &i8042_ports[port_no];
1345 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1349 serio->id.type = SERIO_8042;
1350 serio->write = i8042_aux_write;
1351 serio->start = i8042_start;
1352 serio->stop = i8042_stop;
1353 serio->ps2_cmd_mutex = &i8042_mutex;
1354 serio->port_data = port;
1355 serio->dev.parent = &i8042_platform_device->dev;
1357 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1358 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1359 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1360 sizeof(serio->firmware_id));
1361 serio->close = i8042_port_close;
1363 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1364 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1365 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1366 sizeof(serio->firmware_id));
1369 port->serio = serio;
1371 port->irq = I8042_AUX_IRQ;
1376 static void __init i8042_free_kbd_port(void)
1378 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1379 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1382 static void __init i8042_free_aux_ports(void)
1386 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1387 kfree(i8042_ports[i].serio);
1388 i8042_ports[i].serio = NULL;
1392 static void __init i8042_register_ports(void)
1396 for (i = 0; i < I8042_NUM_PORTS; i++) {
1397 struct serio *serio = i8042_ports[i].serio;
1400 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1402 (unsigned long) I8042_DATA_REG,
1403 (unsigned long) I8042_COMMAND_REG,
1404 i8042_ports[i].irq);
1405 serio_register_port(serio);
1406 device_set_wakeup_capable(&serio->dev, true);
1411 static void i8042_unregister_ports(void)
1415 for (i = 0; i < I8042_NUM_PORTS; i++) {
1416 if (i8042_ports[i].serio) {
1417 serio_unregister_port(i8042_ports[i].serio);
1418 i8042_ports[i].serio = NULL;
1423 static void i8042_free_irqs(void)
1425 if (i8042_aux_irq_registered)
1426 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1427 if (i8042_kbd_irq_registered)
1428 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1430 i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1433 static int __init i8042_setup_aux(void)
1435 int (*aux_enable)(void);
1439 if (i8042_check_aux())
1442 if (i8042_nomux || i8042_check_mux()) {
1443 error = i8042_create_aux_port(-1);
1445 goto err_free_ports;
1446 aux_enable = i8042_enable_aux_port;
1448 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1449 error = i8042_create_aux_port(i);
1451 goto err_free_ports;
1453 aux_enable = i8042_enable_mux_ports;
1456 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1457 "i8042", i8042_platform_device);
1459 goto err_free_ports;
1461 error = aux_enable();
1465 i8042_aux_irq_registered = true;
1469 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1471 i8042_free_aux_ports();
1475 static int __init i8042_setup_kbd(void)
1479 error = i8042_create_kbd_port();
1483 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1484 "i8042", i8042_platform_device);
1488 error = i8042_enable_kbd_port();
1492 i8042_kbd_irq_registered = true;
1496 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1498 i8042_free_kbd_port();
1502 static int i8042_kbd_bind_notifier(struct notifier_block *nb,
1503 unsigned long action, void *data)
1505 struct device *dev = data;
1506 struct serio *serio = to_serio_port(dev);
1507 struct i8042_port *port = serio->port_data;
1509 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio)
1513 case BUS_NOTIFY_BOUND_DRIVER:
1514 port->driver_bound = true;
1517 case BUS_NOTIFY_UNBIND_DRIVER:
1518 port->driver_bound = false;
1525 static int __init i8042_probe(struct platform_device *dev)
1529 i8042_platform_device = dev;
1531 if (i8042_reset == I8042_RESET_ALWAYS) {
1532 error = i8042_controller_selftest();
1537 error = i8042_controller_init();
1543 i8042_dritek_enable();
1547 error = i8042_setup_aux();
1548 if (error && error != -ENODEV && error != -EBUSY)
1553 error = i8042_setup_kbd();
1558 * Ok, everything is ready, let's register all serio ports
1560 i8042_register_ports();
1565 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1567 i8042_controller_reset(false);
1568 i8042_platform_device = NULL;
1573 static int i8042_remove(struct platform_device *dev)
1575 i8042_unregister_ports();
1577 i8042_controller_reset(false);
1578 i8042_platform_device = NULL;
1583 static struct platform_driver i8042_driver = {
1587 .pm = &i8042_pm_ops,
1590 .remove = i8042_remove,
1591 .shutdown = i8042_shutdown,
1594 static struct notifier_block i8042_kbd_bind_notifier_block = {
1595 .notifier_call = i8042_kbd_bind_notifier,
1598 static int __init i8042_init(void)
1600 struct platform_device *pdev;
1605 err = i8042_platform_init();
1607 return (err == -ENODEV) ? 0 : err;
1609 err = i8042_controller_check();
1611 goto err_platform_exit;
1613 /* Set this before creating the dev to allow i8042_command to work right away */
1614 i8042_present = true;
1616 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
1618 err = PTR_ERR(pdev);
1619 goto err_platform_exit;
1622 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1623 panic_blink = i8042_panic_blink;
1628 i8042_platform_exit();
1632 static void __exit i8042_exit(void)
1637 platform_device_unregister(i8042_platform_device);
1638 platform_driver_unregister(&i8042_driver);
1639 i8042_platform_exit();
1641 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1645 module_init(i8042_init);
1646 module_exit(i8042_exit);