2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/types.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/serio.h>
22 #include <linux/err.h>
23 #include <linux/rcupdate.h>
24 #include <linux/platform_device.h>
25 #include <linux/i8042.h>
26 #include <linux/slab.h>
27 #include <linux/suspend.h>
31 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
32 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
33 MODULE_LICENSE("GPL");
35 static bool i8042_nokbd;
36 module_param_named(nokbd, i8042_nokbd, bool, 0);
37 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
39 static bool i8042_noaux;
40 module_param_named(noaux, i8042_noaux, bool, 0);
41 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
43 static bool i8042_nomux;
44 module_param_named(nomux, i8042_nomux, bool, 0);
45 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
47 static bool i8042_unlock;
48 module_param_named(unlock, i8042_unlock, bool, 0);
49 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
51 static bool i8042_probe_defer;
52 module_param_named(probe_defer, i8042_probe_defer, bool, 0);
53 MODULE_PARM_DESC(probe_defer, "Allow deferred probing.");
55 enum i8042_controller_reset_mode {
59 #define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM
61 static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT;
62 static int i8042_set_reset(const char *val, const struct kernel_param *kp)
64 enum i8042_controller_reset_mode *arg = kp->arg;
69 error = kstrtobool(val, &reset);
76 *arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER;
80 static const struct kernel_param_ops param_ops_reset_param = {
81 .flags = KERNEL_PARAM_OPS_FL_NOARG,
82 .set = i8042_set_reset,
84 #define param_check_reset_param(name, p) \
85 __param_check(name, p, enum i8042_controller_reset_mode)
86 module_param_named(reset, i8042_reset, reset_param, 0);
87 MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both");
89 static bool i8042_direct;
90 module_param_named(direct, i8042_direct, bool, 0);
91 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
93 static bool i8042_dumbkbd;
94 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
95 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
97 static bool i8042_noloop;
98 module_param_named(noloop, i8042_noloop, bool, 0);
99 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
101 static bool i8042_notimeout;
102 module_param_named(notimeout, i8042_notimeout, bool, 0);
103 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
105 static bool i8042_kbdreset;
106 module_param_named(kbdreset, i8042_kbdreset, bool, 0);
107 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port");
110 static bool i8042_dritek;
111 module_param_named(dritek, i8042_dritek, bool, 0);
112 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
116 static bool i8042_nopnp;
117 module_param_named(nopnp, i8042_nopnp, bool, 0);
118 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
123 static bool i8042_debug;
124 module_param_named(debug, i8042_debug, bool, 0600);
125 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
127 static bool i8042_unmask_kbd_data;
128 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600);
129 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]");
132 static bool i8042_present;
133 static bool i8042_bypass_aux_irq_test;
134 static char i8042_kbd_firmware_id[128];
135 static char i8042_aux_firmware_id[128];
140 * i8042_lock protects serialization between i8042_command and
141 * the interrupt handler.
143 static DEFINE_SPINLOCK(i8042_lock);
146 * Writers to AUX and KBD ports as well as users issuing i8042_command
147 * directly should acquire i8042_mutex (by means of calling
148 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
149 * they do not disturb each other (unfortunately in many i8042
150 * implementations write to one of the ports will immediately abort
151 * command that is being processed by another port).
153 static DEFINE_MUTEX(i8042_mutex);
163 #define I8042_KBD_PORT_NO 0
164 #define I8042_AUX_PORT_NO 1
165 #define I8042_MUX_PORT_NO 2
166 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
168 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
170 static unsigned char i8042_initial_ctr;
171 static unsigned char i8042_ctr;
172 static bool i8042_mux_present;
173 static bool i8042_kbd_irq_registered;
174 static bool i8042_aux_irq_registered;
175 static unsigned char i8042_suppress_kbd_ack;
176 static struct platform_device *i8042_platform_device;
177 static struct notifier_block i8042_kbd_bind_notifier_block;
179 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
180 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
181 struct serio *serio);
183 void i8042_lock_chip(void)
185 mutex_lock(&i8042_mutex);
187 EXPORT_SYMBOL(i8042_lock_chip);
189 void i8042_unlock_chip(void)
191 mutex_unlock(&i8042_mutex);
193 EXPORT_SYMBOL(i8042_unlock_chip);
195 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
196 struct serio *serio))
201 spin_lock_irqsave(&i8042_lock, flags);
203 if (i8042_platform_filter) {
208 i8042_platform_filter = filter;
211 spin_unlock_irqrestore(&i8042_lock, flags);
214 EXPORT_SYMBOL(i8042_install_filter);
216 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
222 spin_lock_irqsave(&i8042_lock, flags);
224 if (i8042_platform_filter != filter) {
229 i8042_platform_filter = NULL;
232 spin_unlock_irqrestore(&i8042_lock, flags);
235 EXPORT_SYMBOL(i8042_remove_filter);
238 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
239 * be ready for reading values from it / writing values to it.
240 * Called always with i8042_lock held.
243 static int i8042_wait_read(void)
247 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
251 return -(i == I8042_CTL_TIMEOUT);
254 static int i8042_wait_write(void)
258 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
262 return -(i == I8042_CTL_TIMEOUT);
266 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
267 * of the i8042 down the toilet.
270 static int i8042_flush(void)
273 unsigned char data, str;
277 spin_lock_irqsave(&i8042_lock, flags);
279 while ((str = i8042_read_status()) & I8042_STR_OBF) {
280 if (count++ < I8042_BUFFER_SIZE) {
282 data = i8042_read_data();
283 dbg("%02x <- i8042 (flush, %s)\n",
284 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
291 spin_unlock_irqrestore(&i8042_lock, flags);
297 * i8042_command() executes a command on the i8042. It also sends the input
298 * parameter(s) of the commands to it, and receives the output value(s). The
299 * parameters are to be stored in the param array, and the output is placed
300 * into the same array. The number of the parameters and output values is
301 * encoded in bits 8-11 of the command number.
304 static int __i8042_command(unsigned char *param, int command)
308 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
311 error = i8042_wait_write();
315 dbg("%02x -> i8042 (command)\n", command & 0xff);
316 i8042_write_command(command & 0xff);
318 for (i = 0; i < ((command >> 12) & 0xf); i++) {
319 error = i8042_wait_write();
321 dbg(" -- i8042 (wait write timeout)\n");
324 dbg("%02x -> i8042 (parameter)\n", param[i]);
325 i8042_write_data(param[i]);
328 for (i = 0; i < ((command >> 8) & 0xf); i++) {
329 error = i8042_wait_read();
331 dbg(" -- i8042 (wait read timeout)\n");
335 if (command == I8042_CMD_AUX_LOOP &&
336 !(i8042_read_status() & I8042_STR_AUXDATA)) {
337 dbg(" -- i8042 (auxerr)\n");
341 param[i] = i8042_read_data();
342 dbg("%02x <- i8042 (return)\n", param[i]);
348 int i8042_command(unsigned char *param, int command)
356 spin_lock_irqsave(&i8042_lock, flags);
357 retval = __i8042_command(param, command);
358 spin_unlock_irqrestore(&i8042_lock, flags);
362 EXPORT_SYMBOL(i8042_command);
365 * i8042_kbd_write() sends a byte out through the keyboard interface.
368 static int i8042_kbd_write(struct serio *port, unsigned char c)
373 spin_lock_irqsave(&i8042_lock, flags);
375 if (!(retval = i8042_wait_write())) {
376 dbg("%02x -> i8042 (kbd-data)\n", c);
380 spin_unlock_irqrestore(&i8042_lock, flags);
386 * i8042_aux_write() sends a byte out through the aux interface.
389 static int i8042_aux_write(struct serio *serio, unsigned char c)
391 struct i8042_port *port = serio->port_data;
393 return i8042_command(&c, port->mux == -1 ?
395 I8042_CMD_MUX_SEND + port->mux);
400 * i8042_port_close attempts to clear AUX or KBD port state by disabling
401 * and then re-enabling it.
404 static void i8042_port_close(struct serio *serio)
408 const char *port_name;
410 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
411 irq_bit = I8042_CTR_AUXINT;
412 disable_bit = I8042_CTR_AUXDIS;
415 irq_bit = I8042_CTR_KBDINT;
416 disable_bit = I8042_CTR_KBDDIS;
420 i8042_ctr &= ~irq_bit;
421 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
422 pr_warn("Can't write CTR while closing %s port\n", port_name);
426 i8042_ctr &= ~disable_bit;
427 i8042_ctr |= irq_bit;
428 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
429 pr_err("Can't reactivate %s port\n", port_name);
432 * See if there is any data appeared while we were messing with
435 i8042_interrupt(0, NULL);
439 * i8042_start() is called by serio core when port is about to finish
440 * registering. It will mark port as existing so i8042_interrupt can
441 * start sending data through it.
443 static int i8042_start(struct serio *serio)
445 struct i8042_port *port = serio->port_data;
447 spin_lock_irq(&i8042_lock);
449 spin_unlock_irq(&i8042_lock);
455 * i8042_stop() marks serio port as non-existing so i8042_interrupt
456 * will not try to send data to the port that is about to go away.
457 * The function is called by serio core as part of unregister procedure.
459 static void i8042_stop(struct serio *serio)
461 struct i8042_port *port = serio->port_data;
463 spin_lock_irq(&i8042_lock);
464 port->exists = false;
466 spin_unlock_irq(&i8042_lock);
469 * We need to make sure that interrupt handler finishes using
470 * our serio port before we return from this function.
471 * We synchronize with both AUX and KBD IRQs because there is
472 * a (very unlikely) chance that AUX IRQ is raised for KBD port
475 synchronize_irq(I8042_AUX_IRQ);
476 synchronize_irq(I8042_KBD_IRQ);
480 * i8042_filter() filters out unwanted bytes from the input data stream.
481 * It is called from i8042_interrupt and thus is running with interrupts
482 * off and i8042_lock held.
484 static bool i8042_filter(unsigned char data, unsigned char str,
487 if (unlikely(i8042_suppress_kbd_ack)) {
488 if ((~str & I8042_STR_AUXDATA) &&
489 (data == 0xfa || data == 0xfe)) {
490 i8042_suppress_kbd_ack--;
491 dbg("Extra keyboard ACK - filtered out\n");
496 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
497 dbg("Filtered out by platform filter\n");
505 * i8042_interrupt() is the most important function in this driver -
506 * it handles the interrupts from the i8042, and sends incoming bytes
507 * to the upper layers.
510 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
512 struct i8042_port *port;
515 unsigned char str, data;
517 unsigned int port_no;
521 spin_lock_irqsave(&i8042_lock, flags);
523 str = i8042_read_status();
524 if (unlikely(~str & I8042_STR_OBF)) {
525 spin_unlock_irqrestore(&i8042_lock, flags);
527 dbg("Interrupt %d, without any data\n", irq);
532 data = i8042_read_data();
534 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
535 static unsigned long last_transmit;
536 static unsigned char last_str;
539 if (str & I8042_STR_MUXERR) {
540 dbg("MUX error, status is %02x, data is %02x\n",
543 * When MUXERR condition is signalled the data register can only contain
544 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
545 * it is not always the case. Some KBCs also report 0xfc when there is
546 * nothing connected to the port while others sometimes get confused which
547 * port the data came from and signal error leaving the data intact. They
548 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
549 * to legacy mode yet, when we see one we'll add proper handling).
550 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
551 * rest assume that the data came from the same serio last byte
552 * was transmitted (if transmission happened not too long ago).
557 if (time_before(jiffies, last_transmit + HZ/10)) {
561 /* fall through - report timeout */
564 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
565 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
569 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
571 last_transmit = jiffies;
574 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
575 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
577 port_no = (str & I8042_STR_AUXDATA) ?
578 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
581 port = &i8042_ports[port_no];
582 serio = port->exists ? port->serio : NULL;
585 pm_wakeup_event(&serio->dev, 0);
587 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n",
589 dfl & SERIO_PARITY ? ", bad parity" : "",
590 dfl & SERIO_TIMEOUT ? ", timeout" : "");
592 filtered = i8042_filter(data, str, serio);
594 spin_unlock_irqrestore(&i8042_lock, flags);
596 if (likely(serio && !filtered))
597 serio_interrupt(serio, data, dfl);
600 return IRQ_RETVAL(ret);
604 * i8042_enable_kbd_port enables keyboard port on chip
607 static int i8042_enable_kbd_port(void)
609 i8042_ctr &= ~I8042_CTR_KBDDIS;
610 i8042_ctr |= I8042_CTR_KBDINT;
612 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
613 i8042_ctr &= ~I8042_CTR_KBDINT;
614 i8042_ctr |= I8042_CTR_KBDDIS;
615 pr_err("Failed to enable KBD port\n");
623 * i8042_enable_aux_port enables AUX (mouse) port on chip
626 static int i8042_enable_aux_port(void)
628 i8042_ctr &= ~I8042_CTR_AUXDIS;
629 i8042_ctr |= I8042_CTR_AUXINT;
631 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
632 i8042_ctr &= ~I8042_CTR_AUXINT;
633 i8042_ctr |= I8042_CTR_AUXDIS;
634 pr_err("Failed to enable AUX port\n");
642 * i8042_enable_mux_ports enables 4 individual AUX ports after
643 * the controller has been switched into Multiplexed mode
646 static int i8042_enable_mux_ports(void)
651 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
652 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
653 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
656 return i8042_enable_aux_port();
660 * i8042_set_mux_mode checks whether the controller has an
661 * active multiplexor and puts the chip into Multiplexed (true)
662 * or Legacy (false) mode.
665 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
668 unsigned char param, val;
670 * Get rid of bytes in the queue.
676 * Internal loopback test - send three bytes, they should come back from the
677 * mouse interface, the last should be version.
681 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
683 param = val = multiplex ? 0x56 : 0xf6;
684 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
686 param = val = multiplex ? 0xa4 : 0xa5;
687 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
691 * Workaround for interference with USB Legacy emulation
692 * that causes a v10.12 MUX to be found.
698 *mux_version = param;
704 * i8042_check_mux() checks whether the controller supports the PS/2 Active
705 * Multiplexing specification by Synaptics, Phoenix, Insyde and
709 static int i8042_check_mux(void)
711 unsigned char mux_version;
713 if (i8042_set_mux_mode(true, &mux_version))
716 pr_info("Detected active multiplexing controller, rev %d.%d\n",
717 (mux_version >> 4) & 0xf, mux_version & 0xf);
720 * Disable all muxed ports by disabling AUX.
722 i8042_ctr |= I8042_CTR_AUXDIS;
723 i8042_ctr &= ~I8042_CTR_AUXINT;
725 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
726 pr_err("Failed to disable AUX port, can't use MUX\n");
730 i8042_mux_present = true;
736 * The following is used to test AUX IRQ delivery.
738 static struct completion i8042_aux_irq_delivered;
739 static bool i8042_irq_being_tested;
741 static irqreturn_t i8042_aux_test_irq(int irq, void *dev_id)
744 unsigned char str, data;
747 spin_lock_irqsave(&i8042_lock, flags);
748 str = i8042_read_status();
749 if (str & I8042_STR_OBF) {
750 data = i8042_read_data();
751 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
752 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
753 if (i8042_irq_being_tested &&
754 data == 0xa5 && (str & I8042_STR_AUXDATA))
755 complete(&i8042_aux_irq_delivered);
758 spin_unlock_irqrestore(&i8042_lock, flags);
760 return IRQ_RETVAL(ret);
764 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
765 * verifies success by readinng CTR. Used when testing for presence of AUX
768 static int i8042_toggle_aux(bool on)
773 if (i8042_command(¶m,
774 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
777 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
778 for (i = 0; i < 100; i++) {
781 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
784 if (!(param & I8042_CTR_AUXDIS) == on)
792 * i8042_check_aux() applies as much paranoia as it can at detecting
793 * the presence of an AUX interface.
796 static int i8042_check_aux(void)
799 bool irq_registered = false;
800 bool aux_loop_broken = false;
805 * Get rid of bytes in the queue.
811 * Internal loopback test - filters out AT-type i8042's. Unfortunately
812 * SiS screwed up and their 5597 doesn't support the LOOP command even
813 * though it has an AUX port.
817 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
818 if (retval || param != 0x5a) {
821 * External connection test - filters out AT-soldered PS/2 i8042's
822 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
823 * 0xfa - no error on some notebooks which ignore the spec
824 * Because it's common for chipsets to return error on perfectly functioning
825 * AUX ports, we test for this only when the LOOP command failed.
828 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
829 (param && param != 0xfa && param != 0xff))
833 * If AUX_LOOP completed without error but returned unexpected data
837 aux_loop_broken = true;
841 * Bit assignment test - filters out PS/2 i8042's in AT mode
844 if (i8042_toggle_aux(false)) {
845 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
846 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
849 if (i8042_toggle_aux(true))
853 * Reset keyboard (needed on some laptops to successfully detect
854 * touchpad, e.g., some Gigabyte laptop models with Elantech
857 if (i8042_kbdreset) {
858 pr_warn("Attempting to reset device connected to KBD port\n");
859 i8042_kbd_write(NULL, (unsigned char) 0xff);
863 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
864 * used it for a PCI card or somethig else.
867 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
869 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
870 * is working and hope we are right.
876 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
877 "i8042", i8042_platform_device))
880 irq_registered = true;
882 if (i8042_enable_aux_port())
885 spin_lock_irqsave(&i8042_lock, flags);
887 init_completion(&i8042_aux_irq_delivered);
888 i8042_irq_being_tested = true;
891 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
893 spin_unlock_irqrestore(&i8042_lock, flags);
898 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
899 msecs_to_jiffies(250)) == 0) {
901 * AUX IRQ was never delivered so we need to flush the controller to
902 * get rid of the byte we put there; otherwise keyboard may not work.
904 dbg(" -- i8042 (aux irq test timeout)\n");
912 * Disable the interface.
915 i8042_ctr |= I8042_CTR_AUXDIS;
916 i8042_ctr &= ~I8042_CTR_AUXINT;
918 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
922 free_irq(I8042_AUX_IRQ, i8042_platform_device);
927 static int i8042_controller_check(void)
930 pr_info("No controller found\n");
937 static int i8042_controller_selftest(void)
943 * We try this 5 times; on some really fragile systems this does not
944 * take the first time...
948 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
949 pr_err("i8042 controller selftest timeout\n");
953 if (param == I8042_RET_CTL_TEST)
956 dbg("i8042 controller selftest: %#x != %#x\n",
957 param, I8042_RET_CTL_TEST);
963 * On x86, we don't fail entire i8042 initialization if controller
964 * reset fails in hopes that keyboard port will still be functional
965 * and user will still get a working keyboard. This is especially
966 * important on netbooks. On other arches we trust hardware more.
968 pr_info("giving up on controller selftest, continuing anyway...\n");
971 pr_err("i8042 controller selftest failed\n");
977 * i8042_controller init initializes the i8042 controller, and,
978 * most importantly, sets it into non-xlated mode if that's
982 static int i8042_controller_init(void)
986 unsigned char ctr[2];
989 * Save the CTR for restore on unload / reboot.
994 pr_err("Unable to get stable CTR read\n");
1001 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
1002 pr_err("Can't read CTR while initializing i8042\n");
1003 return i8042_probe_defer ? -EPROBE_DEFER : -EIO;
1006 } while (n < 2 || ctr[0] != ctr[1]);
1008 i8042_initial_ctr = i8042_ctr = ctr[0];
1011 * Disable the keyboard interface and interrupt.
1014 i8042_ctr |= I8042_CTR_KBDDIS;
1015 i8042_ctr &= ~I8042_CTR_KBDINT;
1021 spin_lock_irqsave(&i8042_lock, flags);
1022 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
1024 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
1026 pr_warn("Warning: Keylock active\n");
1028 spin_unlock_irqrestore(&i8042_lock, flags);
1031 * If the chip is configured into nontranslated mode by the BIOS, don't
1032 * bother enabling translating and be happy.
1035 if (~i8042_ctr & I8042_CTR_XLATE)
1036 i8042_direct = true;
1039 * Set nontranslated mode for the kbd interface if requested by an option.
1040 * After this the kbd interface becomes a simple serial in/out, like the aux
1041 * interface is. We don't do this by default, since it can confuse notebook
1046 i8042_ctr &= ~I8042_CTR_XLATE;
1052 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1053 pr_err("Can't write CTR while initializing i8042\n");
1058 * Flush whatever accumulated while we were disabling keyboard port.
1068 * Reset the controller and reset CRT to the original value set by BIOS.
1071 static void i8042_controller_reset(bool s2r_wants_reset)
1076 * Disable both KBD and AUX interfaces so they don't get in the way
1079 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1080 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1082 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1083 pr_warn("Can't write CTR while resetting\n");
1086 * Disable MUX mode if present.
1089 if (i8042_mux_present)
1090 i8042_set_mux_mode(false, NULL);
1093 * Reset the controller if requested.
1096 if (i8042_reset == I8042_RESET_ALWAYS ||
1097 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1098 i8042_controller_selftest();
1102 * Restore the original control register setting.
1105 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1106 pr_warn("Can't restore CTR\n");
1111 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1112 * when kernel panics. Flashing LEDs is useful for users running X who may
1113 * not see the console and will help distinguishing panics from "real"
1116 * Note that DELAY has a limit of 10ms so we will not get stuck here
1117 * waiting for KBC to free up even if KBD interrupt is off
1120 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1122 static long i8042_panic_blink(int state)
1127 led = (state) ? 0x01 | 0x04 : 0;
1128 while (i8042_read_status() & I8042_STR_IBF)
1130 dbg("%02x -> i8042 (panic blink)\n", 0xed);
1131 i8042_suppress_kbd_ack = 2;
1132 i8042_write_data(0xed); /* set leds */
1134 while (i8042_read_status() & I8042_STR_IBF)
1137 dbg("%02x -> i8042 (panic blink)\n", led);
1138 i8042_write_data(led);
1146 static void i8042_dritek_enable(void)
1148 unsigned char param = 0x90;
1151 error = i8042_command(¶m, 0x1059);
1153 pr_warn("Failed to enable DRITEK extension: %d\n", error);
1160 * Here we try to reset everything back to a state we had
1161 * before suspending.
1164 static int i8042_controller_resume(bool s2r_wants_reset)
1168 error = i8042_controller_check();
1172 if (i8042_reset == I8042_RESET_ALWAYS ||
1173 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1174 error = i8042_controller_selftest();
1180 * Restore original CTR value and disable all ports
1183 i8042_ctr = i8042_initial_ctr;
1185 i8042_ctr &= ~I8042_CTR_XLATE;
1186 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1187 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1188 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1189 pr_warn("Can't write CTR to resume, retrying...\n");
1191 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1192 pr_err("CTR write retry failed\n");
1200 i8042_dritek_enable();
1203 if (i8042_mux_present) {
1204 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1205 pr_warn("failed to resume active multiplexor, mouse won't work\n");
1206 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1207 i8042_enable_aux_port();
1209 if (i8042_ports[I8042_KBD_PORT_NO].serio)
1210 i8042_enable_kbd_port();
1212 i8042_interrupt(0, NULL);
1218 * Here we try to restore the original BIOS settings to avoid
1222 static int i8042_pm_suspend(struct device *dev)
1226 if (pm_suspend_via_firmware())
1227 i8042_controller_reset(true);
1229 /* Set up serio interrupts for system wakeup. */
1230 for (i = 0; i < I8042_NUM_PORTS; i++) {
1231 struct serio *serio = i8042_ports[i].serio;
1233 if (serio && device_may_wakeup(&serio->dev))
1234 enable_irq_wake(i8042_ports[i].irq);
1240 static int i8042_pm_resume_noirq(struct device *dev)
1242 if (!pm_resume_via_firmware())
1243 i8042_interrupt(0, NULL);
1248 static int i8042_pm_resume(struct device *dev)
1253 for (i = 0; i < I8042_NUM_PORTS; i++) {
1254 struct serio *serio = i8042_ports[i].serio;
1256 if (serio && device_may_wakeup(&serio->dev))
1257 disable_irq_wake(i8042_ports[i].irq);
1261 * If platform firmware was not going to be involved in suspend, we did
1262 * not restore the controller state to whatever it had been at boot
1263 * time, so we do not need to do anything.
1265 if (!pm_suspend_via_firmware())
1269 * We only need to reset the controller if we are resuming after handing
1270 * off control to the platform firmware, otherwise we can simply restore
1273 want_reset = pm_resume_via_firmware();
1275 return i8042_controller_resume(want_reset);
1278 static int i8042_pm_thaw(struct device *dev)
1280 i8042_interrupt(0, NULL);
1285 static int i8042_pm_reset(struct device *dev)
1287 i8042_controller_reset(false);
1292 static int i8042_pm_restore(struct device *dev)
1294 return i8042_controller_resume(false);
1297 static const struct dev_pm_ops i8042_pm_ops = {
1298 .suspend = i8042_pm_suspend,
1299 .resume_noirq = i8042_pm_resume_noirq,
1300 .resume = i8042_pm_resume,
1301 .thaw = i8042_pm_thaw,
1302 .poweroff = i8042_pm_reset,
1303 .restore = i8042_pm_restore,
1306 #endif /* CONFIG_PM */
1309 * We need to reset the 8042 back to original mode on system shutdown,
1310 * because otherwise BIOSes will be confused.
1313 static void i8042_shutdown(struct platform_device *dev)
1315 i8042_controller_reset(false);
1318 static int i8042_create_kbd_port(void)
1320 struct serio *serio;
1321 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1323 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1327 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1328 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
1329 serio->start = i8042_start;
1330 serio->stop = i8042_stop;
1331 serio->close = i8042_port_close;
1332 serio->ps2_cmd_mutex = &i8042_mutex;
1333 serio->port_data = port;
1334 serio->dev.parent = &i8042_platform_device->dev;
1335 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1336 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1337 strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
1338 sizeof(serio->firmware_id));
1340 port->serio = serio;
1341 port->irq = I8042_KBD_IRQ;
1346 static int i8042_create_aux_port(int idx)
1348 struct serio *serio;
1349 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1350 struct i8042_port *port = &i8042_ports[port_no];
1352 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1356 serio->id.type = SERIO_8042;
1357 serio->write = i8042_aux_write;
1358 serio->start = i8042_start;
1359 serio->stop = i8042_stop;
1360 serio->ps2_cmd_mutex = &i8042_mutex;
1361 serio->port_data = port;
1362 serio->dev.parent = &i8042_platform_device->dev;
1364 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1365 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1366 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1367 sizeof(serio->firmware_id));
1368 serio->close = i8042_port_close;
1370 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1371 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1372 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1373 sizeof(serio->firmware_id));
1376 port->serio = serio;
1378 port->irq = I8042_AUX_IRQ;
1383 static void i8042_free_kbd_port(void)
1385 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1386 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1389 static void i8042_free_aux_ports(void)
1393 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1394 kfree(i8042_ports[i].serio);
1395 i8042_ports[i].serio = NULL;
1399 static void i8042_register_ports(void)
1403 for (i = 0; i < I8042_NUM_PORTS; i++) {
1404 struct serio *serio = i8042_ports[i].serio;
1409 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1411 (unsigned long) I8042_DATA_REG,
1412 (unsigned long) I8042_COMMAND_REG,
1413 i8042_ports[i].irq);
1414 serio_register_port(serio);
1415 device_set_wakeup_capable(&serio->dev, true);
1418 * On platforms using suspend-to-idle, allow the keyboard to
1419 * wake up the system from sleep by enabling keyboard wakeups
1420 * by default. This is consistent with keyboard wakeup
1421 * behavior on many platforms using suspend-to-RAM (ACPI S3)
1424 if (pm_suspend_via_s2idle() && i == I8042_KBD_PORT_NO)
1425 device_set_wakeup_enable(&serio->dev, true);
1429 static void i8042_unregister_ports(void)
1433 for (i = 0; i < I8042_NUM_PORTS; i++) {
1434 if (i8042_ports[i].serio) {
1435 serio_unregister_port(i8042_ports[i].serio);
1436 i8042_ports[i].serio = NULL;
1441 static void i8042_free_irqs(void)
1443 if (i8042_aux_irq_registered)
1444 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1445 if (i8042_kbd_irq_registered)
1446 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1448 i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1451 static int i8042_setup_aux(void)
1453 int (*aux_enable)(void);
1457 if (i8042_check_aux())
1460 if (i8042_nomux || i8042_check_mux()) {
1461 error = i8042_create_aux_port(-1);
1463 goto err_free_ports;
1464 aux_enable = i8042_enable_aux_port;
1466 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1467 error = i8042_create_aux_port(i);
1469 goto err_free_ports;
1471 aux_enable = i8042_enable_mux_ports;
1474 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1475 "i8042", i8042_platform_device);
1477 goto err_free_ports;
1479 error = aux_enable();
1483 i8042_aux_irq_registered = true;
1487 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1489 i8042_free_aux_ports();
1493 static int i8042_setup_kbd(void)
1497 error = i8042_create_kbd_port();
1501 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1502 "i8042", i8042_platform_device);
1506 error = i8042_enable_kbd_port();
1510 i8042_kbd_irq_registered = true;
1514 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1516 i8042_free_kbd_port();
1520 static int i8042_kbd_bind_notifier(struct notifier_block *nb,
1521 unsigned long action, void *data)
1523 struct device *dev = data;
1524 struct serio *serio = to_serio_port(dev);
1525 struct i8042_port *port = serio->port_data;
1527 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio)
1531 case BUS_NOTIFY_BOUND_DRIVER:
1532 port->driver_bound = true;
1535 case BUS_NOTIFY_UNBIND_DRIVER:
1536 port->driver_bound = false;
1543 static int i8042_probe(struct platform_device *dev)
1547 if (i8042_reset == I8042_RESET_ALWAYS) {
1548 error = i8042_controller_selftest();
1553 error = i8042_controller_init();
1559 i8042_dritek_enable();
1563 error = i8042_setup_aux();
1564 if (error && error != -ENODEV && error != -EBUSY)
1569 error = i8042_setup_kbd();
1574 * Ok, everything is ready, let's register all serio ports
1576 i8042_register_ports();
1581 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1583 i8042_controller_reset(false);
1588 static int i8042_remove(struct platform_device *dev)
1590 i8042_unregister_ports();
1592 i8042_controller_reset(false);
1597 static struct platform_driver i8042_driver = {
1601 .pm = &i8042_pm_ops,
1604 .probe = i8042_probe,
1605 .remove = i8042_remove,
1606 .shutdown = i8042_shutdown,
1609 static struct notifier_block i8042_kbd_bind_notifier_block = {
1610 .notifier_call = i8042_kbd_bind_notifier,
1613 static int __init i8042_init(void)
1619 err = i8042_platform_init();
1621 return (err == -ENODEV) ? 0 : err;
1623 err = i8042_controller_check();
1625 goto err_platform_exit;
1627 /* Set this before creating the dev to allow i8042_command to work right away */
1628 i8042_present = true;
1630 err = platform_driver_register(&i8042_driver);
1632 goto err_platform_exit;
1634 i8042_platform_device = platform_device_alloc("i8042", -1);
1635 if (!i8042_platform_device) {
1637 goto err_unregister_driver;
1640 err = platform_device_add(i8042_platform_device);
1642 goto err_free_device;
1644 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1645 panic_blink = i8042_panic_blink;
1650 platform_device_put(i8042_platform_device);
1651 err_unregister_driver:
1652 platform_driver_unregister(&i8042_driver);
1654 i8042_platform_exit();
1658 static void __exit i8042_exit(void)
1663 platform_device_unregister(i8042_platform_device);
1664 platform_driver_unregister(&i8042_driver);
1665 i8042_platform_exit();
1667 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1671 module_init(i8042_init);
1672 module_exit(i8042_exit);