2 * HP i8042-based System Device Controller driver.
4 * Copyright (c) 2001 Brian S. Julin
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL").
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * System Device Controller Microprocessor Firmware Theory of Operation
31 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
32 * Helge Deller's original hilkbd.c port for PA-RISC.
35 * Driver theory of operation:
37 * hp_sdc_put does all writing to the SDC. ISR can run on a different
38 * CPU than hp_sdc_put, but only one CPU runs hp_sdc_put at a time
39 * (it cannot really benefit from SMP anyway.) A tasket fit this perfectly.
41 * All data coming back from the SDC is sent via interrupt and can be read
42 * fully in the ISR, so there are no latency/throughput problems there.
43 * The problem is with output, due to the slow clock speed of the SDC
44 * compared to the CPU. This should not be too horrible most of the time,
45 * but if used with HIL devices that support the multibyte transfer command,
46 * keeping outbound throughput flowing at the 6500KBps that the HIL is
47 * capable of is more than can be done at HZ=100.
49 * Busy polling for IBF clear wastes CPU cycles and bus cycles. hp_sdc.ibf
50 * is set to 0 when the IBF flag in the status register has cleared. ISR
51 * may do this, and may also access the parts of queued transactions related
52 * to reading data back from the SDC, but otherwise will not touch the
53 * hp_sdc state. Whenever a register is written hp_sdc.ibf is set to 1.
55 * The i8042 write index and the values in the 4-byte input buffer
56 * starting at 0x70 are kept track of in hp_sdc.wi, and .r7[], respectively,
57 * to minimize the amount of IO needed to the SDC. However these values
58 * do not need to be locked since they are only ever accessed by hp_sdc_put.
60 * A timer task schedules the tasklet once per second just to make
61 * sure it doesn't freeze up and to allow for bad reads to time out.
64 #include <linux/hp_sdc.h>
65 #include <linux/errno.h>
66 #include <linux/init.h>
67 #include <linux/module.h>
68 #include <linux/ioport.h>
69 #include <linux/time.h>
70 #include <linux/semaphore.h>
71 #include <linux/slab.h>
72 #include <linux/hil.h>
75 /* Machine-specific abstraction */
78 # include <asm/parisc-device.h>
79 # define sdc_readb(p) gsc_readb(p)
80 # define sdc_writeb(v,p) gsc_writeb((v),(p))
81 #elif defined(__mc68000__)
82 #include <linux/uaccess.h>
83 # define sdc_readb(p) in_8(p)
84 # define sdc_writeb(v,p) out_8((p),(v))
86 # error "HIL is not supported on this platform"
89 #define PREFIX "HP SDC: "
91 MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
92 MODULE_DESCRIPTION("HP i8042-based SDC Driver");
93 MODULE_LICENSE("Dual BSD/GPL");
95 EXPORT_SYMBOL(hp_sdc_request_timer_irq);
96 EXPORT_SYMBOL(hp_sdc_request_hil_irq);
97 EXPORT_SYMBOL(hp_sdc_request_cooked_irq);
99 EXPORT_SYMBOL(hp_sdc_release_timer_irq);
100 EXPORT_SYMBOL(hp_sdc_release_hil_irq);
101 EXPORT_SYMBOL(hp_sdc_release_cooked_irq);
103 EXPORT_SYMBOL(__hp_sdc_enqueue_transaction);
104 EXPORT_SYMBOL(hp_sdc_enqueue_transaction);
105 EXPORT_SYMBOL(hp_sdc_dequeue_transaction);
107 static bool hp_sdc_disabled;
108 module_param_named(no_hpsdc, hp_sdc_disabled, bool, 0);
109 MODULE_PARM_DESC(no_hpsdc, "Do not enable HP SDC driver.");
111 static hp_i8042_sdc hp_sdc; /* All driver state is kept in here. */
113 /*************** primitives for use in any context *********************/
114 static inline uint8_t hp_sdc_status_in8(void)
119 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
120 status = sdc_readb(hp_sdc.status_io);
121 if (!(status & HP_SDC_STATUS_IBF))
123 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
128 static inline uint8_t hp_sdc_data_in8(void)
130 return sdc_readb(hp_sdc.data_io);
133 static inline void hp_sdc_status_out8(uint8_t val)
137 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
139 if ((val & 0xf0) == 0xe0)
141 sdc_writeb(val, hp_sdc.status_io);
142 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
145 static inline void hp_sdc_data_out8(uint8_t val)
149 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
151 sdc_writeb(val, hp_sdc.data_io);
152 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
155 /* Care must be taken to only invoke hp_sdc_spin_ibf when
156 * absolutely needed, or in rarely invoked subroutines.
157 * Not only does it waste CPU cycles, it also wastes bus cycles.
159 static inline void hp_sdc_spin_ibf(void)
164 lock = &hp_sdc.ibf_lock;
166 read_lock_irqsave(lock, flags);
168 read_unlock_irqrestore(lock, flags);
173 while (sdc_readb(hp_sdc.status_io) & HP_SDC_STATUS_IBF)
176 write_unlock_irqrestore(lock, flags);
180 /************************ Interrupt context functions ************************/
181 static void hp_sdc_take(int irq, void *dev_id, uint8_t status, uint8_t data)
183 hp_sdc_transaction *curr;
185 read_lock(&hp_sdc.rtq_lock);
186 if (hp_sdc.rcurr < 0) {
187 read_unlock(&hp_sdc.rtq_lock);
190 curr = hp_sdc.tq[hp_sdc.rcurr];
191 read_unlock(&hp_sdc.rtq_lock);
193 curr->seq[curr->idx++] = status;
194 curr->seq[curr->idx++] = data;
196 do_gettimeofday(&hp_sdc.rtv);
198 if (hp_sdc.rqty <= 0) {
199 /* All data has been gathered. */
200 if (curr->seq[curr->actidx] & HP_SDC_ACT_SEMAPHORE)
201 if (curr->act.semaphore)
202 up(curr->act.semaphore);
204 if (curr->seq[curr->actidx] & HP_SDC_ACT_CALLBACK)
205 if (curr->act.irqhook)
206 curr->act.irqhook(irq, dev_id, status, data);
208 curr->actidx = curr->idx;
210 /* Return control of this transaction */
211 write_lock(&hp_sdc.rtq_lock);
214 write_unlock(&hp_sdc.rtq_lock);
215 tasklet_schedule(&hp_sdc.task);
219 static irqreturn_t hp_sdc_isr(int irq, void *dev_id)
221 uint8_t status, data;
223 status = hp_sdc_status_in8();
224 /* Read data unconditionally to advance i8042. */
225 data = hp_sdc_data_in8();
227 /* For now we are ignoring these until we get the SDC to behave. */
228 if (((status & 0xf1) == 0x51) && data == 0x82)
231 switch (status & HP_SDC_STATUS_IRQMASK) {
232 case 0: /* This case is not documented. */
235 case HP_SDC_STATUS_USERTIMER:
236 case HP_SDC_STATUS_PERIODIC:
237 case HP_SDC_STATUS_TIMER:
238 read_lock(&hp_sdc.hook_lock);
239 if (hp_sdc.timer != NULL)
240 hp_sdc.timer(irq, dev_id, status, data);
241 read_unlock(&hp_sdc.hook_lock);
244 case HP_SDC_STATUS_REG:
245 hp_sdc_take(irq, dev_id, status, data);
248 case HP_SDC_STATUS_HILCMD:
249 case HP_SDC_STATUS_HILDATA:
250 read_lock(&hp_sdc.hook_lock);
251 if (hp_sdc.hil != NULL)
252 hp_sdc.hil(irq, dev_id, status, data);
253 read_unlock(&hp_sdc.hook_lock);
256 case HP_SDC_STATUS_PUP:
257 read_lock(&hp_sdc.hook_lock);
258 if (hp_sdc.pup != NULL)
259 hp_sdc.pup(irq, dev_id, status, data);
261 printk(KERN_INFO PREFIX "HP SDC reports successful PUP.\n");
262 read_unlock(&hp_sdc.hook_lock);
266 read_lock(&hp_sdc.hook_lock);
267 if (hp_sdc.cooked != NULL)
268 hp_sdc.cooked(irq, dev_id, status, data);
269 read_unlock(&hp_sdc.hook_lock);
277 static irqreturn_t hp_sdc_nmisr(int irq, void *dev_id)
281 status = hp_sdc_status_in8();
282 printk(KERN_WARNING PREFIX "NMI !\n");
285 if (status & HP_SDC_NMISTATUS_FHS) {
286 read_lock(&hp_sdc.hook_lock);
287 if (hp_sdc.timer != NULL)
288 hp_sdc.timer(irq, dev_id, status, 0);
289 read_unlock(&hp_sdc.hook_lock);
291 /* TODO: pass this on to the HIL handler, or do SAK here? */
292 printk(KERN_WARNING PREFIX "HIL NMI\n");
300 /***************** Kernel (tasklet) context functions ****************/
302 unsigned long hp_sdc_put(void);
304 static void hp_sdc_tasklet(unsigned long foo)
306 write_lock_irq(&hp_sdc.rtq_lock);
308 if (hp_sdc.rcurr >= 0) {
311 do_gettimeofday(&tv);
312 if (tv.tv_sec > hp_sdc.rtv.tv_sec)
313 tv.tv_usec += USEC_PER_SEC;
315 if (tv.tv_usec - hp_sdc.rtv.tv_usec > HP_SDC_MAX_REG_DELAY) {
316 hp_sdc_transaction *curr;
319 curr = hp_sdc.tq[hp_sdc.rcurr];
320 /* If this turns out to be a normal failure mode
321 * we'll need to figure out a way to communicate
322 * it back to the application. and be less verbose.
324 printk(KERN_WARNING PREFIX "read timeout (%ius)!\n",
325 (int)(tv.tv_usec - hp_sdc.rtv.tv_usec));
326 curr->idx += hp_sdc.rqty;
328 tmp = curr->seq[curr->actidx];
329 curr->seq[curr->actidx] |= HP_SDC_ACT_DEAD;
330 if (tmp & HP_SDC_ACT_SEMAPHORE)
331 if (curr->act.semaphore)
332 up(curr->act.semaphore);
334 if (tmp & HP_SDC_ACT_CALLBACK) {
335 /* Note this means that irqhooks may be called
336 * in tasklet/bh context.
338 if (curr->act.irqhook)
339 curr->act.irqhook(0, NULL, 0, 0);
342 curr->actidx = curr->idx;
347 write_unlock_irq(&hp_sdc.rtq_lock);
351 unsigned long hp_sdc_put(void)
353 hp_sdc_transaction *curr;
359 write_lock(&hp_sdc.lock);
361 /* If i8042 buffers are full, we cannot do anything that
362 requires output, so we skip to the administrativa. */
370 /* See if we are in the middle of a sequence. */
371 if (hp_sdc.wcurr < 0)
373 read_lock_irq(&hp_sdc.rtq_lock);
374 if (hp_sdc.rcurr == hp_sdc.wcurr)
376 read_unlock_irq(&hp_sdc.rtq_lock);
377 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
379 curridx = hp_sdc.wcurr;
381 if (hp_sdc.tq[curridx] != NULL)
384 while (++curridx != hp_sdc.wcurr) {
385 if (curridx >= HP_SDC_QUEUE_LEN) {
386 curridx = -1; /* Wrap to top */
389 read_lock_irq(&hp_sdc.rtq_lock);
390 if (hp_sdc.rcurr == curridx) {
391 read_unlock_irq(&hp_sdc.rtq_lock);
394 read_unlock_irq(&hp_sdc.rtq_lock);
395 if (hp_sdc.tq[curridx] != NULL)
396 break; /* Found one. */
398 if (curridx == hp_sdc.wcurr) { /* There's nothing queued to do. */
401 hp_sdc.wcurr = curridx;
405 /* Check to see if the interrupt mask needs to be set. */
407 hp_sdc_status_out8(hp_sdc.im | HP_SDC_CMD_SET_IM);
412 if (hp_sdc.wcurr == -1)
415 curr = hp_sdc.tq[curridx];
418 if (curr->actidx >= curr->endidx) {
419 hp_sdc.tq[curridx] = NULL;
420 /* Interleave outbound data between the transactions. */
422 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
427 act = curr->seq[idx];
430 if (curr->idx >= curr->endidx) {
431 if (act & HP_SDC_ACT_DEALLOC)
433 hp_sdc.tq[curridx] = NULL;
434 /* Interleave outbound data between the transactions. */
436 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
441 while (act & HP_SDC_ACT_PRECMD) {
442 if (curr->idx != idx) {
444 act &= ~HP_SDC_ACT_PRECMD;
447 hp_sdc_status_out8(curr->seq[idx]);
450 if ((act & HP_SDC_ACT_DURING) == HP_SDC_ACT_PRECMD)
452 /* skip quantity field if data-out sequence follows. */
453 if (act & HP_SDC_ACT_DATAOUT)
457 if (act & HP_SDC_ACT_DATAOUT) {
460 qty = curr->seq[idx];
462 if (curr->idx - idx < qty) {
463 hp_sdc_data_out8(curr->seq[curr->idx]);
466 if (curr->idx - idx >= qty &&
467 (act & HP_SDC_ACT_DURING) == HP_SDC_ACT_DATAOUT)
472 act &= ~HP_SDC_ACT_DATAOUT;
474 while (act & HP_SDC_ACT_DATAREG) {
478 mask = curr->seq[idx];
479 if (idx != curr->idx) {
485 act &= ~HP_SDC_ACT_DATAREG;
489 w7[0] = (mask & 1) ? curr->seq[++idx] : hp_sdc.r7[0];
490 w7[1] = (mask & 2) ? curr->seq[++idx] : hp_sdc.r7[1];
491 w7[2] = (mask & 4) ? curr->seq[++idx] : hp_sdc.r7[2];
492 w7[3] = (mask & 8) ? curr->seq[++idx] : hp_sdc.r7[3];
494 if (hp_sdc.wi > 0x73 || hp_sdc.wi < 0x70 ||
495 w7[hp_sdc.wi - 0x70] == hp_sdc.r7[hp_sdc.wi - 0x70]) {
498 /* Need to point the write index register */
499 while (i < 4 && w7[i] == hp_sdc.r7[i])
503 hp_sdc_status_out8(HP_SDC_CMD_SET_D0 + i);
504 hp_sdc.wi = 0x70 + i;
509 if ((act & HP_SDC_ACT_DURING) == HP_SDC_ACT_DATAREG)
513 act &= ~HP_SDC_ACT_DATAREG;
517 hp_sdc_data_out8(w7[hp_sdc.wi - 0x70]);
518 hp_sdc.r7[hp_sdc.wi - 0x70] = w7[hp_sdc.wi - 0x70];
519 hp_sdc.wi++; /* write index register autoincrements */
523 while ((i < 4) && w7[i] == hp_sdc.r7[i])
527 if ((act & HP_SDC_ACT_DURING) ==
534 /* We don't go any further in the command if there is a pending read,
535 because we don't want interleaved results. */
536 read_lock_irq(&hp_sdc.rtq_lock);
537 if (hp_sdc.rcurr >= 0) {
538 read_unlock_irq(&hp_sdc.rtq_lock);
541 read_unlock_irq(&hp_sdc.rtq_lock);
544 if (act & HP_SDC_ACT_POSTCMD) {
547 /* curr->idx should == idx at this point. */
548 postcmd = curr->seq[idx];
550 if (act & HP_SDC_ACT_DATAIN) {
552 /* Start a new read */
553 hp_sdc.rqty = curr->seq[curr->idx];
554 do_gettimeofday(&hp_sdc.rtv);
556 /* Still need to lock here in case of spurious irq. */
557 write_lock_irq(&hp_sdc.rtq_lock);
558 hp_sdc.rcurr = curridx;
559 write_unlock_irq(&hp_sdc.rtq_lock);
560 hp_sdc_status_out8(postcmd);
563 hp_sdc_status_out8(postcmd);
568 if (act & HP_SDC_ACT_SEMAPHORE)
569 up(curr->act.semaphore);
570 else if (act & HP_SDC_ACT_CALLBACK)
571 curr->act.irqhook(0,NULL,0,0);
573 if (curr->idx >= curr->endidx) { /* This transaction is over. */
574 if (act & HP_SDC_ACT_DEALLOC)
576 hp_sdc.tq[curridx] = NULL;
578 curr->actidx = idx + 1;
581 /* Interleave outbound data between the transactions. */
583 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
587 /* If by some quirk IBF has cleared and our ISR has run to
588 see that that has happened, do it all again. */
589 if (!hp_sdc.ibf && limit++ < 20)
593 if (hp_sdc.wcurr >= 0)
594 tasklet_schedule(&hp_sdc.task);
595 write_unlock(&hp_sdc.lock);
600 /******* Functions called in either user or kernel context ****/
601 int __hp_sdc_enqueue_transaction(hp_sdc_transaction *this)
610 /* Can't have same transaction on queue twice */
611 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
612 if (hp_sdc.tq[i] == this)
618 /* Search for empty slot */
619 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
620 if (hp_sdc.tq[i] == NULL) {
622 tasklet_schedule(&hp_sdc.task);
626 printk(KERN_WARNING PREFIX "No free slot to add transaction.\n");
630 printk(KERN_WARNING PREFIX "Transaction add failed: transaction already queued?\n");
634 int hp_sdc_enqueue_transaction(hp_sdc_transaction *this) {
638 write_lock_irqsave(&hp_sdc.lock, flags);
639 ret = __hp_sdc_enqueue_transaction(this);
640 write_unlock_irqrestore(&hp_sdc.lock,flags);
645 int hp_sdc_dequeue_transaction(hp_sdc_transaction *this)
650 write_lock_irqsave(&hp_sdc.lock, flags);
652 /* TODO: don't remove it if it's not done. */
654 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
655 if (hp_sdc.tq[i] == this)
658 write_unlock_irqrestore(&hp_sdc.lock, flags);
664 /********************** User context functions **************************/
665 int hp_sdc_request_timer_irq(hp_sdc_irqhook *callback)
667 if (callback == NULL || hp_sdc.dev == NULL)
670 write_lock_irq(&hp_sdc.hook_lock);
671 if (hp_sdc.timer != NULL) {
672 write_unlock_irq(&hp_sdc.hook_lock);
676 hp_sdc.timer = callback;
677 /* Enable interrupts from the timers */
678 hp_sdc.im &= ~HP_SDC_IM_FH;
679 hp_sdc.im &= ~HP_SDC_IM_PT;
680 hp_sdc.im &= ~HP_SDC_IM_TIMERS;
682 write_unlock_irq(&hp_sdc.hook_lock);
684 tasklet_schedule(&hp_sdc.task);
689 int hp_sdc_request_hil_irq(hp_sdc_irqhook *callback)
691 if (callback == NULL || hp_sdc.dev == NULL)
694 write_lock_irq(&hp_sdc.hook_lock);
695 if (hp_sdc.hil != NULL) {
696 write_unlock_irq(&hp_sdc.hook_lock);
700 hp_sdc.hil = callback;
701 hp_sdc.im &= ~(HP_SDC_IM_HIL | HP_SDC_IM_RESET);
703 write_unlock_irq(&hp_sdc.hook_lock);
705 tasklet_schedule(&hp_sdc.task);
710 int hp_sdc_request_cooked_irq(hp_sdc_irqhook *callback)
712 if (callback == NULL || hp_sdc.dev == NULL)
715 write_lock_irq(&hp_sdc.hook_lock);
716 if (hp_sdc.cooked != NULL) {
717 write_unlock_irq(&hp_sdc.hook_lock);
721 /* Enable interrupts from the HIL MLC */
722 hp_sdc.cooked = callback;
723 hp_sdc.im &= ~(HP_SDC_IM_HIL | HP_SDC_IM_RESET);
725 write_unlock_irq(&hp_sdc.hook_lock);
727 tasklet_schedule(&hp_sdc.task);
732 int hp_sdc_release_timer_irq(hp_sdc_irqhook *callback)
734 write_lock_irq(&hp_sdc.hook_lock);
735 if ((callback != hp_sdc.timer) ||
736 (hp_sdc.timer == NULL)) {
737 write_unlock_irq(&hp_sdc.hook_lock);
741 /* Disable interrupts from the timers */
743 hp_sdc.im |= HP_SDC_IM_TIMERS;
744 hp_sdc.im |= HP_SDC_IM_FH;
745 hp_sdc.im |= HP_SDC_IM_PT;
747 write_unlock_irq(&hp_sdc.hook_lock);
748 tasklet_schedule(&hp_sdc.task);
753 int hp_sdc_release_hil_irq(hp_sdc_irqhook *callback)
755 write_lock_irq(&hp_sdc.hook_lock);
756 if ((callback != hp_sdc.hil) ||
757 (hp_sdc.hil == NULL)) {
758 write_unlock_irq(&hp_sdc.hook_lock);
763 /* Disable interrupts from HIL only if there is no cooked driver. */
764 if(hp_sdc.cooked == NULL) {
765 hp_sdc.im |= (HP_SDC_IM_HIL | HP_SDC_IM_RESET);
768 write_unlock_irq(&hp_sdc.hook_lock);
769 tasklet_schedule(&hp_sdc.task);
774 int hp_sdc_release_cooked_irq(hp_sdc_irqhook *callback)
776 write_lock_irq(&hp_sdc.hook_lock);
777 if ((callback != hp_sdc.cooked) ||
778 (hp_sdc.cooked == NULL)) {
779 write_unlock_irq(&hp_sdc.hook_lock);
783 hp_sdc.cooked = NULL;
784 /* Disable interrupts from HIL only if there is no raw HIL driver. */
785 if(hp_sdc.hil == NULL) {
786 hp_sdc.im |= (HP_SDC_IM_HIL | HP_SDC_IM_RESET);
789 write_unlock_irq(&hp_sdc.hook_lock);
790 tasklet_schedule(&hp_sdc.task);
795 /************************* Keepalive timer task *********************/
797 static void hp_sdc_kicker(unsigned long data)
799 tasklet_schedule(&hp_sdc.task);
800 /* Re-insert the periodic task. */
801 mod_timer(&hp_sdc.kicker, jiffies + HZ);
804 /************************** Module Initialization ***************************/
806 #if defined(__hppa__)
808 static const struct parisc_device_id hp_sdc_tbl[] __initconst = {
811 .hversion_rev = HVERSION_REV_ANY_ID,
812 .hversion = HVERSION_ANY_ID,
818 MODULE_DEVICE_TABLE(parisc, hp_sdc_tbl);
820 static int __init hp_sdc_init_hppa(struct parisc_device *d);
821 static struct delayed_work moduleloader_work;
823 static struct parisc_driver hp_sdc_driver __refdata = {
825 .id_table = hp_sdc_tbl,
826 .probe = hp_sdc_init_hppa,
829 #endif /* __hppa__ */
831 static int __init hp_sdc_init(void)
834 hp_sdc_transaction t_sync;
836 struct semaphore s_sync;
838 rwlock_init(&hp_sdc.lock);
839 rwlock_init(&hp_sdc.ibf_lock);
840 rwlock_init(&hp_sdc.rtq_lock);
841 rwlock_init(&hp_sdc.hook_lock);
846 hp_sdc.cooked = NULL;
847 hp_sdc.im = HP_SDC_IM_MASK; /* Mask maskable irqs */
856 memset(&hp_sdc.tq, 0, sizeof(hp_sdc.tq));
862 hp_sdc.dev_err = -ENODEV;
864 errstr = "IO not found for";
868 errstr = "IRQ not found for";
872 hp_sdc.dev_err = -EBUSY;
874 #if defined(__hppa__)
875 errstr = "IO not available for";
876 if (request_region(hp_sdc.data_io, 2, hp_sdc_driver.name))
880 errstr = "IRQ not available for";
881 if (request_irq(hp_sdc.irq, &hp_sdc_isr, IRQF_SHARED,
885 errstr = "NMI not available for";
886 if (request_irq(hp_sdc.nmi, &hp_sdc_nmisr, IRQF_SHARED,
887 "HP SDC NMI", &hp_sdc))
890 pr_info(PREFIX "HP SDC at 0x%08lx, IRQ %d (NMI IRQ %d)\n",
891 hp_sdc.base_io, hp_sdc.irq, hp_sdc.nmi);
896 tasklet_init(&hp_sdc.task, hp_sdc_tasklet, 0);
898 /* Sync the output buffer registers, thus scheduling hp_sdc_tasklet. */
902 t_sync.seq = ts_sync;
903 ts_sync[0] = HP_SDC_ACT_DATAREG | HP_SDC_ACT_SEMAPHORE;
905 ts_sync[2] = ts_sync[3] = ts_sync[4] = ts_sync[5] = 0;
906 t_sync.act.semaphore = &s_sync;
907 sema_init(&s_sync, 0);
908 hp_sdc_enqueue_transaction(&t_sync);
909 down(&s_sync); /* Wait for t_sync to complete */
911 /* Create the keepalive task */
912 init_timer(&hp_sdc.kicker);
913 hp_sdc.kicker.expires = jiffies + HZ;
914 hp_sdc.kicker.function = &hp_sdc_kicker;
915 add_timer(&hp_sdc.kicker);
920 free_irq(hp_sdc.irq, &hp_sdc);
922 release_region(hp_sdc.data_io, 2);
924 printk(KERN_WARNING PREFIX ": %s SDC IO=0x%p IRQ=0x%x NMI=0x%x\n",
925 errstr, (void *)hp_sdc.base_io, hp_sdc.irq, hp_sdc.nmi);
928 return hp_sdc.dev_err;
931 #if defined(__hppa__)
933 static void request_module_delayed(struct work_struct *work)
935 request_module("hp_sdc_mlc");
938 static int __init hp_sdc_init_hppa(struct parisc_device *d)
944 if (hp_sdc.dev != NULL)
945 return 1; /* We only expect one SDC */
949 hp_sdc.nmi = d->aux_irq;
950 hp_sdc.base_io = d->hpa.start;
951 hp_sdc.data_io = d->hpa.start + 0x800;
952 hp_sdc.status_io = d->hpa.start + 0x801;
954 INIT_DELAYED_WORK(&moduleloader_work, request_module_delayed);
957 /* after successful initialization give SDC some time to settle
958 * and then load the hp_sdc_mlc upper layer driver */
960 schedule_delayed_work(&moduleloader_work,
961 msecs_to_jiffies(2000));
966 #endif /* __hppa__ */
968 static void hp_sdc_exit(void)
970 /* do nothing if we don't have a SDC */
974 write_lock_irq(&hp_sdc.lock);
976 /* Turn off all maskable "sub-function" irq's. */
978 sdc_writeb(HP_SDC_CMD_SET_IM | HP_SDC_IM_MASK, hp_sdc.status_io);
980 /* Wait until we know this has been processed by the i8042 */
983 free_irq(hp_sdc.nmi, &hp_sdc);
984 free_irq(hp_sdc.irq, &hp_sdc);
985 write_unlock_irq(&hp_sdc.lock);
987 del_timer_sync(&hp_sdc.kicker);
989 tasklet_kill(&hp_sdc.task);
991 #if defined(__hppa__)
992 cancel_delayed_work_sync(&moduleloader_work);
993 if (unregister_parisc_driver(&hp_sdc_driver))
994 printk(KERN_WARNING PREFIX "Error unregistering HP SDC");
998 static int __init hp_sdc_register(void)
1000 hp_sdc_transaction tq_init;
1001 uint8_t tq_init_seq[5];
1002 struct semaphore tq_init_sem;
1003 #if defined(__mc68000__)
1007 if (hp_sdc_disabled) {
1008 printk(KERN_WARNING PREFIX "HP SDC driver disabled by no_hpsdc=1.\n");
1014 #if defined(__hppa__)
1015 if (register_parisc_driver(&hp_sdc_driver)) {
1016 printk(KERN_WARNING PREFIX "Error registering SDC with system bus tree.\n");
1019 #elif defined(__mc68000__)
1025 hp_sdc.base_io = (unsigned long) 0xf0428000;
1026 hp_sdc.data_io = (unsigned long) hp_sdc.base_io + 1;
1027 hp_sdc.status_io = (unsigned long) hp_sdc.base_io + 3;
1028 if (!probe_kernel_read(&i, (unsigned char *)hp_sdc.data_io, 1))
1029 hp_sdc.dev = (void *)1;
1030 hp_sdc.dev_err = hp_sdc_init();
1032 if (hp_sdc.dev == NULL) {
1033 printk(KERN_WARNING PREFIX "No SDC found.\n");
1034 return hp_sdc.dev_err;
1037 sema_init(&tq_init_sem, 0);
1042 tq_init.seq = tq_init_seq;
1043 tq_init.act.semaphore = &tq_init_sem;
1046 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN | HP_SDC_ACT_SEMAPHORE;
1047 tq_init_seq[1] = HP_SDC_CMD_READ_KCC;
1052 hp_sdc_enqueue_transaction(&tq_init);
1057 if ((tq_init_seq[0] & HP_SDC_ACT_DEAD) == HP_SDC_ACT_DEAD) {
1058 printk(KERN_WARNING PREFIX "Error reading config byte.\n");
1062 hp_sdc.r11 = tq_init_seq[4];
1063 if (hp_sdc.r11 & HP_SDC_CFG_NEW) {
1065 printk(KERN_INFO PREFIX "New style SDC\n");
1066 tq_init_seq[1] = HP_SDC_CMD_READ_XTD;
1070 hp_sdc_enqueue_transaction(&tq_init);
1073 if ((tq_init_seq[0] & HP_SDC_ACT_DEAD) == HP_SDC_ACT_DEAD) {
1074 printk(KERN_WARNING PREFIX "Error reading extended config byte.\n");
1077 hp_sdc.r7e = tq_init_seq[4];
1078 HP_SDC_XTD_REV_STRINGS(hp_sdc.r7e & HP_SDC_XTD_REV, str)
1079 printk(KERN_INFO PREFIX "Revision: %s\n", str);
1080 if (hp_sdc.r7e & HP_SDC_XTD_BEEPER)
1081 printk(KERN_INFO PREFIX "TI SN76494 beeper present\n");
1082 if (hp_sdc.r7e & HP_SDC_XTD_BBRTC)
1083 printk(KERN_INFO PREFIX "OKI MSM-58321 BBRTC present\n");
1084 printk(KERN_INFO PREFIX "Spunking the self test register to force PUP "
1085 "on next firmware reset.\n");
1086 tq_init_seq[0] = HP_SDC_ACT_PRECMD |
1087 HP_SDC_ACT_DATAOUT | HP_SDC_ACT_SEMAPHORE;
1088 tq_init_seq[1] = HP_SDC_CMD_SET_STR;
1095 hp_sdc_enqueue_transaction(&tq_init);
1099 printk(KERN_INFO PREFIX "Old style SDC (1820-%s).\n",
1100 (hp_sdc.r11 & HP_SDC_CFG_REV) ? "3300" : "2564/3087");
1105 module_init(hp_sdc_register);
1106 module_exit(hp_sdc_exit);
1108 /* Timing notes: These measurements taken on my 64MHz 7100-LC (715/64)
1109 * cycles cycles-adj time
1110 * between two consecutive mfctl(16)'s: 4 n/a 63ns
1111 * hp_sdc_spin_ibf when idle: 119 115 1.7us
1112 * gsc_writeb status register: 83 79 1.2us
1113 * IBF to clear after sending SET_IM: 6204 6006 93us
1114 * IBF to clear after sending LOAD_RT: 4467 4352 68us
1115 * IBF to clear after sending two LOAD_RTs: 18974 18859 295us
1116 * READ_T1, read status/data, IRQ, call handler: 35564 n/a 556us
1117 * cmd to ~IBF READ_T1 2nd time right after: 5158403 n/a 81ms
1118 * between IRQ received and ~IBF for above: 2578877 n/a 40ms
1120 * Performance stats after a run of this module configuring HIL and
1121 * receiving a few mouse events:
1123 * status in8 282508 cycles 7128 calls
1124 * status out8 8404 cycles 341 calls
1125 * data out8 1734 cycles 78 calls
1126 * isr 174324 cycles 617 calls (includes take)
1127 * take 1241 cycles 2 calls
1128 * put 1411504 cycles 6937 calls
1129 * task 1655209 cycles 6937 calls (includes put)