1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Azoteq IQS7222A/B/C/D Capacitive Touch Controller
5 * Copyright (C) 2022 Jeff LaBundy <jeff@labundy.com>
8 #include <linux/bits.h>
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/gpio/consumer.h>
13 #include <linux/i2c.h>
14 #include <linux/input.h>
15 #include <linux/input/touchscreen.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel.h>
18 #include <linux/ktime.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/module.h>
21 #include <linux/property.h>
22 #include <linux/slab.h>
23 #include <asm/unaligned.h>
25 #define IQS7222_PROD_NUM 0x00
26 #define IQS7222_PROD_NUM_A 840
27 #define IQS7222_PROD_NUM_B 698
28 #define IQS7222_PROD_NUM_C 863
29 #define IQS7222_PROD_NUM_D 1046
31 #define IQS7222_SYS_STATUS 0x10
32 #define IQS7222_SYS_STATUS_RESET BIT(3)
33 #define IQS7222_SYS_STATUS_ATI_ERROR BIT(1)
34 #define IQS7222_SYS_STATUS_ATI_ACTIVE BIT(0)
36 #define IQS7222_CHAN_SETUP_0_REF_MODE_MASK GENMASK(15, 14)
37 #define IQS7222_CHAN_SETUP_0_REF_MODE_FOLLOW BIT(15)
38 #define IQS7222_CHAN_SETUP_0_REF_MODE_REF BIT(14)
39 #define IQS7222_CHAN_SETUP_0_CHAN_EN BIT(8)
41 #define IQS7222_SLDR_SETUP_0_CHAN_CNT_MASK GENMASK(2, 0)
42 #define IQS7222_SLDR_SETUP_2_RES_MASK GENMASK(15, 8)
43 #define IQS7222_SLDR_SETUP_2_RES_SHIFT 8
44 #define IQS7222_SLDR_SETUP_2_TOP_SPEED_MASK GENMASK(7, 0)
46 #define IQS7222_GPIO_SETUP_0_GPIO_EN BIT(0)
48 #define IQS7222_SYS_SETUP 0xD0
49 #define IQS7222_SYS_SETUP_INTF_MODE_MASK GENMASK(7, 6)
50 #define IQS7222_SYS_SETUP_INTF_MODE_TOUCH BIT(7)
51 #define IQS7222_SYS_SETUP_INTF_MODE_EVENT BIT(6)
52 #define IQS7222_SYS_SETUP_PWR_MODE_MASK GENMASK(5, 4)
53 #define IQS7222_SYS_SETUP_PWR_MODE_AUTO IQS7222_SYS_SETUP_PWR_MODE_MASK
54 #define IQS7222_SYS_SETUP_REDO_ATI BIT(2)
55 #define IQS7222_SYS_SETUP_ACK_RESET BIT(0)
57 #define IQS7222_EVENT_MASK_ATI BIT(12)
58 #define IQS7222_EVENT_MASK_SLDR BIT(10)
59 #define IQS7222_EVENT_MASK_TPAD IQS7222_EVENT_MASK_SLDR
60 #define IQS7222_EVENT_MASK_TOUCH BIT(1)
61 #define IQS7222_EVENT_MASK_PROX BIT(0)
63 #define IQS7222_COMMS_HOLD BIT(0)
64 #define IQS7222_COMMS_ERROR 0xEEEE
65 #define IQS7222_COMMS_RETRY_MS 50
66 #define IQS7222_COMMS_TIMEOUT_MS 100
67 #define IQS7222_RESET_TIMEOUT_MS 250
68 #define IQS7222_ATI_TIMEOUT_MS 2000
70 #define IQS7222_MAX_COLS_STAT 8
71 #define IQS7222_MAX_COLS_CYCLE 3
72 #define IQS7222_MAX_COLS_GLBL 3
73 #define IQS7222_MAX_COLS_BTN 3
74 #define IQS7222_MAX_COLS_CHAN 6
75 #define IQS7222_MAX_COLS_FILT 2
76 #define IQS7222_MAX_COLS_SLDR 11
77 #define IQS7222_MAX_COLS_TPAD 24
78 #define IQS7222_MAX_COLS_GPIO 3
79 #define IQS7222_MAX_COLS_SYS 13
81 #define IQS7222_MAX_CHAN 20
82 #define IQS7222_MAX_SLDR 2
84 #define IQS7222_NUM_RETRIES 5
85 #define IQS7222_REG_OFFSET 0x100
87 enum iqs7222_reg_key_id {
90 IQS7222_REG_KEY_TOUCH,
91 IQS7222_REG_KEY_DEBOUNCE,
93 IQS7222_REG_KEY_TAP_LEGACY,
94 IQS7222_REG_KEY_AXIAL,
95 IQS7222_REG_KEY_AXIAL_LEGACY,
96 IQS7222_REG_KEY_WHEEL,
97 IQS7222_REG_KEY_NO_WHEEL,
98 IQS7222_REG_KEY_RESERVED
101 enum iqs7222_reg_grp_id {
102 IQS7222_REG_GRP_STAT,
103 IQS7222_REG_GRP_FILT,
104 IQS7222_REG_GRP_CYCLE,
105 IQS7222_REG_GRP_GLBL,
107 IQS7222_REG_GRP_CHAN,
108 IQS7222_REG_GRP_SLDR,
109 IQS7222_REG_GRP_TPAD,
110 IQS7222_REG_GRP_GPIO,
115 static const char * const iqs7222_reg_grp_names[IQS7222_NUM_REG_GRPS] = {
116 [IQS7222_REG_GRP_CYCLE] = "cycle-%d",
117 [IQS7222_REG_GRP_CHAN] = "channel-%d",
118 [IQS7222_REG_GRP_SLDR] = "slider-%d",
119 [IQS7222_REG_GRP_TPAD] = "trackpad",
120 [IQS7222_REG_GRP_GPIO] = "gpio-%d",
123 static const unsigned int iqs7222_max_cols[IQS7222_NUM_REG_GRPS] = {
124 [IQS7222_REG_GRP_STAT] = IQS7222_MAX_COLS_STAT,
125 [IQS7222_REG_GRP_CYCLE] = IQS7222_MAX_COLS_CYCLE,
126 [IQS7222_REG_GRP_GLBL] = IQS7222_MAX_COLS_GLBL,
127 [IQS7222_REG_GRP_BTN] = IQS7222_MAX_COLS_BTN,
128 [IQS7222_REG_GRP_CHAN] = IQS7222_MAX_COLS_CHAN,
129 [IQS7222_REG_GRP_FILT] = IQS7222_MAX_COLS_FILT,
130 [IQS7222_REG_GRP_SLDR] = IQS7222_MAX_COLS_SLDR,
131 [IQS7222_REG_GRP_TPAD] = IQS7222_MAX_COLS_TPAD,
132 [IQS7222_REG_GRP_GPIO] = IQS7222_MAX_COLS_GPIO,
133 [IQS7222_REG_GRP_SYS] = IQS7222_MAX_COLS_SYS,
136 static const unsigned int iqs7222_gpio_links[] = { 2, 5, 6, };
138 struct iqs7222_event_desc {
145 enum iqs7222_reg_key_id reg_key;
148 static const struct iqs7222_event_desc iqs7222_kp_events[] = {
150 .name = "event-prox",
151 .enable = IQS7222_EVENT_MASK_PROX,
152 .reg_key = IQS7222_REG_KEY_PROX,
155 .name = "event-touch",
156 .enable = IQS7222_EVENT_MASK_TOUCH,
157 .reg_key = IQS7222_REG_KEY_TOUCH,
161 static const struct iqs7222_event_desc iqs7222_sl_events[] = {
162 { .name = "event-press", },
168 .reg_key = IQS7222_REG_KEY_TAP,
171 .name = "event-swipe-pos",
172 .mask = BIT(5) | BIT(1),
175 .reg_key = IQS7222_REG_KEY_AXIAL,
178 .name = "event-swipe-neg",
179 .mask = BIT(5) | BIT(1),
180 .val = BIT(5) | BIT(1),
182 .reg_key = IQS7222_REG_KEY_AXIAL,
185 .name = "event-flick-pos",
186 .mask = BIT(5) | BIT(2),
189 .reg_key = IQS7222_REG_KEY_AXIAL,
192 .name = "event-flick-neg",
193 .mask = BIT(5) | BIT(2),
194 .val = BIT(5) | BIT(2),
196 .reg_key = IQS7222_REG_KEY_AXIAL,
200 static const struct iqs7222_event_desc iqs7222_tp_events[] = {
202 .name = "event-press",
211 .reg_key = IQS7222_REG_KEY_TAP,
214 .name = "event-swipe-x-pos",
216 .mask = BIT(2) | BIT(1),
220 .reg_key = IQS7222_REG_KEY_AXIAL,
223 .name = "event-swipe-y-pos",
225 .mask = BIT(3) | BIT(1),
229 .reg_key = IQS7222_REG_KEY_AXIAL,
232 .name = "event-swipe-x-neg",
234 .mask = BIT(4) | BIT(1),
238 .reg_key = IQS7222_REG_KEY_AXIAL,
241 .name = "event-swipe-y-neg",
243 .mask = BIT(5) | BIT(1),
247 .reg_key = IQS7222_REG_KEY_AXIAL,
250 .name = "event-flick-x-pos",
252 .mask = BIT(2) | BIT(1),
253 .val = BIT(2) | BIT(1),
256 .reg_key = IQS7222_REG_KEY_AXIAL,
259 .name = "event-flick-y-pos",
261 .mask = BIT(3) | BIT(1),
262 .val = BIT(3) | BIT(1),
265 .reg_key = IQS7222_REG_KEY_AXIAL,
268 .name = "event-flick-x-neg",
270 .mask = BIT(4) | BIT(1),
271 .val = BIT(4) | BIT(1),
274 .reg_key = IQS7222_REG_KEY_AXIAL,
277 .name = "event-flick-y-neg",
279 .mask = BIT(5) | BIT(1),
280 .val = BIT(5) | BIT(1),
283 .reg_key = IQS7222_REG_KEY_AXIAL,
287 struct iqs7222_reg_grp_desc {
293 struct iqs7222_dev_desc {
304 struct iqs7222_reg_grp_desc reg_grps[IQS7222_NUM_REG_GRPS];
307 static const struct iqs7222_dev_desc iqs7222_devs[] = {
309 .prod_num = IQS7222_PROD_NUM_A,
312 .sldr_res = U8_MAX * 16,
318 [IQS7222_REG_GRP_STAT] = {
319 .base = IQS7222_SYS_STATUS,
323 [IQS7222_REG_GRP_CYCLE] = {
328 [IQS7222_REG_GRP_GLBL] = {
333 [IQS7222_REG_GRP_BTN] = {
338 [IQS7222_REG_GRP_CHAN] = {
343 [IQS7222_REG_GRP_FILT] = {
348 [IQS7222_REG_GRP_SLDR] = {
353 [IQS7222_REG_GRP_GPIO] = {
358 [IQS7222_REG_GRP_SYS] = {
359 .base = IQS7222_SYS_SETUP,
366 .prod_num = IQS7222_PROD_NUM_A,
369 .sldr_res = U8_MAX * 16,
374 .legacy_gesture = true,
376 [IQS7222_REG_GRP_STAT] = {
377 .base = IQS7222_SYS_STATUS,
381 [IQS7222_REG_GRP_CYCLE] = {
386 [IQS7222_REG_GRP_GLBL] = {
391 [IQS7222_REG_GRP_BTN] = {
396 [IQS7222_REG_GRP_CHAN] = {
401 [IQS7222_REG_GRP_FILT] = {
406 [IQS7222_REG_GRP_SLDR] = {
411 [IQS7222_REG_GRP_GPIO] = {
416 [IQS7222_REG_GRP_SYS] = {
417 .base = IQS7222_SYS_SETUP,
424 .prod_num = IQS7222_PROD_NUM_B,
430 [IQS7222_REG_GRP_STAT] = {
431 .base = IQS7222_SYS_STATUS,
435 [IQS7222_REG_GRP_CYCLE] = {
440 [IQS7222_REG_GRP_GLBL] = {
445 [IQS7222_REG_GRP_BTN] = {
450 [IQS7222_REG_GRP_CHAN] = {
455 [IQS7222_REG_GRP_FILT] = {
460 [IQS7222_REG_GRP_SYS] = {
461 .base = IQS7222_SYS_SETUP,
468 .prod_num = IQS7222_PROD_NUM_B,
472 [IQS7222_REG_GRP_STAT] = {
473 .base = IQS7222_SYS_STATUS,
477 [IQS7222_REG_GRP_CYCLE] = {
482 [IQS7222_REG_GRP_GLBL] = {
487 [IQS7222_REG_GRP_BTN] = {
492 [IQS7222_REG_GRP_CHAN] = {
497 [IQS7222_REG_GRP_FILT] = {
502 [IQS7222_REG_GRP_SYS] = {
503 .base = IQS7222_SYS_SETUP,
510 .prod_num = IQS7222_PROD_NUM_C,
515 .wheel_enable = BIT(3),
519 [IQS7222_REG_GRP_STAT] = {
520 .base = IQS7222_SYS_STATUS,
524 [IQS7222_REG_GRP_CYCLE] = {
529 [IQS7222_REG_GRP_GLBL] = {
534 [IQS7222_REG_GRP_BTN] = {
539 [IQS7222_REG_GRP_CHAN] = {
544 [IQS7222_REG_GRP_FILT] = {
549 [IQS7222_REG_GRP_SLDR] = {
554 [IQS7222_REG_GRP_GPIO] = {
559 [IQS7222_REG_GRP_SYS] = {
560 .base = IQS7222_SYS_SETUP,
567 .prod_num = IQS7222_PROD_NUM_C,
572 .wheel_enable = BIT(3),
576 [IQS7222_REG_GRP_STAT] = {
577 .base = IQS7222_SYS_STATUS,
581 [IQS7222_REG_GRP_CYCLE] = {
586 [IQS7222_REG_GRP_GLBL] = {
591 [IQS7222_REG_GRP_BTN] = {
596 [IQS7222_REG_GRP_CHAN] = {
601 [IQS7222_REG_GRP_FILT] = {
606 [IQS7222_REG_GRP_SLDR] = {
611 [IQS7222_REG_GRP_GPIO] = {
616 [IQS7222_REG_GRP_SYS] = {
617 .base = IQS7222_SYS_SETUP,
624 .prod_num = IQS7222_PROD_NUM_D,
632 [IQS7222_REG_GRP_STAT] = {
633 .base = IQS7222_SYS_STATUS,
637 [IQS7222_REG_GRP_CYCLE] = {
642 [IQS7222_REG_GRP_GLBL] = {
647 [IQS7222_REG_GRP_BTN] = {
652 [IQS7222_REG_GRP_CHAN] = {
657 [IQS7222_REG_GRP_FILT] = {
662 [IQS7222_REG_GRP_TPAD] = {
667 [IQS7222_REG_GRP_GPIO] = {
672 [IQS7222_REG_GRP_SYS] = {
673 .base = IQS7222_SYS_SETUP,
681 struct iqs7222_prop_desc {
683 enum iqs7222_reg_grp_id reg_grp;
684 enum iqs7222_reg_key_id reg_key;
695 static const struct iqs7222_prop_desc iqs7222_props[] = {
697 .name = "azoteq,conv-period",
698 .reg_grp = IQS7222_REG_GRP_CYCLE,
702 .label = "conversion period",
705 .name = "azoteq,conv-frac",
706 .reg_grp = IQS7222_REG_GRP_CYCLE,
710 .label = "conversion frequency fractional divider",
713 .name = "azoteq,rx-float-inactive",
714 .reg_grp = IQS7222_REG_GRP_CYCLE,
721 .name = "azoteq,dead-time-enable",
722 .reg_grp = IQS7222_REG_GRP_CYCLE,
728 .name = "azoteq,tx-freq-fosc",
729 .reg_grp = IQS7222_REG_GRP_CYCLE,
735 .name = "azoteq,vbias-enable",
736 .reg_grp = IQS7222_REG_GRP_CYCLE,
742 .name = "azoteq,sense-mode",
743 .reg_grp = IQS7222_REG_GRP_CYCLE,
748 .label = "sensing mode",
751 .name = "azoteq,iref-enable",
752 .reg_grp = IQS7222_REG_GRP_CYCLE,
758 .name = "azoteq,iref-level",
759 .reg_grp = IQS7222_REG_GRP_CYCLE,
763 .label = "current reference level",
766 .name = "azoteq,iref-trim",
767 .reg_grp = IQS7222_REG_GRP_CYCLE,
771 .label = "current reference trim",
774 .name = "azoteq,max-counts",
775 .reg_grp = IQS7222_REG_GRP_GLBL,
779 .label = "maximum counts",
782 .name = "azoteq,auto-mode",
783 .reg_grp = IQS7222_REG_GRP_GLBL,
787 .label = "number of conversions",
790 .name = "azoteq,ati-frac-div-fine",
791 .reg_grp = IQS7222_REG_GRP_GLBL,
795 .label = "ATI fine fractional divider",
798 .name = "azoteq,ati-frac-div-coarse",
799 .reg_grp = IQS7222_REG_GRP_GLBL,
803 .label = "ATI coarse fractional divider",
806 .name = "azoteq,ati-comp-select",
807 .reg_grp = IQS7222_REG_GRP_GLBL,
811 .label = "ATI compensation selection",
814 .name = "azoteq,ati-band",
815 .reg_grp = IQS7222_REG_GRP_CHAN,
822 .name = "azoteq,global-halt",
823 .reg_grp = IQS7222_REG_GRP_CHAN,
829 .name = "azoteq,invert-enable",
830 .reg_grp = IQS7222_REG_GRP_CHAN,
836 .name = "azoteq,dual-direction",
837 .reg_grp = IQS7222_REG_GRP_CHAN,
843 .name = "azoteq,samp-cap-double",
844 .reg_grp = IQS7222_REG_GRP_CHAN,
850 .name = "azoteq,vref-half",
851 .reg_grp = IQS7222_REG_GRP_CHAN,
857 .name = "azoteq,proj-bias",
858 .reg_grp = IQS7222_REG_GRP_CHAN,
862 .label = "projected bias current",
865 .name = "azoteq,ati-target",
866 .reg_grp = IQS7222_REG_GRP_CHAN,
871 .label = "ATI target",
874 .name = "azoteq,ati-base",
875 .reg_grp = IQS7222_REG_GRP_CHAN,
883 .name = "azoteq,ati-mode",
884 .reg_grp = IQS7222_REG_GRP_CHAN,
892 .name = "azoteq,ati-frac-div-fine",
893 .reg_grp = IQS7222_REG_GRP_CHAN,
897 .label = "ATI fine fractional divider",
900 .name = "azoteq,ati-frac-mult-coarse",
901 .reg_grp = IQS7222_REG_GRP_CHAN,
905 .label = "ATI coarse fractional multiplier",
908 .name = "azoteq,ati-frac-div-coarse",
909 .reg_grp = IQS7222_REG_GRP_CHAN,
913 .label = "ATI coarse fractional divider",
916 .name = "azoteq,ati-comp-div",
917 .reg_grp = IQS7222_REG_GRP_CHAN,
921 .label = "ATI compensation divider",
924 .name = "azoteq,ati-comp-select",
925 .reg_grp = IQS7222_REG_GRP_CHAN,
929 .label = "ATI compensation selection",
932 .name = "azoteq,debounce-exit",
933 .reg_grp = IQS7222_REG_GRP_BTN,
934 .reg_key = IQS7222_REG_KEY_DEBOUNCE,
938 .label = "debounce exit factor",
941 .name = "azoteq,debounce-enter",
942 .reg_grp = IQS7222_REG_GRP_BTN,
943 .reg_key = IQS7222_REG_KEY_DEBOUNCE,
947 .label = "debounce entrance factor",
950 .name = "azoteq,thresh",
951 .reg_grp = IQS7222_REG_GRP_BTN,
952 .reg_key = IQS7222_REG_KEY_PROX,
957 .label = "threshold",
960 .name = "azoteq,thresh",
961 .reg_grp = IQS7222_REG_GRP_BTN,
962 .reg_key = IQS7222_REG_KEY_TOUCH,
966 .label = "threshold",
969 .name = "azoteq,hyst",
970 .reg_grp = IQS7222_REG_GRP_BTN,
971 .reg_key = IQS7222_REG_KEY_TOUCH,
975 .label = "hysteresis",
978 .name = "azoteq,lta-beta-lp",
979 .reg_grp = IQS7222_REG_GRP_FILT,
983 .label = "low-power mode long-term average beta",
986 .name = "azoteq,lta-beta-np",
987 .reg_grp = IQS7222_REG_GRP_FILT,
991 .label = "normal-power mode long-term average beta",
994 .name = "azoteq,counts-beta-lp",
995 .reg_grp = IQS7222_REG_GRP_FILT,
999 .label = "low-power mode counts beta",
1002 .name = "azoteq,counts-beta-np",
1003 .reg_grp = IQS7222_REG_GRP_FILT,
1007 .label = "normal-power mode counts beta",
1010 .name = "azoteq,lta-fast-beta-lp",
1011 .reg_grp = IQS7222_REG_GRP_FILT,
1015 .label = "low-power mode long-term average fast beta",
1018 .name = "azoteq,lta-fast-beta-np",
1019 .reg_grp = IQS7222_REG_GRP_FILT,
1023 .label = "normal-power mode long-term average fast beta",
1026 .name = "azoteq,lower-cal",
1027 .reg_grp = IQS7222_REG_GRP_SLDR,
1031 .label = "lower calibration",
1034 .name = "azoteq,static-beta",
1035 .reg_grp = IQS7222_REG_GRP_SLDR,
1036 .reg_key = IQS7222_REG_KEY_NO_WHEEL,
1042 .name = "azoteq,bottom-beta",
1043 .reg_grp = IQS7222_REG_GRP_SLDR,
1044 .reg_key = IQS7222_REG_KEY_NO_WHEEL,
1048 .label = "bottom beta",
1051 .name = "azoteq,static-beta",
1052 .reg_grp = IQS7222_REG_GRP_SLDR,
1053 .reg_key = IQS7222_REG_KEY_WHEEL,
1059 .name = "azoteq,bottom-beta",
1060 .reg_grp = IQS7222_REG_GRP_SLDR,
1061 .reg_key = IQS7222_REG_KEY_WHEEL,
1065 .label = "bottom beta",
1068 .name = "azoteq,bottom-speed",
1069 .reg_grp = IQS7222_REG_GRP_SLDR,
1073 .label = "bottom speed",
1076 .name = "azoteq,upper-cal",
1077 .reg_grp = IQS7222_REG_GRP_SLDR,
1081 .label = "upper calibration",
1084 .name = "azoteq,gesture-max-ms",
1085 .reg_grp = IQS7222_REG_GRP_SLDR,
1086 .reg_key = IQS7222_REG_KEY_TAP,
1091 .label = "maximum gesture time",
1094 .name = "azoteq,gesture-max-ms",
1095 .reg_grp = IQS7222_REG_GRP_SLDR,
1096 .reg_key = IQS7222_REG_KEY_TAP_LEGACY,
1101 .label = "maximum gesture time",
1104 .name = "azoteq,gesture-min-ms",
1105 .reg_grp = IQS7222_REG_GRP_SLDR,
1106 .reg_key = IQS7222_REG_KEY_TAP,
1111 .label = "minimum gesture time",
1114 .name = "azoteq,gesture-min-ms",
1115 .reg_grp = IQS7222_REG_GRP_SLDR,
1116 .reg_key = IQS7222_REG_KEY_TAP_LEGACY,
1121 .label = "minimum gesture time",
1124 .name = "azoteq,gesture-dist",
1125 .reg_grp = IQS7222_REG_GRP_SLDR,
1126 .reg_key = IQS7222_REG_KEY_AXIAL,
1131 .label = "gesture distance",
1134 .name = "azoteq,gesture-dist",
1135 .reg_grp = IQS7222_REG_GRP_SLDR,
1136 .reg_key = IQS7222_REG_KEY_AXIAL_LEGACY,
1141 .label = "gesture distance",
1144 .name = "azoteq,gesture-max-ms",
1145 .reg_grp = IQS7222_REG_GRP_SLDR,
1146 .reg_key = IQS7222_REG_KEY_AXIAL,
1151 .label = "maximum gesture time",
1154 .name = "azoteq,gesture-max-ms",
1155 .reg_grp = IQS7222_REG_GRP_SLDR,
1156 .reg_key = IQS7222_REG_KEY_AXIAL_LEGACY,
1161 .label = "maximum gesture time",
1164 .name = "azoteq,num-rows",
1165 .reg_grp = IQS7222_REG_GRP_TPAD,
1171 .label = "number of rows",
1174 .name = "azoteq,num-cols",
1175 .reg_grp = IQS7222_REG_GRP_TPAD,
1181 .label = "number of columns",
1184 .name = "azoteq,lower-cal-y",
1185 .reg_grp = IQS7222_REG_GRP_TPAD,
1189 .label = "lower vertical calibration",
1192 .name = "azoteq,lower-cal-x",
1193 .reg_grp = IQS7222_REG_GRP_TPAD,
1197 .label = "lower horizontal calibration",
1200 .name = "azoteq,upper-cal-y",
1201 .reg_grp = IQS7222_REG_GRP_TPAD,
1205 .label = "upper vertical calibration",
1208 .name = "azoteq,upper-cal-x",
1209 .reg_grp = IQS7222_REG_GRP_TPAD,
1213 .label = "upper horizontal calibration",
1216 .name = "azoteq,top-speed",
1217 .reg_grp = IQS7222_REG_GRP_TPAD,
1222 .label = "top speed",
1225 .name = "azoteq,bottom-speed",
1226 .reg_grp = IQS7222_REG_GRP_TPAD,
1230 .label = "bottom speed",
1233 .name = "azoteq,gesture-min-ms",
1234 .reg_grp = IQS7222_REG_GRP_TPAD,
1235 .reg_key = IQS7222_REG_KEY_TAP,
1240 .label = "minimum gesture time",
1243 .name = "azoteq,gesture-max-ms",
1244 .reg_grp = IQS7222_REG_GRP_TPAD,
1245 .reg_key = IQS7222_REG_KEY_AXIAL,
1250 .label = "maximum gesture time",
1253 .name = "azoteq,gesture-max-ms",
1254 .reg_grp = IQS7222_REG_GRP_TPAD,
1255 .reg_key = IQS7222_REG_KEY_TAP,
1260 .label = "maximum gesture time",
1263 .name = "azoteq,gesture-dist",
1264 .reg_grp = IQS7222_REG_GRP_TPAD,
1265 .reg_key = IQS7222_REG_KEY_TAP,
1269 .label = "gesture distance",
1272 .name = "azoteq,gesture-dist",
1273 .reg_grp = IQS7222_REG_GRP_TPAD,
1274 .reg_key = IQS7222_REG_KEY_AXIAL,
1278 .label = "gesture distance",
1281 .name = "drive-open-drain",
1282 .reg_grp = IQS7222_REG_GRP_GPIO,
1288 .name = "azoteq,timeout-ati-ms",
1289 .reg_grp = IQS7222_REG_GRP_SYS,
1294 .label = "ATI error timeout",
1297 .name = "azoteq,rate-ati-ms",
1298 .reg_grp = IQS7222_REG_GRP_SYS,
1302 .label = "ATI report rate",
1305 .name = "azoteq,timeout-np-ms",
1306 .reg_grp = IQS7222_REG_GRP_SYS,
1310 .label = "normal-power mode timeout",
1313 .name = "azoteq,rate-np-ms",
1314 .reg_grp = IQS7222_REG_GRP_SYS,
1319 .label = "normal-power mode report rate",
1322 .name = "azoteq,timeout-lp-ms",
1323 .reg_grp = IQS7222_REG_GRP_SYS,
1327 .label = "low-power mode timeout",
1330 .name = "azoteq,rate-lp-ms",
1331 .reg_grp = IQS7222_REG_GRP_SYS,
1336 .label = "low-power mode report rate",
1339 .name = "azoteq,timeout-ulp-ms",
1340 .reg_grp = IQS7222_REG_GRP_SYS,
1344 .label = "ultra-low-power mode timeout",
1347 .name = "azoteq,rate-ulp-ms",
1348 .reg_grp = IQS7222_REG_GRP_SYS,
1353 .label = "ultra-low-power mode report rate",
1357 struct iqs7222_private {
1358 const struct iqs7222_dev_desc *dev_desc;
1359 struct gpio_desc *reset_gpio;
1360 struct gpio_desc *irq_gpio;
1361 struct i2c_client *client;
1362 struct input_dev *keypad;
1363 struct touchscreen_properties prop;
1364 unsigned int kp_type[IQS7222_MAX_CHAN][ARRAY_SIZE(iqs7222_kp_events)];
1365 unsigned int kp_code[IQS7222_MAX_CHAN][ARRAY_SIZE(iqs7222_kp_events)];
1366 unsigned int sl_code[IQS7222_MAX_SLDR][ARRAY_SIZE(iqs7222_sl_events)];
1367 unsigned int sl_axis[IQS7222_MAX_SLDR];
1368 unsigned int tp_code[ARRAY_SIZE(iqs7222_tp_events)];
1369 u16 cycle_setup[IQS7222_MAX_CHAN / 2][IQS7222_MAX_COLS_CYCLE];
1370 u16 glbl_setup[IQS7222_MAX_COLS_GLBL];
1371 u16 btn_setup[IQS7222_MAX_CHAN][IQS7222_MAX_COLS_BTN];
1372 u16 chan_setup[IQS7222_MAX_CHAN][IQS7222_MAX_COLS_CHAN];
1373 u16 filt_setup[IQS7222_MAX_COLS_FILT];
1374 u16 sldr_setup[IQS7222_MAX_SLDR][IQS7222_MAX_COLS_SLDR];
1375 u16 tpad_setup[IQS7222_MAX_COLS_TPAD];
1376 u16 gpio_setup[ARRAY_SIZE(iqs7222_gpio_links)][IQS7222_MAX_COLS_GPIO];
1377 u16 sys_setup[IQS7222_MAX_COLS_SYS];
1380 static u16 *iqs7222_setup(struct iqs7222_private *iqs7222,
1381 enum iqs7222_reg_grp_id reg_grp, int row)
1384 case IQS7222_REG_GRP_CYCLE:
1385 return iqs7222->cycle_setup[row];
1387 case IQS7222_REG_GRP_GLBL:
1388 return iqs7222->glbl_setup;
1390 case IQS7222_REG_GRP_BTN:
1391 return iqs7222->btn_setup[row];
1393 case IQS7222_REG_GRP_CHAN:
1394 return iqs7222->chan_setup[row];
1396 case IQS7222_REG_GRP_FILT:
1397 return iqs7222->filt_setup;
1399 case IQS7222_REG_GRP_SLDR:
1400 return iqs7222->sldr_setup[row];
1402 case IQS7222_REG_GRP_TPAD:
1403 return iqs7222->tpad_setup;
1405 case IQS7222_REG_GRP_GPIO:
1406 return iqs7222->gpio_setup[row];
1408 case IQS7222_REG_GRP_SYS:
1409 return iqs7222->sys_setup;
1416 static int iqs7222_irq_poll(struct iqs7222_private *iqs7222, u16 timeout_ms)
1418 ktime_t irq_timeout = ktime_add_ms(ktime_get(), timeout_ms);
1422 usleep_range(1000, 1100);
1424 ret = gpiod_get_value_cansleep(iqs7222->irq_gpio);
1429 } while (ktime_compare(ktime_get(), irq_timeout) < 0);
1434 static int iqs7222_hard_reset(struct iqs7222_private *iqs7222)
1436 struct i2c_client *client = iqs7222->client;
1439 if (!iqs7222->reset_gpio)
1442 gpiod_set_value_cansleep(iqs7222->reset_gpio, 1);
1443 usleep_range(1000, 1100);
1445 gpiod_set_value_cansleep(iqs7222->reset_gpio, 0);
1447 error = iqs7222_irq_poll(iqs7222, IQS7222_RESET_TIMEOUT_MS);
1449 dev_err(&client->dev, "Failed to reset device: %d\n", error);
1454 static int iqs7222_force_comms(struct iqs7222_private *iqs7222)
1456 u8 msg_buf[] = { 0xFF, };
1460 * The device cannot communicate until it asserts its interrupt (RDY)
1461 * pin. Attempts to do so while RDY is deasserted return an ACK; how-
1462 * ever all write data is ignored, and all read data returns 0xEE.
1464 * Unsolicited communication must be preceded by a special force com-
1465 * munication command, after which the device eventually asserts its
1466 * RDY pin and agrees to communicate.
1468 * Regardless of whether communication is forced or the result of an
1469 * interrupt, the device automatically deasserts its RDY pin once it
1470 * detects an I2C stop condition, or a timeout expires.
1472 ret = gpiod_get_value_cansleep(iqs7222->irq_gpio);
1478 ret = i2c_master_send(iqs7222->client, msg_buf, sizeof(msg_buf));
1479 if (ret < (int)sizeof(msg_buf)) {
1484 * The datasheet states that the host must wait to retry any
1485 * failed attempt to communicate over I2C.
1487 msleep(IQS7222_COMMS_RETRY_MS);
1491 return iqs7222_irq_poll(iqs7222, IQS7222_COMMS_TIMEOUT_MS);
1494 static int iqs7222_read_burst(struct iqs7222_private *iqs7222,
1495 u16 reg, void *val, u16 num_val)
1497 u8 reg_buf[sizeof(__be16)];
1499 struct i2c_client *client = iqs7222->client;
1500 struct i2c_msg msg[] = {
1502 .addr = client->addr,
1504 .len = reg > U8_MAX ? sizeof(reg) : sizeof(u8),
1508 .addr = client->addr,
1510 .len = num_val * sizeof(__le16),
1516 put_unaligned_be16(reg, reg_buf);
1521 * The following loop protects against an edge case in which the RDY
1522 * pin is automatically deasserted just as the read is initiated. In
1523 * that case, the read must be retried using forced communication.
1525 for (i = 0; i < IQS7222_NUM_RETRIES; i++) {
1526 ret = iqs7222_force_comms(iqs7222);
1530 ret = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
1531 if (ret < (int)ARRAY_SIZE(msg)) {
1535 msleep(IQS7222_COMMS_RETRY_MS);
1539 if (get_unaligned_le16(msg[1].buf) == IQS7222_COMMS_ERROR) {
1549 * The following delay ensures the device has deasserted the RDY pin
1550 * following the I2C stop condition.
1552 usleep_range(50, 100);
1555 dev_err(&client->dev,
1556 "Failed to read from address 0x%04X: %d\n", reg, ret);
1561 static int iqs7222_read_word(struct iqs7222_private *iqs7222, u16 reg, u16 *val)
1566 error = iqs7222_read_burst(iqs7222, reg, &val_buf, 1);
1570 *val = le16_to_cpu(val_buf);
1575 static int iqs7222_write_burst(struct iqs7222_private *iqs7222,
1576 u16 reg, const void *val, u16 num_val)
1578 int reg_len = reg > U8_MAX ? sizeof(reg) : sizeof(u8);
1579 int val_len = num_val * sizeof(__le16);
1580 int msg_len = reg_len + val_len;
1582 struct i2c_client *client = iqs7222->client;
1585 msg_buf = kzalloc(msg_len, GFP_KERNEL);
1590 put_unaligned_be16(reg, msg_buf);
1594 memcpy(msg_buf + reg_len, val, val_len);
1597 * The following loop protects against an edge case in which the RDY
1598 * pin is automatically asserted just before the force communication
1601 * In that case, the subsequent I2C stop condition tricks the device
1602 * into preemptively deasserting the RDY pin and the command must be
1605 for (i = 0; i < IQS7222_NUM_RETRIES; i++) {
1606 ret = iqs7222_force_comms(iqs7222);
1610 ret = i2c_master_send(client, msg_buf, msg_len);
1611 if (ret < msg_len) {
1615 msleep(IQS7222_COMMS_RETRY_MS);
1625 usleep_range(50, 100);
1628 dev_err(&client->dev,
1629 "Failed to write to address 0x%04X: %d\n", reg, ret);
1634 static int iqs7222_write_word(struct iqs7222_private *iqs7222, u16 reg, u16 val)
1636 __le16 val_buf = cpu_to_le16(val);
1638 return iqs7222_write_burst(iqs7222, reg, &val_buf, 1);
1641 static int iqs7222_ati_trigger(struct iqs7222_private *iqs7222)
1643 struct i2c_client *client = iqs7222->client;
1644 ktime_t ati_timeout;
1650 * The reserved fields of the system setup register may have changed
1651 * as a result of other registers having been written. As such, read
1652 * the register's latest value to avoid unexpected behavior when the
1653 * register is written in the loop that follows.
1655 error = iqs7222_read_word(iqs7222, IQS7222_SYS_SETUP, &sys_setup);
1659 for (i = 0; i < IQS7222_NUM_RETRIES; i++) {
1661 * Trigger ATI from streaming and normal-power modes so that
1662 * the RDY pin continues to be asserted during ATI.
1664 error = iqs7222_write_word(iqs7222, IQS7222_SYS_SETUP,
1666 IQS7222_SYS_SETUP_REDO_ATI);
1670 ati_timeout = ktime_add_ms(ktime_get(), IQS7222_ATI_TIMEOUT_MS);
1673 error = iqs7222_irq_poll(iqs7222,
1674 IQS7222_COMMS_TIMEOUT_MS);
1678 error = iqs7222_read_word(iqs7222, IQS7222_SYS_STATUS,
1683 if (sys_status & IQS7222_SYS_STATUS_RESET)
1686 if (sys_status & IQS7222_SYS_STATUS_ATI_ERROR)
1689 if (sys_status & IQS7222_SYS_STATUS_ATI_ACTIVE)
1693 * Use stream-in-touch mode if either slider reports
1694 * absolute position.
1696 sys_setup |= test_bit(EV_ABS, iqs7222->keypad->evbit)
1697 ? IQS7222_SYS_SETUP_INTF_MODE_TOUCH
1698 : IQS7222_SYS_SETUP_INTF_MODE_EVENT;
1699 sys_setup |= IQS7222_SYS_SETUP_PWR_MODE_AUTO;
1701 return iqs7222_write_word(iqs7222, IQS7222_SYS_SETUP,
1703 } while (ktime_compare(ktime_get(), ati_timeout) < 0);
1705 dev_err(&client->dev,
1706 "ATI attempt %d of %d failed with status 0x%02X, %s\n",
1707 i + 1, IQS7222_NUM_RETRIES, (u8)sys_status,
1708 i + 1 < IQS7222_NUM_RETRIES ? "retrying" : "stopping");
1714 static int iqs7222_dev_init(struct iqs7222_private *iqs7222, int dir)
1716 const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
1717 int comms_offset = dev_desc->comms_offset;
1721 * Acknowledge reset before writing any registers in case the device
1722 * suffers a spurious reset during initialization. Because this step
1723 * may change the reserved fields of the second filter beta register,
1724 * its cache must be updated.
1726 * Writing the second filter beta register, in turn, may clobber the
1727 * system status register. As such, the filter beta register pair is
1728 * written first to protect against this hazard.
1731 u16 reg = dev_desc->reg_grps[IQS7222_REG_GRP_FILT].base + 1;
1734 error = iqs7222_write_word(iqs7222, IQS7222_SYS_SETUP,
1735 iqs7222->sys_setup[0] |
1736 IQS7222_SYS_SETUP_ACK_RESET);
1740 error = iqs7222_read_word(iqs7222, reg, &filt_setup);
1744 iqs7222->filt_setup[1] &= GENMASK(7, 0);
1745 iqs7222->filt_setup[1] |= (filt_setup & ~GENMASK(7, 0));
1749 * Take advantage of the stop-bit disable function, if available, to
1750 * save the trouble of having to reopen a communication window after
1751 * each burst read or write.
1756 error = iqs7222_read_word(iqs7222,
1757 IQS7222_SYS_SETUP + comms_offset,
1762 error = iqs7222_write_word(iqs7222,
1763 IQS7222_SYS_SETUP + comms_offset,
1764 comms_setup | IQS7222_COMMS_HOLD);
1769 for (i = 0; i < IQS7222_NUM_REG_GRPS; i++) {
1770 int num_row = dev_desc->reg_grps[i].num_row;
1771 int num_col = dev_desc->reg_grps[i].num_col;
1772 u16 reg = dev_desc->reg_grps[i].base;
1779 val = iqs7222_setup(iqs7222, i, 0);
1783 val_buf = kcalloc(num_col, sizeof(__le16), GFP_KERNEL);
1787 for (j = 0; j < num_row; j++) {
1790 error = iqs7222_read_burst(iqs7222, reg,
1792 for (k = 0; k < num_col; k++)
1793 val[k] = le16_to_cpu(val_buf[k]);
1797 for (k = 0; k < num_col; k++)
1798 val_buf[k] = cpu_to_le16(val[k]);
1799 error = iqs7222_write_burst(iqs7222, reg,
1810 reg += IQS7222_REG_OFFSET;
1811 val += iqs7222_max_cols[i];
1823 error = iqs7222_read_word(iqs7222,
1824 IQS7222_SYS_SETUP + comms_offset,
1829 error = iqs7222_write_word(iqs7222,
1830 IQS7222_SYS_SETUP + comms_offset,
1831 comms_setup & ~IQS7222_COMMS_HOLD);
1837 iqs7222->sys_setup[0] &= ~IQS7222_SYS_SETUP_INTF_MODE_MASK;
1838 iqs7222->sys_setup[0] &= ~IQS7222_SYS_SETUP_PWR_MODE_MASK;
1842 return iqs7222_ati_trigger(iqs7222);
1845 static int iqs7222_dev_info(struct iqs7222_private *iqs7222)
1847 struct i2c_client *client = iqs7222->client;
1848 bool prod_num_valid = false;
1852 error = iqs7222_read_burst(iqs7222, IQS7222_PROD_NUM, dev_id,
1853 ARRAY_SIZE(dev_id));
1857 for (i = 0; i < ARRAY_SIZE(iqs7222_devs); i++) {
1858 if (le16_to_cpu(dev_id[0]) != iqs7222_devs[i].prod_num)
1861 prod_num_valid = true;
1863 if (le16_to_cpu(dev_id[1]) < iqs7222_devs[i].fw_major)
1866 if (le16_to_cpu(dev_id[2]) < iqs7222_devs[i].fw_minor)
1869 iqs7222->dev_desc = &iqs7222_devs[i];
1874 dev_err(&client->dev, "Unsupported firmware revision: %u.%u\n",
1875 le16_to_cpu(dev_id[1]), le16_to_cpu(dev_id[2]));
1877 dev_err(&client->dev, "Unrecognized product number: %u\n",
1878 le16_to_cpu(dev_id[0]));
1883 static int iqs7222_gpio_select(struct iqs7222_private *iqs7222,
1884 struct fwnode_handle *child_node,
1885 int child_enable, u16 child_link)
1887 const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
1888 struct i2c_client *client = iqs7222->client;
1889 int num_gpio = dev_desc->reg_grps[IQS7222_REG_GRP_GPIO].num_row;
1890 int error, count, i;
1891 unsigned int gpio_sel[ARRAY_SIZE(iqs7222_gpio_links)];
1896 if (!fwnode_property_present(child_node, "azoteq,gpio-select"))
1899 count = fwnode_property_count_u32(child_node, "azoteq,gpio-select");
1900 if (count > num_gpio) {
1901 dev_err(&client->dev, "Invalid number of %s GPIOs\n",
1902 fwnode_get_name(child_node));
1904 } else if (count < 0) {
1905 dev_err(&client->dev, "Failed to count %s GPIOs: %d\n",
1906 fwnode_get_name(child_node), count);
1910 error = fwnode_property_read_u32_array(child_node,
1911 "azoteq,gpio-select",
1914 dev_err(&client->dev, "Failed to read %s GPIOs: %d\n",
1915 fwnode_get_name(child_node), error);
1919 for (i = 0; i < count; i++) {
1922 if (gpio_sel[i] >= num_gpio) {
1923 dev_err(&client->dev, "Invalid %s GPIO: %u\n",
1924 fwnode_get_name(child_node), gpio_sel[i]);
1928 gpio_setup = iqs7222->gpio_setup[gpio_sel[i]];
1930 if (gpio_setup[2] && child_link != gpio_setup[2]) {
1931 dev_err(&client->dev,
1932 "Conflicting GPIO %u event types\n",
1937 gpio_setup[0] |= IQS7222_GPIO_SETUP_0_GPIO_EN;
1938 gpio_setup[1] |= child_enable;
1939 gpio_setup[2] = child_link;
1945 static int iqs7222_parse_props(struct iqs7222_private *iqs7222,
1946 struct fwnode_handle *reg_grp_node,
1948 enum iqs7222_reg_grp_id reg_grp,
1949 enum iqs7222_reg_key_id reg_key)
1951 u16 *setup = iqs7222_setup(iqs7222, reg_grp, reg_grp_index);
1952 struct i2c_client *client = iqs7222->client;
1958 for (i = 0; i < ARRAY_SIZE(iqs7222_props); i++) {
1959 const char *name = iqs7222_props[i].name;
1960 int reg_offset = iqs7222_props[i].reg_offset;
1961 int reg_shift = iqs7222_props[i].reg_shift;
1962 int reg_width = iqs7222_props[i].reg_width;
1963 int val_pitch = iqs7222_props[i].val_pitch ? : 1;
1964 int val_min = iqs7222_props[i].val_min;
1965 int val_max = iqs7222_props[i].val_max;
1966 bool invert = iqs7222_props[i].invert;
1967 const char *label = iqs7222_props[i].label ? : name;
1971 if (iqs7222_props[i].reg_grp != reg_grp ||
1972 iqs7222_props[i].reg_key != reg_key)
1976 * Boolean register fields are one bit wide; they are forcibly
1977 * reset to provide a means to undo changes by a bootloader if
1980 * Scalar fields, on the other hand, are left untouched unless
1981 * their corresponding properties are present.
1983 if (reg_width == 1) {
1985 setup[reg_offset] |= BIT(reg_shift);
1987 setup[reg_offset] &= ~BIT(reg_shift);
1990 if (!fwnode_property_present(reg_grp_node, name))
1993 if (reg_width == 1) {
1995 setup[reg_offset] &= ~BIT(reg_shift);
1997 setup[reg_offset] |= BIT(reg_shift);
2002 error = fwnode_property_read_u32(reg_grp_node, name, &val);
2004 dev_err(&client->dev, "Failed to read %s %s: %d\n",
2005 fwnode_get_name(reg_grp_node), label, error);
2010 val_max = GENMASK(reg_width - 1, 0) * val_pitch;
2012 if (val < val_min || val > val_max) {
2013 dev_err(&client->dev, "Invalid %s %s: %u\n",
2014 fwnode_get_name(reg_grp_node), label, val);
2018 setup[reg_offset] &= ~GENMASK(reg_shift + reg_width - 1,
2020 setup[reg_offset] |= (val / val_pitch << reg_shift);
2026 static int iqs7222_parse_event(struct iqs7222_private *iqs7222,
2027 struct fwnode_handle *event_node,
2029 enum iqs7222_reg_grp_id reg_grp,
2030 enum iqs7222_reg_key_id reg_key,
2031 u16 event_enable, u16 event_link,
2032 unsigned int *event_type,
2033 unsigned int *event_code)
2035 struct i2c_client *client = iqs7222->client;
2038 error = iqs7222_parse_props(iqs7222, event_node, reg_grp_index,
2043 error = iqs7222_gpio_select(iqs7222, event_node, event_enable,
2048 error = fwnode_property_read_u32(event_node, "linux,code", event_code);
2049 if (error == -EINVAL) {
2052 dev_err(&client->dev, "Failed to read %s code: %d\n",
2053 fwnode_get_name(event_node), error);
2058 input_set_capability(iqs7222->keypad, EV_KEY, *event_code);
2062 error = fwnode_property_read_u32(event_node, "linux,input-type",
2064 if (error == -EINVAL) {
2065 *event_type = EV_KEY;
2067 dev_err(&client->dev, "Failed to read %s input type: %d\n",
2068 fwnode_get_name(event_node), error);
2070 } else if (*event_type != EV_KEY && *event_type != EV_SW) {
2071 dev_err(&client->dev, "Invalid %s input type: %d\n",
2072 fwnode_get_name(event_node), *event_type);
2076 input_set_capability(iqs7222->keypad, *event_type, *event_code);
2081 static int iqs7222_parse_cycle(struct iqs7222_private *iqs7222,
2082 struct fwnode_handle *cycle_node, int cycle_index)
2084 u16 *cycle_setup = iqs7222->cycle_setup[cycle_index];
2085 struct i2c_client *client = iqs7222->client;
2086 unsigned int pins[9];
2087 int error, count, i;
2090 * Each channel shares a cycle with one other channel; the mapping of
2091 * channels to cycles is fixed. Properties defined for a cycle impact
2092 * both channels tied to the cycle.
2094 * Unlike channels which are restricted to a select range of CRx pins
2095 * based on channel number, any cycle can claim any of the device's 9
2096 * CTx pins (CTx0-8).
2098 if (!fwnode_property_present(cycle_node, "azoteq,tx-enable"))
2101 count = fwnode_property_count_u32(cycle_node, "azoteq,tx-enable");
2103 dev_err(&client->dev, "Failed to count %s CTx pins: %d\n",
2104 fwnode_get_name(cycle_node), count);
2106 } else if (count > ARRAY_SIZE(pins)) {
2107 dev_err(&client->dev, "Invalid number of %s CTx pins\n",
2108 fwnode_get_name(cycle_node));
2112 error = fwnode_property_read_u32_array(cycle_node, "azoteq,tx-enable",
2115 dev_err(&client->dev, "Failed to read %s CTx pins: %d\n",
2116 fwnode_get_name(cycle_node), error);
2120 cycle_setup[1] &= ~GENMASK(7 + ARRAY_SIZE(pins) - 1, 7);
2122 for (i = 0; i < count; i++) {
2124 dev_err(&client->dev, "Invalid %s CTx pin: %u\n",
2125 fwnode_get_name(cycle_node), pins[i]);
2129 cycle_setup[1] |= BIT(pins[i] + 7);
2135 static int iqs7222_parse_chan(struct iqs7222_private *iqs7222,
2136 struct fwnode_handle *chan_node, int chan_index)
2138 const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
2139 struct i2c_client *client = iqs7222->client;
2140 int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
2141 int ext_chan = rounddown(num_chan, 10);
2143 u16 *chan_setup = iqs7222->chan_setup[chan_index];
2144 u16 *sys_setup = iqs7222->sys_setup;
2147 if (dev_desc->allow_offset &&
2148 fwnode_property_present(chan_node, "azoteq,ulp-allow"))
2149 sys_setup[dev_desc->allow_offset] &= ~BIT(chan_index);
2151 chan_setup[0] |= IQS7222_CHAN_SETUP_0_CHAN_EN;
2154 * The reference channel function allows for differential measurements
2155 * and is only available in the case of IQS7222A or IQS7222C.
2157 if (dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_col > 4 &&
2158 fwnode_property_present(chan_node, "azoteq,ref-select")) {
2161 error = fwnode_property_read_u32(chan_node, "azoteq,ref-select",
2164 dev_err(&client->dev,
2165 "Failed to read %s reference channel: %d\n",
2166 fwnode_get_name(chan_node), error);
2170 if (val >= ext_chan) {
2171 dev_err(&client->dev,
2172 "Invalid %s reference channel: %u\n",
2173 fwnode_get_name(chan_node), val);
2177 ref_setup = iqs7222->chan_setup[val];
2180 * Configure the current channel as a follower of the selected
2181 * reference channel.
2183 chan_setup[0] |= IQS7222_CHAN_SETUP_0_REF_MODE_FOLLOW;
2184 chan_setup[4] = val * 42 + 1048;
2186 error = fwnode_property_read_u32(chan_node, "azoteq,ref-weight",
2189 if (val > U16_MAX) {
2190 dev_err(&client->dev,
2191 "Invalid %s reference weight: %u\n",
2192 fwnode_get_name(chan_node), val);
2196 chan_setup[5] = val;
2197 } else if (error != -EINVAL) {
2198 dev_err(&client->dev,
2199 "Failed to read %s reference weight: %d\n",
2200 fwnode_get_name(chan_node), error);
2205 * Configure the selected channel as a reference channel which
2206 * serves the current channel.
2208 ref_setup[0] |= IQS7222_CHAN_SETUP_0_REF_MODE_REF;
2209 ref_setup[5] |= BIT(chan_index);
2211 ref_setup[4] = dev_desc->touch_link;
2212 if (fwnode_property_present(chan_node, "azoteq,use-prox"))
2214 } else if (dev_desc->reg_grps[IQS7222_REG_GRP_TPAD].num_row &&
2215 fwnode_property_present(chan_node,
2216 "azoteq,counts-filt-enable")) {
2218 * In the case of IQS7222D, however, the reference mode field
2219 * is partially repurposed as a counts filter enable control.
2221 chan_setup[0] |= IQS7222_CHAN_SETUP_0_REF_MODE_REF;
2224 if (fwnode_property_present(chan_node, "azoteq,rx-enable")) {
2226 * Each channel can claim up to 4 CRx pins. The first half of
2227 * the channels can use CRx0-3, while the second half can use
2230 unsigned int pins[4];
2233 count = fwnode_property_count_u32(chan_node,
2234 "azoteq,rx-enable");
2236 dev_err(&client->dev,
2237 "Failed to count %s CRx pins: %d\n",
2238 fwnode_get_name(chan_node), count);
2240 } else if (count > ARRAY_SIZE(pins)) {
2241 dev_err(&client->dev,
2242 "Invalid number of %s CRx pins\n",
2243 fwnode_get_name(chan_node));
2247 error = fwnode_property_read_u32_array(chan_node,
2251 dev_err(&client->dev,
2252 "Failed to read %s CRx pins: %d\n",
2253 fwnode_get_name(chan_node), error);
2257 chan_setup[0] &= ~GENMASK(4 + ARRAY_SIZE(pins) - 1, 4);
2259 for (i = 0; i < count; i++) {
2260 int min_crx = chan_index < ext_chan / 2 ? 0 : 4;
2262 if (pins[i] < min_crx || pins[i] > min_crx + 3) {
2263 dev_err(&client->dev,
2264 "Invalid %s CRx pin: %u\n",
2265 fwnode_get_name(chan_node), pins[i]);
2269 chan_setup[0] |= BIT(pins[i] + 4 - min_crx);
2273 for (i = 0; i < ARRAY_SIZE(iqs7222_kp_events); i++) {
2274 const char *event_name = iqs7222_kp_events[i].name;
2275 u16 event_enable = iqs7222_kp_events[i].enable;
2276 struct fwnode_handle *event_node;
2278 event_node = fwnode_get_named_child_node(chan_node, event_name);
2282 error = fwnode_property_read_u32(event_node,
2283 "azoteq,timeout-press-ms",
2287 * The IQS7222B employs a global pair of press timeout
2288 * registers as opposed to channel-specific registers.
2290 u16 *setup = dev_desc->reg_grps
2291 [IQS7222_REG_GRP_BTN].num_col > 2 ?
2292 &iqs7222->btn_setup[chan_index][2] :
2295 if (val > U8_MAX * 500) {
2296 dev_err(&client->dev,
2297 "Invalid %s press timeout: %u\n",
2298 fwnode_get_name(event_node), val);
2299 fwnode_handle_put(event_node);
2303 *setup &= ~(U8_MAX << i * 8);
2304 *setup |= (val / 500 << i * 8);
2305 } else if (error != -EINVAL) {
2306 dev_err(&client->dev,
2307 "Failed to read %s press timeout: %d\n",
2308 fwnode_get_name(event_node), error);
2309 fwnode_handle_put(event_node);
2313 error = iqs7222_parse_event(iqs7222, event_node, chan_index,
2314 IQS7222_REG_GRP_BTN,
2315 iqs7222_kp_events[i].reg_key,
2317 dev_desc->touch_link - (i ? 0 : 2),
2318 &iqs7222->kp_type[chan_index][i],
2319 &iqs7222->kp_code[chan_index][i]);
2320 fwnode_handle_put(event_node);
2324 if (!dev_desc->event_offset)
2327 sys_setup[dev_desc->event_offset] |= event_enable;
2331 * The following call handles a special pair of properties that apply
2332 * to a channel node, but reside within the button (event) group.
2334 return iqs7222_parse_props(iqs7222, chan_node, chan_index,
2335 IQS7222_REG_GRP_BTN,
2336 IQS7222_REG_KEY_DEBOUNCE);
2339 static int iqs7222_parse_sldr(struct iqs7222_private *iqs7222,
2340 struct fwnode_handle *sldr_node, int sldr_index)
2342 const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
2343 struct i2c_client *client = iqs7222->client;
2344 int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
2345 int ext_chan = rounddown(num_chan, 10);
2346 int count, error, reg_offset, i;
2347 u16 *event_mask = &iqs7222->sys_setup[dev_desc->event_offset];
2348 u16 *sldr_setup = iqs7222->sldr_setup[sldr_index];
2349 unsigned int chan_sel[4], val;
2352 * Each slider can be spread across 3 to 4 channels. It is possible to
2353 * select only 2 channels, but doing so prevents the slider from using
2354 * the specified resolution.
2356 count = fwnode_property_count_u32(sldr_node, "azoteq,channel-select");
2358 dev_err(&client->dev, "Failed to count %s channels: %d\n",
2359 fwnode_get_name(sldr_node), count);
2361 } else if (count < 3 || count > ARRAY_SIZE(chan_sel)) {
2362 dev_err(&client->dev, "Invalid number of %s channels\n",
2363 fwnode_get_name(sldr_node));
2367 error = fwnode_property_read_u32_array(sldr_node,
2368 "azoteq,channel-select",
2371 dev_err(&client->dev, "Failed to read %s channels: %d\n",
2372 fwnode_get_name(sldr_node), error);
2377 * Resolution and top speed, if small enough, are packed into a single
2378 * register. Otherwise, each occupies its own register and the rest of
2379 * the slider-related register addresses are offset by one.
2381 reg_offset = dev_desc->sldr_res < U16_MAX ? 0 : 1;
2383 sldr_setup[0] |= count;
2384 sldr_setup[3 + reg_offset] &= ~GENMASK(ext_chan - 1, 0);
2386 for (i = 0; i < ARRAY_SIZE(chan_sel); i++) {
2387 sldr_setup[5 + reg_offset + i] = 0;
2391 if (chan_sel[i] >= ext_chan) {
2392 dev_err(&client->dev, "Invalid %s channel: %u\n",
2393 fwnode_get_name(sldr_node), chan_sel[i]);
2398 * The following fields indicate which channels participate in
2399 * the slider, as well as each channel's relative placement.
2401 sldr_setup[3 + reg_offset] |= BIT(chan_sel[i]);
2402 sldr_setup[5 + reg_offset + i] = chan_sel[i] * 42 + 1080;
2405 sldr_setup[4 + reg_offset] = dev_desc->touch_link;
2406 if (fwnode_property_present(sldr_node, "azoteq,use-prox"))
2407 sldr_setup[4 + reg_offset] -= 2;
2409 error = fwnode_property_read_u32(sldr_node, "azoteq,slider-size", &val);
2411 if (val > dev_desc->sldr_res) {
2412 dev_err(&client->dev, "Invalid %s size: %u\n",
2413 fwnode_get_name(sldr_node), val);
2418 sldr_setup[3] = val;
2420 sldr_setup[2] &= ~IQS7222_SLDR_SETUP_2_RES_MASK;
2421 sldr_setup[2] |= (val / 16 <<
2422 IQS7222_SLDR_SETUP_2_RES_SHIFT);
2424 } else if (error != -EINVAL) {
2425 dev_err(&client->dev, "Failed to read %s size: %d\n",
2426 fwnode_get_name(sldr_node), error);
2430 if (!(reg_offset ? sldr_setup[3]
2431 : sldr_setup[2] & IQS7222_SLDR_SETUP_2_RES_MASK)) {
2432 dev_err(&client->dev, "Undefined %s size\n",
2433 fwnode_get_name(sldr_node));
2437 error = fwnode_property_read_u32(sldr_node, "azoteq,top-speed", &val);
2439 if (val > (reg_offset ? U16_MAX : U8_MAX * 4)) {
2440 dev_err(&client->dev, "Invalid %s top speed: %u\n",
2441 fwnode_get_name(sldr_node), val);
2446 sldr_setup[2] = val;
2448 sldr_setup[2] &= ~IQS7222_SLDR_SETUP_2_TOP_SPEED_MASK;
2449 sldr_setup[2] |= (val / 4);
2451 } else if (error != -EINVAL) {
2452 dev_err(&client->dev, "Failed to read %s top speed: %d\n",
2453 fwnode_get_name(sldr_node), error);
2457 error = fwnode_property_read_u32(sldr_node, "linux,axis", &val);
2459 u16 sldr_max = sldr_setup[3] - 1;
2462 sldr_max = sldr_setup[2];
2464 sldr_max &= IQS7222_SLDR_SETUP_2_RES_MASK;
2465 sldr_max >>= IQS7222_SLDR_SETUP_2_RES_SHIFT;
2467 sldr_max = sldr_max * 16 - 1;
2470 input_set_abs_params(iqs7222->keypad, val, 0, sldr_max, 0, 0);
2471 iqs7222->sl_axis[sldr_index] = val;
2472 } else if (error != -EINVAL) {
2473 dev_err(&client->dev, "Failed to read %s axis: %d\n",
2474 fwnode_get_name(sldr_node), error);
2478 if (dev_desc->wheel_enable) {
2479 sldr_setup[0] &= ~dev_desc->wheel_enable;
2480 if (iqs7222->sl_axis[sldr_index] == ABS_WHEEL)
2481 sldr_setup[0] |= dev_desc->wheel_enable;
2485 * The absence of a register offset makes it safe to assume the device
2486 * supports gestures, each of which is first disabled until explicitly
2490 for (i = 0; i < ARRAY_SIZE(iqs7222_sl_events); i++)
2491 sldr_setup[9] &= ~iqs7222_sl_events[i].enable;
2493 for (i = 0; i < ARRAY_SIZE(iqs7222_sl_events); i++) {
2494 const char *event_name = iqs7222_sl_events[i].name;
2495 struct fwnode_handle *event_node;
2496 enum iqs7222_reg_key_id reg_key;
2498 event_node = fwnode_get_named_child_node(sldr_node, event_name);
2503 * Depending on the device, gestures are either offered using
2504 * one of two timing resolutions, or are not supported at all.
2507 reg_key = IQS7222_REG_KEY_RESERVED;
2508 else if (dev_desc->legacy_gesture &&
2509 iqs7222_sl_events[i].reg_key == IQS7222_REG_KEY_TAP)
2510 reg_key = IQS7222_REG_KEY_TAP_LEGACY;
2511 else if (dev_desc->legacy_gesture &&
2512 iqs7222_sl_events[i].reg_key == IQS7222_REG_KEY_AXIAL)
2513 reg_key = IQS7222_REG_KEY_AXIAL_LEGACY;
2515 reg_key = iqs7222_sl_events[i].reg_key;
2518 * The press/release event does not expose a direct GPIO link,
2519 * but one can be emulated by tying each of the participating
2520 * channels to the same GPIO.
2522 error = iqs7222_parse_event(iqs7222, event_node, sldr_index,
2523 IQS7222_REG_GRP_SLDR, reg_key,
2524 i ? iqs7222_sl_events[i].enable
2525 : sldr_setup[3 + reg_offset],
2526 i ? 1568 + sldr_index * 30
2527 : sldr_setup[4 + reg_offset],
2529 &iqs7222->sl_code[sldr_index][i]);
2530 fwnode_handle_put(event_node);
2535 sldr_setup[9] |= iqs7222_sl_events[i].enable;
2537 if (!dev_desc->event_offset)
2541 * The press/release event is determined based on whether the
2542 * coordinate field reports 0xFFFF and solely relies on touch
2543 * or proximity interrupts to be unmasked.
2545 if (i && !reg_offset)
2546 *event_mask |= (IQS7222_EVENT_MASK_SLDR << sldr_index);
2547 else if (sldr_setup[4 + reg_offset] == dev_desc->touch_link)
2548 *event_mask |= IQS7222_EVENT_MASK_TOUCH;
2550 *event_mask |= IQS7222_EVENT_MASK_PROX;
2554 * The following call handles a special pair of properties that shift
2555 * to make room for a wheel enable control in the case of IQS7222C.
2557 return iqs7222_parse_props(iqs7222, sldr_node, sldr_index,
2558 IQS7222_REG_GRP_SLDR,
2559 dev_desc->wheel_enable ?
2560 IQS7222_REG_KEY_WHEEL :
2561 IQS7222_REG_KEY_NO_WHEEL);
2564 static int iqs7222_parse_tpad(struct iqs7222_private *iqs7222,
2565 struct fwnode_handle *tpad_node, int tpad_index)
2567 const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
2568 struct touchscreen_properties *prop = &iqs7222->prop;
2569 struct i2c_client *client = iqs7222->client;
2570 int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
2571 int count, error, i;
2572 u16 *event_mask = &iqs7222->sys_setup[dev_desc->event_offset];
2573 u16 *tpad_setup = iqs7222->tpad_setup;
2574 unsigned int chan_sel[12];
2576 error = iqs7222_parse_props(iqs7222, tpad_node, tpad_index,
2577 IQS7222_REG_GRP_TPAD,
2578 IQS7222_REG_KEY_NONE);
2582 count = fwnode_property_count_u32(tpad_node, "azoteq,channel-select");
2584 dev_err(&client->dev, "Failed to count %s channels: %d\n",
2585 fwnode_get_name(tpad_node), count);
2587 } else if (!count || count > ARRAY_SIZE(chan_sel)) {
2588 dev_err(&client->dev, "Invalid number of %s channels\n",
2589 fwnode_get_name(tpad_node));
2593 error = fwnode_property_read_u32_array(tpad_node,
2594 "azoteq,channel-select",
2597 dev_err(&client->dev, "Failed to read %s channels: %d\n",
2598 fwnode_get_name(tpad_node), error);
2602 tpad_setup[6] &= ~GENMASK(num_chan - 1, 0);
2604 for (i = 0; i < ARRAY_SIZE(chan_sel); i++) {
2605 tpad_setup[8 + i] = 0;
2606 if (i >= count || chan_sel[i] == U8_MAX)
2609 if (chan_sel[i] >= num_chan) {
2610 dev_err(&client->dev, "Invalid %s channel: %u\n",
2611 fwnode_get_name(tpad_node), chan_sel[i]);
2616 * The following fields indicate which channels participate in
2617 * the trackpad, as well as each channel's relative placement.
2619 tpad_setup[6] |= BIT(chan_sel[i]);
2620 tpad_setup[8 + i] = chan_sel[i] * 34 + 1072;
2623 tpad_setup[7] = dev_desc->touch_link;
2624 if (fwnode_property_present(tpad_node, "azoteq,use-prox"))
2627 for (i = 0; i < ARRAY_SIZE(iqs7222_tp_events); i++)
2628 tpad_setup[20] &= ~(iqs7222_tp_events[i].strict |
2629 iqs7222_tp_events[i].enable);
2631 for (i = 0; i < ARRAY_SIZE(iqs7222_tp_events); i++) {
2632 const char *event_name = iqs7222_tp_events[i].name;
2633 struct fwnode_handle *event_node;
2635 event_node = fwnode_get_named_child_node(tpad_node, event_name);
2639 if (fwnode_property_present(event_node,
2640 "azoteq,gesture-angle-tighten"))
2641 tpad_setup[20] |= iqs7222_tp_events[i].strict;
2643 tpad_setup[20] |= iqs7222_tp_events[i].enable;
2645 error = iqs7222_parse_event(iqs7222, event_node, tpad_index,
2646 IQS7222_REG_GRP_TPAD,
2647 iqs7222_tp_events[i].reg_key,
2648 iqs7222_tp_events[i].link, 1566,
2650 &iqs7222->tp_code[i]);
2651 fwnode_handle_put(event_node);
2655 if (!dev_desc->event_offset)
2659 * The press/release event is determined based on whether the
2660 * coordinate fields report 0xFFFF and solely relies on touch
2661 * or proximity interrupts to be unmasked.
2664 *event_mask |= IQS7222_EVENT_MASK_TPAD;
2665 else if (tpad_setup[7] == dev_desc->touch_link)
2666 *event_mask |= IQS7222_EVENT_MASK_TOUCH;
2668 *event_mask |= IQS7222_EVENT_MASK_PROX;
2671 if (!iqs7222->tp_code[0])
2674 input_set_abs_params(iqs7222->keypad, ABS_X,
2675 0, (tpad_setup[4] ? : 1) - 1, 0, 0);
2677 input_set_abs_params(iqs7222->keypad, ABS_Y,
2678 0, (tpad_setup[5] ? : 1) - 1, 0, 0);
2680 touchscreen_parse_properties(iqs7222->keypad, false, prop);
2682 if (prop->max_x >= U16_MAX || prop->max_y >= U16_MAX) {
2683 dev_err(&client->dev, "Invalid trackpad size: %u*%u\n",
2684 prop->max_x, prop->max_y);
2688 tpad_setup[4] = prop->max_x + 1;
2689 tpad_setup[5] = prop->max_y + 1;
2694 static int (*iqs7222_parse_extra[IQS7222_NUM_REG_GRPS])
2695 (struct iqs7222_private *iqs7222,
2696 struct fwnode_handle *reg_grp_node,
2697 int reg_grp_index) = {
2698 [IQS7222_REG_GRP_CYCLE] = iqs7222_parse_cycle,
2699 [IQS7222_REG_GRP_CHAN] = iqs7222_parse_chan,
2700 [IQS7222_REG_GRP_SLDR] = iqs7222_parse_sldr,
2701 [IQS7222_REG_GRP_TPAD] = iqs7222_parse_tpad,
2704 static int iqs7222_parse_reg_grp(struct iqs7222_private *iqs7222,
2705 enum iqs7222_reg_grp_id reg_grp,
2708 struct i2c_client *client = iqs7222->client;
2709 struct fwnode_handle *reg_grp_node;
2712 if (iqs7222_reg_grp_names[reg_grp]) {
2713 char reg_grp_name[16];
2715 snprintf(reg_grp_name, sizeof(reg_grp_name),
2716 iqs7222_reg_grp_names[reg_grp], reg_grp_index);
2718 reg_grp_node = device_get_named_child_node(&client->dev,
2721 reg_grp_node = fwnode_handle_get(dev_fwnode(&client->dev));
2727 error = iqs7222_parse_props(iqs7222, reg_grp_node, reg_grp_index,
2728 reg_grp, IQS7222_REG_KEY_NONE);
2730 if (!error && iqs7222_parse_extra[reg_grp])
2731 error = iqs7222_parse_extra[reg_grp](iqs7222, reg_grp_node,
2734 fwnode_handle_put(reg_grp_node);
2739 static int iqs7222_parse_all(struct iqs7222_private *iqs7222)
2741 const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
2742 const struct iqs7222_reg_grp_desc *reg_grps = dev_desc->reg_grps;
2743 u16 *sys_setup = iqs7222->sys_setup;
2746 if (dev_desc->allow_offset)
2747 sys_setup[dev_desc->allow_offset] = U16_MAX;
2749 if (dev_desc->event_offset)
2750 sys_setup[dev_desc->event_offset] = IQS7222_EVENT_MASK_ATI;
2752 for (i = 0; i < reg_grps[IQS7222_REG_GRP_GPIO].num_row; i++) {
2753 u16 *gpio_setup = iqs7222->gpio_setup[i];
2755 gpio_setup[0] &= ~IQS7222_GPIO_SETUP_0_GPIO_EN;
2759 if (reg_grps[IQS7222_REG_GRP_GPIO].num_row == 1)
2763 * The IQS7222C and IQS7222D expose multiple GPIO and must be
2764 * informed as to which GPIO this group represents.
2766 for (j = 0; j < ARRAY_SIZE(iqs7222_gpio_links); j++)
2767 gpio_setup[0] &= ~BIT(iqs7222_gpio_links[j]);
2769 gpio_setup[0] |= BIT(iqs7222_gpio_links[i]);
2772 for (i = 0; i < reg_grps[IQS7222_REG_GRP_CHAN].num_row; i++) {
2773 u16 *chan_setup = iqs7222->chan_setup[i];
2775 chan_setup[0] &= ~IQS7222_CHAN_SETUP_0_REF_MODE_MASK;
2776 chan_setup[0] &= ~IQS7222_CHAN_SETUP_0_CHAN_EN;
2781 for (i = 0; i < reg_grps[IQS7222_REG_GRP_SLDR].num_row; i++) {
2782 u16 *sldr_setup = iqs7222->sldr_setup[i];
2784 sldr_setup[0] &= ~IQS7222_SLDR_SETUP_0_CHAN_CNT_MASK;
2787 for (i = 0; i < IQS7222_NUM_REG_GRPS; i++) {
2788 for (j = 0; j < reg_grps[i].num_row; j++) {
2789 error = iqs7222_parse_reg_grp(iqs7222, i, j);
2798 static int iqs7222_report(struct iqs7222_private *iqs7222)
2800 const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
2801 struct i2c_client *client = iqs7222->client;
2802 int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
2803 int num_stat = dev_desc->reg_grps[IQS7222_REG_GRP_STAT].num_col;
2805 __le16 status[IQS7222_MAX_COLS_STAT];
2807 error = iqs7222_read_burst(iqs7222, IQS7222_SYS_STATUS, status,
2812 if (le16_to_cpu(status[0]) & IQS7222_SYS_STATUS_RESET) {
2813 dev_err(&client->dev, "Unexpected device reset\n");
2814 return iqs7222_dev_init(iqs7222, WRITE);
2817 if (le16_to_cpu(status[0]) & IQS7222_SYS_STATUS_ATI_ERROR) {
2818 dev_err(&client->dev, "Unexpected ATI error\n");
2819 return iqs7222_ati_trigger(iqs7222);
2822 if (le16_to_cpu(status[0]) & IQS7222_SYS_STATUS_ATI_ACTIVE)
2825 for (i = 0; i < num_chan; i++) {
2826 u16 *chan_setup = iqs7222->chan_setup[i];
2828 if (!(chan_setup[0] & IQS7222_CHAN_SETUP_0_CHAN_EN))
2831 for (j = 0; j < ARRAY_SIZE(iqs7222_kp_events); j++) {
2833 * Proximity state begins at offset 2 and spills into
2834 * offset 3 for devices with more than 16 channels.
2836 * Touch state begins at the first offset immediately
2837 * following proximity state.
2839 int k = 2 + j * (num_chan > 16 ? 2 : 1);
2840 u16 state = le16_to_cpu(status[k + i / 16]);
2842 if (!iqs7222->kp_type[i][j])
2845 input_event(iqs7222->keypad,
2846 iqs7222->kp_type[i][j],
2847 iqs7222->kp_code[i][j],
2848 !!(state & BIT(i % 16)));
2852 for (i = 0; i < dev_desc->reg_grps[IQS7222_REG_GRP_SLDR].num_row; i++) {
2853 u16 *sldr_setup = iqs7222->sldr_setup[i];
2854 u16 sldr_pos = le16_to_cpu(status[4 + i]);
2855 u16 state = le16_to_cpu(status[6 + i]);
2857 if (!(sldr_setup[0] & IQS7222_SLDR_SETUP_0_CHAN_CNT_MASK))
2860 if (sldr_pos < dev_desc->sldr_res)
2861 input_report_abs(iqs7222->keypad, iqs7222->sl_axis[i],
2864 input_report_key(iqs7222->keypad, iqs7222->sl_code[i][0],
2865 sldr_pos < dev_desc->sldr_res);
2868 * A maximum resolution indicates the device does not support
2869 * gestures, in which case the remaining fields are ignored.
2871 if (dev_desc->sldr_res == U16_MAX)
2874 if (!(le16_to_cpu(status[1]) & IQS7222_EVENT_MASK_SLDR << i))
2878 * Skip the press/release event, as it does not have separate
2879 * status fields and is handled separately.
2881 for (j = 1; j < ARRAY_SIZE(iqs7222_sl_events); j++) {
2882 u16 mask = iqs7222_sl_events[j].mask;
2883 u16 val = iqs7222_sl_events[j].val;
2885 input_report_key(iqs7222->keypad,
2886 iqs7222->sl_code[i][j],
2887 (state & mask) == val);
2890 input_sync(iqs7222->keypad);
2892 for (j = 1; j < ARRAY_SIZE(iqs7222_sl_events); j++)
2893 input_report_key(iqs7222->keypad,
2894 iqs7222->sl_code[i][j], 0);
2897 for (i = 0; i < dev_desc->reg_grps[IQS7222_REG_GRP_TPAD].num_row; i++) {
2898 u16 tpad_pos_x = le16_to_cpu(status[4]);
2899 u16 tpad_pos_y = le16_to_cpu(status[5]);
2900 u16 state = le16_to_cpu(status[6]);
2902 input_report_key(iqs7222->keypad, iqs7222->tp_code[0],
2903 tpad_pos_x < U16_MAX);
2905 if (tpad_pos_x < U16_MAX)
2906 touchscreen_report_pos(iqs7222->keypad, &iqs7222->prop,
2907 tpad_pos_x, tpad_pos_y, false);
2909 if (!(le16_to_cpu(status[1]) & IQS7222_EVENT_MASK_TPAD))
2913 * Skip the press/release event, as it does not have separate
2914 * status fields and is handled separately.
2916 for (j = 1; j < ARRAY_SIZE(iqs7222_tp_events); j++) {
2917 u16 mask = iqs7222_tp_events[j].mask;
2918 u16 val = iqs7222_tp_events[j].val;
2920 input_report_key(iqs7222->keypad,
2921 iqs7222->tp_code[j],
2922 (state & mask) == val);
2925 input_sync(iqs7222->keypad);
2927 for (j = 1; j < ARRAY_SIZE(iqs7222_tp_events); j++)
2928 input_report_key(iqs7222->keypad,
2929 iqs7222->tp_code[j], 0);
2932 input_sync(iqs7222->keypad);
2937 static irqreturn_t iqs7222_irq(int irq, void *context)
2939 struct iqs7222_private *iqs7222 = context;
2941 return iqs7222_report(iqs7222) ? IRQ_NONE : IRQ_HANDLED;
2944 static int iqs7222_probe(struct i2c_client *client)
2946 struct iqs7222_private *iqs7222;
2947 unsigned long irq_flags;
2950 iqs7222 = devm_kzalloc(&client->dev, sizeof(*iqs7222), GFP_KERNEL);
2954 i2c_set_clientdata(client, iqs7222);
2955 iqs7222->client = client;
2957 iqs7222->keypad = devm_input_allocate_device(&client->dev);
2958 if (!iqs7222->keypad)
2961 iqs7222->keypad->name = client->name;
2962 iqs7222->keypad->id.bustype = BUS_I2C;
2965 * The RDY pin behaves as an interrupt, but must also be polled ahead
2966 * of unsolicited I2C communication. As such, it is first opened as a
2967 * GPIO and then passed to gpiod_to_irq() to register the interrupt.
2969 iqs7222->irq_gpio = devm_gpiod_get(&client->dev, "irq", GPIOD_IN);
2970 if (IS_ERR(iqs7222->irq_gpio)) {
2971 error = PTR_ERR(iqs7222->irq_gpio);
2972 dev_err(&client->dev, "Failed to request IRQ GPIO: %d\n",
2977 iqs7222->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
2979 if (IS_ERR(iqs7222->reset_gpio)) {
2980 error = PTR_ERR(iqs7222->reset_gpio);
2981 dev_err(&client->dev, "Failed to request reset GPIO: %d\n",
2986 error = iqs7222_hard_reset(iqs7222);
2990 error = iqs7222_dev_info(iqs7222);
2994 error = iqs7222_dev_init(iqs7222, READ);
2998 error = iqs7222_parse_all(iqs7222);
3002 error = iqs7222_dev_init(iqs7222, WRITE);
3006 error = iqs7222_report(iqs7222);
3010 error = input_register_device(iqs7222->keypad);
3012 dev_err(&client->dev, "Failed to register device: %d\n", error);
3016 irq = gpiod_to_irq(iqs7222->irq_gpio);
3020 irq_flags = gpiod_is_active_low(iqs7222->irq_gpio) ? IRQF_TRIGGER_LOW
3021 : IRQF_TRIGGER_HIGH;
3022 irq_flags |= IRQF_ONESHOT;
3024 error = devm_request_threaded_irq(&client->dev, irq, NULL, iqs7222_irq,
3025 irq_flags, client->name, iqs7222);
3027 dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
3032 static const struct of_device_id iqs7222_of_match[] = {
3033 { .compatible = "azoteq,iqs7222a" },
3034 { .compatible = "azoteq,iqs7222b" },
3035 { .compatible = "azoteq,iqs7222c" },
3036 { .compatible = "azoteq,iqs7222d" },
3039 MODULE_DEVICE_TABLE(of, iqs7222_of_match);
3041 static struct i2c_driver iqs7222_i2c_driver = {
3044 .of_match_table = iqs7222_of_match,
3046 .probe = iqs7222_probe,
3048 module_i2c_driver(iqs7222_i2c_driver);
3050 MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
3051 MODULE_DESCRIPTION("Azoteq IQS7222A/B/C/D Capacitive Touch Controller");
3052 MODULE_LICENSE("GPL");