drivers/infiniband/sw/rxe/rxe_param.h

   1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
   2 /*
   3  * Copyright (c) 2016 Mellanox Technologies Ltd. All rights reserved.
   4  * Copyright (c) 2015 System Fabric Works, Inc. All rights reserved.
   5  */
   6
   7 #ifndef RXE_PARAM_H
   8 #define RXE_PARAM_H
   9
  10 #include <uapi/rdma/rdma_user_rxe.h>
  11
  12 static inline enum ib_mtu rxe_mtu_int_to_enum(int mtu)
  13 {
  14         if (mtu < 256)
  15                 return 0;
  16         else if (mtu < 512)
  17                 return IB_MTU_256;
  18         else if (mtu < 1024)
  19                 return IB_MTU_512;
  20         else if (mtu < 2048)
  21                 return IB_MTU_1024;
  22         else if (mtu < 4096)
  23                 return IB_MTU_2048;
  24         else
  25                 return IB_MTU_4096;
  26 }
  27
  28 /* Find the IB mtu for a given network MTU. */
  29 static inline enum ib_mtu eth_mtu_int_to_enum(int mtu)
  30 {
  31         mtu -= RXE_MAX_HDR_LENGTH;
  32
  33         return rxe_mtu_int_to_enum(mtu);
  34 }
  35
  36 /* default/initial rxe device parameter settings */
  37 enum rxe_device_param {
  38         RXE_MAX_MR_SIZE                 = -1ull,
  39         RXE_PAGE_SIZE_CAP               = 0xfffff000,
  40         RXE_MAX_QP                      = 0x10000,
  41         RXE_MAX_QP_WR                   = 0x4000,
  42         RXE_DEVICE_CAP_FLAGS            = IB_DEVICE_BAD_PKEY_CNTR
  43                                         | IB_DEVICE_BAD_QKEY_CNTR
  44                                         | IB_DEVICE_AUTO_PATH_MIG
  45                                         | IB_DEVICE_CHANGE_PHY_PORT
  46                                         | IB_DEVICE_UD_AV_PORT_ENFORCE
  47                                         | IB_DEVICE_PORT_ACTIVE_EVENT
  48                                         | IB_DEVICE_SYS_IMAGE_GUID
  49                                         | IB_DEVICE_RC_RNR_NAK_GEN
  50                                         | IB_DEVICE_SRQ_RESIZE
  51                                         | IB_DEVICE_MEM_MGT_EXTENSIONS
  52                                         | IB_DEVICE_ALLOW_USER_UNREG,
  53         RXE_MAX_SGE                     = 32,
  54         RXE_MAX_WQE_SIZE                = sizeof(struct rxe_send_wqe) +
  55                                           sizeof(struct ib_sge) * RXE_MAX_SGE,
  56         RXE_MAX_INLINE_DATA             = RXE_MAX_WQE_SIZE -
  57                                           sizeof(struct rxe_send_wqe),
  58         RXE_MAX_SGE_RD                  = 32,
  59         RXE_MAX_CQ                      = 16384,
  60         RXE_MAX_LOG_CQE                 = 15,
  61         RXE_MAX_MR                      = 256 * 1024,
  62         RXE_MAX_PD                      = 0x7ffc,
  63         RXE_MAX_QP_RD_ATOM              = 128,
  64         RXE_MAX_RES_RD_ATOM             = 0x3f000,
  65         RXE_MAX_QP_INIT_RD_ATOM         = 128,
  66         RXE_MAX_MCAST_GRP               = 8192,
  67         RXE_MAX_MCAST_QP_ATTACH         = 56,
  68         RXE_MAX_TOT_MCAST_QP_ATTACH     = 0x70000,
  69         RXE_MAX_AH                      = 100,
  70         RXE_MAX_SRQ                     = 960,
  71         RXE_MAX_SRQ_WR                  = 0x4000,
  72         RXE_MIN_SRQ_WR                  = 1,
  73         RXE_MAX_SRQ_SGE                 = 27,
  74         RXE_MIN_SRQ_SGE                 = 1,
  75         RXE_MAX_FMR_PAGE_LIST_LEN       = 512,
  76         RXE_MAX_PKEYS                   = 1,
  77         RXE_LOCAL_CA_ACK_DELAY          = 15,
  78
  79         RXE_MAX_UCONTEXT                = 512,
  80
  81         RXE_NUM_PORT                    = 1,
  82
  83         RXE_MIN_QP_INDEX                = 16,
  84         RXE_MAX_QP_INDEX                = 0x00020000,
  85
  86         RXE_MIN_SRQ_INDEX               = 0x00020001,
  87         RXE_MAX_SRQ_INDEX               = 0x00040000,
  88
  89         RXE_MIN_MR_INDEX                = 0x00000001,
  90         RXE_MAX_MR_INDEX                = 0x00040000,
  91         RXE_MIN_MW_INDEX                = 0x00040001,
  92         RXE_MAX_MW_INDEX                = 0x00060000,
  93         RXE_MAX_PKT_PER_ACK             = 64,
  94
  95         RXE_MAX_UNACKED_PSNS            = 128,
  96
  97         /* Max inflight SKBs per queue pair */
  98         RXE_INFLIGHT_SKBS_PER_QP_HIGH   = 64,
  99         RXE_INFLIGHT_SKBS_PER_QP_LOW    = 16,
 100
 101         /* Max number of interations of each tasklet
 102          * before yielding the cpu to let other
 103          * work make progress
 104          */
 105         RXE_MAX_ITERATIONS              = 1024,
 106
 107         /* Delay before calling arbiter timer */
 108         RXE_NSEC_ARB_TIMER_DELAY        = 200,
 109
 110         /* IBTA v1.4 A3.3.1 VENDOR INFORMATION section */
 111         RXE_VENDOR_ID                   = 0XFFFFFF,
 112 };
 113
 114 /* default/initial rxe port parameters */
 115 enum rxe_port_param {
 116         RXE_PORT_GID_TBL_LEN            = 1024,
 117         RXE_PORT_PORT_CAP_FLAGS         = IB_PORT_CM_SUP,
 118         RXE_PORT_MAX_MSG_SZ             = 0x800000,
 119         RXE_PORT_BAD_PKEY_CNTR          = 0,
 120         RXE_PORT_QKEY_VIOL_CNTR         = 0,
 121         RXE_PORT_LID                    = 0,
 122         RXE_PORT_SM_LID                 = 0,
 123         RXE_PORT_SM_SL                  = 0,
 124         RXE_PORT_LMC                    = 0,
 125         RXE_PORT_MAX_VL_NUM             = 1,
 126         RXE_PORT_SUBNET_TIMEOUT         = 0,
 127         RXE_PORT_INIT_TYPE_REPLY        = 0,
 128         RXE_PORT_ACTIVE_WIDTH           = IB_WIDTH_1X,
 129         RXE_PORT_ACTIVE_SPEED           = 1,
 130         RXE_PORT_PKEY_TBL_LEN           = 1,
 131         RXE_PORT_PHYS_STATE             = IB_PORT_PHYS_STATE_POLLING,
 132         RXE_PORT_SUBNET_PREFIX          = 0xfe80000000000000ULL,
 133 };
 134
 135 /* default/initial port info parameters */
 136 enum rxe_port_info_param {
 137         RXE_PORT_INFO_VL_CAP            = 4,    /* 1-8 */
 138         RXE_PORT_INFO_MTU_CAP           = 5,    /* 4096 */
 139         RXE_PORT_INFO_OPER_VL           = 1,    /* 1 */
 140 };
 141
 142 #endif /* RXE_PARAM_H */