2 * Copyright (c) 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2013 Cisco Systems. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/dma-mapping.h>
37 #include <linux/sched/signal.h>
38 #include <linux/sched/mm.h>
39 #include <linux/hugetlb.h>
40 #include <linux/iommu.h>
41 #include <linux/workqueue.h>
42 #include <linux/list.h>
43 #include <linux/pci.h>
44 #include <rdma/ib_verbs.h>
46 #include "usnic_log.h"
47 #include "usnic_uiom.h"
48 #include "usnic_uiom_interval_tree.h"
50 static struct workqueue_struct *usnic_uiom_wq;
52 #define USNIC_UIOM_PAGE_CHUNK \
53 ((PAGE_SIZE - offsetof(struct usnic_uiom_chunk, page_list)) /\
54 ((void *) &((struct usnic_uiom_chunk *) 0)->page_list[1] - \
55 (void *) &((struct usnic_uiom_chunk *) 0)->page_list[0]))
57 static void usnic_uiom_reg_account(struct work_struct *work)
59 struct usnic_uiom_reg *umem = container_of(work,
60 struct usnic_uiom_reg, work);
62 down_write(&umem->mm->mmap_sem);
63 umem->mm->locked_vm -= umem->diff;
64 up_write(&umem->mm->mmap_sem);
69 static int usnic_uiom_dma_fault(struct iommu_domain *domain,
71 unsigned long iova, int flags,
74 usnic_err("Device %s iommu fault domain 0x%pK va 0x%lx flags 0x%x\n",
80 static void usnic_uiom_put_pages(struct list_head *chunk_list, int dirty)
82 struct usnic_uiom_chunk *chunk, *tmp;
84 struct scatterlist *sg;
88 list_for_each_entry_safe(chunk, tmp, chunk_list, list) {
89 for_each_sg(chunk->page_list, sg, chunk->nents, i) {
92 if (!PageDirty(page) && dirty)
93 set_page_dirty_lock(page);
95 usnic_dbg("pa: %pa\n", &pa);
101 static int usnic_uiom_get_pages(unsigned long addr, size_t size, int writable,
102 int dmasync, struct list_head *chunk_list)
104 struct page **page_list;
105 struct scatterlist *sg;
106 struct usnic_uiom_chunk *chunk;
107 unsigned long locked;
108 unsigned long lock_limit;
109 unsigned long cur_base;
110 unsigned long npages;
116 unsigned int gup_flags;
119 * If the combination of the addr and size requested for this memory
120 * region causes an integer overflow, return error.
122 if (((addr + size) < addr) || PAGE_ALIGN(addr + size) < (addr + size))
131 INIT_LIST_HEAD(chunk_list);
133 page_list = (struct page **) __get_free_page(GFP_KERNEL);
137 npages = PAGE_ALIGN(size + (addr & ~PAGE_MASK)) >> PAGE_SHIFT;
139 down_write(¤t->mm->mmap_sem);
141 locked = npages + current->mm->pinned_vm;
142 lock_limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT;
144 if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) {
149 flags = IOMMU_READ | IOMMU_CACHE;
150 flags |= (writable) ? IOMMU_WRITE : 0;
151 gup_flags = FOLL_WRITE;
152 gup_flags |= (writable) ? 0 : FOLL_FORCE;
153 cur_base = addr & PAGE_MASK;
157 ret = get_user_pages_longterm(cur_base,
158 min_t(unsigned long, npages,
159 PAGE_SIZE / sizeof(struct page *)),
160 gup_flags, page_list, NULL);
169 chunk = kmalloc(sizeof(*chunk) +
170 sizeof(struct scatterlist) *
171 min_t(int, ret, USNIC_UIOM_PAGE_CHUNK),
178 chunk->nents = min_t(int, ret, USNIC_UIOM_PAGE_CHUNK);
179 sg_init_table(chunk->page_list, chunk->nents);
180 for_each_sg(chunk->page_list, sg, chunk->nents, i) {
181 sg_set_page(sg, page_list[i + off],
184 usnic_dbg("va: 0x%lx pa: %pa\n",
185 cur_base + i*PAGE_SIZE, &pa);
187 cur_base += chunk->nents * PAGE_SIZE;
190 list_add_tail(&chunk->list, chunk_list);
198 usnic_uiom_put_pages(chunk_list, 0);
200 current->mm->pinned_vm = locked;
202 up_write(¤t->mm->mmap_sem);
203 free_page((unsigned long) page_list);
207 static void usnic_uiom_unmap_sorted_intervals(struct list_head *intervals,
208 struct usnic_uiom_pd *pd)
210 struct usnic_uiom_interval_node *interval, *tmp;
211 long unsigned va, size;
213 list_for_each_entry_safe(interval, tmp, intervals, link) {
214 va = interval->start << PAGE_SHIFT;
215 size = ((interval->last - interval->start) + 1) << PAGE_SHIFT;
217 /* Workaround for RH 970401 */
218 usnic_dbg("va 0x%lx size 0x%lx", va, PAGE_SIZE);
219 iommu_unmap(pd->domain, va, PAGE_SIZE);
226 static void __usnic_uiom_reg_release(struct usnic_uiom_pd *pd,
227 struct usnic_uiom_reg *uiomr,
231 unsigned long vpn_start, vpn_last;
232 struct usnic_uiom_interval_node *interval, *tmp;
234 LIST_HEAD(rm_intervals);
236 npages = PAGE_ALIGN(uiomr->length + uiomr->offset) >> PAGE_SHIFT;
237 vpn_start = (uiomr->va & PAGE_MASK) >> PAGE_SHIFT;
238 vpn_last = vpn_start + npages - 1;
240 spin_lock(&pd->lock);
241 usnic_uiom_remove_interval(&pd->root, vpn_start,
242 vpn_last, &rm_intervals);
243 usnic_uiom_unmap_sorted_intervals(&rm_intervals, pd);
245 list_for_each_entry_safe(interval, tmp, &rm_intervals, link) {
246 if (interval->flags & IOMMU_WRITE)
248 list_del(&interval->link);
252 usnic_uiom_put_pages(&uiomr->chunk_list, dirty & writable);
253 spin_unlock(&pd->lock);
256 static int usnic_uiom_map_sorted_intervals(struct list_head *intervals,
257 struct usnic_uiom_reg *uiomr)
261 struct usnic_uiom_chunk *chunk;
262 struct usnic_uiom_interval_node *interval_node;
264 dma_addr_t pa_start = 0;
265 dma_addr_t pa_end = 0;
266 long int va_start = -EINVAL;
267 struct usnic_uiom_pd *pd = uiomr->pd;
268 long int va = uiomr->va & PAGE_MASK;
269 int flags = IOMMU_READ | IOMMU_CACHE;
271 flags |= (uiomr->writable) ? IOMMU_WRITE : 0;
272 chunk = list_first_entry(&uiomr->chunk_list, struct usnic_uiom_chunk,
274 list_for_each_entry(interval_node, intervals, link) {
276 for (i = 0; i < chunk->nents; i++, va += PAGE_SIZE) {
277 pa = sg_phys(&chunk->page_list[i]);
278 if ((va >> PAGE_SHIFT) < interval_node->start)
281 if ((va >> PAGE_SHIFT) == interval_node->start) {
282 /* First page of the interval */
288 WARN_ON(va_start == -EINVAL);
290 if ((pa_end + PAGE_SIZE != pa) &&
292 /* PAs are not contiguous */
293 size = pa_end - pa_start + PAGE_SIZE;
294 usnic_dbg("va 0x%lx pa %pa size 0x%zx flags 0x%x",
295 va_start, &pa_start, size, flags);
296 err = iommu_map(pd->domain, va_start, pa_start,
299 usnic_err("Failed to map va 0x%lx pa %pa size 0x%zx with err %d\n",
300 va_start, &pa_start, size, err);
308 if ((va >> PAGE_SHIFT) == interval_node->last) {
309 /* Last page of the interval */
310 size = pa - pa_start + PAGE_SIZE;
311 usnic_dbg("va 0x%lx pa %pa size 0x%zx flags 0x%x\n",
312 va_start, &pa_start, size, flags);
313 err = iommu_map(pd->domain, va_start, pa_start,
316 usnic_err("Failed to map va 0x%lx pa %pa size 0x%zx with err %d\n",
317 va_start, &pa_start, size, err);
327 if (i == chunk->nents) {
329 * Hit last entry of the chunk,
330 * hence advance to next chunk
332 chunk = list_first_entry(&chunk->list,
333 struct usnic_uiom_chunk,
342 usnic_uiom_unmap_sorted_intervals(intervals, pd);
346 struct usnic_uiom_reg *usnic_uiom_reg_get(struct usnic_uiom_pd *pd,
347 unsigned long addr, size_t size,
348 int writable, int dmasync)
350 struct usnic_uiom_reg *uiomr;
351 unsigned long va_base, vpn_start, vpn_last;
352 unsigned long npages;
354 LIST_HEAD(sorted_diff_intervals);
357 * Intel IOMMU map throws an error if a translation entry is
358 * changed from read to write. This module may not unmap
359 * and then remap the entry after fixing the permission
360 * b/c this open up a small windows where hw DMA may page fault
361 * Hence, make all entries to be writable.
365 va_base = addr & PAGE_MASK;
366 offset = addr & ~PAGE_MASK;
367 npages = PAGE_ALIGN(size + offset) >> PAGE_SHIFT;
368 vpn_start = (addr & PAGE_MASK) >> PAGE_SHIFT;
369 vpn_last = vpn_start + npages - 1;
371 uiomr = kmalloc(sizeof(*uiomr), GFP_KERNEL);
373 return ERR_PTR(-ENOMEM);
376 uiomr->offset = offset;
377 uiomr->length = size;
378 uiomr->writable = writable;
381 err = usnic_uiom_get_pages(addr, size, writable, dmasync,
384 usnic_err("Failed get_pages vpn [0x%lx,0x%lx] err %d\n",
385 vpn_start, vpn_last, err);
389 spin_lock(&pd->lock);
390 err = usnic_uiom_get_intervals_diff(vpn_start, vpn_last,
391 (writable) ? IOMMU_WRITE : 0,
394 &sorted_diff_intervals);
396 usnic_err("Failed disjoint interval vpn [0x%lx,0x%lx] err %d\n",
397 vpn_start, vpn_last, err);
401 err = usnic_uiom_map_sorted_intervals(&sorted_diff_intervals, uiomr);
403 usnic_err("Failed map interval vpn [0x%lx,0x%lx] err %d\n",
404 vpn_start, vpn_last, err);
405 goto out_put_intervals;
409 err = usnic_uiom_insert_interval(&pd->root, vpn_start, vpn_last,
410 (writable) ? IOMMU_WRITE : 0);
412 usnic_err("Failed insert interval vpn [0x%lx,0x%lx] err %d\n",
413 vpn_start, vpn_last, err);
414 goto out_unmap_intervals;
417 usnic_uiom_put_interval_set(&sorted_diff_intervals);
418 spin_unlock(&pd->lock);
423 usnic_uiom_unmap_sorted_intervals(&sorted_diff_intervals, pd);
425 usnic_uiom_put_interval_set(&sorted_diff_intervals);
427 usnic_uiom_put_pages(&uiomr->chunk_list, 0);
428 spin_unlock(&pd->lock);
434 void usnic_uiom_reg_release(struct usnic_uiom_reg *uiomr,
435 struct ib_ucontext *ucontext)
437 struct task_struct *task;
438 struct mm_struct *mm;
441 __usnic_uiom_reg_release(uiomr->pd, uiomr, 1);
443 task = get_pid_task(ucontext->tgid, PIDTYPE_PID);
446 mm = get_task_mm(task);
447 put_task_struct(task);
451 diff = PAGE_ALIGN(uiomr->length + uiomr->offset) >> PAGE_SHIFT;
454 * We may be called with the mm's mmap_sem already held. This
455 * can happen when a userspace munmap() is the call that drops
456 * the last reference to our file and calls our release
457 * method. If there are memory regions to destroy, we'll end
458 * up here and not be able to take the mmap_sem. In that case
459 * we defer the vm_locked accounting to the system workqueue.
461 if (ucontext->closing) {
462 if (!down_write_trylock(&mm->mmap_sem)) {
463 INIT_WORK(&uiomr->work, usnic_uiom_reg_account);
467 queue_work(usnic_uiom_wq, &uiomr->work);
471 down_write(&mm->mmap_sem);
473 mm->pinned_vm -= diff;
474 up_write(&mm->mmap_sem);
480 struct usnic_uiom_pd *usnic_uiom_alloc_pd(void)
482 struct usnic_uiom_pd *pd;
485 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
487 return ERR_PTR(-ENOMEM);
489 pd->domain = domain = iommu_domain_alloc(&pci_bus_type);
491 usnic_err("Failed to allocate IOMMU domain");
493 return ERR_PTR(-ENOMEM);
496 iommu_set_fault_handler(pd->domain, usnic_uiom_dma_fault, NULL);
498 spin_lock_init(&pd->lock);
499 INIT_LIST_HEAD(&pd->devs);
504 void usnic_uiom_dealloc_pd(struct usnic_uiom_pd *pd)
506 iommu_domain_free(pd->domain);
510 int usnic_uiom_attach_dev_to_pd(struct usnic_uiom_pd *pd, struct device *dev)
512 struct usnic_uiom_dev *uiom_dev;
515 uiom_dev = kzalloc(sizeof(*uiom_dev), GFP_ATOMIC);
520 err = iommu_attach_device(pd->domain, dev);
524 if (!iommu_capable(dev->bus, IOMMU_CAP_CACHE_COHERENCY)) {
525 usnic_err("IOMMU of %s does not support cache coherency\n",
528 goto out_detach_device;
531 spin_lock(&pd->lock);
532 list_add_tail(&uiom_dev->link, &pd->devs);
534 spin_unlock(&pd->lock);
539 iommu_detach_device(pd->domain, dev);
545 void usnic_uiom_detach_dev_from_pd(struct usnic_uiom_pd *pd, struct device *dev)
547 struct usnic_uiom_dev *uiom_dev;
550 spin_lock(&pd->lock);
551 list_for_each_entry(uiom_dev, &pd->devs, link) {
552 if (uiom_dev->dev == dev) {
559 usnic_err("Unable to free dev %s - not found\n",
561 spin_unlock(&pd->lock);
565 list_del(&uiom_dev->link);
567 spin_unlock(&pd->lock);
569 return iommu_detach_device(pd->domain, dev);
572 struct device **usnic_uiom_get_dev_list(struct usnic_uiom_pd *pd)
574 struct usnic_uiom_dev *uiom_dev;
575 struct device **devs;
578 spin_lock(&pd->lock);
579 devs = kcalloc(pd->dev_cnt + 1, sizeof(*devs), GFP_ATOMIC);
581 devs = ERR_PTR(-ENOMEM);
585 list_for_each_entry(uiom_dev, &pd->devs, link) {
586 devs[i++] = uiom_dev->dev;
589 spin_unlock(&pd->lock);
593 void usnic_uiom_free_dev_list(struct device **devs)
598 int usnic_uiom_init(char *drv_name)
600 if (!iommu_present(&pci_bus_type)) {
601 usnic_err("IOMMU required but not present or enabled. USNIC QPs will not function w/o enabling IOMMU\n");
605 usnic_uiom_wq = create_workqueue(drv_name);
606 if (!usnic_uiom_wq) {
607 usnic_err("Unable to alloc wq for drv %s\n", drv_name);
614 void usnic_uiom_fini(void)
616 flush_workqueue(usnic_uiom_wq);
617 destroy_workqueue(usnic_uiom_wq);