2 * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <linux/netdevice.h>
37 #include <linux/vmalloc.h>
38 #include <linux/delay.h>
39 #include <linux/idr.h>
40 #include <linux/module.h>
41 #include <linux/printk.h>
42 #ifdef CONFIG_INFINIBAND_QIB_DCA
43 #include <linux/dca.h>
45 #include <rdma/rdma_vt.h>
48 #include "qib_common.h"
50 #ifdef CONFIG_DEBUG_FS
51 #include "qib_debugfs.h"
52 #include "qib_verbs.h"
56 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt
59 * min buffers we want to have per context, after driver
61 #define QIB_MIN_USER_CTXT_BUFCNT 7
63 #define QLOGIC_IB_R_SOFTWARE_MASK 0xFF
64 #define QLOGIC_IB_R_SOFTWARE_SHIFT 24
65 #define QLOGIC_IB_R_EMULATOR_MASK (1ULL<<62)
68 * Number of ctxts we are configured to use (to allow for more pio
69 * buffers per ctxt, etc.) Zero means use chip value.
72 module_param_named(cfgctxts, qib_cfgctxts, ushort, S_IRUGO);
73 MODULE_PARM_DESC(cfgctxts, "Set max number of contexts to use");
75 unsigned qib_numa_aware;
76 module_param_named(numa_aware, qib_numa_aware, uint, S_IRUGO);
77 MODULE_PARM_DESC(numa_aware,
78 "0 -> PSM allocation close to HCA, 1 -> PSM allocation local to process");
81 * If set, do not write to any regs if avoidable, hack to allow
82 * check for deranged default register values.
85 module_param_named(mini_init, qib_mini_init, ushort, S_IRUGO);
86 MODULE_PARM_DESC(mini_init, "If set, do minimal diag init");
88 unsigned qib_n_krcv_queues;
89 module_param_named(krcvqs, qib_n_krcv_queues, uint, S_IRUGO);
90 MODULE_PARM_DESC(krcvqs, "number of kernel receive queues per IB port");
92 unsigned qib_cc_table_size;
93 module_param_named(cc_table_size, qib_cc_table_size, uint, S_IRUGO);
94 MODULE_PARM_DESC(cc_table_size, "Congestion control table entries 0 (CCA disabled - default), min = 128, max = 1984");
96 static void verify_interrupt(unsigned long);
98 static struct idr qib_unit_table;
99 u32 qib_cpulist_count;
100 unsigned long *qib_cpulist;
102 /* set number of contexts we'll actually use */
103 void qib_set_ctxtcnt(struct qib_devdata *dd)
106 dd->cfgctxts = dd->first_user_ctxt + num_online_cpus();
107 if (dd->cfgctxts > dd->ctxtcnt)
108 dd->cfgctxts = dd->ctxtcnt;
109 } else if (qib_cfgctxts < dd->num_pports)
110 dd->cfgctxts = dd->ctxtcnt;
111 else if (qib_cfgctxts <= dd->ctxtcnt)
112 dd->cfgctxts = qib_cfgctxts;
114 dd->cfgctxts = dd->ctxtcnt;
115 dd->freectxts = (dd->first_user_ctxt > dd->cfgctxts) ? 0 :
116 dd->cfgctxts - dd->first_user_ctxt;
120 * Common code for creating the receive context array.
122 int qib_create_ctxts(struct qib_devdata *dd)
125 int local_node_id = pcibus_to_node(dd->pcidev->bus);
127 if (local_node_id < 0)
128 local_node_id = numa_node_id();
129 dd->assigned_node_id = local_node_id;
132 * Allocate full ctxtcnt array, rather than just cfgctxts, because
133 * cleanup iterates across all possible ctxts.
135 dd->rcd = kcalloc(dd->ctxtcnt, sizeof(*dd->rcd), GFP_KERNEL);
138 "Unable to allocate ctxtdata array, failing\n");
142 /* create (one or more) kctxt */
143 for (i = 0; i < dd->first_user_ctxt; ++i) {
144 struct qib_pportdata *ppd;
145 struct qib_ctxtdata *rcd;
147 if (dd->skip_kctxt_mask & (1 << i))
150 ppd = dd->pport + (i % dd->num_pports);
152 rcd = qib_create_ctxtdata(ppd, i, dd->assigned_node_id);
155 "Unable to allocate ctxtdata for Kernel ctxt, failing\n");
160 rcd->pkeys[0] = QIB_DEFAULT_P_KEY;
167 * Common code for user and kernel context setup.
169 struct qib_ctxtdata *qib_create_ctxtdata(struct qib_pportdata *ppd, u32 ctxt,
172 struct qib_devdata *dd = ppd->dd;
173 struct qib_ctxtdata *rcd;
175 rcd = kzalloc_node(sizeof(*rcd), GFP_KERNEL, node_id);
177 INIT_LIST_HEAD(&rcd->qp_wait_list);
178 rcd->node_id = node_id;
184 #ifdef CONFIG_DEBUG_FS
185 if (ctxt < dd->first_user_ctxt) { /* N/A for PSM contexts */
186 rcd->opstats = kzalloc_node(sizeof(*rcd->opstats),
187 GFP_KERNEL, node_id);
191 "Unable to allocate per ctxt stats buffer\n");
196 dd->f_init_ctxt(rcd);
199 * To avoid wasting a lot of memory, we allocate 32KB chunks
200 * of physically contiguous memory, advance through it until
201 * used up and then allocate more. Of course, we need
202 * memory to store those extra pointers, now. 32KB seems to
203 * be the most that is "safe" under memory pressure
204 * (creating large files and then copying them over
205 * NFS while doing lots of MPI jobs). The OOM killer can
206 * get invoked, even though we say we can sleep and this can
207 * cause significant system problems....
209 rcd->rcvegrbuf_size = 0x8000;
210 rcd->rcvegrbufs_perchunk =
211 rcd->rcvegrbuf_size / dd->rcvegrbufsize;
212 rcd->rcvegrbuf_chunks = (rcd->rcvegrcnt +
213 rcd->rcvegrbufs_perchunk - 1) /
214 rcd->rcvegrbufs_perchunk;
215 BUG_ON(!is_power_of_2(rcd->rcvegrbufs_perchunk));
216 rcd->rcvegrbufs_perchunk_shift =
217 ilog2(rcd->rcvegrbufs_perchunk);
223 * Common code for initializing the physical port structure.
225 int qib_init_pportdata(struct qib_pportdata *ppd, struct qib_devdata *dd,
231 ppd->hw_pidx = hw_pidx;
232 ppd->port = port; /* IB port number, not index */
234 spin_lock_init(&ppd->sdma_lock);
235 spin_lock_init(&ppd->lflags_lock);
236 spin_lock_init(&ppd->cc_shadow_lock);
237 init_waitqueue_head(&ppd->state_wait);
239 init_timer(&ppd->symerr_clear_timer);
240 ppd->symerr_clear_timer.function = qib_clear_symerror_on_linkup;
241 ppd->symerr_clear_timer.data = (unsigned long)ppd;
244 ppd->ibport_data.pmastats =
245 alloc_percpu(struct qib_pma_counters);
246 if (!ppd->ibport_data.pmastats)
248 ppd->ibport_data.rvp.rc_acks = alloc_percpu(u64);
249 ppd->ibport_data.rvp.rc_qacks = alloc_percpu(u64);
250 ppd->ibport_data.rvp.rc_delayed_comp = alloc_percpu(u64);
251 if (!(ppd->ibport_data.rvp.rc_acks) ||
252 !(ppd->ibport_data.rvp.rc_qacks) ||
253 !(ppd->ibport_data.rvp.rc_delayed_comp))
256 if (qib_cc_table_size < IB_CCT_MIN_ENTRIES)
259 ppd->cc_supported_table_entries = min(max_t(int, qib_cc_table_size,
260 IB_CCT_MIN_ENTRIES), IB_CCT_ENTRIES*IB_CC_TABLE_CAP_DEFAULT);
262 ppd->cc_max_table_entries =
263 ppd->cc_supported_table_entries/IB_CCT_ENTRIES;
265 size = IB_CC_TABLE_CAP_DEFAULT * sizeof(struct ib_cc_table_entry)
267 ppd->ccti_entries = kzalloc(size, GFP_KERNEL);
268 if (!ppd->ccti_entries) {
270 "failed to allocate congestion control table for port %d!\n",
275 size = IB_CC_CCS_ENTRIES * sizeof(struct ib_cc_congestion_entry);
276 ppd->congestion_entries = kzalloc(size, GFP_KERNEL);
277 if (!ppd->congestion_entries) {
279 "failed to allocate congestion setting list for port %d!\n",
284 size = sizeof(struct cc_table_shadow);
285 ppd->ccti_entries_shadow = kzalloc(size, GFP_KERNEL);
286 if (!ppd->ccti_entries_shadow) {
288 "failed to allocate shadow ccti list for port %d!\n",
293 size = sizeof(struct ib_cc_congestion_setting_attr);
294 ppd->congestion_entries_shadow = kzalloc(size, GFP_KERNEL);
295 if (!ppd->congestion_entries_shadow) {
297 "failed to allocate shadow congestion setting list for port %d!\n",
305 kfree(ppd->ccti_entries_shadow);
306 ppd->ccti_entries_shadow = NULL;
308 kfree(ppd->congestion_entries);
309 ppd->congestion_entries = NULL;
311 kfree(ppd->ccti_entries);
312 ppd->ccti_entries = NULL;
314 /* User is intentionally disabling the congestion control agent */
315 if (!qib_cc_table_size)
318 if (qib_cc_table_size < IB_CCT_MIN_ENTRIES) {
319 qib_cc_table_size = 0;
321 "Congestion Control table size %d less than minimum %d for port %d\n",
322 qib_cc_table_size, IB_CCT_MIN_ENTRIES, port);
325 qib_dev_err(dd, "Congestion Control Agent disabled for port %d\n",
330 static int init_pioavailregs(struct qib_devdata *dd)
335 dd->pioavailregs_dma = dma_alloc_coherent(
336 &dd->pcidev->dev, PAGE_SIZE, &dd->pioavailregs_phys,
338 if (!dd->pioavailregs_dma) {
340 "failed to allocate PIOavail reg area in memory\n");
346 * We really want L2 cache aligned, but for current CPUs of
347 * interest, they are the same.
349 status_page = (u64 *)
350 ((char *) dd->pioavailregs_dma +
351 ((2 * L1_CACHE_BYTES +
352 dd->pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES));
353 /* device status comes first, for backwards compatibility */
354 dd->devstatusp = status_page;
356 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
357 dd->pport[pidx].statusp = status_page;
362 * Setup buffer to hold freeze and other messages, accessible to
363 * apps, following statusp. This is per-unit, not per port.
365 dd->freezemsg = (char *) status_page;
367 /* length of msg buffer is "whatever is left" */
368 ret = (char *) status_page - (char *) dd->pioavailregs_dma;
369 dd->freezelen = PAGE_SIZE - ret;
378 * init_shadow_tids - allocate the shadow TID array
379 * @dd: the qlogic_ib device
381 * allocate the shadow TID array, so we can qib_munlock previous
382 * entries. It may make more sense to move the pageshadow to the
383 * ctxt data structure, so we only allocate memory for ctxts actually
384 * in use, since we at 8k per ctxt, now.
385 * We don't want failures here to prevent use of the driver/chip,
386 * so no return value.
388 static void init_shadow_tids(struct qib_devdata *dd)
393 pages = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *));
396 "failed to allocate shadow page * array, no expected sends!\n");
400 addrs = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t));
403 "failed to allocate shadow dma handle array, no expected sends!\n");
407 dd->pageshadow = pages;
408 dd->physshadow = addrs;
414 dd->pageshadow = NULL;
418 * Do initialization for device that is only needed on
419 * first detect, not on resets.
421 static int loadtime_init(struct qib_devdata *dd)
425 if (((dd->revision >> QLOGIC_IB_R_SOFTWARE_SHIFT) &
426 QLOGIC_IB_R_SOFTWARE_MASK) != QIB_CHIP_SWVERSION) {
428 "Driver only handles version %d, chip swversion is %d (%llx), failng\n",
430 (int)(dd->revision >>
431 QLOGIC_IB_R_SOFTWARE_SHIFT) &
432 QLOGIC_IB_R_SOFTWARE_MASK,
433 (unsigned long long) dd->revision);
438 if (dd->revision & QLOGIC_IB_R_EMULATOR_MASK)
439 qib_devinfo(dd->pcidev, "%s", dd->boardversion);
441 spin_lock_init(&dd->pioavail_lock);
442 spin_lock_init(&dd->sendctrl_lock);
443 spin_lock_init(&dd->uctxt_lock);
444 spin_lock_init(&dd->qib_diag_trans_lock);
445 spin_lock_init(&dd->eep_st_lock);
446 mutex_init(&dd->eep_lock);
451 ret = init_pioavailregs(dd);
452 init_shadow_tids(dd);
454 qib_get_eeprom_info(dd);
456 /* setup time (don't start yet) to verify we got interrupt */
457 init_timer(&dd->intrchk_timer);
458 dd->intrchk_timer.function = verify_interrupt;
459 dd->intrchk_timer.data = (unsigned long) dd;
465 * init_after_reset - re-initialize after a reset
466 * @dd: the qlogic_ib device
468 * sanity check at least some of the values after reset, and
469 * ensure no receive or transmit (explicitly, in case reset
472 static int init_after_reset(struct qib_devdata *dd)
477 * Ensure chip does no sends or receives, tail updates, or
478 * pioavail updates while we re-initialize. This is mostly
479 * for the driver data structures, not chip registers.
481 for (i = 0; i < dd->num_pports; ++i) {
483 * ctxt == -1 means "all contexts". Only really safe for
484 * _dis_abling things, as here.
486 dd->f_rcvctrl(dd->pport + i, QIB_RCVCTRL_CTXT_DIS |
487 QIB_RCVCTRL_INTRAVAIL_DIS |
488 QIB_RCVCTRL_TAILUPD_DIS, -1);
489 /* Redundant across ports for some, but no big deal. */
490 dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_DIS |
491 QIB_SENDCTRL_AVAIL_DIS);
497 static void enable_chip(struct qib_devdata *dd)
503 * Enable PIO send, and update of PIOavail regs to memory.
505 for (i = 0; i < dd->num_pports; ++i)
506 dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_ENB |
507 QIB_SENDCTRL_AVAIL_ENB);
509 * Enable kernel ctxts' receive and receive interrupt.
510 * Other ctxts done as user opens and inits them.
512 rcvmask = QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_INTRAVAIL_ENB;
513 rcvmask |= (dd->flags & QIB_NODMA_RTAIL) ?
514 QIB_RCVCTRL_TAILUPD_DIS : QIB_RCVCTRL_TAILUPD_ENB;
515 for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) {
516 struct qib_ctxtdata *rcd = dd->rcd[i];
519 dd->f_rcvctrl(rcd->ppd, rcvmask, i);
523 static void verify_interrupt(unsigned long opaque)
525 struct qib_devdata *dd = (struct qib_devdata *) opaque;
529 return; /* being torn down */
532 * If we don't have a lid or any interrupts, let the user know and
533 * don't bother checking again.
535 int_counter = qib_int_counter(dd) - dd->z_int_counter;
536 if (int_counter == 0) {
537 if (!dd->f_intr_fallback(dd))
538 dev_err(&dd->pcidev->dev,
539 "No interrupts detected, not usable.\n");
540 else /* re-arm the timer to see if fallback works */
541 mod_timer(&dd->intrchk_timer, jiffies + HZ/2);
545 static void init_piobuf_state(struct qib_devdata *dd)
551 * Ensure all buffers are free, and fifos empty. Buffers
552 * are common, so only do once for port 0.
554 * After enable and qib_chg_pioavailkernel so we can safely
555 * enable pioavail updates and PIOENABLE. After this, packets
556 * are ready and able to go out.
558 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_ALL);
559 for (pidx = 0; pidx < dd->num_pports; ++pidx)
560 dd->f_sendctrl(dd->pport + pidx, QIB_SENDCTRL_FLUSH);
563 * If not all sendbufs are used, add the one to each of the lower
564 * numbered contexts. pbufsctxt and lastctxt_piobuf are
565 * calculated in chip-specific code because it may cause some
566 * chip-specific adjustments to be made.
568 uctxts = dd->cfgctxts - dd->first_user_ctxt;
569 dd->ctxts_extrabuf = dd->pbufsctxt ?
570 dd->lastctxt_piobuf - (dd->pbufsctxt * uctxts) : 0;
573 * Set up the shadow copies of the piobufavail registers,
574 * which we compare against the chip registers for now, and
575 * the in memory DMA'ed copies of the registers.
576 * By now pioavail updates to memory should have occurred, so
577 * copy them into our working/shadow registers; this is in
578 * case something went wrong with abort, but mostly to get the
579 * initial values of the generation bit correct.
581 for (i = 0; i < dd->pioavregs; i++) {
584 tmp = dd->pioavailregs_dma[i];
586 * Don't need to worry about pioavailkernel here
587 * because we will call qib_chg_pioavailkernel() later
588 * in initialization, to busy out buffers as needed.
590 dd->pioavailshadow[i] = le64_to_cpu(tmp);
592 while (i < ARRAY_SIZE(dd->pioavailshadow))
593 dd->pioavailshadow[i++] = 0; /* for debugging sanity */
595 /* after pioavailshadow is setup */
596 qib_chg_pioavailkernel(dd, 0, dd->piobcnt2k + dd->piobcnt4k,
597 TXCHK_CHG_TYPE_KERN, NULL);
598 dd->f_initvl15_bufs(dd);
602 * qib_create_workqueues - create per port workqueues
603 * @dd: the qlogic_ib device
605 static int qib_create_workqueues(struct qib_devdata *dd)
608 struct qib_pportdata *ppd;
610 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
611 ppd = dd->pport + pidx;
613 char wq_name[8]; /* 3 + 2 + 1 + 1 + 1 */
615 snprintf(wq_name, sizeof(wq_name), "qib%d_%d",
617 ppd->qib_wq = alloc_ordered_workqueue(wq_name,
625 pr_err("create_singlethread_workqueue failed for port %d\n",
627 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
628 ppd = dd->pport + pidx;
630 destroy_workqueue(ppd->qib_wq);
637 static void qib_free_pportdata(struct qib_pportdata *ppd)
639 free_percpu(ppd->ibport_data.pmastats);
640 free_percpu(ppd->ibport_data.rvp.rc_acks);
641 free_percpu(ppd->ibport_data.rvp.rc_qacks);
642 free_percpu(ppd->ibport_data.rvp.rc_delayed_comp);
643 ppd->ibport_data.pmastats = NULL;
647 * qib_init - do the actual initialization sequence on the chip
648 * @dd: the qlogic_ib device
649 * @reinit: reinitializing, so don't allocate new memory
651 * Do the actual initialization sequence on the chip. This is done
652 * both from the init routine called from the PCI infrastructure, and
653 * when we reset the chip, or detect that it was reset internally,
654 * or it's administratively re-enabled.
656 * Memory allocation here and in called routines is only done in
657 * the first case (reinit == 0). We have to be careful, because even
658 * without memory allocation, we need to re-write all the chip registers
659 * TIDs, etc. after the reset or enable has completed.
661 int qib_init(struct qib_devdata *dd, int reinit)
663 int ret = 0, pidx, lastfail = 0;
666 struct qib_ctxtdata *rcd;
667 struct qib_pportdata *ppd;
670 /* Set linkstate to unknown, so we can watch for a transition. */
671 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
672 ppd = dd->pport + pidx;
673 spin_lock_irqsave(&ppd->lflags_lock, flags);
674 ppd->lflags &= ~(QIBL_LINKACTIVE | QIBL_LINKARMED |
675 QIBL_LINKDOWN | QIBL_LINKINIT |
677 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
681 ret = init_after_reset(dd);
683 ret = loadtime_init(dd);
687 /* Bypass most chip-init, to get to device creation */
691 ret = dd->f_late_initreg(dd);
695 /* dd->rcd can be NULL if early init failed */
696 for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) {
698 * Set up the (kernel) rcvhdr queue and egr TIDs. If doing
699 * re-init, the simplest way to handle this is to free
700 * existing, and re-allocate.
701 * Need to re-create rest of ctxt 0 ctxtdata as well.
707 lastfail = qib_create_rcvhdrq(dd, rcd);
709 lastfail = qib_setup_eagerbufs(rcd);
712 "failed to allocate kernel ctxt's rcvhdrq and/or egr bufs\n");
717 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
722 ppd = dd->pport + pidx;
723 mtu = ib_mtu_enum_to_int(qib_ibmtu);
725 mtu = QIB_DEFAULT_MTU;
726 qib_ibmtu = 0; /* don't leave invalid value */
728 /* set max we can ever have for this driver load */
729 ppd->init_ibmaxlen = min(mtu > 2048 ?
730 dd->piosize4k : dd->piosize2k,
732 (dd->rcvhdrentsize << 2));
734 * Have to initialize ibmaxlen, but this will normally
735 * change immediately in qib_set_mtu().
737 ppd->ibmaxlen = ppd->init_ibmaxlen;
738 qib_set_mtu(ppd, mtu);
740 spin_lock_irqsave(&ppd->lflags_lock, flags);
741 ppd->lflags |= QIBL_IB_LINK_DISABLED;
742 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
744 lastfail = dd->f_bringup_serdes(ppd);
746 qib_devinfo(dd->pcidev,
747 "Failed to bringup IB port %u\n", ppd->port);
748 lastfail = -ENETDOWN;
756 /* none of the ports initialized */
757 if (!ret && lastfail)
761 /* but continue on, so we can debug cause */
766 init_piobuf_state(dd);
770 /* chip is OK for user apps; mark it as initialized */
771 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
772 ppd = dd->pport + pidx;
774 * Set status even if port serdes is not initialized
775 * so that diags will work.
777 *ppd->statusp |= QIB_STATUS_CHIP_PRESENT |
779 if (!ppd->link_speed_enabled)
781 if (dd->flags & QIB_HAS_SEND_DMA)
782 ret = qib_setup_sdma(ppd);
783 init_timer(&ppd->hol_timer);
784 ppd->hol_timer.function = qib_hol_event;
785 ppd->hol_timer.data = (unsigned long)ppd;
786 ppd->hol_state = QIB_HOL_UP;
789 /* now we can enable all interrupts from the chip */
790 dd->f_set_intr_state(dd, 1);
793 * Setup to verify we get an interrupt, and fallback
794 * to an alternate if necessary and possible.
796 mod_timer(&dd->intrchk_timer, jiffies + HZ/2);
797 /* start stats retrieval timer */
798 mod_timer(&dd->stats_timer, jiffies + HZ * ACTIVITY_TIMER);
801 /* if ret is non-zero, we probably should do some cleanup here... */
806 * These next two routines are placeholders in case we don't have per-arch
807 * code for controlling write combining. If explicit control of write
808 * combining is not available, performance will probably be awful.
811 int __attribute__((weak)) qib_enable_wc(struct qib_devdata *dd)
816 void __attribute__((weak)) qib_disable_wc(struct qib_devdata *dd)
820 static inline struct qib_devdata *__qib_lookup(int unit)
822 return idr_find(&qib_unit_table, unit);
825 struct qib_devdata *qib_lookup(int unit)
827 struct qib_devdata *dd;
830 spin_lock_irqsave(&qib_devs_lock, flags);
831 dd = __qib_lookup(unit);
832 spin_unlock_irqrestore(&qib_devs_lock, flags);
838 * Stop the timers during unit shutdown, or after an error late
841 static void qib_stop_timers(struct qib_devdata *dd)
843 struct qib_pportdata *ppd;
846 if (dd->stats_timer.data) {
847 del_timer_sync(&dd->stats_timer);
848 dd->stats_timer.data = 0;
850 if (dd->intrchk_timer.data) {
851 del_timer_sync(&dd->intrchk_timer);
852 dd->intrchk_timer.data = 0;
854 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
855 ppd = dd->pport + pidx;
856 if (ppd->hol_timer.data)
857 del_timer_sync(&ppd->hol_timer);
858 if (ppd->led_override_timer.data) {
859 del_timer_sync(&ppd->led_override_timer);
860 atomic_set(&ppd->led_override_timer_active, 0);
862 if (ppd->symerr_clear_timer.data)
863 del_timer_sync(&ppd->symerr_clear_timer);
868 * qib_shutdown_device - shut down a device
869 * @dd: the qlogic_ib device
871 * This is called to make the device quiet when we are about to
872 * unload the driver, and also when the device is administratively
873 * disabled. It does not free any data structures.
874 * Everything it does has to be setup again by qib_init(dd, 1)
876 static void qib_shutdown_device(struct qib_devdata *dd)
878 struct qib_pportdata *ppd;
881 if (dd->flags & QIB_SHUTDOWN)
883 dd->flags |= QIB_SHUTDOWN;
885 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
886 ppd = dd->pport + pidx;
888 spin_lock_irq(&ppd->lflags_lock);
889 ppd->lflags &= ~(QIBL_LINKDOWN | QIBL_LINKINIT |
890 QIBL_LINKARMED | QIBL_LINKACTIVE |
892 spin_unlock_irq(&ppd->lflags_lock);
893 *ppd->statusp &= ~(QIB_STATUS_IB_CONF | QIB_STATUS_IB_READY);
895 dd->flags &= ~QIB_INITTED;
897 /* mask interrupts, but not errors */
898 dd->f_set_intr_state(dd, 0);
900 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
901 ppd = dd->pport + pidx;
902 dd->f_rcvctrl(ppd, QIB_RCVCTRL_TAILUPD_DIS |
903 QIB_RCVCTRL_CTXT_DIS |
904 QIB_RCVCTRL_INTRAVAIL_DIS |
905 QIB_RCVCTRL_PKEY_ENB, -1);
907 * Gracefully stop all sends allowing any in progress to
910 dd->f_sendctrl(ppd, QIB_SENDCTRL_CLEAR);
914 * Enough for anything that's going to trickle out to have actually
919 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
920 ppd = dd->pport + pidx;
921 dd->f_setextled(ppd, 0); /* make sure LEDs are off */
923 if (dd->flags & QIB_HAS_SEND_DMA)
924 qib_teardown_sdma(ppd);
926 dd->f_sendctrl(ppd, QIB_SENDCTRL_AVAIL_DIS |
927 QIB_SENDCTRL_SEND_DIS);
929 * Clear SerdesEnable.
930 * We can't count on interrupts since we are stopping.
932 dd->f_quiet_serdes(ppd);
935 destroy_workqueue(ppd->qib_wq);
938 qib_free_pportdata(ppd);
944 * qib_free_ctxtdata - free a context's allocated data
945 * @dd: the qlogic_ib device
946 * @rcd: the ctxtdata structure
948 * free up any allocated data for a context
949 * This should not touch anything that would affect a simultaneous
950 * re-allocation of context data, because it is called after qib_mutex
951 * is released (and can be called from reinit as well).
952 * It should never change any chip state, or global driver state.
954 void qib_free_ctxtdata(struct qib_devdata *dd, struct qib_ctxtdata *rcd)
960 dma_free_coherent(&dd->pcidev->dev, rcd->rcvhdrq_size,
961 rcd->rcvhdrq, rcd->rcvhdrq_phys);
963 if (rcd->rcvhdrtail_kvaddr) {
964 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
965 rcd->rcvhdrtail_kvaddr,
966 rcd->rcvhdrqtailaddr_phys);
967 rcd->rcvhdrtail_kvaddr = NULL;
970 if (rcd->rcvegrbuf) {
973 for (e = 0; e < rcd->rcvegrbuf_chunks; e++) {
974 void *base = rcd->rcvegrbuf[e];
975 size_t size = rcd->rcvegrbuf_size;
977 dma_free_coherent(&dd->pcidev->dev, size,
978 base, rcd->rcvegrbuf_phys[e]);
980 kfree(rcd->rcvegrbuf);
981 rcd->rcvegrbuf = NULL;
982 kfree(rcd->rcvegrbuf_phys);
983 rcd->rcvegrbuf_phys = NULL;
984 rcd->rcvegrbuf_chunks = 0;
987 kfree(rcd->tid_pg_list);
988 vfree(rcd->user_event_mask);
989 vfree(rcd->subctxt_uregbase);
990 vfree(rcd->subctxt_rcvegrbuf);
991 vfree(rcd->subctxt_rcvhdr_base);
992 #ifdef CONFIG_DEBUG_FS
1000 * Perform a PIO buffer bandwidth write test, to verify proper system
1001 * configuration. Even when all the setup calls work, occasionally
1002 * BIOS or other issues can prevent write combining from working, or
1003 * can cause other bandwidth problems to the chip.
1005 * This test simply writes the same buffer over and over again, and
1006 * measures close to the peak bandwidth to the chip (not testing
1007 * data bandwidth to the wire). On chips that use an address-based
1008 * trigger to send packets to the wire, this is easy. On chips that
1009 * use a count to trigger, we want to make sure that the packet doesn't
1010 * go out on the wire, or trigger flow control checks.
1012 static void qib_verify_pioperf(struct qib_devdata *dd)
1014 u32 pbnum, cnt, lcnt;
1015 u32 __iomem *piobuf;
1019 piobuf = dd->f_getsendbuf(dd->pport, 0ULL, &pbnum);
1021 qib_devinfo(dd->pcidev,
1022 "No PIObufs for checking perf, skipping\n");
1027 * Enough to give us a reasonable test, less than piobuf size, and
1028 * likely multiple of store buffer length.
1032 addr = vmalloc(cnt);
1034 qib_devinfo(dd->pcidev,
1035 "Couldn't get memory for checking PIO perf, skipping\n");
1039 preempt_disable(); /* we want reasonably accurate elapsed time */
1040 msecs = 1 + jiffies_to_msecs(jiffies);
1041 for (lcnt = 0; lcnt < 10000U; lcnt++) {
1042 /* wait until we cross msec boundary */
1043 if (jiffies_to_msecs(jiffies) >= msecs)
1048 dd->f_set_armlaunch(dd, 0);
1051 * length 0, no dwords actually sent
1057 * This is only roughly accurate, since even with preempt we
1058 * still take interrupts that could take a while. Running for
1059 * >= 5 msec seems to get us "close enough" to accurate values.
1061 msecs = jiffies_to_msecs(jiffies);
1062 for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) {
1063 qib_pio_copy(piobuf + 64, addr, cnt >> 2);
1064 emsecs = jiffies_to_msecs(jiffies) - msecs;
1067 /* 1 GiB/sec, slightly over IB SDR line rate */
1068 if (lcnt < (emsecs * 1024U))
1070 "Performance problem: bandwidth to PIO buffers is only %u MiB/sec\n",
1071 lcnt / (u32) emsecs);
1078 /* disarm piobuf, so it's available again */
1079 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_BUF(pbnum));
1080 qib_sendbuf_done(dd, pbnum);
1081 dd->f_set_armlaunch(dd, 1);
1084 void qib_free_devdata(struct qib_devdata *dd)
1086 unsigned long flags;
1088 spin_lock_irqsave(&qib_devs_lock, flags);
1089 idr_remove(&qib_unit_table, dd->unit);
1090 list_del(&dd->list);
1091 spin_unlock_irqrestore(&qib_devs_lock, flags);
1093 #ifdef CONFIG_DEBUG_FS
1094 qib_dbg_ibdev_exit(&dd->verbs_dev);
1096 free_percpu(dd->int_counter);
1097 rvt_dealloc_device(&dd->verbs_dev.rdi);
1100 u64 qib_int_counter(struct qib_devdata *dd)
1103 u64 int_counter = 0;
1105 for_each_possible_cpu(cpu)
1106 int_counter += *per_cpu_ptr(dd->int_counter, cpu);
1110 u64 qib_sps_ints(void)
1112 unsigned long flags;
1113 struct qib_devdata *dd;
1116 spin_lock_irqsave(&qib_devs_lock, flags);
1117 list_for_each_entry(dd, &qib_dev_list, list) {
1118 sps_ints += qib_int_counter(dd);
1120 spin_unlock_irqrestore(&qib_devs_lock, flags);
1125 * Allocate our primary per-unit data structure. Must be done via verbs
1126 * allocator, because the verbs cleanup process both does cleanup and
1127 * free of the data structure.
1128 * "extra" is for chip-specific data.
1130 * Use the idr mechanism to get a unit number for this unit.
1132 struct qib_devdata *qib_alloc_devdata(struct pci_dev *pdev, size_t extra)
1134 unsigned long flags;
1135 struct qib_devdata *dd;
1138 /* extra is * number of ports */
1139 nports = extra / sizeof(struct qib_pportdata);
1140 dd = (struct qib_devdata *)rvt_alloc_device(sizeof(*dd) + extra,
1143 return ERR_PTR(-ENOMEM);
1145 INIT_LIST_HEAD(&dd->list);
1147 idr_preload(GFP_KERNEL);
1148 spin_lock_irqsave(&qib_devs_lock, flags);
1150 ret = idr_alloc(&qib_unit_table, dd, 0, 0, GFP_NOWAIT);
1153 list_add(&dd->list, &qib_dev_list);
1156 spin_unlock_irqrestore(&qib_devs_lock, flags);
1160 qib_early_err(&pdev->dev,
1161 "Could not allocate unit ID: error %d\n", -ret);
1164 dd->int_counter = alloc_percpu(u64);
1165 if (!dd->int_counter) {
1167 qib_early_err(&pdev->dev,
1168 "Could not allocate per-cpu int_counter\n");
1172 if (!qib_cpulist_count) {
1173 u32 count = num_online_cpus();
1175 qib_cpulist = kzalloc(BITS_TO_LONGS(count) *
1176 sizeof(long), GFP_KERNEL);
1178 qib_cpulist_count = count;
1180 qib_early_err(&pdev->dev,
1181 "Could not alloc cpulist info, cpu affinity might be wrong\n");
1183 #ifdef CONFIG_DEBUG_FS
1184 qib_dbg_ibdev_init(&dd->verbs_dev);
1188 if (!list_empty(&dd->list))
1189 list_del_init(&dd->list);
1190 rvt_dealloc_device(&dd->verbs_dev.rdi);
1191 return ERR_PTR(ret);
1195 * Called from freeze mode handlers, and from PCI error
1196 * reporting code. Should be paranoid about state of
1197 * system and data structures.
1199 void qib_disable_after_error(struct qib_devdata *dd)
1201 if (dd->flags & QIB_INITTED) {
1204 dd->flags &= ~QIB_INITTED;
1206 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1207 struct qib_pportdata *ppd;
1209 ppd = dd->pport + pidx;
1210 if (dd->flags & QIB_PRESENT) {
1211 qib_set_linkstate(ppd,
1212 QIB_IB_LINKDOWN_DISABLE);
1213 dd->f_setextled(ppd, 0);
1215 *ppd->statusp &= ~QIB_STATUS_IB_READY;
1220 * Mark as having had an error for driver, and also
1221 * for /sys and status word mapped to user programs.
1222 * This marks unit as not usable, until reset.
1225 *dd->devstatusp |= QIB_STATUS_HWERROR;
1228 static void qib_remove_one(struct pci_dev *);
1229 static int qib_init_one(struct pci_dev *, const struct pci_device_id *);
1230 static void qib_shutdown_one(struct pci_dev *);
1232 #define DRIVER_LOAD_MSG "Intel " QIB_DRV_NAME " loaded: "
1233 #define PFX QIB_DRV_NAME ": "
1235 static const struct pci_device_id qib_pci_tbl[] = {
1236 { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_QLOGIC_IB_6120) },
1237 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7220) },
1238 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7322) },
1242 MODULE_DEVICE_TABLE(pci, qib_pci_tbl);
1244 static struct pci_driver qib_driver = {
1245 .name = QIB_DRV_NAME,
1246 .probe = qib_init_one,
1247 .remove = qib_remove_one,
1248 .shutdown = qib_shutdown_one,
1249 .id_table = qib_pci_tbl,
1250 .err_handler = &qib_pci_err_handler,
1253 #ifdef CONFIG_INFINIBAND_QIB_DCA
1255 static int qib_notify_dca(struct notifier_block *, unsigned long, void *);
1256 static struct notifier_block dca_notifier = {
1257 .notifier_call = qib_notify_dca,
1262 static int qib_notify_dca_device(struct device *device, void *data)
1264 struct qib_devdata *dd = dev_get_drvdata(device);
1265 unsigned long event = *(unsigned long *)data;
1267 return dd->f_notify_dca(dd, event);
1270 static int qib_notify_dca(struct notifier_block *nb, unsigned long event,
1275 rval = driver_for_each_device(&qib_driver.driver, NULL,
1276 &event, qib_notify_dca_device);
1277 return rval ? NOTIFY_BAD : NOTIFY_DONE;
1283 * Do all the generic driver unit- and chip-independent memory
1284 * allocation and initialization.
1286 static int __init qib_ib_init(void)
1290 ret = qib_dev_init();
1295 * These must be called before the driver is registered with
1296 * the PCI subsystem.
1298 idr_init(&qib_unit_table);
1300 #ifdef CONFIG_INFINIBAND_QIB_DCA
1301 dca_register_notify(&dca_notifier);
1303 #ifdef CONFIG_DEBUG_FS
1306 ret = pci_register_driver(&qib_driver);
1308 pr_err("Unable to register driver: error %d\n", -ret);
1312 /* not fatal if it doesn't work */
1313 if (qib_init_qibfs())
1314 pr_err("Unable to register ipathfs\n");
1315 goto bail; /* all OK */
1318 #ifdef CONFIG_INFINIBAND_QIB_DCA
1319 dca_unregister_notify(&dca_notifier);
1321 #ifdef CONFIG_DEBUG_FS
1324 idr_destroy(&qib_unit_table);
1330 module_init(qib_ib_init);
1333 * Do the non-unit driver cleanup, memory free, etc. at unload.
1335 static void __exit qib_ib_cleanup(void)
1339 ret = qib_exit_qibfs();
1342 "Unable to cleanup counter filesystem: error %d\n",
1345 #ifdef CONFIG_INFINIBAND_QIB_DCA
1346 dca_unregister_notify(&dca_notifier);
1348 pci_unregister_driver(&qib_driver);
1349 #ifdef CONFIG_DEBUG_FS
1353 qib_cpulist_count = 0;
1356 idr_destroy(&qib_unit_table);
1360 module_exit(qib_ib_cleanup);
1362 /* this can only be called after a successful initialization */
1363 static void cleanup_device_data(struct qib_devdata *dd)
1367 struct qib_ctxtdata **tmp;
1368 unsigned long flags;
1370 /* users can't do anything more with chip */
1371 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1372 if (dd->pport[pidx].statusp)
1373 *dd->pport[pidx].statusp &= ~QIB_STATUS_CHIP_PRESENT;
1375 spin_lock(&dd->pport[pidx].cc_shadow_lock);
1377 kfree(dd->pport[pidx].congestion_entries);
1378 dd->pport[pidx].congestion_entries = NULL;
1379 kfree(dd->pport[pidx].ccti_entries);
1380 dd->pport[pidx].ccti_entries = NULL;
1381 kfree(dd->pport[pidx].ccti_entries_shadow);
1382 dd->pport[pidx].ccti_entries_shadow = NULL;
1383 kfree(dd->pport[pidx].congestion_entries_shadow);
1384 dd->pport[pidx].congestion_entries_shadow = NULL;
1386 spin_unlock(&dd->pport[pidx].cc_shadow_lock);
1391 if (dd->pioavailregs_dma) {
1392 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1393 (void *) dd->pioavailregs_dma,
1394 dd->pioavailregs_phys);
1395 dd->pioavailregs_dma = NULL;
1398 if (dd->pageshadow) {
1399 struct page **tmpp = dd->pageshadow;
1400 dma_addr_t *tmpd = dd->physshadow;
1403 for (ctxt = 0; ctxt < dd->cfgctxts; ctxt++) {
1404 int ctxt_tidbase = ctxt * dd->rcvtidcnt;
1405 int maxtid = ctxt_tidbase + dd->rcvtidcnt;
1407 for (i = ctxt_tidbase; i < maxtid; i++) {
1410 pci_unmap_page(dd->pcidev, tmpd[i],
1411 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1412 qib_release_user_pages(&tmpp[i], 1);
1417 dd->pageshadow = NULL;
1419 dd->physshadow = NULL;
1424 * Free any resources still in use (usually just kernel contexts)
1425 * at unload; we do for ctxtcnt, because that's what we allocate.
1426 * We acquire lock to be really paranoid that rcd isn't being
1427 * accessed from some interrupt-related code (that should not happen,
1428 * but best to be sure).
1430 spin_lock_irqsave(&dd->uctxt_lock, flags);
1433 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1434 for (ctxt = 0; tmp && ctxt < dd->ctxtcnt; ctxt++) {
1435 struct qib_ctxtdata *rcd = tmp[ctxt];
1437 tmp[ctxt] = NULL; /* debugging paranoia */
1438 qib_free_ctxtdata(dd, rcd);
1441 kfree(dd->boardname);
1445 * Clean up on unit shutdown, or error during unit load after
1446 * successful initialization.
1448 static void qib_postinit_cleanup(struct qib_devdata *dd)
1451 * Clean up chip-specific stuff.
1452 * We check for NULL here, because it's outside
1453 * the kregbase check, and we need to call it
1454 * after the free_irq. Thus it's possible that
1455 * the function pointers were never initialized.
1460 qib_pcie_ddcleanup(dd);
1462 cleanup_device_data(dd);
1464 qib_free_devdata(dd);
1467 static int qib_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1469 int ret, j, pidx, initfail;
1470 struct qib_devdata *dd = NULL;
1472 ret = qib_pcie_init(pdev, ent);
1477 * Do device-specific initialiation, function table setup, dd
1480 switch (ent->device) {
1481 case PCI_DEVICE_ID_QLOGIC_IB_6120:
1482 #ifdef CONFIG_PCI_MSI
1483 dd = qib_init_iba6120_funcs(pdev, ent);
1485 qib_early_err(&pdev->dev,
1486 "Intel PCIE device 0x%x cannot work if CONFIG_PCI_MSI is not enabled\n",
1488 dd = ERR_PTR(-ENODEV);
1492 case PCI_DEVICE_ID_QLOGIC_IB_7220:
1493 dd = qib_init_iba7220_funcs(pdev, ent);
1496 case PCI_DEVICE_ID_QLOGIC_IB_7322:
1497 dd = qib_init_iba7322_funcs(pdev, ent);
1501 qib_early_err(&pdev->dev,
1502 "Failing on unknown Intel deviceid 0x%x\n",
1510 goto bail; /* error already printed */
1512 ret = qib_create_workqueues(dd);
1516 /* do the generic initialization */
1517 initfail = qib_init(dd, 0);
1519 ret = qib_register_ib_device(dd);
1522 * Now ready for use. this should be cleared whenever we
1523 * detect a reset, or initiate one. If earlier failure,
1524 * we still create devices, so diags, etc. can be used
1525 * to determine cause of problem.
1527 if (!qib_mini_init && !initfail && !ret)
1528 dd->flags |= QIB_INITTED;
1530 j = qib_device_create(dd);
1532 qib_dev_err(dd, "Failed to create /dev devices: %d\n", -j);
1535 qib_dev_err(dd, "Failed filesystem setup for counters: %d\n",
1538 if (qib_mini_init || initfail || ret) {
1539 qib_stop_timers(dd);
1540 flush_workqueue(ib_wq);
1541 for (pidx = 0; pidx < dd->num_pports; ++pidx)
1542 dd->f_quiet_serdes(dd->pport + pidx);
1546 (void) qibfs_remove(dd);
1547 qib_device_remove(dd);
1550 qib_unregister_ib_device(dd);
1551 qib_postinit_cleanup(dd);
1557 ret = qib_enable_wc(dd);
1560 "Write combining not enabled (err %d): performance may be poor\n",
1565 qib_verify_pioperf(dd);
1570 static void qib_remove_one(struct pci_dev *pdev)
1572 struct qib_devdata *dd = pci_get_drvdata(pdev);
1575 /* unregister from IB core */
1576 qib_unregister_ib_device(dd);
1579 * Disable the IB link, disable interrupts on the device,
1580 * clear dma engines, etc.
1583 qib_shutdown_device(dd);
1585 qib_stop_timers(dd);
1587 /* wait until all of our (qsfp) queue_work() calls complete */
1588 flush_workqueue(ib_wq);
1590 ret = qibfs_remove(dd);
1592 qib_dev_err(dd, "Failed counters filesystem cleanup: %d\n",
1595 qib_device_remove(dd);
1597 qib_postinit_cleanup(dd);
1600 static void qib_shutdown_one(struct pci_dev *pdev)
1602 struct qib_devdata *dd = pci_get_drvdata(pdev);
1604 qib_shutdown_device(dd);
1608 * qib_create_rcvhdrq - create a receive header queue
1609 * @dd: the qlogic_ib device
1610 * @rcd: the context data
1612 * This must be contiguous memory (from an i/o perspective), and must be
1613 * DMA'able (which means for some systems, it will go through an IOMMU,
1614 * or be forced into a low address range).
1616 int qib_create_rcvhdrq(struct qib_devdata *dd, struct qib_ctxtdata *rcd)
1621 if (!rcd->rcvhdrq) {
1622 dma_addr_t phys_hdrqtail;
1625 amt = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize *
1626 sizeof(u32), PAGE_SIZE);
1627 gfp_flags = (rcd->ctxt >= dd->first_user_ctxt) ?
1628 GFP_USER : GFP_KERNEL;
1630 old_node_id = dev_to_node(&dd->pcidev->dev);
1631 set_dev_node(&dd->pcidev->dev, rcd->node_id);
1632 rcd->rcvhdrq = dma_alloc_coherent(
1633 &dd->pcidev->dev, amt, &rcd->rcvhdrq_phys,
1634 gfp_flags | __GFP_COMP);
1635 set_dev_node(&dd->pcidev->dev, old_node_id);
1637 if (!rcd->rcvhdrq) {
1639 "attempt to allocate %d bytes for ctxt %u rcvhdrq failed\n",
1644 if (rcd->ctxt >= dd->first_user_ctxt) {
1645 rcd->user_event_mask = vmalloc_user(PAGE_SIZE);
1646 if (!rcd->user_event_mask)
1647 goto bail_free_hdrq;
1650 if (!(dd->flags & QIB_NODMA_RTAIL)) {
1651 set_dev_node(&dd->pcidev->dev, rcd->node_id);
1652 rcd->rcvhdrtail_kvaddr = dma_alloc_coherent(
1653 &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail,
1655 set_dev_node(&dd->pcidev->dev, old_node_id);
1656 if (!rcd->rcvhdrtail_kvaddr)
1658 rcd->rcvhdrqtailaddr_phys = phys_hdrqtail;
1661 rcd->rcvhdrq_size = amt;
1664 /* clear for security and sanity on each use */
1665 memset(rcd->rcvhdrq, 0, rcd->rcvhdrq_size);
1666 if (rcd->rcvhdrtail_kvaddr)
1667 memset(rcd->rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1672 "attempt to allocate 1 page for ctxt %u rcvhdrqtailaddr failed\n",
1674 vfree(rcd->user_event_mask);
1675 rcd->user_event_mask = NULL;
1677 dma_free_coherent(&dd->pcidev->dev, amt, rcd->rcvhdrq,
1679 rcd->rcvhdrq = NULL;
1685 * allocate eager buffers, both kernel and user contexts.
1686 * @rcd: the context we are setting up.
1688 * Allocate the eager TID buffers and program them into hip.
1689 * They are no longer completely contiguous, we do multiple allocation
1690 * calls. Otherwise we get the OOM code involved, by asking for too
1691 * much per call, with disastrous results on some kernels.
1693 int qib_setup_eagerbufs(struct qib_ctxtdata *rcd)
1695 struct qib_devdata *dd = rcd->dd;
1696 unsigned e, egrcnt, egrperchunk, chunk, egrsize, egroff;
1702 * GFP_USER, but without GFP_FS, so buffer cache can be
1703 * coalesced (we hope); otherwise, even at order 4,
1704 * heavy filesystem activity makes these fail, and we can
1705 * use compound pages.
1707 gfp_flags = __GFP_RECLAIM | __GFP_IO | __GFP_COMP;
1709 egrcnt = rcd->rcvegrcnt;
1710 egroff = rcd->rcvegr_tid_base;
1711 egrsize = dd->rcvegrbufsize;
1713 chunk = rcd->rcvegrbuf_chunks;
1714 egrperchunk = rcd->rcvegrbufs_perchunk;
1715 size = rcd->rcvegrbuf_size;
1716 if (!rcd->rcvegrbuf) {
1718 kzalloc_node(chunk * sizeof(rcd->rcvegrbuf[0]),
1719 GFP_KERNEL, rcd->node_id);
1720 if (!rcd->rcvegrbuf)
1723 if (!rcd->rcvegrbuf_phys) {
1724 rcd->rcvegrbuf_phys =
1725 kmalloc_node(chunk * sizeof(rcd->rcvegrbuf_phys[0]),
1726 GFP_KERNEL, rcd->node_id);
1727 if (!rcd->rcvegrbuf_phys)
1728 goto bail_rcvegrbuf;
1730 for (e = 0; e < rcd->rcvegrbuf_chunks; e++) {
1731 if (rcd->rcvegrbuf[e])
1734 old_node_id = dev_to_node(&dd->pcidev->dev);
1735 set_dev_node(&dd->pcidev->dev, rcd->node_id);
1737 dma_alloc_coherent(&dd->pcidev->dev, size,
1738 &rcd->rcvegrbuf_phys[e],
1740 set_dev_node(&dd->pcidev->dev, old_node_id);
1741 if (!rcd->rcvegrbuf[e])
1742 goto bail_rcvegrbuf_phys;
1745 rcd->rcvegr_phys = rcd->rcvegrbuf_phys[0];
1747 for (e = chunk = 0; chunk < rcd->rcvegrbuf_chunks; chunk++) {
1748 dma_addr_t pa = rcd->rcvegrbuf_phys[chunk];
1751 /* clear for security and sanity on each use */
1752 memset(rcd->rcvegrbuf[chunk], 0, size);
1754 for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) {
1755 dd->f_put_tid(dd, e + egroff +
1760 RCVHQ_RCV_TYPE_EAGER, pa);
1763 cond_resched(); /* don't hog the cpu */
1768 bail_rcvegrbuf_phys:
1769 for (e = 0; e < rcd->rcvegrbuf_chunks && rcd->rcvegrbuf[e]; e++)
1770 dma_free_coherent(&dd->pcidev->dev, size,
1771 rcd->rcvegrbuf[e], rcd->rcvegrbuf_phys[e]);
1772 kfree(rcd->rcvegrbuf_phys);
1773 rcd->rcvegrbuf_phys = NULL;
1775 kfree(rcd->rcvegrbuf);
1776 rcd->rcvegrbuf = NULL;
1782 * Note: Changes to this routine should be mirrored
1783 * for the diagnostics routine qib_remap_ioaddr32().
1784 * There is also related code for VL15 buffers in qib_init_7322_variables().
1785 * The teardown code that unmaps is in qib_pcie_ddcleanup()
1787 int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen)
1789 u64 __iomem *qib_kregbase = NULL;
1790 void __iomem *qib_piobase = NULL;
1791 u64 __iomem *qib_userbase = NULL;
1793 u64 qib_pio2koffset = dd->piobufbase & 0xffffffff;
1794 u64 qib_pio4koffset = dd->piobufbase >> 32;
1795 u64 qib_pio2klen = dd->piobcnt2k * dd->palign;
1796 u64 qib_pio4klen = dd->piobcnt4k * dd->align4k;
1797 u64 qib_physaddr = dd->physaddr;
1799 u64 qib_userlen = 0;
1802 * Free the old mapping because the kernel will try to reuse the
1803 * old mapping and not create a new mapping with the
1804 * write combining attribute.
1806 iounmap(dd->kregbase);
1807 dd->kregbase = NULL;
1810 * Assumes chip address space looks like:
1811 * - kregs + sregs + cregs + uregs (in any order)
1812 * - piobufs (2K and 4K bufs in either order)
1814 * - kregs + sregs + cregs (in any order)
1815 * - piobufs (2K and 4K bufs in either order)
1818 if (dd->piobcnt4k == 0) {
1819 qib_kreglen = qib_pio2koffset;
1820 qib_piolen = qib_pio2klen;
1821 } else if (qib_pio2koffset < qib_pio4koffset) {
1822 qib_kreglen = qib_pio2koffset;
1823 qib_piolen = qib_pio4koffset + qib_pio4klen - qib_kreglen;
1825 qib_kreglen = qib_pio4koffset;
1826 qib_piolen = qib_pio2koffset + qib_pio2klen - qib_kreglen;
1828 qib_piolen += vl15buflen;
1829 /* Map just the configured ports (not all hw ports) */
1830 if (dd->uregbase > qib_kreglen)
1831 qib_userlen = dd->ureg_align * dd->cfgctxts;
1833 /* Sanity checks passed, now create the new mappings */
1834 qib_kregbase = ioremap_nocache(qib_physaddr, qib_kreglen);
1838 qib_piobase = ioremap_wc(qib_physaddr + qib_kreglen, qib_piolen);
1843 qib_userbase = ioremap_nocache(qib_physaddr + dd->uregbase,
1849 dd->kregbase = qib_kregbase;
1850 dd->kregend = (u64 __iomem *)
1851 ((char __iomem *) qib_kregbase + qib_kreglen);
1852 dd->piobase = qib_piobase;
1853 dd->pio2kbase = (void __iomem *)
1854 (((char __iomem *) dd->piobase) +
1855 qib_pio2koffset - qib_kreglen);
1857 dd->pio4kbase = (void __iomem *)
1858 (((char __iomem *) dd->piobase) +
1859 qib_pio4koffset - qib_kreglen);
1861 /* ureg will now be accessed relative to dd->userbase */
1862 dd->userbase = qib_userbase;
1866 iounmap(qib_piobase);
1868 iounmap(qib_kregbase);