1 /* QLogic qedr NIC Driver
2 * Copyright (c) 2015-2016 QLogic Corporation
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <linux/idr.h>
37 #include <rdma/ib_addr.h>
38 #include <linux/qed/qed_if.h>
39 #include <linux/qed/qed_chain.h>
40 #include <linux/qed/qed_rdma_if.h>
41 #include <linux/qed/qede_rdma.h>
42 #include <linux/qed/roce_common.h>
43 #include "qedr_hsi_rdma.h"
45 #define QEDR_NODE_DESC "QLogic 579xx RoCE HCA"
46 #define DP_NAME(dev) ((dev)->ibdev.name)
47 #define IS_IWARP(_dev) ((_dev)->rdma_type == QED_RDMA_TYPE_IWARP)
48 #define IS_ROCE(_dev) ((_dev)->rdma_type == QED_RDMA_TYPE_ROCE)
50 #define DP_DEBUG(dev, module, fmt, ...) \
51 pr_debug("(%s) " module ": " fmt, \
52 DP_NAME(dev) ? DP_NAME(dev) : "", ## __VA_ARGS__)
54 #define QEDR_MSG_INIT "INIT"
55 #define QEDR_MSG_MISC "MISC"
56 #define QEDR_MSG_CQ " CQ"
57 #define QEDR_MSG_MR " MR"
58 #define QEDR_MSG_RQ " RQ"
59 #define QEDR_MSG_SQ " SQ"
60 #define QEDR_MSG_QP " QP"
61 #define QEDR_MSG_SRQ " SRQ"
62 #define QEDR_MSG_GSI " GSI"
63 #define QEDR_MSG_IWARP " IW"
65 #define QEDR_CQ_MAGIC_NUMBER (0x11223344)
67 #define FW_PAGE_SIZE (RDMA_RING_PAGE_SIZE)
68 #define FW_PAGE_SHIFT (12)
75 struct qed_sb_info *sb;
82 #define QEDR_MAX_SGID 128
84 struct qedr_device_attr {
96 u8 max_qp_resp_rd_atomic_resc;
97 u8 max_qp_req_rd_atomic_resc;
98 u64 max_dev_resp_rd_atomic_resc;
106 u32 max_mr_mw_fmr_pbl;
107 u64 max_mr_mw_fmr_size;
120 u32 bad_pkey_counter;
121 struct qed_rdma_events events;
124 #define QEDR_ENET_STATE_BIT (0)
127 spinlock_t idr_lock; /* Protect idr data-structure */
132 struct ib_device ibdev;
133 struct qed_dev *cdev;
134 struct pci_dev *pdev;
135 struct net_device *ndev;
137 enum ib_atomic_cap atomic_cap;
140 struct qedr_device_attr attr;
142 const struct qed_rdma_ops *ops;
143 struct qed_int_info int_info;
145 struct qed_sb_info *sb_array;
146 struct qedr_cnq *cnq_array;
150 void __iomem *db_addr;
155 union ib_gid *sgid_tbl;
157 /* Lock for sgid table */
158 spinlock_t sgid_lock;
168 u8 gsi_ll2_mac_address[ETH_ALEN];
170 struct qedr_cq *gsi_sqcq;
171 struct qedr_cq *gsi_rqcq;
172 struct qedr_qp *gsi_qp;
173 enum qed_rdma_type rdma_type;
174 struct qedr_idr qpidr;
175 struct qedr_idr srqidr;
176 struct workqueue_struct *iwarp_wq;
179 unsigned long enet_state;
184 #define QEDR_MAX_SQ_PBL (0x8000)
185 #define QEDR_MAX_SQ_PBL_ENTRIES (0x10000 / sizeof(void *))
186 #define QEDR_SQE_ELEMENT_SIZE (sizeof(struct rdma_sq_sge))
187 #define QEDR_MAX_SQE_ELEMENTS_PER_SQE (ROCE_REQ_MAX_SINGLE_SQ_WQE_SIZE / \
188 QEDR_SQE_ELEMENT_SIZE)
189 #define QEDR_MAX_SQE_ELEMENTS_PER_PAGE ((RDMA_RING_PAGE_SIZE) / \
190 QEDR_SQE_ELEMENT_SIZE)
191 #define QEDR_MAX_SQE ((QEDR_MAX_SQ_PBL_ENTRIES) *\
192 (RDMA_RING_PAGE_SIZE) / \
193 (QEDR_SQE_ELEMENT_SIZE) /\
194 (QEDR_MAX_SQE_ELEMENTS_PER_SQE))
196 #define QEDR_MAX_RQ_PBL (0x2000)
197 #define QEDR_MAX_RQ_PBL_ENTRIES (0x10000 / sizeof(void *))
198 #define QEDR_RQE_ELEMENT_SIZE (sizeof(struct rdma_rq_sge))
199 #define QEDR_MAX_RQE_ELEMENTS_PER_RQE (RDMA_MAX_SGE_PER_RQ_WQE)
200 #define QEDR_MAX_RQE_ELEMENTS_PER_PAGE ((RDMA_RING_PAGE_SIZE) / \
201 QEDR_RQE_ELEMENT_SIZE)
202 #define QEDR_MAX_RQE ((QEDR_MAX_RQ_PBL_ENTRIES) *\
203 (RDMA_RING_PAGE_SIZE) / \
204 (QEDR_RQE_ELEMENT_SIZE) /\
205 (QEDR_MAX_RQE_ELEMENTS_PER_RQE))
207 #define QEDR_CQE_SIZE (sizeof(union rdma_cqe))
208 #define QEDR_MAX_CQE_PBL_SIZE (512 * 1024)
209 #define QEDR_MAX_CQE_PBL_ENTRIES (((QEDR_MAX_CQE_PBL_SIZE) / \
211 #define QEDR_MAX_CQES ((u32)((QEDR_MAX_CQE_PBL_ENTRIES) * \
212 (QED_CHAIN_PAGE_SIZE) / QEDR_CQE_SIZE))
214 #define QEDR_ROCE_MAX_CNQ_SIZE (0x4000)
216 #define QEDR_MAX_PORT (1)
217 #define QEDR_PORT (1)
219 #define QEDR_UVERBS(CMD_NAME) (1ull << IB_USER_VERBS_CMD_##CMD_NAME)
221 #define QEDR_ROCE_PKEY_MAX 1
222 #define QEDR_ROCE_PKEY_TABLE_LEN 1
223 #define QEDR_ROCE_PKEY_DEFAULT 0xffff
226 struct list_head list_entry;
231 struct qedr_ucontext {
232 struct ib_ucontext ibucontext;
233 struct qedr_dev *dev;
240 struct list_head mm_head;
242 /* Lock to protect mm list */
243 struct mutex mm_list_lock;
247 struct rdma_pwm_val32_data data;
257 struct qedr_pbl_info {
266 struct ib_umem *umem;
267 struct qedr_pbl_info pbl_info;
268 struct qedr_pbl *pbl_tbl;
276 enum qedr_cq_type cq_type;
281 /* Lock to protect multiplem CQ's */
284 struct qed_chain pbl;
286 void __iomem *db_addr;
290 union rdma_cqe *latest_cqe;
291 union rdma_cqe *toggle_cqe;
303 struct qedr_ucontext *uctx;
311 struct list_head entry;
315 struct rdma_pwm_val16_data data;
319 struct qedr_qp_hwq_info {
321 struct qed_chain pbl;
334 union db_prod32 db_data;
336 void __iomem *iwarp_db2;
337 union db_prod32 iwarp_db2_data;
340 #define QEDR_INC_SW_IDX(p_info, index) \
342 p_info->index = (p_info->index + 1) & \
343 qed_chain_get_capacity(p_info->pbl) \
346 struct qedr_srq_hwq_info {
349 struct qed_chain pbl;
354 atomic_t wr_cons_cnt;
357 struct rdma_srq_producers *virt_prod_pair_addr;
358 dma_addr_t phy_prod_pair_addr;
363 struct qedr_dev *dev;
365 struct qedr_userq usrq;
366 struct qedr_srq_hwq_info hw_srq;
367 struct ib_umem *prod_umem;
370 /* lock to protect srq recv post */
374 enum qedr_qp_err_bitmap {
375 QEDR_QP_ERR_SQ_FULL = 1,
376 QEDR_QP_ERR_RQ_FULL = 2,
377 QEDR_QP_ERR_BAD_SR = 4,
378 QEDR_QP_ERR_BAD_RR = 8,
379 QEDR_QP_ERR_SQ_PBL_FULL = 16,
380 QEDR_QP_ERR_RQ_PBL_FULL = 32,
384 struct ib_qp ibqp; /* must be first */
385 struct qedr_dev *dev;
386 struct qedr_iw_ep *ep;
387 struct qedr_qp_hwq_info sq;
388 struct qedr_qp_hwq_info rq;
394 struct qedr_cq *sq_cq;
395 struct qedr_cq *rq_cq;
396 struct qedr_srq *srq;
397 enum qed_roce_qp_state state;
400 enum ib_qp_type qp_type;
401 struct qed_rdma_qp *qed_qp;
411 /* Relevant to qps created from kernel space only (ULPs) */
420 enum ib_wc_opcode opcode;
424 dma_addr_t icrc_mapping;
432 struct ib_sge sg_list[RDMA_MAX_SGE_PER_RQ_WQE];
440 /* Relevant to qps created from user space only (applications) */
441 struct qedr_userq usq;
442 struct qedr_userq urq;
449 struct rdma_ah_attr attr;
460 struct qedr_pbl *pbl_table;
461 struct qedr_pbl_info pbl_info;
462 struct list_head free_pbl_list;
463 struct list_head inuse_pbl_list;
465 u32 completed_handled;
470 struct ib_umem *umem;
472 struct qed_rdma_register_tid_in_params hw_mr;
473 enum qedr_mr_type type;
475 struct qedr_dev *dev;
482 #define SET_FIELD2(value, name, flag) ((value) |= ((flag) << (name ## _SHIFT)))
484 #define QEDR_RESP_IMM (RDMA_CQE_RESPONDER_IMM_FLG_MASK << \
485 RDMA_CQE_RESPONDER_IMM_FLG_SHIFT)
486 #define QEDR_RESP_RDMA (RDMA_CQE_RESPONDER_RDMA_FLG_MASK << \
487 RDMA_CQE_RESPONDER_RDMA_FLG_SHIFT)
488 #define QEDR_RESP_INV (RDMA_CQE_RESPONDER_INV_FLG_MASK << \
489 RDMA_CQE_RESPONDER_INV_FLG_SHIFT)
491 static inline void qedr_inc_sw_cons(struct qedr_qp_hwq_info *info)
493 info->cons = (info->cons + 1) % info->max_wr;
497 static inline void qedr_inc_sw_prod(struct qedr_qp_hwq_info *info)
499 info->prod = (info->prod + 1) % info->max_wr;
502 static inline int qedr_get_dmac(struct qedr_dev *dev,
503 struct rdma_ah_attr *ah_attr, u8 *mac_addr)
505 union ib_gid zero_sgid = { { 0 } };
507 const struct ib_global_route *grh = rdma_ah_read_grh(ah_attr);
510 if (!memcmp(&grh->dgid, &zero_sgid, sizeof(union ib_gid))) {
511 DP_ERR(dev, "Local port GID not supported\n");
512 eth_zero_addr(mac_addr);
516 memcpy(&in6, grh->dgid.raw, sizeof(in6));
517 dmac = rdma_ah_retrieve_dmac(ah_attr);
520 ether_addr_copy(mac_addr, dmac);
525 struct qedr_iw_listener {
526 struct qedr_dev *dev;
527 struct iw_cm_id *cm_id;
533 struct qedr_dev *dev;
534 struct iw_cm_id *cm_id;
541 struct qedr_ucontext *get_qedr_ucontext(struct ib_ucontext *ibucontext)
543 return container_of(ibucontext, struct qedr_ucontext, ibucontext);
546 static inline struct qedr_dev *get_qedr_dev(struct ib_device *ibdev)
548 return container_of(ibdev, struct qedr_dev, ibdev);
551 static inline struct qedr_pd *get_qedr_pd(struct ib_pd *ibpd)
553 return container_of(ibpd, struct qedr_pd, ibpd);
556 static inline struct qedr_cq *get_qedr_cq(struct ib_cq *ibcq)
558 return container_of(ibcq, struct qedr_cq, ibcq);
561 static inline struct qedr_qp *get_qedr_qp(struct ib_qp *ibqp)
563 return container_of(ibqp, struct qedr_qp, ibqp);
566 static inline struct qedr_ah *get_qedr_ah(struct ib_ah *ibah)
568 return container_of(ibah, struct qedr_ah, ibah);
571 static inline struct qedr_mr *get_qedr_mr(struct ib_mr *ibmr)
573 return container_of(ibmr, struct qedr_mr, ibmr);
576 static inline struct qedr_srq *get_qedr_srq(struct ib_srq *ibsrq)
578 return container_of(ibsrq, struct qedr_srq, ibsrq);