2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/slab.h>
37 #include <linux/errno.h>
38 #include <linux/netdevice.h>
39 #include <linux/inetdevice.h>
40 #include <linux/rtnetlink.h>
41 #include <linux/if_vlan.h>
42 #include <linux/sched/mm.h>
43 #include <linux/sched/task.h>
46 #include <net/addrconf.h>
47 #include <net/devlink.h>
49 #include <rdma/ib_smi.h>
50 #include <rdma/ib_user_verbs.h>
51 #include <rdma/ib_addr.h>
52 #include <rdma/ib_cache.h>
54 #include <net/bonding.h>
56 #include <linux/mlx4/driver.h>
57 #include <linux/mlx4/cmd.h>
58 #include <linux/mlx4/qp.h>
61 #include <rdma/mlx4-abi.h>
63 #define DRV_NAME MLX4_IB_DRV_NAME
64 #define DRV_VERSION "4.0-0"
66 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
67 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
68 #define MLX4_IB_CARD_REV_A0 0xA0
70 MODULE_AUTHOR("Roland Dreier");
71 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
72 MODULE_LICENSE("Dual BSD/GPL");
74 int mlx4_ib_sm_guid_assign = 0;
75 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
76 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
78 static const char mlx4_ib_version[] =
79 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
82 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
83 static enum rdma_link_layer mlx4_ib_port_link_layer(struct ib_device *device,
86 static struct workqueue_struct *wq;
88 static void init_query_mad(struct ib_smp *mad)
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
96 static int check_flow_steering_support(struct mlx4_dev *dev)
98 int eth_num_ports = 0;
101 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
105 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
109 dmfs &= (!ib_num_ports ||
110 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
113 if (ib_num_ports && mlx4_is_mfunc(dev)) {
114 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
121 static int num_ib_ports(struct mlx4_dev *dev)
126 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
132 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num)
134 struct mlx4_ib_dev *ibdev = to_mdev(device);
135 struct net_device *dev;
138 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
141 if (mlx4_is_bonded(ibdev->dev)) {
142 struct net_device *upper = NULL;
144 upper = netdev_master_upper_dev_get_rcu(dev);
146 struct net_device *active;
148 active = bond_option_active_slave_get_rcu(netdev_priv(upper));
161 static int mlx4_ib_update_gids_v1(struct gid_entry *gids,
162 struct mlx4_ib_dev *ibdev,
165 struct mlx4_cmd_mailbox *mailbox;
167 struct mlx4_dev *dev = ibdev->dev;
169 union ib_gid *gid_tbl;
171 mailbox = mlx4_alloc_cmd_mailbox(dev);
175 gid_tbl = mailbox->buf;
177 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
178 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
180 err = mlx4_cmd(dev, mailbox->dma,
181 MLX4_SET_PORT_GID_TABLE << 8 | port_num,
182 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
184 if (mlx4_is_bonded(dev))
185 err += mlx4_cmd(dev, mailbox->dma,
186 MLX4_SET_PORT_GID_TABLE << 8 | 2,
187 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
190 mlx4_free_cmd_mailbox(dev, mailbox);
194 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids,
195 struct mlx4_ib_dev *ibdev,
198 struct mlx4_cmd_mailbox *mailbox;
200 struct mlx4_dev *dev = ibdev->dev;
211 mailbox = mlx4_alloc_cmd_mailbox(dev);
215 gid_tbl = mailbox->buf;
216 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
217 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid));
218 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
219 gid_tbl[i].version = 2;
220 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid))
225 err = mlx4_cmd(dev, mailbox->dma,
226 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num,
227 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
229 if (mlx4_is_bonded(dev))
230 err += mlx4_cmd(dev, mailbox->dma,
231 MLX4_SET_PORT_ROCE_ADDR << 8 | 2,
232 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
235 mlx4_free_cmd_mailbox(dev, mailbox);
239 static int mlx4_ib_update_gids(struct gid_entry *gids,
240 struct mlx4_ib_dev *ibdev,
243 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
244 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num);
246 return mlx4_ib_update_gids_v1(gids, ibdev, port_num);
249 static void free_gid_entry(struct gid_entry *entry)
251 memset(&entry->gid, 0, sizeof(entry->gid));
256 static int mlx4_ib_add_gid(const struct ib_gid_attr *attr, void **context)
258 struct mlx4_ib_dev *ibdev = to_mdev(attr->device);
259 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
260 struct mlx4_port_gid_table *port_gid_table;
261 int free = -1, found = -1;
265 struct gid_entry *gids = NULL;
266 u16 vlan_id = 0xffff;
269 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num))
272 if (attr->port_num > MLX4_MAX_PORTS)
278 ret = rdma_read_gid_l2_fields(attr, &vlan_id, &mac[0]);
281 port_gid_table = &iboe->gids[attr->port_num - 1];
282 spin_lock_bh(&iboe->lock);
283 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
284 if (!memcmp(&port_gid_table->gids[i].gid,
285 &attr->gid, sizeof(attr->gid)) &&
286 port_gid_table->gids[i].gid_type == attr->gid_type &&
287 port_gid_table->gids[i].vlan_id == vlan_id) {
291 if (free < 0 && rdma_is_zero_gid(&port_gid_table->gids[i].gid))
292 free = i; /* HW has space */
299 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
300 if (!port_gid_table->gids[free].ctx) {
303 *context = port_gid_table->gids[free].ctx;
304 memcpy(&port_gid_table->gids[free].gid,
305 &attr->gid, sizeof(attr->gid));
306 port_gid_table->gids[free].gid_type = attr->gid_type;
307 port_gid_table->gids[free].vlan_id = vlan_id;
308 port_gid_table->gids[free].ctx->real_index = free;
309 port_gid_table->gids[free].ctx->refcount = 1;
314 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
318 if (!ret && hw_update) {
319 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids),
324 free_gid_entry(&port_gid_table->gids[free]);
326 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
327 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
328 gids[i].gid_type = port_gid_table->gids[i].gid_type;
332 spin_unlock_bh(&iboe->lock);
334 if (!ret && hw_update) {
335 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num);
337 spin_lock_bh(&iboe->lock);
339 free_gid_entry(&port_gid_table->gids[free]);
340 spin_unlock_bh(&iboe->lock);
348 static int mlx4_ib_del_gid(const struct ib_gid_attr *attr, void **context)
350 struct gid_cache_context *ctx = *context;
351 struct mlx4_ib_dev *ibdev = to_mdev(attr->device);
352 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
353 struct mlx4_port_gid_table *port_gid_table;
356 struct gid_entry *gids = NULL;
358 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num))
361 if (attr->port_num > MLX4_MAX_PORTS)
364 port_gid_table = &iboe->gids[attr->port_num - 1];
365 spin_lock_bh(&iboe->lock);
368 if (!ctx->refcount) {
369 unsigned int real_index = ctx->real_index;
371 free_gid_entry(&port_gid_table->gids[real_index]);
375 if (!ret && hw_update) {
378 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids),
383 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
385 &port_gid_table->gids[i].gid,
386 sizeof(union ib_gid));
388 port_gid_table->gids[i].gid_type;
392 spin_unlock_bh(&iboe->lock);
394 if (!ret && hw_update) {
395 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num);
401 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
402 const struct ib_gid_attr *attr)
404 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
405 struct gid_cache_context *ctx = NULL;
406 struct mlx4_port_gid_table *port_gid_table;
407 int real_index = -EINVAL;
410 u8 port_num = attr->port_num;
412 if (port_num > MLX4_MAX_PORTS)
415 if (mlx4_is_bonded(ibdev->dev))
418 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
421 spin_lock_irqsave(&iboe->lock, flags);
422 port_gid_table = &iboe->gids[port_num - 1];
424 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
425 if (!memcmp(&port_gid_table->gids[i].gid,
426 &attr->gid, sizeof(attr->gid)) &&
427 attr->gid_type == port_gid_table->gids[i].gid_type) {
428 ctx = port_gid_table->gids[i].ctx;
432 real_index = ctx->real_index;
433 spin_unlock_irqrestore(&iboe->lock, flags);
437 static int mlx4_ib_query_device(struct ib_device *ibdev,
438 struct ib_device_attr *props,
439 struct ib_udata *uhw)
441 struct mlx4_ib_dev *dev = to_mdev(ibdev);
442 struct ib_smp *in_mad = NULL;
443 struct ib_smp *out_mad = NULL;
446 struct mlx4_uverbs_ex_query_device cmd;
447 struct mlx4_uverbs_ex_query_device_resp resp = {};
448 struct mlx4_clock_params clock_params;
451 if (uhw->inlen < sizeof(cmd))
454 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
465 resp.response_length = offsetof(typeof(resp), response_length) +
466 sizeof(resp.response_length);
467 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
468 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
470 if (!in_mad || !out_mad)
473 init_query_mad(in_mad);
474 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
476 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
477 1, NULL, NULL, in_mad, out_mad);
481 memset(props, 0, sizeof *props);
483 have_ib_ports = num_ib_ports(dev->dev);
485 props->fw_ver = dev->dev->caps.fw_ver;
486 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
487 IB_DEVICE_PORT_ACTIVE_EVENT |
488 IB_DEVICE_SYS_IMAGE_GUID |
489 IB_DEVICE_RC_RNR_NAK_GEN |
490 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
491 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
492 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
493 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
494 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
495 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
496 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
497 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
498 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
499 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
500 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
501 if (dev->dev->caps.max_gso_sz &&
502 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
503 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
504 props->device_cap_flags |= IB_DEVICE_UD_TSO;
505 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
506 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
507 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
508 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
509 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
510 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
511 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
512 props->device_cap_flags |= IB_DEVICE_XRC;
513 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
514 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
515 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
516 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
517 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
519 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
521 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
522 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
524 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
526 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
528 props->vendor_part_id = dev->dev->persist->pdev->device;
529 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
530 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
532 props->max_mr_size = ~0ull;
533 props->page_size_cap = dev->dev->caps.page_size_cap;
534 props->max_qp = dev->dev->quotas.qp;
535 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
536 props->max_send_sge =
537 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg);
538 props->max_recv_sge =
539 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg);
540 props->max_sge_rd = MLX4_MAX_SGE_RD;
541 props->max_cq = dev->dev->quotas.cq;
542 props->max_cqe = dev->dev->caps.max_cqes;
543 props->max_mr = dev->dev->quotas.mpt;
544 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
545 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
546 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
547 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
548 props->max_srq = dev->dev->quotas.srq;
549 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
550 props->max_srq_sge = dev->dev->caps.max_srq_sge;
551 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
552 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
553 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
554 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
555 props->masked_atomic_cap = props->atomic_cap;
556 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
557 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
558 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
559 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
560 props->max_mcast_grp;
561 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
562 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
563 props->max_ah = INT_MAX;
565 if (mlx4_ib_port_link_layer(ibdev, 1) == IB_LINK_LAYER_ETHERNET ||
566 mlx4_ib_port_link_layer(ibdev, 2) == IB_LINK_LAYER_ETHERNET) {
567 if (dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) {
568 props->rss_caps.max_rwq_indirection_tables =
570 props->rss_caps.max_rwq_indirection_table_size =
571 dev->dev->caps.max_rss_tbl_sz;
572 props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET;
573 props->max_wq_type_rq = props->max_qp;
576 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
577 props->raw_packet_caps |= IB_RAW_PACKET_CAP_SCATTER_FCS;
580 props->cq_caps.max_cq_moderation_count = MLX4_MAX_CQ_COUNT;
581 props->cq_caps.max_cq_moderation_period = MLX4_MAX_CQ_PERIOD;
583 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
584 resp.response_length += sizeof(resp.hca_core_clock_offset);
585 if (!mlx4_get_internal_clock_params(dev->dev, &clock_params)) {
586 resp.comp_mask |= MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET;
587 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
591 if (uhw->outlen >= resp.response_length +
592 sizeof(resp.max_inl_recv_sz)) {
593 resp.response_length += sizeof(resp.max_inl_recv_sz);
594 resp.max_inl_recv_sz = dev->dev->caps.max_rq_sg *
595 sizeof(struct mlx4_wqe_data_seg);
598 if (offsetofend(typeof(resp), rss_caps) <= uhw->outlen) {
599 if (props->rss_caps.supported_qpts) {
600 resp.rss_caps.rx_hash_function =
601 MLX4_IB_RX_HASH_FUNC_TOEPLITZ;
603 resp.rss_caps.rx_hash_fields_mask =
604 MLX4_IB_RX_HASH_SRC_IPV4 |
605 MLX4_IB_RX_HASH_DST_IPV4 |
606 MLX4_IB_RX_HASH_SRC_IPV6 |
607 MLX4_IB_RX_HASH_DST_IPV6 |
608 MLX4_IB_RX_HASH_SRC_PORT_TCP |
609 MLX4_IB_RX_HASH_DST_PORT_TCP |
610 MLX4_IB_RX_HASH_SRC_PORT_UDP |
611 MLX4_IB_RX_HASH_DST_PORT_UDP;
613 if (dev->dev->caps.tunnel_offload_mode ==
614 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
615 resp.rss_caps.rx_hash_fields_mask |=
616 MLX4_IB_RX_HASH_INNER;
618 resp.response_length = offsetof(typeof(resp), rss_caps) +
619 sizeof(resp.rss_caps);
622 if (offsetofend(typeof(resp), tso_caps) <= uhw->outlen) {
623 if (dev->dev->caps.max_gso_sz &&
624 ((mlx4_ib_port_link_layer(ibdev, 1) ==
625 IB_LINK_LAYER_ETHERNET) ||
626 (mlx4_ib_port_link_layer(ibdev, 2) ==
627 IB_LINK_LAYER_ETHERNET))) {
628 resp.tso_caps.max_tso = dev->dev->caps.max_gso_sz;
629 resp.tso_caps.supported_qpts |=
630 1 << IB_QPT_RAW_PACKET;
632 resp.response_length = offsetof(typeof(resp), tso_caps) +
633 sizeof(resp.tso_caps);
637 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
648 static enum rdma_link_layer
649 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
651 struct mlx4_dev *dev = to_mdev(device)->dev;
653 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
654 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
657 static int ib_link_query_port(struct ib_device *ibdev, u8 port,
658 struct ib_port_attr *props, int netw_view)
660 struct ib_smp *in_mad = NULL;
661 struct ib_smp *out_mad = NULL;
662 int ext_active_speed;
663 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
666 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
667 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
668 if (!in_mad || !out_mad)
671 init_query_mad(in_mad);
672 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
673 in_mad->attr_mod = cpu_to_be32(port);
675 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
676 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
678 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
684 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
685 props->lmc = out_mad->data[34] & 0x7;
686 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
687 props->sm_sl = out_mad->data[36] & 0xf;
688 props->state = out_mad->data[32] & 0xf;
689 props->phys_state = out_mad->data[33] >> 4;
690 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
692 props->gid_tbl_len = out_mad->data[50];
694 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
695 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
696 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
697 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
698 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
699 props->active_width = out_mad->data[31] & 0xf;
700 props->active_speed = out_mad->data[35] >> 4;
701 props->max_mtu = out_mad->data[41] & 0xf;
702 props->active_mtu = out_mad->data[36] >> 4;
703 props->subnet_timeout = out_mad->data[51] & 0x1f;
704 props->max_vl_num = out_mad->data[37] >> 4;
705 props->init_type_reply = out_mad->data[41] >> 4;
707 /* Check if extended speeds (EDR/FDR/...) are supported */
708 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
709 ext_active_speed = out_mad->data[62] >> 4;
711 switch (ext_active_speed) {
713 props->active_speed = IB_SPEED_FDR;
716 props->active_speed = IB_SPEED_EDR;
721 /* If reported active speed is QDR, check if is FDR-10 */
722 if (props->active_speed == IB_SPEED_QDR) {
723 init_query_mad(in_mad);
724 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
725 in_mad->attr_mod = cpu_to_be32(port);
727 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
728 NULL, NULL, in_mad, out_mad);
732 /* Checking LinkSpeedActive for FDR-10 */
733 if (out_mad->data[15] & 0x1)
734 props->active_speed = IB_SPEED_FDR10;
737 /* Avoid wrong speed value returned by FW if the IB link is down. */
738 if (props->state == IB_PORT_DOWN)
739 props->active_speed = IB_SPEED_SDR;
747 static u8 state_to_phys_state(enum ib_port_state state)
749 return state == IB_PORT_ACTIVE ?
750 IB_PORT_PHYS_STATE_LINK_UP : IB_PORT_PHYS_STATE_DISABLED;
753 static int eth_link_query_port(struct ib_device *ibdev, u8 port,
754 struct ib_port_attr *props)
757 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
758 struct mlx4_ib_iboe *iboe = &mdev->iboe;
759 struct net_device *ndev;
761 struct mlx4_cmd_mailbox *mailbox;
763 int is_bonded = mlx4_is_bonded(mdev->dev);
765 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
767 return PTR_ERR(mailbox);
769 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
770 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
775 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ||
776 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
777 IB_WIDTH_4X : IB_WIDTH_1X;
778 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
779 IB_SPEED_FDR : IB_SPEED_QDR;
780 props->port_cap_flags = IB_PORT_CM_SUP;
781 props->ip_gids = true;
782 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
783 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
784 if (mdev->dev->caps.pkey_table_len[port])
785 props->pkey_tbl_len = 1;
786 props->max_mtu = IB_MTU_4096;
787 props->max_vl_num = 2;
788 props->state = IB_PORT_DOWN;
789 props->phys_state = state_to_phys_state(props->state);
790 props->active_mtu = IB_MTU_256;
791 spin_lock_bh(&iboe->lock);
792 ndev = iboe->netdevs[port - 1];
793 if (ndev && is_bonded) {
794 rcu_read_lock(); /* required to get upper dev */
795 ndev = netdev_master_upper_dev_get_rcu(ndev);
801 tmp = iboe_get_mtu(ndev->mtu);
802 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
804 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
805 IB_PORT_ACTIVE : IB_PORT_DOWN;
806 props->phys_state = state_to_phys_state(props->state);
808 spin_unlock_bh(&iboe->lock);
810 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
814 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
815 struct ib_port_attr *props, int netw_view)
819 /* props being zeroed by the caller, avoid zeroing it here */
821 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
822 ib_link_query_port(ibdev, port, props, netw_view) :
823 eth_link_query_port(ibdev, port, props);
828 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
829 struct ib_port_attr *props)
831 /* returns host view */
832 return __mlx4_ib_query_port(ibdev, port, props, 0);
835 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
836 union ib_gid *gid, int netw_view)
838 struct ib_smp *in_mad = NULL;
839 struct ib_smp *out_mad = NULL;
841 struct mlx4_ib_dev *dev = to_mdev(ibdev);
843 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
845 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
846 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
847 if (!in_mad || !out_mad)
850 init_query_mad(in_mad);
851 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
852 in_mad->attr_mod = cpu_to_be32(port);
854 if (mlx4_is_mfunc(dev->dev) && netw_view)
855 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
857 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
861 memcpy(gid->raw, out_mad->data + 8, 8);
863 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
865 /* For any index > 0, return the null guid */
872 init_query_mad(in_mad);
873 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
874 in_mad->attr_mod = cpu_to_be32(index / 8);
876 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
877 NULL, NULL, in_mad, out_mad);
881 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
885 memset(gid->raw + 8, 0, 8);
891 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
894 if (rdma_protocol_ib(ibdev, port))
895 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
899 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl)
901 union sl2vl_tbl_to_u64 sl2vl64;
902 struct ib_smp *in_mad = NULL;
903 struct ib_smp *out_mad = NULL;
904 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
908 if (mlx4_is_slave(to_mdev(ibdev)->dev)) {
913 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
914 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
915 if (!in_mad || !out_mad)
918 init_query_mad(in_mad);
919 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE;
920 in_mad->attr_mod = 0;
922 if (mlx4_is_mfunc(to_mdev(ibdev)->dev))
923 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
925 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
930 for (jj = 0; jj < 8; jj++)
931 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj];
932 *sl2vl_tbl = sl2vl64.sl64;
940 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev)
946 for (i = 1; i <= mdev->dev->caps.num_ports; i++) {
947 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
949 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl);
951 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n",
955 atomic64_set(&mdev->sl2vl[i - 1], sl2vl);
959 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
960 u16 *pkey, int netw_view)
962 struct ib_smp *in_mad = NULL;
963 struct ib_smp *out_mad = NULL;
964 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
967 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
968 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
969 if (!in_mad || !out_mad)
972 init_query_mad(in_mad);
973 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
974 in_mad->attr_mod = cpu_to_be32(index / 32);
976 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
977 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
979 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
984 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
992 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
994 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
997 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
998 struct ib_device_modify *props)
1000 struct mlx4_cmd_mailbox *mailbox;
1001 unsigned long flags;
1003 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
1006 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
1009 if (mlx4_is_slave(to_mdev(ibdev)->dev))
1012 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
1013 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1014 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
1017 * If possible, pass node desc to FW, so it can generate
1018 * a 144 trap. If cmd fails, just ignore.
1020 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
1021 if (IS_ERR(mailbox))
1024 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1025 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
1026 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
1028 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
1033 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
1036 struct mlx4_cmd_mailbox *mailbox;
1039 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
1040 if (IS_ERR(mailbox))
1041 return PTR_ERR(mailbox);
1043 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
1044 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
1045 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
1047 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
1048 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
1051 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
1052 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
1055 mlx4_free_cmd_mailbox(dev->dev, mailbox);
1059 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
1060 struct ib_port_modify *props)
1062 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
1063 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
1064 struct ib_port_attr attr;
1068 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
1069 * of whether port link layer is ETH or IB. For ETH ports, qkey
1070 * violations and port capabilities are not meaningful.
1075 mutex_lock(&mdev->cap_mask_mutex);
1077 err = ib_query_port(ibdev, port, &attr);
1081 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1082 ~props->clr_port_cap_mask;
1084 err = mlx4_ib_SET_PORT(mdev, port,
1085 !!(mask & IB_PORT_RESET_QKEY_CNTR),
1089 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
1093 static int mlx4_ib_alloc_ucontext(struct ib_ucontext *uctx,
1094 struct ib_udata *udata)
1096 struct ib_device *ibdev = uctx->device;
1097 struct mlx4_ib_dev *dev = to_mdev(ibdev);
1098 struct mlx4_ib_ucontext *context = to_mucontext(uctx);
1099 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
1100 struct mlx4_ib_alloc_ucontext_resp resp;
1103 if (!dev->ib_active)
1106 if (ibdev->ops.uverbs_abi_ver ==
1107 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
1108 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
1109 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
1110 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1112 resp.dev_caps = dev->dev->caps.userspace_caps;
1113 resp.qp_tab_size = dev->dev->caps.num_qps;
1114 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
1115 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1116 resp.cqe_size = dev->dev->caps.cqe_size;
1119 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
1123 INIT_LIST_HEAD(&context->db_page_list);
1124 mutex_init(&context->db_page_mutex);
1126 INIT_LIST_HEAD(&context->wqn_ranges_list);
1127 mutex_init(&context->wqn_ranges_mutex);
1129 if (ibdev->ops.uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
1130 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
1132 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
1135 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
1142 static void mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
1144 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1146 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
1149 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext)
1153 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1155 struct mlx4_ib_dev *dev = to_mdev(context->device);
1157 switch (vma->vm_pgoff) {
1159 return rdma_user_mmap_io(context, vma,
1160 to_mucontext(context)->uar.pfn,
1162 pgprot_noncached(vma->vm_page_prot),
1166 if (dev->dev->caps.bf_reg_size == 0)
1168 return rdma_user_mmap_io(
1170 to_mucontext(context)->uar.pfn +
1171 dev->dev->caps.num_uars,
1172 PAGE_SIZE, pgprot_writecombine(vma->vm_page_prot),
1176 struct mlx4_clock_params params;
1179 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms);
1183 return rdma_user_mmap_io(
1185 (pci_resource_start(dev->dev->persist->pdev,
1189 PAGE_SIZE, pgprot_noncached(vma->vm_page_prot),
1198 static int mlx4_ib_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
1200 struct mlx4_ib_pd *pd = to_mpd(ibpd);
1201 struct ib_device *ibdev = ibpd->device;
1204 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1208 if (udata && ib_copy_to_udata(udata, &pd->pdn, sizeof(__u32))) {
1209 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1215 static int mlx4_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata)
1217 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1221 static int mlx4_ib_alloc_xrcd(struct ib_xrcd *ibxrcd, struct ib_udata *udata)
1223 struct mlx4_ib_dev *dev = to_mdev(ibxrcd->device);
1224 struct mlx4_ib_xrcd *xrcd = to_mxrcd(ibxrcd);
1225 struct ib_cq_init_attr cq_attr = {};
1228 if (!(dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1231 err = mlx4_xrcd_alloc(dev->dev, &xrcd->xrcdn);
1235 xrcd->pd = ib_alloc_pd(ibxrcd->device, 0);
1236 if (IS_ERR(xrcd->pd)) {
1237 err = PTR_ERR(xrcd->pd);
1242 xrcd->cq = ib_create_cq(ibxrcd->device, NULL, NULL, xrcd, &cq_attr);
1243 if (IS_ERR(xrcd->cq)) {
1244 err = PTR_ERR(xrcd->cq);
1251 ib_dealloc_pd(xrcd->pd);
1253 mlx4_xrcd_free(dev->dev, xrcd->xrcdn);
1257 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata)
1259 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1260 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1261 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1265 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1267 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1268 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1269 struct mlx4_ib_gid_entry *ge;
1271 ge = kzalloc(sizeof *ge, GFP_KERNEL);
1276 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1277 ge->port = mqp->port;
1281 mutex_lock(&mqp->mutex);
1282 list_add_tail(&ge->list, &mqp->gid_list);
1283 mutex_unlock(&mqp->mutex);
1288 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1289 struct mlx4_ib_counters *ctr_table)
1291 struct counter_index *counter, *tmp_count;
1293 mutex_lock(&ctr_table->mutex);
1294 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1296 if (counter->allocated)
1297 mlx4_counter_free(ibdev->dev, counter->index);
1298 list_del(&counter->list);
1301 mutex_unlock(&ctr_table->mutex);
1304 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1307 struct net_device *ndev;
1313 spin_lock_bh(&mdev->iboe.lock);
1314 ndev = mdev->iboe.netdevs[mqp->port - 1];
1317 spin_unlock_bh(&mdev->iboe.lock);
1327 struct mlx4_ib_steering {
1328 struct list_head list;
1329 struct mlx4_flow_reg_id reg_id;
1333 #define LAST_ETH_FIELD vlan_tag
1334 #define LAST_IB_FIELD sl
1335 #define LAST_IPV4_FIELD dst_ip
1336 #define LAST_TCP_UDP_FIELD src_port
1338 /* Field is the last supported field */
1339 #define FIELDS_NOT_SUPPORTED(filter, field)\
1340 memchr_inv((void *)&filter.field +\
1341 sizeof(filter.field), 0,\
1343 offsetof(typeof(filter), field) -\
1344 sizeof(filter.field))
1346 static int parse_flow_attr(struct mlx4_dev *dev,
1348 union ib_flow_spec *ib_spec,
1349 struct _rule_hw *mlx4_spec)
1351 enum mlx4_net_trans_rule_id type;
1353 switch (ib_spec->type) {
1354 case IB_FLOW_SPEC_ETH:
1355 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD))
1358 type = MLX4_NET_TRANS_RULE_ID_ETH;
1359 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1361 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1363 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1364 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1366 case IB_FLOW_SPEC_IB:
1367 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD))
1370 type = MLX4_NET_TRANS_RULE_ID_IB;
1371 mlx4_spec->ib.l3_qpn =
1372 cpu_to_be32(qp_num);
1373 mlx4_spec->ib.qpn_mask =
1374 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1378 case IB_FLOW_SPEC_IPV4:
1379 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD))
1382 type = MLX4_NET_TRANS_RULE_ID_IPV4;
1383 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1384 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1385 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1386 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1389 case IB_FLOW_SPEC_TCP:
1390 case IB_FLOW_SPEC_UDP:
1391 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD))
1394 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1395 MLX4_NET_TRANS_RULE_ID_TCP :
1396 MLX4_NET_TRANS_RULE_ID_UDP;
1397 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1398 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1399 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1400 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1406 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1407 mlx4_hw_rule_sz(dev, type) < 0)
1409 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1410 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1411 return mlx4_hw_rule_sz(dev, type);
1414 struct default_rules {
1415 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1416 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1417 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1420 static const struct default_rules default_table[] = {
1422 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
1423 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1424 .rules_create_list = {IB_FLOW_SPEC_IB},
1425 .link_layer = IB_LINK_LAYER_INFINIBAND
1429 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1430 struct ib_flow_attr *flow_attr)
1434 const struct default_rules *pdefault_rules = default_table;
1435 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1437 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1438 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1439 memset(&field_types, 0, sizeof(field_types));
1441 if (link_layer != pdefault_rules->link_layer)
1444 ib_flow = flow_attr + 1;
1445 /* we assume the specs are sorted */
1446 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1447 j < flow_attr->num_of_specs; k++) {
1448 union ib_flow_spec *current_flow =
1449 (union ib_flow_spec *)ib_flow;
1451 /* same layer but different type */
1452 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1453 (pdefault_rules->mandatory_fields[k] &
1454 IB_FLOW_SPEC_LAYER_MASK)) &&
1455 (current_flow->type !=
1456 pdefault_rules->mandatory_fields[k]))
1459 /* same layer, try match next one */
1460 if (current_flow->type ==
1461 pdefault_rules->mandatory_fields[k]) {
1464 ((union ib_flow_spec *)ib_flow)->size;
1468 ib_flow = flow_attr + 1;
1469 for (j = 0; j < flow_attr->num_of_specs;
1470 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1471 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1472 /* same layer and same type */
1473 if (((union ib_flow_spec *)ib_flow)->type ==
1474 pdefault_rules->mandatory_not_fields[k])
1483 static int __mlx4_ib_create_default_rules(
1484 struct mlx4_ib_dev *mdev,
1486 const struct default_rules *pdefault_rules,
1487 struct _rule_hw *mlx4_spec) {
1491 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1492 union ib_flow_spec ib_spec = {};
1495 switch (pdefault_rules->rules_create_list[i]) {
1499 case IB_FLOW_SPEC_IB:
1500 ib_spec.type = IB_FLOW_SPEC_IB;
1501 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1508 /* We must put empty rule, qpn is being ignored */
1509 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1512 pr_info("invalid parsing\n");
1516 mlx4_spec = (void *)mlx4_spec + ret;
1522 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1524 enum mlx4_net_trans_promisc_mode flow_type,
1530 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1531 struct mlx4_cmd_mailbox *mailbox;
1532 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1535 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1536 pr_err("Invalid priority value %d\n", flow_attr->priority);
1540 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1543 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1544 if (IS_ERR(mailbox))
1545 return PTR_ERR(mailbox);
1546 ctrl = mailbox->buf;
1548 ctrl->prio = cpu_to_be16(domain | flow_attr->priority);
1549 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1550 ctrl->port = flow_attr->port;
1551 ctrl->qpn = cpu_to_be32(qp->qp_num);
1553 ib_flow = flow_attr + 1;
1554 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1555 /* Add default flows */
1556 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1557 if (default_flow >= 0) {
1558 ret = __mlx4_ib_create_default_rules(
1559 mdev, qp, default_table + default_flow,
1560 mailbox->buf + size);
1562 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1567 for (i = 0; i < flow_attr->num_of_specs; i++) {
1568 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1569 mailbox->buf + size);
1571 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1574 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1578 if (mlx4_is_master(mdev->dev) && flow_type == MLX4_FS_REGULAR &&
1579 flow_attr->num_of_specs == 1) {
1580 struct _rule_hw *rule_header = (struct _rule_hw *)(ctrl + 1);
1581 enum ib_flow_spec_type header_spec =
1582 ((union ib_flow_spec *)(flow_attr + 1))->type;
1584 if (header_spec == IB_FLOW_SPEC_ETH)
1585 mlx4_handle_eth_header_mcast_prio(ctrl, rule_header);
1588 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1589 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1592 pr_err("mcg table is full. Fail to register network rule.\n");
1593 else if (ret == -ENXIO)
1594 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1596 pr_err("Invalid argument. Fail to register network rule.\n");
1598 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1602 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1605 err = mlx4_cmd(dev, reg_id, 0, 0,
1606 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1609 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1614 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1618 union ib_flow_spec *ib_spec;
1619 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1622 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1623 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1624 return 0; /* do nothing */
1626 ib_flow = flow_attr + 1;
1627 ib_spec = (union ib_flow_spec *)ib_flow;
1629 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1630 return 0; /* do nothing */
1632 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1633 flow_attr->port, qp->qp_num,
1634 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1639 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev,
1640 struct ib_flow_attr *flow_attr,
1641 enum mlx4_net_trans_promisc_mode *type)
1645 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) ||
1646 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) ||
1647 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) {
1651 if (flow_attr->num_of_specs == 0) {
1652 type[0] = MLX4_FS_MC_SNIFFER;
1653 type[1] = MLX4_FS_UC_SNIFFER;
1655 union ib_flow_spec *ib_spec;
1657 ib_spec = (union ib_flow_spec *)(flow_attr + 1);
1658 if (ib_spec->type != IB_FLOW_SPEC_ETH)
1661 /* if all is zero than MC and UC */
1662 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) {
1663 type[0] = MLX4_FS_MC_SNIFFER;
1664 type[1] = MLX4_FS_UC_SNIFFER;
1666 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01,
1667 ib_spec->eth.mask.dst_mac[1],
1668 ib_spec->eth.mask.dst_mac[2],
1669 ib_spec->eth.mask.dst_mac[3],
1670 ib_spec->eth.mask.dst_mac[4],
1671 ib_spec->eth.mask.dst_mac[5]};
1673 /* Above xor was only on MC bit, non empty mask is valid
1674 * only if this bit is set and rest are zero.
1676 if (!is_zero_ether_addr(&mac[0]))
1679 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
1680 type[0] = MLX4_FS_MC_SNIFFER;
1682 type[0] = MLX4_FS_UC_SNIFFER;
1689 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1690 struct ib_flow_attr *flow_attr,
1691 struct ib_udata *udata)
1693 int err = 0, i = 0, j = 0;
1694 struct mlx4_ib_flow *mflow;
1695 enum mlx4_net_trans_promisc_mode type[2];
1696 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1697 int is_bonded = mlx4_is_bonded(dev);
1699 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt)
1700 return ERR_PTR(-EINVAL);
1702 if (flow_attr->flags & ~IB_FLOW_ATTR_FLAGS_DONT_TRAP)
1703 return ERR_PTR(-EOPNOTSUPP);
1705 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) &&
1706 (flow_attr->type != IB_FLOW_ATTR_NORMAL))
1707 return ERR_PTR(-EOPNOTSUPP);
1710 udata->inlen && !ib_is_udata_cleared(udata, 0, udata->inlen))
1711 return ERR_PTR(-EOPNOTSUPP);
1713 memset(type, 0, sizeof(type));
1715 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1721 switch (flow_attr->type) {
1722 case IB_FLOW_ATTR_NORMAL:
1723 /* If dont trap flag (continue match) is set, under specific
1724 * condition traffic be replicated to given qp,
1725 * without stealing it
1727 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) {
1728 err = mlx4_ib_add_dont_trap_rule(dev,
1734 type[0] = MLX4_FS_REGULAR;
1738 case IB_FLOW_ATTR_ALL_DEFAULT:
1739 type[0] = MLX4_FS_ALL_DEFAULT;
1742 case IB_FLOW_ATTR_MC_DEFAULT:
1743 type[0] = MLX4_FS_MC_DEFAULT;
1746 case IB_FLOW_ATTR_SNIFFER:
1747 type[0] = MLX4_FS_MIRROR_RX_PORT;
1748 type[1] = MLX4_FS_MIRROR_SX_PORT;
1756 while (i < ARRAY_SIZE(type) && type[i]) {
1757 err = __mlx4_ib_create_flow(qp, flow_attr, MLX4_DOMAIN_UVERBS,
1758 type[i], &mflow->reg_id[i].id);
1760 goto err_create_flow;
1762 /* Application always sees one port so the mirror rule
1763 * must be on port #2
1765 flow_attr->port = 2;
1766 err = __mlx4_ib_create_flow(qp, flow_attr,
1767 MLX4_DOMAIN_UVERBS, type[j],
1768 &mflow->reg_id[j].mirror);
1769 flow_attr->port = 1;
1771 goto err_create_flow;
1778 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1779 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1780 &mflow->reg_id[i].id);
1782 goto err_create_flow;
1785 flow_attr->port = 2;
1786 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1787 &mflow->reg_id[j].mirror);
1788 flow_attr->port = 1;
1790 goto err_create_flow;
1793 /* function to create mirror rule */
1797 return &mflow->ibflow;
1801 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1802 mflow->reg_id[i].id);
1807 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1808 mflow->reg_id[j].mirror);
1813 return ERR_PTR(err);
1816 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1820 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1821 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1823 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1824 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1827 if (mflow->reg_id[i].mirror) {
1828 err = __mlx4_ib_destroy_flow(mdev->dev,
1829 mflow->reg_id[i].mirror);
1840 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1843 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1844 struct mlx4_dev *dev = mdev->dev;
1845 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1846 struct mlx4_ib_steering *ib_steering = NULL;
1847 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1848 struct mlx4_flow_reg_id reg_id;
1850 if (mdev->dev->caps.steering_mode ==
1851 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1852 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1857 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1859 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1862 pr_err("multicast attach op failed, err %d\n", err);
1867 if (mlx4_is_bonded(dev)) {
1868 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1869 (mqp->port == 1) ? 2 : 1,
1871 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1872 prot, ®_id.mirror);
1877 err = add_gid_entry(ibqp, gid);
1882 memcpy(ib_steering->gid.raw, gid->raw, 16);
1883 ib_steering->reg_id = reg_id;
1884 mutex_lock(&mqp->mutex);
1885 list_add(&ib_steering->list, &mqp->steering_rules);
1886 mutex_unlock(&mqp->mutex);
1891 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1894 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1895 prot, reg_id.mirror);
1902 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1904 struct mlx4_ib_gid_entry *ge;
1905 struct mlx4_ib_gid_entry *tmp;
1906 struct mlx4_ib_gid_entry *ret = NULL;
1908 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1909 if (!memcmp(raw, ge->gid.raw, 16)) {
1918 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1921 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1922 struct mlx4_dev *dev = mdev->dev;
1923 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1924 struct net_device *ndev;
1925 struct mlx4_ib_gid_entry *ge;
1926 struct mlx4_flow_reg_id reg_id = {0, 0};
1927 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1929 if (mdev->dev->caps.steering_mode ==
1930 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1931 struct mlx4_ib_steering *ib_steering;
1933 mutex_lock(&mqp->mutex);
1934 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1935 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1936 list_del(&ib_steering->list);
1940 mutex_unlock(&mqp->mutex);
1941 if (&ib_steering->list == &mqp->steering_rules) {
1942 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1945 reg_id = ib_steering->reg_id;
1949 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1954 if (mlx4_is_bonded(dev)) {
1955 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1956 prot, reg_id.mirror);
1961 mutex_lock(&mqp->mutex);
1962 ge = find_gid_entry(mqp, gid->raw);
1964 spin_lock_bh(&mdev->iboe.lock);
1965 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1968 spin_unlock_bh(&mdev->iboe.lock);
1971 list_del(&ge->list);
1974 pr_warn("could not find mgid entry\n");
1976 mutex_unlock(&mqp->mutex);
1981 static int init_node_data(struct mlx4_ib_dev *dev)
1983 struct ib_smp *in_mad = NULL;
1984 struct ib_smp *out_mad = NULL;
1985 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
1988 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1989 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1990 if (!in_mad || !out_mad)
1993 init_query_mad(in_mad);
1994 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
1995 if (mlx4_is_master(dev->dev))
1996 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
1998 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2002 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
2004 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
2006 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2010 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
2011 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
2019 static ssize_t hca_type_show(struct device *device,
2020 struct device_attribute *attr, char *buf)
2022 struct mlx4_ib_dev *dev =
2023 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2024 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
2026 static DEVICE_ATTR_RO(hca_type);
2028 static ssize_t hw_rev_show(struct device *device,
2029 struct device_attribute *attr, char *buf)
2031 struct mlx4_ib_dev *dev =
2032 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2033 return sprintf(buf, "%x\n", dev->dev->rev_id);
2035 static DEVICE_ATTR_RO(hw_rev);
2037 static ssize_t board_id_show(struct device *device,
2038 struct device_attribute *attr, char *buf)
2040 struct mlx4_ib_dev *dev =
2041 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2043 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
2044 dev->dev->board_id);
2046 static DEVICE_ATTR_RO(board_id);
2048 static struct attribute *mlx4_class_attributes[] = {
2049 &dev_attr_hw_rev.attr,
2050 &dev_attr_hca_type.attr,
2051 &dev_attr_board_id.attr,
2055 static const struct attribute_group mlx4_attr_group = {
2056 .attrs = mlx4_class_attributes,
2059 struct diag_counter {
2064 #define DIAG_COUNTER(_name, _offset) \
2065 { .name = #_name, .offset = _offset }
2067 static const struct diag_counter diag_basic[] = {
2068 DIAG_COUNTER(rq_num_lle, 0x00),
2069 DIAG_COUNTER(sq_num_lle, 0x04),
2070 DIAG_COUNTER(rq_num_lqpoe, 0x08),
2071 DIAG_COUNTER(sq_num_lqpoe, 0x0C),
2072 DIAG_COUNTER(rq_num_lpe, 0x18),
2073 DIAG_COUNTER(sq_num_lpe, 0x1C),
2074 DIAG_COUNTER(rq_num_wrfe, 0x20),
2075 DIAG_COUNTER(sq_num_wrfe, 0x24),
2076 DIAG_COUNTER(sq_num_mwbe, 0x2C),
2077 DIAG_COUNTER(sq_num_bre, 0x34),
2078 DIAG_COUNTER(sq_num_rire, 0x44),
2079 DIAG_COUNTER(rq_num_rire, 0x48),
2080 DIAG_COUNTER(sq_num_rae, 0x4C),
2081 DIAG_COUNTER(rq_num_rae, 0x50),
2082 DIAG_COUNTER(sq_num_roe, 0x54),
2083 DIAG_COUNTER(sq_num_tree, 0x5C),
2084 DIAG_COUNTER(sq_num_rree, 0x64),
2085 DIAG_COUNTER(rq_num_rnr, 0x68),
2086 DIAG_COUNTER(sq_num_rnr, 0x6C),
2087 DIAG_COUNTER(rq_num_oos, 0x100),
2088 DIAG_COUNTER(sq_num_oos, 0x104),
2091 static const struct diag_counter diag_ext[] = {
2092 DIAG_COUNTER(rq_num_dup, 0x130),
2093 DIAG_COUNTER(sq_num_to, 0x134),
2096 static const struct diag_counter diag_device_only[] = {
2097 DIAG_COUNTER(num_cqovf, 0x1A0),
2098 DIAG_COUNTER(rq_num_udsdprd, 0x118),
2101 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev,
2104 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2105 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2107 if (!diag[!!port_num].name)
2110 return rdma_alloc_hw_stats_struct(diag[!!port_num].name,
2111 diag[!!port_num].num_counters,
2112 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2115 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev,
2116 struct rdma_hw_stats *stats,
2119 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2120 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2121 u32 hw_value[ARRAY_SIZE(diag_device_only) +
2122 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {};
2126 ret = mlx4_query_diag_counters(dev->dev,
2127 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS,
2128 diag[!!port].offset, hw_value,
2129 diag[!!port].num_counters, port);
2134 for (i = 0; i < diag[!!port].num_counters; i++)
2135 stats->value[i] = hw_value[i];
2137 return diag[!!port].num_counters;
2140 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev,
2148 num_counters = ARRAY_SIZE(diag_basic);
2150 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT)
2151 num_counters += ARRAY_SIZE(diag_ext);
2154 num_counters += ARRAY_SIZE(diag_device_only);
2156 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL);
2160 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL);
2164 *num = num_counters;
2173 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev,
2181 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) {
2182 name[i] = diag_basic[i].name;
2183 offset[i] = diag_basic[i].offset;
2186 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) {
2187 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) {
2188 name[j] = diag_ext[i].name;
2189 offset[j] = diag_ext[i].offset;
2194 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) {
2195 name[j] = diag_device_only[i].name;
2196 offset[j] = diag_device_only[i].offset;
2201 static const struct ib_device_ops mlx4_ib_hw_stats_ops = {
2202 .alloc_hw_stats = mlx4_ib_alloc_hw_stats,
2203 .get_hw_stats = mlx4_ib_get_hw_stats,
2206 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev)
2208 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters;
2211 bool per_port = !!(ibdev->dev->caps.flags2 &
2212 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT);
2214 if (mlx4_is_slave(ibdev->dev))
2217 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2218 /* i == 1 means we are building port counters */
2222 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name,
2224 &diag[i].num_counters, i);
2228 mlx4_ib_fill_diag_counters(ibdev, diag[i].name,
2232 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_hw_stats_ops);
2238 kfree(diag[i - 1].name);
2239 kfree(diag[i - 1].offset);
2245 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev)
2249 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2250 kfree(ibdev->diag_counters[i].offset);
2251 kfree(ibdev->diag_counters[i].name);
2255 #define MLX4_IB_INVALID_MAC ((u64)-1)
2256 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
2257 struct net_device *dev,
2261 u64 release_mac = MLX4_IB_INVALID_MAC;
2262 struct mlx4_ib_qp *qp;
2264 read_lock(&dev_base_lock);
2265 new_smac = mlx4_mac_to_u64(dev->dev_addr);
2266 read_unlock(&dev_base_lock);
2268 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2270 /* no need for update QP1 and mac registration in non-SRIOV */
2271 if (!mlx4_is_mfunc(ibdev->dev))
2274 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
2275 qp = ibdev->qp1_proxy[port - 1];
2279 struct mlx4_update_qp_params update_params;
2281 mutex_lock(&qp->mutex);
2282 old_smac = qp->pri.smac;
2283 if (new_smac == old_smac)
2286 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
2288 if (new_smac_index < 0)
2291 update_params.smac_index = new_smac_index;
2292 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
2294 release_mac = new_smac;
2297 /* if old port was zero, no mac was yet registered for this QP */
2298 if (qp->pri.smac_port)
2299 release_mac = old_smac;
2300 qp->pri.smac = new_smac;
2301 qp->pri.smac_port = port;
2302 qp->pri.smac_index = new_smac_index;
2306 if (release_mac != MLX4_IB_INVALID_MAC)
2307 mlx4_unregister_mac(ibdev->dev, port, release_mac);
2309 mutex_unlock(&qp->mutex);
2310 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
2313 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
2314 struct net_device *dev,
2315 unsigned long event)
2318 struct mlx4_ib_iboe *iboe;
2319 int update_qps_port = -1;
2324 iboe = &ibdev->iboe;
2326 spin_lock_bh(&iboe->lock);
2327 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2329 iboe->netdevs[port - 1] =
2330 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2332 if (dev == iboe->netdevs[port - 1] &&
2333 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2334 event == NETDEV_UP || event == NETDEV_CHANGE))
2335 update_qps_port = port;
2337 if (dev == iboe->netdevs[port - 1] &&
2338 (event == NETDEV_UP || event == NETDEV_DOWN)) {
2339 enum ib_port_state port_state;
2340 struct ib_event ibev = { };
2342 if (ib_get_cached_port_state(&ibdev->ib_dev, port,
2346 if (event == NETDEV_UP &&
2347 (port_state != IB_PORT_ACTIVE ||
2348 iboe->last_port_state[port - 1] != IB_PORT_DOWN))
2350 if (event == NETDEV_DOWN &&
2351 (port_state != IB_PORT_DOWN ||
2352 iboe->last_port_state[port - 1] != IB_PORT_ACTIVE))
2354 iboe->last_port_state[port - 1] = port_state;
2356 ibev.device = &ibdev->ib_dev;
2357 ibev.element.port_num = port;
2358 ibev.event = event == NETDEV_UP ? IB_EVENT_PORT_ACTIVE :
2360 ib_dispatch_event(&ibev);
2364 spin_unlock_bh(&iboe->lock);
2366 if (update_qps_port > 0)
2367 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2370 static int mlx4_ib_netdev_event(struct notifier_block *this,
2371 unsigned long event, void *ptr)
2373 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2374 struct mlx4_ib_dev *ibdev;
2376 if (!net_eq(dev_net(dev), &init_net))
2379 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2380 mlx4_ib_scan_netdevs(ibdev, dev, event);
2385 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2391 if (mlx4_is_master(ibdev->dev)) {
2392 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2394 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2396 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2398 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2399 /* master has the identity virt2phys pkey mapping */
2400 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2401 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2402 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2403 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2407 /* initialize pkey cache */
2408 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2410 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2412 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2418 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2420 int i, j, eq = 0, total_eqs = 0;
2422 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2423 sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2424 if (!ibdev->eq_table)
2427 for (i = 1; i <= dev->caps.num_ports; i++) {
2428 for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2430 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs))
2432 ibdev->eq_table[eq] = total_eqs;
2433 if (!mlx4_assign_eq(dev, i,
2434 &ibdev->eq_table[eq]))
2437 ibdev->eq_table[eq] = -1;
2441 for (i = eq; i < dev->caps.num_comp_vectors;
2442 ibdev->eq_table[i++] = -1)
2445 /* Advertise the new number of EQs to clients */
2446 ibdev->ib_dev.num_comp_vectors = eq;
2449 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2452 int total_eqs = ibdev->ib_dev.num_comp_vectors;
2454 /* no eqs were allocated */
2455 if (!ibdev->eq_table)
2458 /* Reset the advertised EQ number */
2459 ibdev->ib_dev.num_comp_vectors = 0;
2461 for (i = 0; i < total_eqs; i++)
2462 mlx4_release_eq(dev, ibdev->eq_table[i]);
2464 kfree(ibdev->eq_table);
2465 ibdev->eq_table = NULL;
2468 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2469 struct ib_port_immutable *immutable)
2471 struct ib_port_attr attr;
2472 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
2475 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) {
2476 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2477 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2479 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)
2480 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2481 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
2482 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |
2483 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
2484 immutable->core_cap_flags |= RDMA_CORE_PORT_RAW_PACKET;
2485 if (immutable->core_cap_flags & (RDMA_CORE_PORT_IBA_ROCE |
2486 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP))
2487 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2490 err = ib_query_port(ibdev, port_num, &attr);
2494 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2495 immutable->gid_tbl_len = attr.gid_tbl_len;
2500 static void get_fw_ver_str(struct ib_device *device, char *str)
2502 struct mlx4_ib_dev *dev =
2503 container_of(device, struct mlx4_ib_dev, ib_dev);
2504 snprintf(str, IB_FW_VERSION_NAME_MAX, "%d.%d.%d",
2505 (int) (dev->dev->caps.fw_ver >> 32),
2506 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
2507 (int) dev->dev->caps.fw_ver & 0xffff);
2510 static const struct ib_device_ops mlx4_ib_dev_ops = {
2511 .owner = THIS_MODULE,
2512 .driver_id = RDMA_DRIVER_MLX4,
2513 .uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION,
2515 .add_gid = mlx4_ib_add_gid,
2516 .alloc_mr = mlx4_ib_alloc_mr,
2517 .alloc_pd = mlx4_ib_alloc_pd,
2518 .alloc_ucontext = mlx4_ib_alloc_ucontext,
2519 .attach_mcast = mlx4_ib_mcg_attach,
2520 .create_ah = mlx4_ib_create_ah,
2521 .create_cq = mlx4_ib_create_cq,
2522 .create_qp = mlx4_ib_create_qp,
2523 .create_srq = mlx4_ib_create_srq,
2524 .dealloc_pd = mlx4_ib_dealloc_pd,
2525 .dealloc_ucontext = mlx4_ib_dealloc_ucontext,
2526 .del_gid = mlx4_ib_del_gid,
2527 .dereg_mr = mlx4_ib_dereg_mr,
2528 .destroy_ah = mlx4_ib_destroy_ah,
2529 .destroy_cq = mlx4_ib_destroy_cq,
2530 .destroy_qp = mlx4_ib_destroy_qp,
2531 .destroy_srq = mlx4_ib_destroy_srq,
2532 .detach_mcast = mlx4_ib_mcg_detach,
2533 .disassociate_ucontext = mlx4_ib_disassociate_ucontext,
2534 .drain_rq = mlx4_ib_drain_rq,
2535 .drain_sq = mlx4_ib_drain_sq,
2536 .get_dev_fw_str = get_fw_ver_str,
2537 .get_dma_mr = mlx4_ib_get_dma_mr,
2538 .get_link_layer = mlx4_ib_port_link_layer,
2539 .get_netdev = mlx4_ib_get_netdev,
2540 .get_port_immutable = mlx4_port_immutable,
2541 .map_mr_sg = mlx4_ib_map_mr_sg,
2542 .mmap = mlx4_ib_mmap,
2543 .modify_cq = mlx4_ib_modify_cq,
2544 .modify_device = mlx4_ib_modify_device,
2545 .modify_port = mlx4_ib_modify_port,
2546 .modify_qp = mlx4_ib_modify_qp,
2547 .modify_srq = mlx4_ib_modify_srq,
2548 .poll_cq = mlx4_ib_poll_cq,
2549 .post_recv = mlx4_ib_post_recv,
2550 .post_send = mlx4_ib_post_send,
2551 .post_srq_recv = mlx4_ib_post_srq_recv,
2552 .process_mad = mlx4_ib_process_mad,
2553 .query_ah = mlx4_ib_query_ah,
2554 .query_device = mlx4_ib_query_device,
2555 .query_gid = mlx4_ib_query_gid,
2556 .query_pkey = mlx4_ib_query_pkey,
2557 .query_port = mlx4_ib_query_port,
2558 .query_qp = mlx4_ib_query_qp,
2559 .query_srq = mlx4_ib_query_srq,
2560 .reg_user_mr = mlx4_ib_reg_user_mr,
2561 .req_notify_cq = mlx4_ib_arm_cq,
2562 .rereg_user_mr = mlx4_ib_rereg_user_mr,
2563 .resize_cq = mlx4_ib_resize_cq,
2565 INIT_RDMA_OBJ_SIZE(ib_ah, mlx4_ib_ah, ibah),
2566 INIT_RDMA_OBJ_SIZE(ib_cq, mlx4_ib_cq, ibcq),
2567 INIT_RDMA_OBJ_SIZE(ib_pd, mlx4_ib_pd, ibpd),
2568 INIT_RDMA_OBJ_SIZE(ib_srq, mlx4_ib_srq, ibsrq),
2569 INIT_RDMA_OBJ_SIZE(ib_ucontext, mlx4_ib_ucontext, ibucontext),
2572 static const struct ib_device_ops mlx4_ib_dev_wq_ops = {
2573 .create_rwq_ind_table = mlx4_ib_create_rwq_ind_table,
2574 .create_wq = mlx4_ib_create_wq,
2575 .destroy_rwq_ind_table = mlx4_ib_destroy_rwq_ind_table,
2576 .destroy_wq = mlx4_ib_destroy_wq,
2577 .modify_wq = mlx4_ib_modify_wq,
2579 INIT_RDMA_OBJ_SIZE(ib_rwq_ind_table, mlx4_ib_rwq_ind_table,
2583 static const struct ib_device_ops mlx4_ib_dev_mw_ops = {
2584 .alloc_mw = mlx4_ib_alloc_mw,
2585 .dealloc_mw = mlx4_ib_dealloc_mw,
2587 INIT_RDMA_OBJ_SIZE(ib_mw, mlx4_ib_mw, ibmw),
2590 static const struct ib_device_ops mlx4_ib_dev_xrc_ops = {
2591 .alloc_xrcd = mlx4_ib_alloc_xrcd,
2592 .dealloc_xrcd = mlx4_ib_dealloc_xrcd,
2594 INIT_RDMA_OBJ_SIZE(ib_xrcd, mlx4_ib_xrcd, ibxrcd),
2597 static const struct ib_device_ops mlx4_ib_dev_fs_ops = {
2598 .create_flow = mlx4_ib_create_flow,
2599 .destroy_flow = mlx4_ib_destroy_flow,
2602 static void *mlx4_ib_add(struct mlx4_dev *dev)
2604 struct mlx4_ib_dev *ibdev;
2608 struct mlx4_ib_iboe *iboe;
2609 int ib_num_ports = 0;
2610 int num_req_counters;
2613 struct counter_index *new_counter_index = NULL;
2615 pr_info_once("%s", mlx4_ib_version);
2618 mlx4_foreach_ib_transport_port(i, dev)
2621 /* No point in registering a device with no ports... */
2625 ibdev = ib_alloc_device(mlx4_ib_dev, ib_dev);
2627 dev_err(&dev->persist->pdev->dev,
2628 "Device struct alloc failed\n");
2632 iboe = &ibdev->iboe;
2634 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2637 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2640 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2642 if (!ibdev->uar_map)
2644 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2647 ibdev->bond_next_port = 0;
2649 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2650 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2651 ibdev->num_ports = num_ports;
2652 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2653 1 : ibdev->num_ports;
2654 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2655 ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev;
2657 ibdev->ib_dev.uverbs_cmd_mask =
2658 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2659 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2660 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2661 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2662 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2663 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2664 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
2665 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2666 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2667 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2668 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
2669 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2670 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2671 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2672 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2673 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2674 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2675 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2676 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2677 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
2678 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
2679 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
2680 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2681 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
2683 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_ops);
2684 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2685 (1ull << IB_USER_VERBS_EX_CMD_MODIFY_CQ) |
2686 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) |
2687 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) |
2688 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP);
2690 if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) &&
2691 ((mlx4_ib_port_link_layer(&ibdev->ib_dev, 1) ==
2692 IB_LINK_LAYER_ETHERNET) ||
2693 (mlx4_ib_port_link_layer(&ibdev->ib_dev, 2) ==
2694 IB_LINK_LAYER_ETHERNET))) {
2695 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2696 (1ull << IB_USER_VERBS_EX_CMD_CREATE_WQ) |
2697 (1ull << IB_USER_VERBS_EX_CMD_MODIFY_WQ) |
2698 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_WQ) |
2699 (1ull << IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL) |
2700 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL);
2701 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_wq_ops);
2704 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2705 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2706 ibdev->ib_dev.uverbs_cmd_mask |=
2707 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2708 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2709 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_mw_ops);
2712 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2713 ibdev->ib_dev.uverbs_cmd_mask |=
2714 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2715 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2716 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_xrc_ops);
2719 if (check_flow_steering_support(dev)) {
2720 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2721 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2722 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2723 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2724 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_fs_ops);
2727 if (!dev->caps.userspace_caps)
2728 ibdev->ib_dev.ops.uverbs_abi_ver =
2729 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2731 mlx4_ib_alloc_eqs(dev, ibdev);
2733 spin_lock_init(&iboe->lock);
2735 if (init_node_data(ibdev))
2737 mlx4_init_sl2vl_tbl(ibdev);
2739 for (i = 0; i < ibdev->num_ports; ++i) {
2740 mutex_init(&ibdev->counters_table[i].mutex);
2741 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2742 iboe->last_port_state[i] = IB_PORT_DOWN;
2745 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2746 for (i = 0; i < num_req_counters; ++i) {
2747 mutex_init(&ibdev->qp1_proxy_lock[i]);
2749 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2750 IB_LINK_LAYER_ETHERNET) {
2751 err = mlx4_counter_alloc(ibdev->dev, &counter_index,
2752 MLX4_RES_USAGE_DRIVER);
2753 /* if failed to allocate a new counter, use default */
2756 mlx4_get_default_counter_index(dev,
2760 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2761 counter_index = mlx4_get_default_counter_index(dev,
2764 new_counter_index = kmalloc(sizeof(*new_counter_index),
2766 if (!new_counter_index) {
2768 mlx4_counter_free(ibdev->dev, counter_index);
2771 new_counter_index->index = counter_index;
2772 new_counter_index->allocated = allocated;
2773 list_add_tail(&new_counter_index->list,
2774 &ibdev->counters_table[i].counters_list);
2775 ibdev->counters_table[i].default_counter = counter_index;
2776 pr_info("counter index %d for port %d allocated %d\n",
2777 counter_index, i + 1, allocated);
2779 if (mlx4_is_bonded(dev))
2780 for (i = 1; i < ibdev->num_ports ; ++i) {
2782 kmalloc(sizeof(struct counter_index),
2784 if (!new_counter_index)
2786 new_counter_index->index = counter_index;
2787 new_counter_index->allocated = 0;
2788 list_add_tail(&new_counter_index->list,
2789 &ibdev->counters_table[i].counters_list);
2790 ibdev->counters_table[i].default_counter =
2794 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2797 spin_lock_init(&ibdev->sm_lock);
2798 mutex_init(&ibdev->cap_mask_mutex);
2799 INIT_LIST_HEAD(&ibdev->qp_list);
2800 spin_lock_init(&ibdev->reset_flow_resource_lock);
2802 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2804 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2805 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2806 MLX4_IB_UC_STEER_QPN_ALIGN,
2807 &ibdev->steer_qpn_base, 0,
2808 MLX4_RES_USAGE_DRIVER);
2812 ibdev->ib_uc_qpns_bitmap =
2813 kmalloc_array(BITS_TO_LONGS(ibdev->steer_qpn_count),
2816 if (!ibdev->ib_uc_qpns_bitmap)
2817 goto err_steer_qp_release;
2819 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) {
2820 bitmap_zero(ibdev->ib_uc_qpns_bitmap,
2821 ibdev->steer_qpn_count);
2822 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2823 dev, ibdev->steer_qpn_base,
2824 ibdev->steer_qpn_base +
2825 ibdev->steer_qpn_count - 1);
2827 goto err_steer_free_bitmap;
2829 bitmap_fill(ibdev->ib_uc_qpns_bitmap,
2830 ibdev->steer_qpn_count);
2834 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2835 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2837 if (mlx4_ib_alloc_diag_counters(ibdev))
2838 goto err_steer_free_bitmap;
2840 rdma_set_device_sysfs_group(&ibdev->ib_dev, &mlx4_attr_group);
2841 if (ib_register_device(&ibdev->ib_dev, "mlx4_%d",
2842 &dev->persist->pdev->dev))
2843 goto err_diag_counters;
2845 if (mlx4_ib_mad_init(ibdev))
2848 if (mlx4_ib_init_sriov(ibdev))
2851 if (!iboe->nb.notifier_call) {
2852 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2853 err = register_netdevice_notifier(&iboe->nb);
2855 iboe->nb.notifier_call = NULL;
2859 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2860 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT);
2865 ibdev->ib_active = true;
2866 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2867 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i),
2870 if (mlx4_is_mfunc(ibdev->dev))
2873 /* create paravirt contexts for any VFs which are active */
2874 if (mlx4_is_master(ibdev->dev)) {
2875 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2876 if (j == mlx4_master_func_num(ibdev->dev))
2878 if (mlx4_is_slave_active(ibdev->dev, j))
2879 do_slave_init(ibdev, j, 1);
2885 if (ibdev->iboe.nb.notifier_call) {
2886 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2887 pr_warn("failure unregistering notifier\n");
2888 ibdev->iboe.nb.notifier_call = NULL;
2890 flush_workqueue(wq);
2892 mlx4_ib_close_sriov(ibdev);
2895 mlx4_ib_mad_cleanup(ibdev);
2898 ib_unregister_device(&ibdev->ib_dev);
2901 mlx4_ib_diag_cleanup(ibdev);
2903 err_steer_free_bitmap:
2904 kfree(ibdev->ib_uc_qpns_bitmap);
2906 err_steer_qp_release:
2907 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2908 ibdev->steer_qpn_count);
2910 for (i = 0; i < ibdev->num_ports; ++i)
2911 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2914 mlx4_ib_free_eqs(dev, ibdev);
2915 iounmap(ibdev->uar_map);
2918 mlx4_uar_free(dev, &ibdev->priv_uar);
2921 mlx4_pd_free(dev, ibdev->priv_pdn);
2924 ib_dealloc_device(&ibdev->ib_dev);
2929 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2933 WARN_ON(!dev->ib_uc_qpns_bitmap);
2935 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2936 dev->steer_qpn_count,
2937 get_count_order(count));
2941 *qpn = dev->steer_qpn_base + offset;
2945 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2948 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2951 if (WARN(qpn < dev->steer_qpn_base, "qpn = %u, steer_qpn_base = %u\n",
2952 qpn, dev->steer_qpn_base))
2953 /* not supposed to be here */
2956 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2957 qpn - dev->steer_qpn_base,
2958 get_count_order(count));
2961 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2966 struct ib_flow_attr *flow = NULL;
2967 struct ib_flow_spec_ib *ib_spec;
2970 flow_size = sizeof(struct ib_flow_attr) +
2971 sizeof(struct ib_flow_spec_ib);
2972 flow = kzalloc(flow_size, GFP_KERNEL);
2975 flow->port = mqp->port;
2976 flow->num_of_specs = 1;
2977 flow->size = flow_size;
2978 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2979 ib_spec->type = IB_FLOW_SPEC_IB;
2980 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2981 /* Add an empty rule for IB L2 */
2982 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2984 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, MLX4_DOMAIN_NIC,
2985 MLX4_FS_REGULAR, &mqp->reg_id);
2987 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2993 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2995 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2999 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
3000 devlink_port_type_clear(mlx4_get_devlink_port(dev, i));
3001 ibdev->ib_active = false;
3002 flush_workqueue(wq);
3004 if (ibdev->iboe.nb.notifier_call) {
3005 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
3006 pr_warn("failure unregistering notifier\n");
3007 ibdev->iboe.nb.notifier_call = NULL;
3010 mlx4_ib_close_sriov(ibdev);
3011 mlx4_ib_mad_cleanup(ibdev);
3012 ib_unregister_device(&ibdev->ib_dev);
3013 mlx4_ib_diag_cleanup(ibdev);
3015 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
3016 ibdev->steer_qpn_count);
3017 kfree(ibdev->ib_uc_qpns_bitmap);
3019 iounmap(ibdev->uar_map);
3020 for (p = 0; p < ibdev->num_ports; ++p)
3021 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
3023 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
3024 mlx4_CLOSE_PORT(dev, p);
3026 mlx4_ib_free_eqs(dev, ibdev);
3028 mlx4_uar_free(dev, &ibdev->priv_uar);
3029 mlx4_pd_free(dev, ibdev->priv_pdn);
3030 ib_dealloc_device(&ibdev->ib_dev);
3033 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
3035 struct mlx4_ib_demux_work **dm = NULL;
3036 struct mlx4_dev *dev = ibdev->dev;
3038 unsigned long flags;
3039 struct mlx4_active_ports actv_ports;
3041 unsigned int first_port;
3043 if (!mlx4_is_master(dev))
3046 actv_ports = mlx4_get_active_ports(dev, slave);
3047 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
3048 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
3050 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
3054 for (i = 0; i < ports; i++) {
3055 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
3061 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
3062 dm[i]->port = first_port + i + 1;
3063 dm[i]->slave = slave;
3064 dm[i]->do_init = do_init;
3067 /* initialize or tear down tunnel QPs for the slave */
3068 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
3069 if (!ibdev->sriov.is_going_down) {
3070 for (i = 0; i < ports; i++)
3071 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
3072 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3074 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3075 for (i = 0; i < ports; i++)
3083 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
3085 struct mlx4_ib_qp *mqp;
3086 unsigned long flags_qp;
3087 unsigned long flags_cq;
3088 struct mlx4_ib_cq *send_mcq, *recv_mcq;
3089 struct list_head cq_notify_list;
3090 struct mlx4_cq *mcq;
3091 unsigned long flags;
3093 pr_warn("mlx4_ib_handle_catas_error was started\n");
3094 INIT_LIST_HEAD(&cq_notify_list);
3096 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
3097 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
3099 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
3100 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
3101 if (mqp->sq.tail != mqp->sq.head) {
3102 send_mcq = to_mcq(mqp->ibqp.send_cq);
3103 spin_lock_irqsave(&send_mcq->lock, flags_cq);
3104 if (send_mcq->mcq.comp &&
3105 mqp->ibqp.send_cq->comp_handler) {
3106 if (!send_mcq->mcq.reset_notify_added) {
3107 send_mcq->mcq.reset_notify_added = 1;
3108 list_add_tail(&send_mcq->mcq.reset_notify,
3112 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
3114 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
3115 /* Now, handle the QP's receive queue */
3116 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
3117 /* no handling is needed for SRQ */
3118 if (!mqp->ibqp.srq) {
3119 if (mqp->rq.tail != mqp->rq.head) {
3120 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
3121 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
3122 if (recv_mcq->mcq.comp &&
3123 mqp->ibqp.recv_cq->comp_handler) {
3124 if (!recv_mcq->mcq.reset_notify_added) {
3125 recv_mcq->mcq.reset_notify_added = 1;
3126 list_add_tail(&recv_mcq->mcq.reset_notify,
3130 spin_unlock_irqrestore(&recv_mcq->lock,
3134 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
3137 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
3140 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
3141 pr_warn("mlx4_ib_handle_catas_error ended\n");
3144 static void handle_bonded_port_state_event(struct work_struct *work)
3146 struct ib_event_work *ew =
3147 container_of(work, struct ib_event_work, work);
3148 struct mlx4_ib_dev *ibdev = ew->ib_dev;
3149 enum ib_port_state bonded_port_state = IB_PORT_NOP;
3151 struct ib_event ibev;
3154 spin_lock_bh(&ibdev->iboe.lock);
3155 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
3156 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
3157 enum ib_port_state curr_port_state;
3163 (netif_running(curr_netdev) &&
3164 netif_carrier_ok(curr_netdev)) ?
3165 IB_PORT_ACTIVE : IB_PORT_DOWN;
3167 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
3168 curr_port_state : IB_PORT_ACTIVE;
3170 spin_unlock_bh(&ibdev->iboe.lock);
3172 ibev.device = &ibdev->ib_dev;
3173 ibev.element.port_num = 1;
3174 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
3175 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3177 ib_dispatch_event(&ibev);
3180 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port)
3185 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl);
3187 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n",
3191 atomic64_set(&mdev->sl2vl[port - 1], sl2vl);
3194 static void ib_sl2vl_update_work(struct work_struct *work)
3196 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
3197 struct mlx4_ib_dev *mdev = ew->ib_dev;
3198 int port = ew->port;
3200 mlx4_ib_sl2vl_update(mdev, port);
3205 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
3208 struct ib_event_work *ew;
3210 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3212 INIT_WORK(&ew->work, ib_sl2vl_update_work);
3215 queue_work(wq, &ew->work);
3219 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
3220 enum mlx4_dev_event event, unsigned long param)
3222 struct ib_event ibev;
3223 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
3224 struct mlx4_eqe *eqe = NULL;
3225 struct ib_event_work *ew;
3228 if (mlx4_is_bonded(dev) &&
3229 ((event == MLX4_DEV_EVENT_PORT_UP) ||
3230 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
3231 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3234 INIT_WORK(&ew->work, handle_bonded_port_state_event);
3236 queue_work(wq, &ew->work);
3240 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
3241 eqe = (struct mlx4_eqe *)param;
3246 case MLX4_DEV_EVENT_PORT_UP:
3247 if (p > ibdev->num_ports)
3249 if (!mlx4_is_slave(dev) &&
3250 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
3251 IB_LINK_LAYER_INFINIBAND) {
3252 if (mlx4_is_master(dev))
3253 mlx4_ib_invalidate_all_guid_record(ibdev, p);
3254 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST &&
3255 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT))
3256 mlx4_sched_ib_sl2vl_update_work(ibdev, p);
3258 ibev.event = IB_EVENT_PORT_ACTIVE;
3261 case MLX4_DEV_EVENT_PORT_DOWN:
3262 if (p > ibdev->num_ports)
3264 ibev.event = IB_EVENT_PORT_ERR;
3267 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3268 ibdev->ib_active = false;
3269 ibev.event = IB_EVENT_DEVICE_FATAL;
3270 mlx4_ib_handle_catas_error(ibdev);
3273 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3274 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3278 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3279 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
3281 /* need to queue only for port owner, which uses GEN_EQE */
3282 if (mlx4_is_master(dev))
3283 queue_work(wq, &ew->work);
3285 handle_port_mgmt_change_event(&ew->work);
3288 case MLX4_DEV_EVENT_SLAVE_INIT:
3289 /* here, p is the slave id */
3290 do_slave_init(ibdev, p, 1);
3291 if (mlx4_is_master(dev)) {
3294 for (i = 1; i <= ibdev->num_ports; i++) {
3295 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3296 == IB_LINK_LAYER_INFINIBAND)
3297 mlx4_ib_slave_alias_guid_event(ibdev,
3304 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
3305 if (mlx4_is_master(dev)) {
3308 for (i = 1; i <= ibdev->num_ports; i++) {
3309 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3310 == IB_LINK_LAYER_INFINIBAND)
3311 mlx4_ib_slave_alias_guid_event(ibdev,
3316 /* here, p is the slave id */
3317 do_slave_init(ibdev, p, 0);
3324 ibev.device = ibdev_ptr;
3325 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
3327 ib_dispatch_event(&ibev);
3330 static struct mlx4_interface mlx4_ib_interface = {
3332 .remove = mlx4_ib_remove,
3333 .event = mlx4_ib_event,
3334 .protocol = MLX4_PROT_IB_IPV6,
3335 .flags = MLX4_INTFF_BONDING
3338 static int __init mlx4_ib_init(void)
3342 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM);
3346 err = mlx4_ib_mcg_init();
3350 err = mlx4_register_interface(&mlx4_ib_interface);
3357 mlx4_ib_mcg_destroy();
3360 destroy_workqueue(wq);
3364 static void __exit mlx4_ib_cleanup(void)
3366 mlx4_unregister_interface(&mlx4_ib_interface);
3367 mlx4_ib_mcg_destroy();
3368 destroy_workqueue(wq);
3371 module_init(mlx4_ib_init);
3372 module_exit(mlx4_ib_cleanup);