2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/slab.h>
37 #include <linux/errno.h>
38 #include <linux/netdevice.h>
39 #include <linux/inetdevice.h>
40 #include <linux/rtnetlink.h>
41 #include <linux/if_vlan.h>
43 #include <net/addrconf.h>
44 #include <net/devlink.h>
46 #include <rdma/ib_smi.h>
47 #include <rdma/ib_user_verbs.h>
48 #include <rdma/ib_addr.h>
49 #include <rdma/ib_cache.h>
51 #include <net/bonding.h>
53 #include <linux/mlx4/driver.h>
54 #include <linux/mlx4/cmd.h>
55 #include <linux/mlx4/qp.h>
58 #include <rdma/mlx4-abi.h>
60 #define DRV_NAME MLX4_IB_DRV_NAME
61 #define DRV_VERSION "2.2-1"
62 #define DRV_RELDATE "Feb 2014"
64 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
65 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
66 #define MLX4_IB_CARD_REV_A0 0xA0
68 MODULE_AUTHOR("Roland Dreier");
69 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
70 MODULE_LICENSE("Dual BSD/GPL");
71 MODULE_VERSION(DRV_VERSION);
73 int mlx4_ib_sm_guid_assign = 0;
74 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
75 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
77 static const char mlx4_ib_version[] =
78 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
79 DRV_VERSION " (" DRV_RELDATE ")\n";
81 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
83 static struct workqueue_struct *wq;
85 static void init_query_mad(struct ib_smp *mad)
87 mad->base_version = 1;
88 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
89 mad->class_version = 1;
90 mad->method = IB_MGMT_METHOD_GET;
93 static int check_flow_steering_support(struct mlx4_dev *dev)
95 int eth_num_ports = 0;
98 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
102 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
104 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
106 dmfs &= (!ib_num_ports ||
107 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
109 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
110 if (ib_num_ports && mlx4_is_mfunc(dev)) {
111 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
118 static int num_ib_ports(struct mlx4_dev *dev)
123 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
129 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num)
131 struct mlx4_ib_dev *ibdev = to_mdev(device);
132 struct net_device *dev;
135 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
138 if (mlx4_is_bonded(ibdev->dev)) {
139 struct net_device *upper = NULL;
141 upper = netdev_master_upper_dev_get_rcu(dev);
143 struct net_device *active;
145 active = bond_option_active_slave_get_rcu(netdev_priv(upper));
158 static int mlx4_ib_update_gids_v1(struct gid_entry *gids,
159 struct mlx4_ib_dev *ibdev,
162 struct mlx4_cmd_mailbox *mailbox;
164 struct mlx4_dev *dev = ibdev->dev;
166 union ib_gid *gid_tbl;
168 mailbox = mlx4_alloc_cmd_mailbox(dev);
172 gid_tbl = mailbox->buf;
174 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
175 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
177 err = mlx4_cmd(dev, mailbox->dma,
178 MLX4_SET_PORT_GID_TABLE << 8 | port_num,
179 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
181 if (mlx4_is_bonded(dev))
182 err += mlx4_cmd(dev, mailbox->dma,
183 MLX4_SET_PORT_GID_TABLE << 8 | 2,
184 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
187 mlx4_free_cmd_mailbox(dev, mailbox);
191 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids,
192 struct mlx4_ib_dev *ibdev,
195 struct mlx4_cmd_mailbox *mailbox;
197 struct mlx4_dev *dev = ibdev->dev;
208 mailbox = mlx4_alloc_cmd_mailbox(dev);
212 gid_tbl = mailbox->buf;
213 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
214 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid));
215 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
216 gid_tbl[i].version = 2;
217 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid))
222 err = mlx4_cmd(dev, mailbox->dma,
223 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num,
224 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
226 if (mlx4_is_bonded(dev))
227 err += mlx4_cmd(dev, mailbox->dma,
228 MLX4_SET_PORT_ROCE_ADDR << 8 | 2,
229 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
232 mlx4_free_cmd_mailbox(dev, mailbox);
236 static int mlx4_ib_update_gids(struct gid_entry *gids,
237 struct mlx4_ib_dev *ibdev,
240 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
241 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num);
243 return mlx4_ib_update_gids_v1(gids, ibdev, port_num);
246 static int mlx4_ib_add_gid(struct ib_device *device,
249 const union ib_gid *gid,
250 const struct ib_gid_attr *attr,
253 struct mlx4_ib_dev *ibdev = to_mdev(device);
254 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
255 struct mlx4_port_gid_table *port_gid_table;
256 int free = -1, found = -1;
260 struct gid_entry *gids = NULL;
262 if (!rdma_cap_roce_gid_table(device, port_num))
265 if (port_num > MLX4_MAX_PORTS)
271 port_gid_table = &iboe->gids[port_num - 1];
272 spin_lock_bh(&iboe->lock);
273 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
274 if (!memcmp(&port_gid_table->gids[i].gid, gid, sizeof(*gid)) &&
275 (port_gid_table->gids[i].gid_type == attr->gid_type)) {
279 if (free < 0 && !memcmp(&port_gid_table->gids[i].gid, &zgid, sizeof(*gid)))
280 free = i; /* HW has space */
287 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
288 if (!port_gid_table->gids[free].ctx) {
291 *context = port_gid_table->gids[free].ctx;
292 memcpy(&port_gid_table->gids[free].gid, gid, sizeof(*gid));
293 port_gid_table->gids[free].gid_type = attr->gid_type;
294 port_gid_table->gids[free].ctx->real_index = free;
295 port_gid_table->gids[free].ctx->refcount = 1;
300 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
304 if (!ret && hw_update) {
305 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
309 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
310 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
311 gids[i].gid_type = port_gid_table->gids[i].gid_type;
315 spin_unlock_bh(&iboe->lock);
317 if (!ret && hw_update) {
318 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
325 static int mlx4_ib_del_gid(struct ib_device *device,
330 struct gid_cache_context *ctx = *context;
331 struct mlx4_ib_dev *ibdev = to_mdev(device);
332 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
333 struct mlx4_port_gid_table *port_gid_table;
336 struct gid_entry *gids = NULL;
338 if (!rdma_cap_roce_gid_table(device, port_num))
341 if (port_num > MLX4_MAX_PORTS)
344 port_gid_table = &iboe->gids[port_num - 1];
345 spin_lock_bh(&iboe->lock);
348 if (!ctx->refcount) {
349 unsigned int real_index = ctx->real_index;
351 memcpy(&port_gid_table->gids[real_index].gid, &zgid, sizeof(zgid));
352 kfree(port_gid_table->gids[real_index].ctx);
353 port_gid_table->gids[real_index].ctx = NULL;
357 if (!ret && hw_update) {
360 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
364 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
366 &port_gid_table->gids[i].gid,
367 sizeof(union ib_gid));
369 port_gid_table->gids[i].gid_type;
373 spin_unlock_bh(&iboe->lock);
375 if (!ret && hw_update) {
376 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
382 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
383 u8 port_num, int index)
385 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
386 struct gid_cache_context *ctx = NULL;
388 struct mlx4_port_gid_table *port_gid_table;
389 int real_index = -EINVAL;
393 struct ib_gid_attr attr;
395 if (port_num > MLX4_MAX_PORTS)
398 if (mlx4_is_bonded(ibdev->dev))
401 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
404 ret = ib_get_cached_gid(&ibdev->ib_dev, port_num, index, &gid, &attr);
411 if (!memcmp(&gid, &zgid, sizeof(gid)))
414 spin_lock_irqsave(&iboe->lock, flags);
415 port_gid_table = &iboe->gids[port_num - 1];
417 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
418 if (!memcmp(&port_gid_table->gids[i].gid, &gid, sizeof(gid)) &&
419 attr.gid_type == port_gid_table->gids[i].gid_type) {
420 ctx = port_gid_table->gids[i].ctx;
424 real_index = ctx->real_index;
425 spin_unlock_irqrestore(&iboe->lock, flags);
429 static int mlx4_ib_query_device(struct ib_device *ibdev,
430 struct ib_device_attr *props,
431 struct ib_udata *uhw)
433 struct mlx4_ib_dev *dev = to_mdev(ibdev);
434 struct ib_smp *in_mad = NULL;
435 struct ib_smp *out_mad = NULL;
438 struct mlx4_uverbs_ex_query_device cmd;
439 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0};
440 struct mlx4_clock_params clock_params;
443 if (uhw->inlen < sizeof(cmd))
446 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
457 resp.response_length = offsetof(typeof(resp), response_length) +
458 sizeof(resp.response_length);
459 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
460 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
461 if (!in_mad || !out_mad)
464 init_query_mad(in_mad);
465 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
467 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
468 1, NULL, NULL, in_mad, out_mad);
472 memset(props, 0, sizeof *props);
474 have_ib_ports = num_ib_ports(dev->dev);
476 props->fw_ver = dev->dev->caps.fw_ver;
477 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
478 IB_DEVICE_PORT_ACTIVE_EVENT |
479 IB_DEVICE_SYS_IMAGE_GUID |
480 IB_DEVICE_RC_RNR_NAK_GEN |
481 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
482 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
483 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
484 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
485 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
486 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
487 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
488 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
489 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
490 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
491 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
492 if (dev->dev->caps.max_gso_sz &&
493 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
494 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
495 props->device_cap_flags |= IB_DEVICE_UD_TSO;
496 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
497 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
498 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
499 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
500 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
501 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
502 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
503 props->device_cap_flags |= IB_DEVICE_XRC;
504 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
505 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
506 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
507 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
508 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
510 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
512 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
513 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
515 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
517 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
519 props->vendor_part_id = dev->dev->persist->pdev->device;
520 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
521 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
523 props->max_mr_size = ~0ull;
524 props->page_size_cap = dev->dev->caps.page_size_cap;
525 props->max_qp = dev->dev->quotas.qp;
526 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
527 props->max_sge = min(dev->dev->caps.max_sq_sg,
528 dev->dev->caps.max_rq_sg);
529 props->max_sge_rd = MLX4_MAX_SGE_RD;
530 props->max_cq = dev->dev->quotas.cq;
531 props->max_cqe = dev->dev->caps.max_cqes;
532 props->max_mr = dev->dev->quotas.mpt;
533 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
534 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
535 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
536 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
537 props->max_srq = dev->dev->quotas.srq;
538 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
539 props->max_srq_sge = dev->dev->caps.max_srq_sge;
540 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
541 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
542 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
543 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
544 props->masked_atomic_cap = props->atomic_cap;
545 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
546 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
547 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
548 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
549 props->max_mcast_grp;
550 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
551 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
552 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
554 if (!mlx4_is_slave(dev->dev))
555 err = mlx4_get_internal_clock_params(dev->dev, &clock_params);
557 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
558 resp.response_length += sizeof(resp.hca_core_clock_offset);
559 if (!err && !mlx4_is_slave(dev->dev)) {
560 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP;
561 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
566 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
577 static enum rdma_link_layer
578 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
580 struct mlx4_dev *dev = to_mdev(device)->dev;
582 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
583 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
586 static int ib_link_query_port(struct ib_device *ibdev, u8 port,
587 struct ib_port_attr *props, int netw_view)
589 struct ib_smp *in_mad = NULL;
590 struct ib_smp *out_mad = NULL;
591 int ext_active_speed;
592 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
595 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
596 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
597 if (!in_mad || !out_mad)
600 init_query_mad(in_mad);
601 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
602 in_mad->attr_mod = cpu_to_be32(port);
604 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
605 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
607 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
613 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
614 props->lmc = out_mad->data[34] & 0x7;
615 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
616 props->sm_sl = out_mad->data[36] & 0xf;
617 props->state = out_mad->data[32] & 0xf;
618 props->phys_state = out_mad->data[33] >> 4;
619 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
621 props->gid_tbl_len = out_mad->data[50];
623 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
624 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
625 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
626 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
627 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
628 props->active_width = out_mad->data[31] & 0xf;
629 props->active_speed = out_mad->data[35] >> 4;
630 props->max_mtu = out_mad->data[41] & 0xf;
631 props->active_mtu = out_mad->data[36] >> 4;
632 props->subnet_timeout = out_mad->data[51] & 0x1f;
633 props->max_vl_num = out_mad->data[37] >> 4;
634 props->init_type_reply = out_mad->data[41] >> 4;
636 /* Check if extended speeds (EDR/FDR/...) are supported */
637 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
638 ext_active_speed = out_mad->data[62] >> 4;
640 switch (ext_active_speed) {
642 props->active_speed = IB_SPEED_FDR;
645 props->active_speed = IB_SPEED_EDR;
650 /* If reported active speed is QDR, check if is FDR-10 */
651 if (props->active_speed == IB_SPEED_QDR) {
652 init_query_mad(in_mad);
653 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
654 in_mad->attr_mod = cpu_to_be32(port);
656 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
657 NULL, NULL, in_mad, out_mad);
661 /* Checking LinkSpeedActive for FDR-10 */
662 if (out_mad->data[15] & 0x1)
663 props->active_speed = IB_SPEED_FDR10;
666 /* Avoid wrong speed value returned by FW if the IB link is down. */
667 if (props->state == IB_PORT_DOWN)
668 props->active_speed = IB_SPEED_SDR;
676 static u8 state_to_phys_state(enum ib_port_state state)
678 return state == IB_PORT_ACTIVE ? 5 : 3;
681 static int eth_link_query_port(struct ib_device *ibdev, u8 port,
682 struct ib_port_attr *props, int netw_view)
685 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
686 struct mlx4_ib_iboe *iboe = &mdev->iboe;
687 struct net_device *ndev;
689 struct mlx4_cmd_mailbox *mailbox;
691 int is_bonded = mlx4_is_bonded(mdev->dev);
693 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
695 return PTR_ERR(mailbox);
697 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
698 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
703 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ||
704 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
705 IB_WIDTH_4X : IB_WIDTH_1X;
706 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
707 IB_SPEED_FDR : IB_SPEED_QDR;
708 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
709 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
710 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
711 props->pkey_tbl_len = 1;
712 props->max_mtu = IB_MTU_4096;
713 props->max_vl_num = 2;
714 props->state = IB_PORT_DOWN;
715 props->phys_state = state_to_phys_state(props->state);
716 props->active_mtu = IB_MTU_256;
717 spin_lock_bh(&iboe->lock);
718 ndev = iboe->netdevs[port - 1];
719 if (ndev && is_bonded) {
720 rcu_read_lock(); /* required to get upper dev */
721 ndev = netdev_master_upper_dev_get_rcu(ndev);
727 tmp = iboe_get_mtu(ndev->mtu);
728 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
730 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
731 IB_PORT_ACTIVE : IB_PORT_DOWN;
732 props->phys_state = state_to_phys_state(props->state);
734 spin_unlock_bh(&iboe->lock);
736 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
740 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
741 struct ib_port_attr *props, int netw_view)
745 memset(props, 0, sizeof *props);
747 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
748 ib_link_query_port(ibdev, port, props, netw_view) :
749 eth_link_query_port(ibdev, port, props, netw_view);
754 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
755 struct ib_port_attr *props)
757 /* returns host view */
758 return __mlx4_ib_query_port(ibdev, port, props, 0);
761 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
762 union ib_gid *gid, int netw_view)
764 struct ib_smp *in_mad = NULL;
765 struct ib_smp *out_mad = NULL;
767 struct mlx4_ib_dev *dev = to_mdev(ibdev);
769 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
771 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
772 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
773 if (!in_mad || !out_mad)
776 init_query_mad(in_mad);
777 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
778 in_mad->attr_mod = cpu_to_be32(port);
780 if (mlx4_is_mfunc(dev->dev) && netw_view)
781 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
783 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
787 memcpy(gid->raw, out_mad->data + 8, 8);
789 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
791 /* For any index > 0, return the null guid */
798 init_query_mad(in_mad);
799 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
800 in_mad->attr_mod = cpu_to_be32(index / 8);
802 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
803 NULL, NULL, in_mad, out_mad);
807 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
811 memset(gid->raw + 8, 0, 8);
817 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
822 if (rdma_protocol_ib(ibdev, port))
823 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
825 if (!rdma_protocol_roce(ibdev, port))
828 if (!rdma_cap_roce_gid_table(ibdev, port))
831 ret = ib_get_cached_gid(ibdev, port, index, gid, NULL);
832 if (ret == -EAGAIN) {
833 memcpy(gid, &zgid, sizeof(*gid));
840 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl)
842 union sl2vl_tbl_to_u64 sl2vl64;
843 struct ib_smp *in_mad = NULL;
844 struct ib_smp *out_mad = NULL;
845 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
849 if (mlx4_is_slave(to_mdev(ibdev)->dev)) {
854 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
855 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
856 if (!in_mad || !out_mad)
859 init_query_mad(in_mad);
860 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE;
861 in_mad->attr_mod = 0;
863 if (mlx4_is_mfunc(to_mdev(ibdev)->dev))
864 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
866 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
871 for (jj = 0; jj < 8; jj++)
872 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj];
873 *sl2vl_tbl = sl2vl64.sl64;
881 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev)
887 for (i = 1; i <= mdev->dev->caps.num_ports; i++) {
888 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
890 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl);
892 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n",
896 atomic64_set(&mdev->sl2vl[i - 1], sl2vl);
900 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
901 u16 *pkey, int netw_view)
903 struct ib_smp *in_mad = NULL;
904 struct ib_smp *out_mad = NULL;
905 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
908 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
909 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
910 if (!in_mad || !out_mad)
913 init_query_mad(in_mad);
914 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
915 in_mad->attr_mod = cpu_to_be32(index / 32);
917 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
918 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
920 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
925 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
933 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
935 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
938 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
939 struct ib_device_modify *props)
941 struct mlx4_cmd_mailbox *mailbox;
944 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
947 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
950 if (mlx4_is_slave(to_mdev(ibdev)->dev))
953 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
954 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
955 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
958 * If possible, pass node desc to FW, so it can generate
959 * a 144 trap. If cmd fails, just ignore.
961 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
965 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
966 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
967 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
969 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
974 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
977 struct mlx4_cmd_mailbox *mailbox;
980 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
982 return PTR_ERR(mailbox);
984 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
985 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
986 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
988 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
989 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
992 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
993 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
996 mlx4_free_cmd_mailbox(dev->dev, mailbox);
1000 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
1001 struct ib_port_modify *props)
1003 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
1004 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
1005 struct ib_port_attr attr;
1009 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
1010 * of whether port link layer is ETH or IB. For ETH ports, qkey
1011 * violations and port capabilities are not meaningful.
1016 mutex_lock(&mdev->cap_mask_mutex);
1018 err = mlx4_ib_query_port(ibdev, port, &attr);
1022 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1023 ~props->clr_port_cap_mask;
1025 err = mlx4_ib_SET_PORT(mdev, port,
1026 !!(mask & IB_PORT_RESET_QKEY_CNTR),
1030 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
1034 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
1035 struct ib_udata *udata)
1037 struct mlx4_ib_dev *dev = to_mdev(ibdev);
1038 struct mlx4_ib_ucontext *context;
1039 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
1040 struct mlx4_ib_alloc_ucontext_resp resp;
1043 if (!dev->ib_active)
1044 return ERR_PTR(-EAGAIN);
1046 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
1047 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
1048 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
1049 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1051 resp.dev_caps = dev->dev->caps.userspace_caps;
1052 resp.qp_tab_size = dev->dev->caps.num_qps;
1053 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
1054 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1055 resp.cqe_size = dev->dev->caps.cqe_size;
1058 context = kzalloc(sizeof(*context), GFP_KERNEL);
1060 return ERR_PTR(-ENOMEM);
1062 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
1065 return ERR_PTR(err);
1068 INIT_LIST_HEAD(&context->db_page_list);
1069 mutex_init(&context->db_page_mutex);
1071 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
1072 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
1074 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
1077 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
1079 return ERR_PTR(-EFAULT);
1082 return &context->ibucontext;
1085 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
1087 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1089 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
1095 static void mlx4_ib_vma_open(struct vm_area_struct *area)
1097 /* vma_open is called when a new VMA is created on top of our VMA.
1098 * This is done through either mremap flow or split_vma (usually due
1099 * to mlock, madvise, munmap, etc.). We do not support a clone of the
1100 * vma, as this VMA is strongly hardware related. Therefore we set the
1101 * vm_ops of the newly created/cloned VMA to NULL, to prevent it from
1102 * calling us again and trying to do incorrect actions. We assume that
1103 * the original vma size is exactly a single page that there will be no
1104 * "splitting" operations on.
1106 area->vm_ops = NULL;
1109 static void mlx4_ib_vma_close(struct vm_area_struct *area)
1111 struct mlx4_ib_vma_private_data *mlx4_ib_vma_priv_data;
1113 /* It's guaranteed that all VMAs opened on a FD are closed before the
1114 * file itself is closed, therefore no sync is needed with the regular
1115 * closing flow. (e.g. mlx4_ib_dealloc_ucontext) However need a sync
1116 * with accessing the vma as part of mlx4_ib_disassociate_ucontext.
1117 * The close operation is usually called under mm->mmap_sem except when
1118 * process is exiting. The exiting case is handled explicitly as part
1119 * of mlx4_ib_disassociate_ucontext.
1121 mlx4_ib_vma_priv_data = (struct mlx4_ib_vma_private_data *)
1122 area->vm_private_data;
1124 /* set the vma context pointer to null in the mlx4_ib driver's private
1125 * data to protect against a race condition in mlx4_ib_dissassociate_ucontext().
1127 mlx4_ib_vma_priv_data->vma = NULL;
1130 static const struct vm_operations_struct mlx4_ib_vm_ops = {
1131 .open = mlx4_ib_vma_open,
1132 .close = mlx4_ib_vma_close
1135 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext)
1139 struct vm_area_struct *vma;
1140 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1141 struct task_struct *owning_process = NULL;
1142 struct mm_struct *owning_mm = NULL;
1144 owning_process = get_pid_task(ibcontext->tgid, PIDTYPE_PID);
1145 if (!owning_process)
1148 owning_mm = get_task_mm(owning_process);
1150 pr_info("no mm, disassociate ucontext is pending task termination\n");
1152 /* make sure that task is dead before returning, it may
1153 * prevent a rare case of module down in parallel to a
1154 * call to mlx4_ib_vma_close.
1156 put_task_struct(owning_process);
1158 owning_process = get_pid_task(ibcontext->tgid,
1160 if (!owning_process ||
1161 owning_process->state == TASK_DEAD) {
1162 pr_info("disassociate ucontext done, task was terminated\n");
1163 /* in case task was dead need to release the task struct */
1165 put_task_struct(owning_process);
1171 /* need to protect from a race on closing the vma as part of
1172 * mlx4_ib_vma_close().
1174 down_write(&owning_mm->mmap_sem);
1175 if (!mmget_still_valid(owning_mm))
1177 for (i = 0; i < HW_BAR_COUNT; i++) {
1178 vma = context->hw_bar_info[i].vma;
1182 ret = zap_vma_ptes(context->hw_bar_info[i].vma,
1183 context->hw_bar_info[i].vma->vm_start,
1186 pr_err("Error: zap_vma_ptes failed for index=%d, ret=%d\n", i, ret);
1190 context->hw_bar_info[i].vma->vm_flags &=
1191 ~(VM_SHARED | VM_MAYSHARE);
1192 /* context going to be destroyed, should not access ops any more */
1193 context->hw_bar_info[i].vma->vm_ops = NULL;
1196 up_write(&owning_mm->mmap_sem);
1198 put_task_struct(owning_process);
1201 static void mlx4_ib_set_vma_data(struct vm_area_struct *vma,
1202 struct mlx4_ib_vma_private_data *vma_private_data)
1204 vma_private_data->vma = vma;
1205 vma->vm_private_data = vma_private_data;
1206 vma->vm_ops = &mlx4_ib_vm_ops;
1209 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1211 struct mlx4_ib_dev *dev = to_mdev(context->device);
1212 struct mlx4_ib_ucontext *mucontext = to_mucontext(context);
1214 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
1217 if (vma->vm_pgoff == 0) {
1218 /* We prevent double mmaping on same context */
1219 if (mucontext->hw_bar_info[HW_BAR_DB].vma)
1222 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1224 if (io_remap_pfn_range(vma, vma->vm_start,
1225 to_mucontext(context)->uar.pfn,
1226 PAGE_SIZE, vma->vm_page_prot))
1229 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_DB]);
1231 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
1232 /* We prevent double mmaping on same context */
1233 if (mucontext->hw_bar_info[HW_BAR_BF].vma)
1236 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
1238 if (io_remap_pfn_range(vma, vma->vm_start,
1239 to_mucontext(context)->uar.pfn +
1240 dev->dev->caps.num_uars,
1241 PAGE_SIZE, vma->vm_page_prot))
1244 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_BF]);
1246 } else if (vma->vm_pgoff == 3) {
1247 struct mlx4_clock_params params;
1250 /* We prevent double mmaping on same context */
1251 if (mucontext->hw_bar_info[HW_BAR_CLOCK].vma)
1254 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms);
1259 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1260 if (io_remap_pfn_range(vma, vma->vm_start,
1261 (pci_resource_start(dev->dev->persist->pdev,
1265 PAGE_SIZE, vma->vm_page_prot))
1268 mlx4_ib_set_vma_data(vma,
1269 &mucontext->hw_bar_info[HW_BAR_CLOCK]);
1277 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
1278 struct ib_ucontext *context,
1279 struct ib_udata *udata)
1281 struct mlx4_ib_pd *pd;
1284 pd = kmalloc(sizeof *pd, GFP_KERNEL);
1286 return ERR_PTR(-ENOMEM);
1288 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1291 return ERR_PTR(err);
1295 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
1296 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1298 return ERR_PTR(-EFAULT);
1304 static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
1306 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1312 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
1313 struct ib_ucontext *context,
1314 struct ib_udata *udata)
1316 struct mlx4_ib_xrcd *xrcd;
1317 struct ib_cq_init_attr cq_attr = {};
1320 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1321 return ERR_PTR(-ENOSYS);
1323 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
1325 return ERR_PTR(-ENOMEM);
1327 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
1331 xrcd->pd = ib_alloc_pd(ibdev, 0);
1332 if (IS_ERR(xrcd->pd)) {
1333 err = PTR_ERR(xrcd->pd);
1338 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
1339 if (IS_ERR(xrcd->cq)) {
1340 err = PTR_ERR(xrcd->cq);
1344 return &xrcd->ibxrcd;
1347 ib_dealloc_pd(xrcd->pd);
1349 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
1352 return ERR_PTR(err);
1355 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1357 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1358 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1359 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1365 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1367 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1368 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1369 struct mlx4_ib_gid_entry *ge;
1371 ge = kzalloc(sizeof *ge, GFP_KERNEL);
1376 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1377 ge->port = mqp->port;
1381 mutex_lock(&mqp->mutex);
1382 list_add_tail(&ge->list, &mqp->gid_list);
1383 mutex_unlock(&mqp->mutex);
1388 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1389 struct mlx4_ib_counters *ctr_table)
1391 struct counter_index *counter, *tmp_count;
1393 mutex_lock(&ctr_table->mutex);
1394 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1396 if (counter->allocated)
1397 mlx4_counter_free(ibdev->dev, counter->index);
1398 list_del(&counter->list);
1401 mutex_unlock(&ctr_table->mutex);
1404 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1407 struct net_device *ndev;
1413 spin_lock_bh(&mdev->iboe.lock);
1414 ndev = mdev->iboe.netdevs[mqp->port - 1];
1417 spin_unlock_bh(&mdev->iboe.lock);
1427 struct mlx4_ib_steering {
1428 struct list_head list;
1429 struct mlx4_flow_reg_id reg_id;
1433 #define LAST_ETH_FIELD vlan_tag
1434 #define LAST_IB_FIELD sl
1435 #define LAST_IPV4_FIELD dst_ip
1436 #define LAST_TCP_UDP_FIELD src_port
1438 /* Field is the last supported field */
1439 #define FIELDS_NOT_SUPPORTED(filter, field)\
1440 memchr_inv((void *)&filter.field +\
1441 sizeof(filter.field), 0,\
1443 offsetof(typeof(filter), field) -\
1444 sizeof(filter.field))
1446 static int parse_flow_attr(struct mlx4_dev *dev,
1448 union ib_flow_spec *ib_spec,
1449 struct _rule_hw *mlx4_spec)
1451 enum mlx4_net_trans_rule_id type;
1453 switch (ib_spec->type) {
1454 case IB_FLOW_SPEC_ETH:
1455 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD))
1458 type = MLX4_NET_TRANS_RULE_ID_ETH;
1459 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1461 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1463 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1464 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1466 case IB_FLOW_SPEC_IB:
1467 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD))
1470 type = MLX4_NET_TRANS_RULE_ID_IB;
1471 mlx4_spec->ib.l3_qpn =
1472 cpu_to_be32(qp_num);
1473 mlx4_spec->ib.qpn_mask =
1474 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1478 case IB_FLOW_SPEC_IPV4:
1479 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD))
1482 type = MLX4_NET_TRANS_RULE_ID_IPV4;
1483 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1484 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1485 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1486 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1489 case IB_FLOW_SPEC_TCP:
1490 case IB_FLOW_SPEC_UDP:
1491 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD))
1494 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1495 MLX4_NET_TRANS_RULE_ID_TCP :
1496 MLX4_NET_TRANS_RULE_ID_UDP;
1497 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1498 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1499 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1500 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1506 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1507 mlx4_hw_rule_sz(dev, type) < 0)
1509 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1510 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1511 return mlx4_hw_rule_sz(dev, type);
1514 struct default_rules {
1515 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1516 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1517 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1520 static const struct default_rules default_table[] = {
1522 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
1523 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1524 .rules_create_list = {IB_FLOW_SPEC_IB},
1525 .link_layer = IB_LINK_LAYER_INFINIBAND
1529 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1530 struct ib_flow_attr *flow_attr)
1534 const struct default_rules *pdefault_rules = default_table;
1535 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1537 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1538 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1539 memset(&field_types, 0, sizeof(field_types));
1541 if (link_layer != pdefault_rules->link_layer)
1544 ib_flow = flow_attr + 1;
1545 /* we assume the specs are sorted */
1546 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1547 j < flow_attr->num_of_specs; k++) {
1548 union ib_flow_spec *current_flow =
1549 (union ib_flow_spec *)ib_flow;
1551 /* same layer but different type */
1552 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1553 (pdefault_rules->mandatory_fields[k] &
1554 IB_FLOW_SPEC_LAYER_MASK)) &&
1555 (current_flow->type !=
1556 pdefault_rules->mandatory_fields[k]))
1559 /* same layer, try match next one */
1560 if (current_flow->type ==
1561 pdefault_rules->mandatory_fields[k]) {
1564 ((union ib_flow_spec *)ib_flow)->size;
1568 ib_flow = flow_attr + 1;
1569 for (j = 0; j < flow_attr->num_of_specs;
1570 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1571 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1572 /* same layer and same type */
1573 if (((union ib_flow_spec *)ib_flow)->type ==
1574 pdefault_rules->mandatory_not_fields[k])
1583 static int __mlx4_ib_create_default_rules(
1584 struct mlx4_ib_dev *mdev,
1586 const struct default_rules *pdefault_rules,
1587 struct _rule_hw *mlx4_spec) {
1591 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1592 union ib_flow_spec ib_spec = {};
1595 switch (pdefault_rules->rules_create_list[i]) {
1599 case IB_FLOW_SPEC_IB:
1600 ib_spec.type = IB_FLOW_SPEC_IB;
1601 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1608 /* We must put empty rule, qpn is being ignored */
1609 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1612 pr_info("invalid parsing\n");
1616 mlx4_spec = (void *)mlx4_spec + ret;
1622 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1624 enum mlx4_net_trans_promisc_mode flow_type,
1630 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1631 struct mlx4_cmd_mailbox *mailbox;
1632 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1635 static const u16 __mlx4_domain[] = {
1636 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1637 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1638 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1639 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1642 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1643 pr_err("Invalid priority value %d\n", flow_attr->priority);
1647 if (domain >= IB_FLOW_DOMAIN_NUM) {
1648 pr_err("Invalid domain value %d\n", domain);
1652 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1655 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1656 if (IS_ERR(mailbox))
1657 return PTR_ERR(mailbox);
1658 ctrl = mailbox->buf;
1660 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1661 flow_attr->priority);
1662 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1663 ctrl->port = flow_attr->port;
1664 ctrl->qpn = cpu_to_be32(qp->qp_num);
1666 ib_flow = flow_attr + 1;
1667 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1668 /* Add default flows */
1669 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1670 if (default_flow >= 0) {
1671 ret = __mlx4_ib_create_default_rules(
1672 mdev, qp, default_table + default_flow,
1673 mailbox->buf + size);
1675 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1680 for (i = 0; i < flow_attr->num_of_specs; i++) {
1681 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1682 mailbox->buf + size);
1684 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1687 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1691 if (mlx4_is_master(mdev->dev) && flow_type == MLX4_FS_REGULAR &&
1692 flow_attr->num_of_specs == 1) {
1693 struct _rule_hw *rule_header = (struct _rule_hw *)(ctrl + 1);
1694 enum ib_flow_spec_type header_spec =
1695 ((union ib_flow_spec *)(flow_attr + 1))->type;
1697 if (header_spec == IB_FLOW_SPEC_ETH)
1698 mlx4_handle_eth_header_mcast_prio(ctrl, rule_header);
1701 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1702 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1705 pr_err("mcg table is full. Fail to register network rule.\n");
1706 else if (ret == -ENXIO)
1707 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1709 pr_err("Invalid argument. Fail to register network rule.\n");
1711 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1715 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1718 err = mlx4_cmd(dev, reg_id, 0, 0,
1719 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1722 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1727 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1731 union ib_flow_spec *ib_spec;
1732 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1735 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1736 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1737 return 0; /* do nothing */
1739 ib_flow = flow_attr + 1;
1740 ib_spec = (union ib_flow_spec *)ib_flow;
1742 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1743 return 0; /* do nothing */
1745 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1746 flow_attr->port, qp->qp_num,
1747 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1752 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev,
1753 struct ib_flow_attr *flow_attr,
1754 enum mlx4_net_trans_promisc_mode *type)
1758 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) ||
1759 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) ||
1760 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) {
1764 if (flow_attr->num_of_specs == 0) {
1765 type[0] = MLX4_FS_MC_SNIFFER;
1766 type[1] = MLX4_FS_UC_SNIFFER;
1768 union ib_flow_spec *ib_spec;
1770 ib_spec = (union ib_flow_spec *)(flow_attr + 1);
1771 if (ib_spec->type != IB_FLOW_SPEC_ETH)
1774 /* if all is zero than MC and UC */
1775 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) {
1776 type[0] = MLX4_FS_MC_SNIFFER;
1777 type[1] = MLX4_FS_UC_SNIFFER;
1779 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01,
1780 ib_spec->eth.mask.dst_mac[1],
1781 ib_spec->eth.mask.dst_mac[2],
1782 ib_spec->eth.mask.dst_mac[3],
1783 ib_spec->eth.mask.dst_mac[4],
1784 ib_spec->eth.mask.dst_mac[5]};
1786 /* Above xor was only on MC bit, non empty mask is valid
1787 * only if this bit is set and rest are zero.
1789 if (!is_zero_ether_addr(&mac[0]))
1792 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
1793 type[0] = MLX4_FS_MC_SNIFFER;
1795 type[0] = MLX4_FS_UC_SNIFFER;
1802 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1803 struct ib_flow_attr *flow_attr,
1806 int err = 0, i = 0, j = 0;
1807 struct mlx4_ib_flow *mflow;
1808 enum mlx4_net_trans_promisc_mode type[2];
1809 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1810 int is_bonded = mlx4_is_bonded(dev);
1812 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt)
1813 return ERR_PTR(-EINVAL);
1815 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) &&
1816 (flow_attr->type != IB_FLOW_ATTR_NORMAL))
1817 return ERR_PTR(-EOPNOTSUPP);
1819 memset(type, 0, sizeof(type));
1821 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1827 switch (flow_attr->type) {
1828 case IB_FLOW_ATTR_NORMAL:
1829 /* If dont trap flag (continue match) is set, under specific
1830 * condition traffic be replicated to given qp,
1831 * without stealing it
1833 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) {
1834 err = mlx4_ib_add_dont_trap_rule(dev,
1840 type[0] = MLX4_FS_REGULAR;
1844 case IB_FLOW_ATTR_ALL_DEFAULT:
1845 type[0] = MLX4_FS_ALL_DEFAULT;
1848 case IB_FLOW_ATTR_MC_DEFAULT:
1849 type[0] = MLX4_FS_MC_DEFAULT;
1852 case IB_FLOW_ATTR_SNIFFER:
1853 type[0] = MLX4_FS_MIRROR_RX_PORT;
1854 type[1] = MLX4_FS_MIRROR_SX_PORT;
1862 while (i < ARRAY_SIZE(type) && type[i]) {
1863 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1864 &mflow->reg_id[i].id);
1866 goto err_create_flow;
1868 /* Application always sees one port so the mirror rule
1869 * must be on port #2
1871 flow_attr->port = 2;
1872 err = __mlx4_ib_create_flow(qp, flow_attr,
1874 &mflow->reg_id[j].mirror);
1875 flow_attr->port = 1;
1877 goto err_create_flow;
1884 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1885 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1886 &mflow->reg_id[i].id);
1888 goto err_create_flow;
1891 flow_attr->port = 2;
1892 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1893 &mflow->reg_id[j].mirror);
1894 flow_attr->port = 1;
1896 goto err_create_flow;
1899 /* function to create mirror rule */
1903 return &mflow->ibflow;
1907 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1908 mflow->reg_id[i].id);
1913 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1914 mflow->reg_id[j].mirror);
1919 return ERR_PTR(err);
1922 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1926 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1927 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1929 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1930 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1933 if (mflow->reg_id[i].mirror) {
1934 err = __mlx4_ib_destroy_flow(mdev->dev,
1935 mflow->reg_id[i].mirror);
1946 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1949 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1950 struct mlx4_dev *dev = mdev->dev;
1951 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1952 struct mlx4_ib_steering *ib_steering = NULL;
1953 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1954 struct mlx4_flow_reg_id reg_id;
1956 if (mdev->dev->caps.steering_mode ==
1957 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1958 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1963 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1965 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1968 pr_err("multicast attach op failed, err %d\n", err);
1973 if (mlx4_is_bonded(dev)) {
1974 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1975 (mqp->port == 1) ? 2 : 1,
1977 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1978 prot, ®_id.mirror);
1983 err = add_gid_entry(ibqp, gid);
1988 memcpy(ib_steering->gid.raw, gid->raw, 16);
1989 ib_steering->reg_id = reg_id;
1990 mutex_lock(&mqp->mutex);
1991 list_add(&ib_steering->list, &mqp->steering_rules);
1992 mutex_unlock(&mqp->mutex);
1997 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
2000 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
2001 prot, reg_id.mirror);
2008 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
2010 struct mlx4_ib_gid_entry *ge;
2011 struct mlx4_ib_gid_entry *tmp;
2012 struct mlx4_ib_gid_entry *ret = NULL;
2014 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
2015 if (!memcmp(raw, ge->gid.raw, 16)) {
2024 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
2027 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
2028 struct mlx4_dev *dev = mdev->dev;
2029 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
2030 struct net_device *ndev;
2031 struct mlx4_ib_gid_entry *ge;
2032 struct mlx4_flow_reg_id reg_id = {0, 0};
2033 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
2035 if (mdev->dev->caps.steering_mode ==
2036 MLX4_STEERING_MODE_DEVICE_MANAGED) {
2037 struct mlx4_ib_steering *ib_steering;
2039 mutex_lock(&mqp->mutex);
2040 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
2041 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
2042 list_del(&ib_steering->list);
2046 mutex_unlock(&mqp->mutex);
2047 if (&ib_steering->list == &mqp->steering_rules) {
2048 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
2051 reg_id = ib_steering->reg_id;
2055 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
2060 if (mlx4_is_bonded(dev)) {
2061 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
2062 prot, reg_id.mirror);
2067 mutex_lock(&mqp->mutex);
2068 ge = find_gid_entry(mqp, gid->raw);
2070 spin_lock_bh(&mdev->iboe.lock);
2071 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
2074 spin_unlock_bh(&mdev->iboe.lock);
2077 list_del(&ge->list);
2080 pr_warn("could not find mgid entry\n");
2082 mutex_unlock(&mqp->mutex);
2087 static int init_node_data(struct mlx4_ib_dev *dev)
2089 struct ib_smp *in_mad = NULL;
2090 struct ib_smp *out_mad = NULL;
2091 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
2094 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
2095 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
2096 if (!in_mad || !out_mad)
2099 init_query_mad(in_mad);
2100 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
2101 if (mlx4_is_master(dev->dev))
2102 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
2104 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2108 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
2110 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
2112 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2116 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
2117 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
2125 static ssize_t show_hca(struct device *device, struct device_attribute *attr,
2128 struct mlx4_ib_dev *dev =
2129 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2130 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
2133 static ssize_t show_rev(struct device *device, struct device_attribute *attr,
2136 struct mlx4_ib_dev *dev =
2137 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2138 return sprintf(buf, "%x\n", dev->dev->rev_id);
2141 static ssize_t show_board(struct device *device, struct device_attribute *attr,
2144 struct mlx4_ib_dev *dev =
2145 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2146 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
2147 dev->dev->board_id);
2150 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
2151 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
2152 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
2154 static struct device_attribute *mlx4_class_attributes[] = {
2160 struct diag_counter {
2165 #define DIAG_COUNTER(_name, _offset) \
2166 { .name = #_name, .offset = _offset }
2168 static const struct diag_counter diag_basic[] = {
2169 DIAG_COUNTER(rq_num_lle, 0x00),
2170 DIAG_COUNTER(sq_num_lle, 0x04),
2171 DIAG_COUNTER(rq_num_lqpoe, 0x08),
2172 DIAG_COUNTER(sq_num_lqpoe, 0x0C),
2173 DIAG_COUNTER(rq_num_lpe, 0x18),
2174 DIAG_COUNTER(sq_num_lpe, 0x1C),
2175 DIAG_COUNTER(rq_num_wrfe, 0x20),
2176 DIAG_COUNTER(sq_num_wrfe, 0x24),
2177 DIAG_COUNTER(sq_num_mwbe, 0x2C),
2178 DIAG_COUNTER(sq_num_bre, 0x34),
2179 DIAG_COUNTER(sq_num_rire, 0x44),
2180 DIAG_COUNTER(rq_num_rire, 0x48),
2181 DIAG_COUNTER(sq_num_rae, 0x4C),
2182 DIAG_COUNTER(rq_num_rae, 0x50),
2183 DIAG_COUNTER(sq_num_roe, 0x54),
2184 DIAG_COUNTER(sq_num_tree, 0x5C),
2185 DIAG_COUNTER(sq_num_rree, 0x64),
2186 DIAG_COUNTER(rq_num_rnr, 0x68),
2187 DIAG_COUNTER(sq_num_rnr, 0x6C),
2188 DIAG_COUNTER(rq_num_oos, 0x100),
2189 DIAG_COUNTER(sq_num_oos, 0x104),
2192 static const struct diag_counter diag_ext[] = {
2193 DIAG_COUNTER(rq_num_dup, 0x130),
2194 DIAG_COUNTER(sq_num_to, 0x134),
2197 static const struct diag_counter diag_device_only[] = {
2198 DIAG_COUNTER(num_cqovf, 0x1A0),
2199 DIAG_COUNTER(rq_num_udsdprd, 0x118),
2202 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev,
2205 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2206 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2208 if (!diag[!!port_num].name)
2211 return rdma_alloc_hw_stats_struct(diag[!!port_num].name,
2212 diag[!!port_num].num_counters,
2213 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2216 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev,
2217 struct rdma_hw_stats *stats,
2220 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2221 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2222 u32 hw_value[ARRAY_SIZE(diag_device_only) +
2223 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {};
2227 ret = mlx4_query_diag_counters(dev->dev,
2228 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS,
2229 diag[!!port].offset, hw_value,
2230 diag[!!port].num_counters, port);
2235 for (i = 0; i < diag[!!port].num_counters; i++)
2236 stats->value[i] = hw_value[i];
2238 return diag[!!port].num_counters;
2241 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev,
2249 num_counters = ARRAY_SIZE(diag_basic);
2251 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT)
2252 num_counters += ARRAY_SIZE(diag_ext);
2255 num_counters += ARRAY_SIZE(diag_device_only);
2257 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL);
2261 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL);
2265 *num = num_counters;
2274 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev,
2282 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) {
2283 name[i] = diag_basic[i].name;
2284 offset[i] = diag_basic[i].offset;
2287 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) {
2288 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) {
2289 name[j] = diag_ext[i].name;
2290 offset[j] = diag_ext[i].offset;
2295 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) {
2296 name[j] = diag_device_only[i].name;
2297 offset[j] = diag_device_only[i].offset;
2302 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev)
2304 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters;
2307 bool per_port = !!(ibdev->dev->caps.flags2 &
2308 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT);
2310 if (mlx4_is_slave(ibdev->dev))
2313 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2314 /* i == 1 means we are building port counters */
2318 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name,
2320 &diag[i].num_counters, i);
2324 mlx4_ib_fill_diag_counters(ibdev, diag[i].name,
2328 ibdev->ib_dev.get_hw_stats = mlx4_ib_get_hw_stats;
2329 ibdev->ib_dev.alloc_hw_stats = mlx4_ib_alloc_hw_stats;
2335 kfree(diag[i - 1].name);
2336 kfree(diag[i - 1].offset);
2342 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev)
2346 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2347 kfree(ibdev->diag_counters[i].offset);
2348 kfree(ibdev->diag_counters[i].name);
2352 #define MLX4_IB_INVALID_MAC ((u64)-1)
2353 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
2354 struct net_device *dev,
2358 u64 release_mac = MLX4_IB_INVALID_MAC;
2359 struct mlx4_ib_qp *qp;
2361 read_lock(&dev_base_lock);
2362 new_smac = mlx4_mac_to_u64(dev->dev_addr);
2363 read_unlock(&dev_base_lock);
2365 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2367 /* no need for update QP1 and mac registration in non-SRIOV */
2368 if (!mlx4_is_mfunc(ibdev->dev))
2371 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
2372 qp = ibdev->qp1_proxy[port - 1];
2376 struct mlx4_update_qp_params update_params;
2378 mutex_lock(&qp->mutex);
2379 old_smac = qp->pri.smac;
2380 if (new_smac == old_smac)
2383 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
2385 if (new_smac_index < 0)
2388 update_params.smac_index = new_smac_index;
2389 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
2391 release_mac = new_smac;
2394 /* if old port was zero, no mac was yet registered for this QP */
2395 if (qp->pri.smac_port)
2396 release_mac = old_smac;
2397 qp->pri.smac = new_smac;
2398 qp->pri.smac_port = port;
2399 qp->pri.smac_index = new_smac_index;
2403 if (release_mac != MLX4_IB_INVALID_MAC)
2404 mlx4_unregister_mac(ibdev->dev, port, release_mac);
2406 mutex_unlock(&qp->mutex);
2407 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
2410 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
2411 struct net_device *dev,
2412 unsigned long event)
2415 struct mlx4_ib_iboe *iboe;
2416 int update_qps_port = -1;
2421 iboe = &ibdev->iboe;
2423 spin_lock_bh(&iboe->lock);
2424 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2426 iboe->netdevs[port - 1] =
2427 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2429 if (dev == iboe->netdevs[port - 1] &&
2430 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2431 event == NETDEV_UP || event == NETDEV_CHANGE))
2432 update_qps_port = port;
2435 spin_unlock_bh(&iboe->lock);
2437 if (update_qps_port > 0)
2438 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2441 static int mlx4_ib_netdev_event(struct notifier_block *this,
2442 unsigned long event, void *ptr)
2444 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2445 struct mlx4_ib_dev *ibdev;
2447 if (!net_eq(dev_net(dev), &init_net))
2450 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2451 mlx4_ib_scan_netdevs(ibdev, dev, event);
2456 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2462 if (mlx4_is_master(ibdev->dev)) {
2463 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2465 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2467 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2469 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2470 /* master has the identity virt2phys pkey mapping */
2471 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2472 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2473 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2474 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2478 /* initialize pkey cache */
2479 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2481 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2483 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2489 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2491 int i, j, eq = 0, total_eqs = 0;
2493 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2494 sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2495 if (!ibdev->eq_table)
2498 for (i = 1; i <= dev->caps.num_ports; i++) {
2499 for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2501 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs))
2503 ibdev->eq_table[eq] = total_eqs;
2504 if (!mlx4_assign_eq(dev, i,
2505 &ibdev->eq_table[eq]))
2508 ibdev->eq_table[eq] = -1;
2512 for (i = eq; i < dev->caps.num_comp_vectors;
2513 ibdev->eq_table[i++] = -1)
2516 /* Advertise the new number of EQs to clients */
2517 ibdev->ib_dev.num_comp_vectors = eq;
2520 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2523 int total_eqs = ibdev->ib_dev.num_comp_vectors;
2525 /* no eqs were allocated */
2526 if (!ibdev->eq_table)
2529 /* Reset the advertised EQ number */
2530 ibdev->ib_dev.num_comp_vectors = 0;
2532 for (i = 0; i < total_eqs; i++)
2533 mlx4_release_eq(dev, ibdev->eq_table[i]);
2535 kfree(ibdev->eq_table);
2536 ibdev->eq_table = NULL;
2539 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2540 struct ib_port_immutable *immutable)
2542 struct ib_port_attr attr;
2543 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
2546 err = mlx4_ib_query_port(ibdev, port_num, &attr);
2550 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2551 immutable->gid_tbl_len = attr.gid_tbl_len;
2553 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) {
2554 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2556 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)
2557 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2558 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
2559 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |
2560 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
2563 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2568 static void get_fw_ver_str(struct ib_device *device, char *str,
2571 struct mlx4_ib_dev *dev =
2572 container_of(device, struct mlx4_ib_dev, ib_dev);
2573 snprintf(str, str_len, "%d.%d.%d",
2574 (int) (dev->dev->caps.fw_ver >> 32),
2575 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
2576 (int) dev->dev->caps.fw_ver & 0xffff);
2579 static void *mlx4_ib_add(struct mlx4_dev *dev)
2581 struct mlx4_ib_dev *ibdev;
2585 struct mlx4_ib_iboe *iboe;
2586 int ib_num_ports = 0;
2587 int num_req_counters;
2590 struct counter_index *new_counter_index = NULL;
2592 pr_info_once("%s", mlx4_ib_version);
2595 mlx4_foreach_ib_transport_port(i, dev)
2598 /* No point in registering a device with no ports... */
2602 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2604 dev_err(&dev->persist->pdev->dev,
2605 "Device struct alloc failed\n");
2609 iboe = &ibdev->iboe;
2611 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2614 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2617 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2619 if (!ibdev->uar_map)
2621 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2624 ibdev->bond_next_port = 0;
2626 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2627 ibdev->ib_dev.owner = THIS_MODULE;
2628 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2629 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2630 ibdev->num_ports = num_ports;
2631 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2632 1 : ibdev->num_ports;
2633 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2634 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
2635 ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev;
2636 ibdev->ib_dev.add_gid = mlx4_ib_add_gid;
2637 ibdev->ib_dev.del_gid = mlx4_ib_del_gid;
2639 if (dev->caps.userspace_caps)
2640 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2642 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2644 ibdev->ib_dev.uverbs_cmd_mask =
2645 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2646 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2647 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2648 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2649 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2650 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2651 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
2652 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2653 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2654 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2655 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
2656 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2657 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2658 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2659 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2660 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2661 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2662 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2663 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2664 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
2665 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
2666 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
2667 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2668 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
2670 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2671 ibdev->ib_dev.query_port = mlx4_ib_query_port;
2672 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
2673 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2674 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2675 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2676 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2677 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2678 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2679 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2680 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2681 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2682 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2683 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2684 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2685 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2686 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
2687 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
2688 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2689 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2690 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2691 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
2692 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
2693 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2694 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2695 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2696 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
2697 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
2698 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
2699 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2700 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2701 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2702 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2703 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
2704 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
2705 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
2706 ibdev->ib_dev.alloc_mr = mlx4_ib_alloc_mr;
2707 ibdev->ib_dev.map_mr_sg = mlx4_ib_map_mr_sg;
2708 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2709 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2710 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2711 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
2712 ibdev->ib_dev.get_dev_fw_str = get_fw_ver_str;
2713 ibdev->ib_dev.disassociate_ucontext = mlx4_ib_disassociate_ucontext;
2715 if (!mlx4_is_slave(ibdev->dev)) {
2716 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2717 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2718 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2719 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2722 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2723 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2724 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2725 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2727 ibdev->ib_dev.uverbs_cmd_mask |=
2728 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2729 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2732 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2733 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2734 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2735 ibdev->ib_dev.uverbs_cmd_mask |=
2736 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2737 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2740 if (check_flow_steering_support(dev)) {
2741 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2742 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2743 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2745 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2746 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2747 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2750 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2751 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) |
2752 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) |
2753 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP);
2755 mlx4_ib_alloc_eqs(dev, ibdev);
2757 spin_lock_init(&iboe->lock);
2759 if (init_node_data(ibdev))
2761 mlx4_init_sl2vl_tbl(ibdev);
2763 for (i = 0; i < ibdev->num_ports; ++i) {
2764 mutex_init(&ibdev->counters_table[i].mutex);
2765 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2768 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2769 for (i = 0; i < num_req_counters; ++i) {
2770 mutex_init(&ibdev->qp1_proxy_lock[i]);
2772 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2773 IB_LINK_LAYER_ETHERNET) {
2774 err = mlx4_counter_alloc(ibdev->dev, &counter_index);
2775 /* if failed to allocate a new counter, use default */
2778 mlx4_get_default_counter_index(dev,
2782 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2783 counter_index = mlx4_get_default_counter_index(dev,
2786 new_counter_index = kmalloc(sizeof(*new_counter_index),
2788 if (!new_counter_index) {
2790 mlx4_counter_free(ibdev->dev, counter_index);
2793 new_counter_index->index = counter_index;
2794 new_counter_index->allocated = allocated;
2795 list_add_tail(&new_counter_index->list,
2796 &ibdev->counters_table[i].counters_list);
2797 ibdev->counters_table[i].default_counter = counter_index;
2798 pr_info("counter index %d for port %d allocated %d\n",
2799 counter_index, i + 1, allocated);
2801 if (mlx4_is_bonded(dev))
2802 for (i = 1; i < ibdev->num_ports ; ++i) {
2804 kmalloc(sizeof(struct counter_index),
2806 if (!new_counter_index)
2808 new_counter_index->index = counter_index;
2809 new_counter_index->allocated = 0;
2810 list_add_tail(&new_counter_index->list,
2811 &ibdev->counters_table[i].counters_list);
2812 ibdev->counters_table[i].default_counter =
2816 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2819 spin_lock_init(&ibdev->sm_lock);
2820 mutex_init(&ibdev->cap_mask_mutex);
2821 INIT_LIST_HEAD(&ibdev->qp_list);
2822 spin_lock_init(&ibdev->reset_flow_resource_lock);
2824 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2826 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2827 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2828 MLX4_IB_UC_STEER_QPN_ALIGN,
2829 &ibdev->steer_qpn_base, 0);
2833 ibdev->ib_uc_qpns_bitmap =
2834 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2837 if (!ibdev->ib_uc_qpns_bitmap) {
2838 dev_err(&dev->persist->pdev->dev,
2839 "bit map alloc failed\n");
2840 goto err_steer_qp_release;
2843 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) {
2844 bitmap_zero(ibdev->ib_uc_qpns_bitmap,
2845 ibdev->steer_qpn_count);
2846 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2847 dev, ibdev->steer_qpn_base,
2848 ibdev->steer_qpn_base +
2849 ibdev->steer_qpn_count - 1);
2851 goto err_steer_free_bitmap;
2853 bitmap_fill(ibdev->ib_uc_qpns_bitmap,
2854 ibdev->steer_qpn_count);
2858 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2859 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2861 if (mlx4_ib_alloc_diag_counters(ibdev))
2862 goto err_steer_free_bitmap;
2864 if (ib_register_device(&ibdev->ib_dev, NULL))
2865 goto err_diag_counters;
2867 if (mlx4_ib_mad_init(ibdev))
2870 if (mlx4_ib_init_sriov(ibdev))
2873 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE ||
2874 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2875 if (!iboe->nb.notifier_call) {
2876 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2877 err = register_netdevice_notifier(&iboe->nb);
2879 iboe->nb.notifier_call = NULL;
2883 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2884 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT);
2891 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
2892 if (device_create_file(&ibdev->ib_dev.dev,
2893 mlx4_class_attributes[j]))
2897 ibdev->ib_active = true;
2898 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2899 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i),
2902 if (mlx4_is_mfunc(ibdev->dev))
2905 /* create paravirt contexts for any VFs which are active */
2906 if (mlx4_is_master(ibdev->dev)) {
2907 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2908 if (j == mlx4_master_func_num(ibdev->dev))
2910 if (mlx4_is_slave_active(ibdev->dev, j))
2911 do_slave_init(ibdev, j, 1);
2917 if (ibdev->iboe.nb.notifier_call) {
2918 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2919 pr_warn("failure unregistering notifier\n");
2920 ibdev->iboe.nb.notifier_call = NULL;
2922 flush_workqueue(wq);
2924 mlx4_ib_close_sriov(ibdev);
2927 mlx4_ib_mad_cleanup(ibdev);
2930 ib_unregister_device(&ibdev->ib_dev);
2933 mlx4_ib_diag_cleanup(ibdev);
2935 err_steer_free_bitmap:
2936 kfree(ibdev->ib_uc_qpns_bitmap);
2938 err_steer_qp_release:
2939 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2940 ibdev->steer_qpn_count);
2942 for (i = 0; i < ibdev->num_ports; ++i)
2943 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2946 mlx4_ib_free_eqs(dev, ibdev);
2947 iounmap(ibdev->uar_map);
2950 mlx4_uar_free(dev, &ibdev->priv_uar);
2953 mlx4_pd_free(dev, ibdev->priv_pdn);
2956 ib_dealloc_device(&ibdev->ib_dev);
2961 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2965 WARN_ON(!dev->ib_uc_qpns_bitmap);
2967 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2968 dev->steer_qpn_count,
2969 get_count_order(count));
2973 *qpn = dev->steer_qpn_base + offset;
2977 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2980 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2983 BUG_ON(qpn < dev->steer_qpn_base);
2985 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2986 qpn - dev->steer_qpn_base,
2987 get_count_order(count));
2990 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2995 struct ib_flow_attr *flow = NULL;
2996 struct ib_flow_spec_ib *ib_spec;
2999 flow_size = sizeof(struct ib_flow_attr) +
3000 sizeof(struct ib_flow_spec_ib);
3001 flow = kzalloc(flow_size, GFP_KERNEL);
3004 flow->port = mqp->port;
3005 flow->num_of_specs = 1;
3006 flow->size = flow_size;
3007 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
3008 ib_spec->type = IB_FLOW_SPEC_IB;
3009 ib_spec->size = sizeof(struct ib_flow_spec_ib);
3010 /* Add an empty rule for IB L2 */
3011 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
3013 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
3018 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
3024 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
3026 struct mlx4_ib_dev *ibdev = ibdev_ptr;
3030 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
3031 devlink_port_type_clear(mlx4_get_devlink_port(dev, i));
3032 ibdev->ib_active = false;
3033 flush_workqueue(wq);
3035 if (ibdev->iboe.nb.notifier_call) {
3036 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
3037 pr_warn("failure unregistering notifier\n");
3038 ibdev->iboe.nb.notifier_call = NULL;
3041 mlx4_ib_close_sriov(ibdev);
3042 mlx4_ib_mad_cleanup(ibdev);
3043 ib_unregister_device(&ibdev->ib_dev);
3044 mlx4_ib_diag_cleanup(ibdev);
3046 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
3047 ibdev->steer_qpn_count);
3048 kfree(ibdev->ib_uc_qpns_bitmap);
3050 iounmap(ibdev->uar_map);
3051 for (p = 0; p < ibdev->num_ports; ++p)
3052 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
3054 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
3055 mlx4_CLOSE_PORT(dev, p);
3057 mlx4_ib_free_eqs(dev, ibdev);
3059 mlx4_uar_free(dev, &ibdev->priv_uar);
3060 mlx4_pd_free(dev, ibdev->priv_pdn);
3061 ib_dealloc_device(&ibdev->ib_dev);
3064 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
3066 struct mlx4_ib_demux_work **dm = NULL;
3067 struct mlx4_dev *dev = ibdev->dev;
3069 unsigned long flags;
3070 struct mlx4_active_ports actv_ports;
3072 unsigned int first_port;
3074 if (!mlx4_is_master(dev))
3077 actv_ports = mlx4_get_active_ports(dev, slave);
3078 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
3079 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
3081 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
3083 pr_err("failed to allocate memory for tunneling qp update\n");
3087 for (i = 0; i < ports; i++) {
3088 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
3090 pr_err("failed to allocate memory for tunneling qp update work struct\n");
3095 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
3096 dm[i]->port = first_port + i + 1;
3097 dm[i]->slave = slave;
3098 dm[i]->do_init = do_init;
3101 /* initialize or tear down tunnel QPs for the slave */
3102 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
3103 if (!ibdev->sriov.is_going_down) {
3104 for (i = 0; i < ports; i++)
3105 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
3106 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3108 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3109 for (i = 0; i < ports; i++)
3117 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
3119 struct mlx4_ib_qp *mqp;
3120 unsigned long flags_qp;
3121 unsigned long flags_cq;
3122 struct mlx4_ib_cq *send_mcq, *recv_mcq;
3123 struct list_head cq_notify_list;
3124 struct mlx4_cq *mcq;
3125 unsigned long flags;
3127 pr_warn("mlx4_ib_handle_catas_error was started\n");
3128 INIT_LIST_HEAD(&cq_notify_list);
3130 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
3131 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
3133 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
3134 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
3135 if (mqp->sq.tail != mqp->sq.head) {
3136 send_mcq = to_mcq(mqp->ibqp.send_cq);
3137 spin_lock_irqsave(&send_mcq->lock, flags_cq);
3138 if (send_mcq->mcq.comp &&
3139 mqp->ibqp.send_cq->comp_handler) {
3140 if (!send_mcq->mcq.reset_notify_added) {
3141 send_mcq->mcq.reset_notify_added = 1;
3142 list_add_tail(&send_mcq->mcq.reset_notify,
3146 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
3148 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
3149 /* Now, handle the QP's receive queue */
3150 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
3151 /* no handling is needed for SRQ */
3152 if (!mqp->ibqp.srq) {
3153 if (mqp->rq.tail != mqp->rq.head) {
3154 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
3155 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
3156 if (recv_mcq->mcq.comp &&
3157 mqp->ibqp.recv_cq->comp_handler) {
3158 if (!recv_mcq->mcq.reset_notify_added) {
3159 recv_mcq->mcq.reset_notify_added = 1;
3160 list_add_tail(&recv_mcq->mcq.reset_notify,
3164 spin_unlock_irqrestore(&recv_mcq->lock,
3168 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
3171 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
3174 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
3175 pr_warn("mlx4_ib_handle_catas_error ended\n");
3178 static void handle_bonded_port_state_event(struct work_struct *work)
3180 struct ib_event_work *ew =
3181 container_of(work, struct ib_event_work, work);
3182 struct mlx4_ib_dev *ibdev = ew->ib_dev;
3183 enum ib_port_state bonded_port_state = IB_PORT_NOP;
3185 struct ib_event ibev;
3188 spin_lock_bh(&ibdev->iboe.lock);
3189 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
3190 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
3191 enum ib_port_state curr_port_state;
3197 (netif_running(curr_netdev) &&
3198 netif_carrier_ok(curr_netdev)) ?
3199 IB_PORT_ACTIVE : IB_PORT_DOWN;
3201 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
3202 curr_port_state : IB_PORT_ACTIVE;
3204 spin_unlock_bh(&ibdev->iboe.lock);
3206 ibev.device = &ibdev->ib_dev;
3207 ibev.element.port_num = 1;
3208 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
3209 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3211 ib_dispatch_event(&ibev);
3214 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port)
3219 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl);
3221 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n",
3225 atomic64_set(&mdev->sl2vl[port - 1], sl2vl);
3228 static void ib_sl2vl_update_work(struct work_struct *work)
3230 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
3231 struct mlx4_ib_dev *mdev = ew->ib_dev;
3232 int port = ew->port;
3234 mlx4_ib_sl2vl_update(mdev, port);
3239 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
3242 struct ib_event_work *ew;
3244 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3246 INIT_WORK(&ew->work, ib_sl2vl_update_work);
3249 queue_work(wq, &ew->work);
3251 pr_err("failed to allocate memory for sl2vl update work\n");
3255 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
3256 enum mlx4_dev_event event, unsigned long param)
3258 struct ib_event ibev;
3259 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
3260 struct mlx4_eqe *eqe = NULL;
3261 struct ib_event_work *ew;
3264 if (mlx4_is_bonded(dev) &&
3265 ((event == MLX4_DEV_EVENT_PORT_UP) ||
3266 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
3267 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3270 INIT_WORK(&ew->work, handle_bonded_port_state_event);
3272 queue_work(wq, &ew->work);
3276 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
3277 eqe = (struct mlx4_eqe *)param;
3282 case MLX4_DEV_EVENT_PORT_UP:
3283 if (p > ibdev->num_ports)
3285 if (!mlx4_is_slave(dev) &&
3286 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
3287 IB_LINK_LAYER_INFINIBAND) {
3288 if (mlx4_is_master(dev))
3289 mlx4_ib_invalidate_all_guid_record(ibdev, p);
3290 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST &&
3291 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT))
3292 mlx4_sched_ib_sl2vl_update_work(ibdev, p);
3294 ibev.event = IB_EVENT_PORT_ACTIVE;
3297 case MLX4_DEV_EVENT_PORT_DOWN:
3298 if (p > ibdev->num_ports)
3300 ibev.event = IB_EVENT_PORT_ERR;
3303 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3304 ibdev->ib_active = false;
3305 ibev.event = IB_EVENT_DEVICE_FATAL;
3306 mlx4_ib_handle_catas_error(ibdev);
3309 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3310 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3312 pr_err("failed to allocate memory for events work\n");
3316 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3317 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
3319 /* need to queue only for port owner, which uses GEN_EQE */
3320 if (mlx4_is_master(dev))
3321 queue_work(wq, &ew->work);
3323 handle_port_mgmt_change_event(&ew->work);
3326 case MLX4_DEV_EVENT_SLAVE_INIT:
3327 /* here, p is the slave id */
3328 do_slave_init(ibdev, p, 1);
3329 if (mlx4_is_master(dev)) {
3332 for (i = 1; i <= ibdev->num_ports; i++) {
3333 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3334 == IB_LINK_LAYER_INFINIBAND)
3335 mlx4_ib_slave_alias_guid_event(ibdev,
3342 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
3343 if (mlx4_is_master(dev)) {
3346 for (i = 1; i <= ibdev->num_ports; i++) {
3347 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3348 == IB_LINK_LAYER_INFINIBAND)
3349 mlx4_ib_slave_alias_guid_event(ibdev,
3354 /* here, p is the slave id */
3355 do_slave_init(ibdev, p, 0);
3362 ibev.device = ibdev_ptr;
3363 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
3365 ib_dispatch_event(&ibev);
3368 static struct mlx4_interface mlx4_ib_interface = {
3370 .remove = mlx4_ib_remove,
3371 .event = mlx4_ib_event,
3372 .protocol = MLX4_PROT_IB_IPV6,
3373 .flags = MLX4_INTFF_BONDING
3376 static int __init mlx4_ib_init(void)
3380 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM);
3384 err = mlx4_ib_mcg_init();
3388 err = mlx4_register_interface(&mlx4_ib_interface);
3395 mlx4_ib_mcg_destroy();
3398 destroy_workqueue(wq);
3402 static void __exit mlx4_ib_cleanup(void)
3404 mlx4_unregister_interface(&mlx4_ib_interface);
3405 mlx4_ib_mcg_destroy();
3406 destroy_workqueue(wq);
3409 module_init(mlx4_ib_init);
3410 module_exit(mlx4_ib_cleanup);