drivers/infiniband/hw/mlx4/mad.c

   1 /*
   2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <rdma/ib_mad.h>
  34 #include <rdma/ib_smi.h>
  35 #include <rdma/ib_sa.h>
  36 #include <rdma/ib_cache.h>
  37
  38 #include <linux/random.h>
  39 #include <linux/mlx4/cmd.h>
  40 #include <linux/gfp.h>
  41 #include <rdma/ib_pma.h>
  42
  43 #include <linux/mlx4/driver.h>
  44 #include "mlx4_ib.h"
  45
  46 enum {
  47         MLX4_IB_VENDOR_CLASS1 = 0x9,
  48         MLX4_IB_VENDOR_CLASS2 = 0xa
  49 };
  50
  51 #define MLX4_TUN_SEND_WRID_SHIFT 34
  52 #define MLX4_TUN_QPN_SHIFT 32
  53 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
  54 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
  55
  56 #define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
  57 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
  58
  59  /* Port mgmt change event handling */
  60
  61 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
  62 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
  63 #define NUM_IDX_IN_PKEY_TBL_BLK 32
  64 #define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
  65 #define GUID_TBL_BLK_NUM_ENTRIES 8
  66 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
  67
  68 struct mlx4_mad_rcv_buf {
  69         struct ib_grh grh;
  70         u8 payload[256];
  71 } __packed;
  72
  73 struct mlx4_mad_snd_buf {
  74         u8 payload[256];
  75 } __packed;
  76
  77 struct mlx4_tunnel_mad {
  78         struct ib_grh grh;
  79         struct mlx4_ib_tunnel_header hdr;
  80         struct ib_mad mad;
  81 } __packed;
  82
  83 struct mlx4_rcv_tunnel_mad {
  84         struct mlx4_rcv_tunnel_hdr hdr;
  85         struct ib_grh grh;
  86         struct ib_mad mad;
  87 } __packed;
  88
  89 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
  90 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
  91 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
  92                                 int block, u32 change_bitmap);
  93
  94 __be64 mlx4_ib_gen_node_guid(void)
  95 {
  96 #define NODE_GUID_HI    ((u64) (((u64)IB_OPENIB_OUI) << 40))
  97         return cpu_to_be64(NODE_GUID_HI | prandom_u32());
  98 }
  99
 100 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
 101 {
 102         return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
 103                 cpu_to_be64(0xff00000000000000LL);
 104 }
 105
 106 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
 107                  int port, const struct ib_wc *in_wc,
 108                  const struct ib_grh *in_grh,
 109                  const void *in_mad, void *response_mad)
 110 {
 111         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
 112         void *inbox;
 113         int err;
 114         u32 in_modifier = port;
 115         u8 op_modifier = 0;
 116
 117         inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 118         if (IS_ERR(inmailbox))
 119                 return PTR_ERR(inmailbox);
 120         inbox = inmailbox->buf;
 121
 122         outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 123         if (IS_ERR(outmailbox)) {
 124                 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 125                 return PTR_ERR(outmailbox);
 126         }
 127
 128         memcpy(inbox, in_mad, 256);
 129
 130         /*
 131          * Key check traps can't be generated unless we have in_wc to
 132          * tell us where to send the trap.
 133          */
 134         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
 135                 op_modifier |= 0x1;
 136         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
 137                 op_modifier |= 0x2;
 138         if (mlx4_is_mfunc(dev->dev) &&
 139             (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
 140                 op_modifier |= 0x8;
 141
 142         if (in_wc) {
 143                 struct {
 144                         __be32          my_qpn;
 145                         u32             reserved1;
 146                         __be32          rqpn;
 147                         u8              sl;
 148                         u8              g_path;
 149                         u16             reserved2[2];
 150                         __be16          pkey;
 151                         u32             reserved3[11];
 152                         u8              grh[40];
 153                 } *ext_info;
 154
 155                 memset(inbox + 256, 0, 256);
 156                 ext_info = inbox + 256;
 157
 158                 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
 159                 ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
 160                 ext_info->sl     = in_wc->sl << 4;
 161                 ext_info->g_path = in_wc->dlid_path_bits |
 162                         (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
 163                 ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
 164
 165                 if (in_grh)
 166                         memcpy(ext_info->grh, in_grh, 40);
 167
 168                 op_modifier |= 0x4;
 169
 170                 in_modifier |= in_wc->slid << 16;
 171         }
 172
 173         err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
 174                            mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
 175                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
 176                            (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
 177
 178         if (!err)
 179                 memcpy(response_mad, outmailbox->buf, 256);
 180
 181         mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 182         mlx4_free_cmd_mailbox(dev->dev, outmailbox);
 183
 184         return err;
 185 }
 186
 187 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
 188 {
 189         struct ib_ah *new_ah;
 190         struct ib_ah_attr ah_attr;
 191         unsigned long flags;
 192
 193         if (!dev->send_agent[port_num - 1][0])
 194                 return;
 195
 196         memset(&ah_attr, 0, sizeof ah_attr);
 197         ah_attr.dlid     = lid;
 198         ah_attr.sl       = sl;
 199         ah_attr.port_num = port_num;
 200
 201         new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
 202                               &ah_attr);
 203         if (IS_ERR(new_ah))
 204                 return;
 205
 206         spin_lock_irqsave(&dev->sm_lock, flags);
 207         if (dev->sm_ah[port_num - 1])
 208                 ib_destroy_ah(dev->sm_ah[port_num - 1]);
 209         dev->sm_ah[port_num - 1] = new_ah;
 210         spin_unlock_irqrestore(&dev->sm_lock, flags);
 211 }
 212
 213 /*
 214  * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
 215  * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
 216  */
 217 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
 218                       u16 prev_lid)
 219 {
 220         struct ib_port_info *pinfo;
 221         u16 lid;
 222         __be16 *base;
 223         u32 bn, pkey_change_bitmap;
 224         int i;
 225
 226
 227         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 228         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 229              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 230             mad->mad_hdr.method == IB_MGMT_METHOD_SET)
 231                 switch (mad->mad_hdr.attr_id) {
 232                 case IB_SMP_ATTR_PORT_INFO:
 233                         if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
 234                                 return;
 235                         pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
 236                         lid = be16_to_cpu(pinfo->lid);
 237
 238                         update_sm_ah(dev, port_num,
 239                                      be16_to_cpu(pinfo->sm_lid),
 240                                      pinfo->neighbormtu_mastersmsl & 0xf);
 241
 242                         if (pinfo->clientrereg_resv_subnetto & 0x80)
 243                                 handle_client_rereg_event(dev, port_num);
 244
 245                         if (prev_lid != lid)
 246                                 handle_lid_change_event(dev, port_num);
 247                         break;
 248
 249                 case IB_SMP_ATTR_PKEY_TABLE:
 250                         if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
 251                                 return;
 252                         if (!mlx4_is_mfunc(dev->dev)) {
 253                                 mlx4_ib_dispatch_event(dev, port_num,
 254                                                        IB_EVENT_PKEY_CHANGE);
 255                                 break;
 256                         }
 257
 258                         /* at this point, we are running in the master.
 259                          * Slaves do not receive SMPs.
 260                          */
 261                         bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
 262                         base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
 263                         pkey_change_bitmap = 0;
 264                         for (i = 0; i < 32; i++) {
 265                                 pr_debug("PKEY[%d] = x%x\n",
 266                                          i + bn*32, be16_to_cpu(base[i]));
 267                                 if (be16_to_cpu(base[i]) !=
 268                                     dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
 269                                         pkey_change_bitmap |= (1 << i);
 270                                         dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
 271                                                 be16_to_cpu(base[i]);
 272                                 }
 273                         }
 274                         pr_debug("PKEY Change event: port=%d, "
 275                                  "block=0x%x, change_bitmap=0x%x\n",
 276                                  port_num, bn, pkey_change_bitmap);
 277
 278                         if (pkey_change_bitmap) {
 279                                 mlx4_ib_dispatch_event(dev, port_num,
 280                                                        IB_EVENT_PKEY_CHANGE);
 281                                 if (!dev->sriov.is_going_down)
 282                                         __propagate_pkey_ev(dev, port_num, bn,
 283                                                             pkey_change_bitmap);
 284                         }
 285                         break;
 286
 287                 case IB_SMP_ATTR_GUID_INFO:
 288                         if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
 289                                 return;
 290                         /* paravirtualized master's guid is guid 0 -- does not change */
 291                         if (!mlx4_is_master(dev->dev))
 292                                 mlx4_ib_dispatch_event(dev, port_num,
 293                                                        IB_EVENT_GID_CHANGE);
 294                         /*if master, notify relevant slaves*/
 295                         if (mlx4_is_master(dev->dev) &&
 296                             !dev->sriov.is_going_down) {
 297                                 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
 298                                 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
 299                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
 300                                 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
 301                                                                      (u8 *)(&((struct ib_smp *)mad)->data));
 302                         }
 303                         break;
 304
 305                 case IB_SMP_ATTR_SL_TO_VL_TABLE:
 306                         /* cache sl to vl mapping changes for use in
 307                          * filling QP1 LRH VL field when sending packets
 308                          */
 309                         if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV &&
 310                             dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)
 311                                 return;
 312                         if (!mlx4_is_slave(dev->dev)) {
 313                                 union sl2vl_tbl_to_u64 sl2vl64;
 314                                 int jj;
 315
 316                                 for (jj = 0; jj < 8; jj++) {
 317                                         sl2vl64.sl8[jj] = ((struct ib_smp *)mad)->data[jj];
 318                                         pr_debug("port %u, sl2vl[%d] = %02x\n",
 319                                                  port_num, jj, sl2vl64.sl8[jj]);
 320                                 }
 321                                 atomic64_set(&dev->sl2vl[port_num - 1], sl2vl64.sl64);
 322                         }
 323                         break;
 324
 325                 default:
 326                         break;
 327                 }
 328 }
 329
 330 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 331                                 int block, u32 change_bitmap)
 332 {
 333         int i, ix, slave, err;
 334         int have_event = 0;
 335
 336         for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
 337                 if (slave == mlx4_master_func_num(dev->dev))
 338                         continue;
 339                 if (!mlx4_is_slave_active(dev->dev, slave))
 340                         continue;
 341
 342                 have_event = 0;
 343                 for (i = 0; i < 32; i++) {
 344                         if (!(change_bitmap & (1 << i)))
 345                                 continue;
 346                         for (ix = 0;
 347                              ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
 348                                 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
 349                                     [ix] == i + 32 * block) {
 350                                         err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
 351                                         pr_debug("propagate_pkey_ev: slave %d,"
 352                                                  " port %d, ix %d (%d)\n",
 353                                                  slave, port_num, ix, err);
 354                                         have_event = 1;
 355                                         break;
 356                                 }
 357                         }
 358                         if (have_event)
 359                                 break;
 360                 }
 361         }
 362 }
 363
 364 static void node_desc_override(struct ib_device *dev,
 365                                struct ib_mad *mad)
 366 {
 367         unsigned long flags;
 368
 369         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 370              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 371             mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
 372             mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
 373                 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
 374                 memcpy(((struct ib_smp *) mad)->data, dev->node_desc,
 375                        IB_DEVICE_NODE_DESC_MAX);
 376                 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
 377         }
 378 }
 379
 380 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
 381 {
 382         int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
 383         struct ib_mad_send_buf *send_buf;
 384         struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
 385         int ret;
 386         unsigned long flags;
 387
 388         if (agent) {
 389                 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
 390                                               IB_MGMT_MAD_DATA, GFP_ATOMIC,
 391                                               IB_MGMT_BASE_VERSION);
 392                 if (IS_ERR(send_buf))
 393                         return;
 394                 /*
 395                  * We rely here on the fact that MLX QPs don't use the
 396                  * address handle after the send is posted (this is
 397                  * wrong following the IB spec strictly, but we know
 398                  * it's OK for our devices).
 399                  */
 400                 spin_lock_irqsave(&dev->sm_lock, flags);
 401                 memcpy(send_buf->mad, mad, sizeof *mad);
 402                 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
 403                         ret = ib_post_send_mad(send_buf, NULL);
 404                 else
 405                         ret = -EINVAL;
 406                 spin_unlock_irqrestore(&dev->sm_lock, flags);
 407
 408                 if (ret)
 409                         ib_free_send_mad(send_buf);
 410         }
 411 }
 412
 413 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
 414                                                              struct ib_sa_mad *sa_mad)
 415 {
 416         int ret = 0;
 417
 418         /* dispatch to different sa handlers */
 419         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
 420         case IB_SA_ATTR_MC_MEMBER_REC:
 421                 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
 422                 break;
 423         default:
 424                 break;
 425         }
 426         return ret;
 427 }
 428
 429 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
 430 {
 431         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 432         int i;
 433
 434         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
 435                 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
 436                         return i;
 437         }
 438         return -1;
 439 }
 440
 441
 442 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
 443                                    u8 port, u16 pkey, u16 *ix)
 444 {
 445         int i, ret;
 446         u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
 447         u16 slot_pkey;
 448
 449         if (slave == mlx4_master_func_num(dev->dev))
 450                 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
 451
 452         unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
 453
 454         for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
 455                 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
 456                         continue;
 457
 458                 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
 459
 460                 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
 461                 if (ret)
 462                         continue;
 463                 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
 464                         if (slot_pkey & 0x8000) {
 465                                 *ix = (u16) pkey_ix;
 466                                 return 0;
 467                         } else {
 468                                 /* take first partial pkey index found */
 469                                 if (partial_ix == 0xFF)
 470                                         partial_ix = pkey_ix;
 471                         }
 472                 }
 473         }
 474
 475         if (partial_ix < 0xFF) {
 476                 *ix = (u16) partial_ix;
 477                 return 0;
 478         }
 479
 480         return -EINVAL;
 481 }
 482
 483 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
 484                           enum ib_qp_type dest_qpt, struct ib_wc *wc,
 485                           struct ib_grh *grh, struct ib_mad *mad)
 486 {
 487         struct ib_sge list;
 488         struct ib_ud_wr wr;
 489         struct ib_send_wr *bad_wr;
 490         struct mlx4_ib_demux_pv_ctx *tun_ctx;
 491         struct mlx4_ib_demux_pv_qp *tun_qp;
 492         struct mlx4_rcv_tunnel_mad *tun_mad;
 493         struct ib_ah_attr attr;
 494         struct ib_ah *ah;
 495         struct ib_qp *src_qp = NULL;
 496         unsigned tun_tx_ix = 0;
 497         int dqpn;
 498         int ret = 0;
 499         u16 tun_pkey_ix;
 500         u16 cached_pkey;
 501         u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
 502
 503         if (dest_qpt > IB_QPT_GSI)
 504                 return -EINVAL;
 505
 506         tun_ctx = dev->sriov.demux[port-1].tun[slave];
 507
 508         /* check if proxy qp created */
 509         if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
 510                 return -EAGAIN;
 511
 512         if (!dest_qpt)
 513                 tun_qp = &tun_ctx->qp[0];
 514         else
 515                 tun_qp = &tun_ctx->qp[1];
 516
 517         /* compute P_Key index to put in tunnel header for slave */
 518         if (dest_qpt) {
 519                 u16 pkey_ix;
 520                 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
 521                 if (ret)
 522                         return -EINVAL;
 523
 524                 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
 525                 if (ret)
 526                         return -EINVAL;
 527                 tun_pkey_ix = pkey_ix;
 528         } else
 529                 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
 530
 531         dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
 532
 533         /* get tunnel tx data buf for slave */
 534         src_qp = tun_qp->qp;
 535
 536         /* create ah. Just need an empty one with the port num for the post send.
 537          * The driver will set the force loopback bit in post_send */
 538         memset(&attr, 0, sizeof attr);
 539         attr.port_num = port;
 540         if (is_eth) {
 541                 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
 542                 attr.ah_flags = IB_AH_GRH;
 543         }
 544         ah = ib_create_ah(tun_ctx->pd, &attr);
 545         if (IS_ERR(ah))
 546                 return -ENOMEM;
 547
 548         /* allocate tunnel tx buf after pass failure returns */
 549         spin_lock(&tun_qp->tx_lock);
 550         if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
 551             (MLX4_NUM_TUNNEL_BUFS - 1))
 552                 ret = -EAGAIN;
 553         else
 554                 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
 555         spin_unlock(&tun_qp->tx_lock);
 556         if (ret)
 557                 goto end;
 558
 559         tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
 560         if (tun_qp->tx_ring[tun_tx_ix].ah)
 561                 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
 562         tun_qp->tx_ring[tun_tx_ix].ah = ah;
 563         ib_dma_sync_single_for_cpu(&dev->ib_dev,
 564                                    tun_qp->tx_ring[tun_tx_ix].buf.map,
 565                                    sizeof (struct mlx4_rcv_tunnel_mad),
 566                                    DMA_TO_DEVICE);
 567
 568         /* copy over to tunnel buffer */
 569         if (grh)
 570                 memcpy(&tun_mad->grh, grh, sizeof *grh);
 571         memcpy(&tun_mad->mad, mad, sizeof *mad);
 572
 573         /* adjust tunnel data */
 574         tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
 575         tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
 576         tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
 577
 578         if (is_eth) {
 579                 u16 vlan = 0;
 580                 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
 581                                                 NULL)) {
 582                         /* VST mode */
 583                         if (vlan != wc->vlan_id)
 584                                 /* Packet vlan is not the VST-assigned vlan.
 585                                  * Drop the packet.
 586                                  */
 587                                 goto out;
 588                          else
 589                                 /* Remove the vlan tag before forwarding
 590                                  * the packet to the VF.
 591                                  */
 592                                 vlan = 0xffff;
 593                 } else {
 594                         vlan = wc->vlan_id;
 595                 }
 596
 597                 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
 598                 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
 599                 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
 600         } else {
 601                 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
 602                 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
 603         }
 604
 605         ib_dma_sync_single_for_device(&dev->ib_dev,
 606                                       tun_qp->tx_ring[tun_tx_ix].buf.map,
 607                                       sizeof (struct mlx4_rcv_tunnel_mad),
 608                                       DMA_TO_DEVICE);
 609
 610         list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
 611         list.length = sizeof (struct mlx4_rcv_tunnel_mad);
 612         list.lkey = tun_ctx->pd->local_dma_lkey;
 613
 614         wr.ah = ah;
 615         wr.port_num = port;
 616         wr.remote_qkey = IB_QP_SET_QKEY;
 617         wr.remote_qpn = dqpn;
 618         wr.wr.next = NULL;
 619         wr.wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
 620         wr.wr.sg_list = &list;
 621         wr.wr.num_sge = 1;
 622         wr.wr.opcode = IB_WR_SEND;
 623         wr.wr.send_flags = IB_SEND_SIGNALED;
 624
 625         ret = ib_post_send(src_qp, &wr.wr, &bad_wr);
 626         if (!ret)
 627                 return 0;
 628  out:
 629         spin_lock(&tun_qp->tx_lock);
 630         tun_qp->tx_ix_tail++;
 631         spin_unlock(&tun_qp->tx_lock);
 632         tun_qp->tx_ring[tun_tx_ix].ah = NULL;
 633 end:
 634         ib_destroy_ah(ah);
 635         return ret;
 636 }
 637
 638 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
 639                         struct ib_wc *wc, struct ib_grh *grh,
 640                         struct ib_mad *mad)
 641 {
 642         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 643         int err, other_port;
 644         int slave = -1;
 645         u8 *slave_id;
 646         int is_eth = 0;
 647
 648         if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
 649                 is_eth = 0;
 650         else
 651                 is_eth = 1;
 652
 653         if (is_eth) {
 654                 if (!(wc->wc_flags & IB_WC_GRH)) {
 655                         mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
 656                         return -EINVAL;
 657                 }
 658                 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
 659                         mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
 660                         return -EINVAL;
 661                 }
 662                 err = mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave);
 663                 if (err && mlx4_is_mf_bonded(dev->dev)) {
 664                         other_port = (port == 1) ? 2 : 1;
 665                         err = mlx4_get_slave_from_roce_gid(dev->dev, other_port, grh->dgid.raw, &slave);
 666                         if (!err) {
 667                                 port = other_port;
 668                                 pr_debug("resolved slave %d from gid %pI6 wire port %d other %d\n",
 669                                          slave, grh->dgid.raw, port, other_port);
 670                         }
 671                 }
 672                 if (err) {
 673                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 674                         return -ENOENT;
 675                 }
 676                 if (slave >= dev->dev->caps.sqp_demux) {
 677                         mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 678                                      slave, dev->dev->caps.sqp_demux);
 679                         return -ENOENT;
 680                 }
 681
 682                 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
 683                         return 0;
 684
 685                 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 686                 if (err)
 687                         pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 688                                  slave, err);
 689                 return 0;
 690         }
 691
 692         /* Initially assume that this mad is for us */
 693         slave = mlx4_master_func_num(dev->dev);
 694
 695         /* See if the slave id is encoded in a response mad */
 696         if (mad->mad_hdr.method & 0x80) {
 697                 slave_id = (u8 *) &mad->mad_hdr.tid;
 698                 slave = *slave_id;
 699                 if (slave != 255) /*255 indicates the dom0*/
 700                         *slave_id = 0; /* remap tid */
 701         }
 702
 703         /* If a grh is present, we demux according to it */
 704         if (wc->wc_flags & IB_WC_GRH) {
 705                 if (grh->dgid.global.interface_id ==
 706                         cpu_to_be64(IB_SA_WELL_KNOWN_GUID) &&
 707                     grh->dgid.global.subnet_prefix == cpu_to_be64(
 708                         atomic64_read(&dev->sriov.demux[port - 1].subnet_prefix))) {
 709                         slave = 0;
 710                 } else {
 711                         slave = mlx4_ib_find_real_gid(ibdev, port,
 712                                                       grh->dgid.global.interface_id);
 713                         if (slave < 0) {
 714                                 mlx4_ib_warn(ibdev, "failed matching grh\n");
 715                                 return -ENOENT;
 716                         }
 717                 }
 718         }
 719         /* Class-specific handling */
 720         switch (mad->mad_hdr.mgmt_class) {
 721         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
 722         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
 723                 /* 255 indicates the dom0 */
 724                 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
 725                         if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
 726                                 return -EPERM;
 727                         /* for a VF. drop unsolicited MADs */
 728                         if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
 729                                 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
 730                                              slave, mad->mad_hdr.mgmt_class,
 731                                              mad->mad_hdr.method);
 732                                 return -EINVAL;
 733                         }
 734                 }
 735                 break;
 736         case IB_MGMT_CLASS_SUBN_ADM:
 737                 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
 738                                              (struct ib_sa_mad *) mad))
 739                         return 0;
 740                 break;
 741         case IB_MGMT_CLASS_CM:
 742                 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
 743                         return 0;
 744                 break;
 745         case IB_MGMT_CLASS_DEVICE_MGMT:
 746                 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
 747                         return 0;
 748                 break;
 749         default:
 750                 /* Drop unsupported classes for slaves in tunnel mode */
 751                 if (slave != mlx4_master_func_num(dev->dev)) {
 752                         pr_debug("dropping unsupported ingress mad from class:%d "
 753                                  "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
 754                         return 0;
 755                 }
 756         }
 757         /*make sure that no slave==255 was not handled yet.*/
 758         if (slave >= dev->dev->caps.sqp_demux) {
 759                 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 760                              slave, dev->dev->caps.sqp_demux);
 761                 return -ENOENT;
 762         }
 763
 764         err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 765         if (err)
 766                 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 767                          slave, err);
 768         return 0;
 769 }
 770
 771 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 772                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 773                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
 774 {
 775         u16 slid, prev_lid = 0;
 776         int err;
 777         struct ib_port_attr pattr;
 778
 779         if (in_wc && in_wc->qp->qp_num) {
 780                 pr_debug("received MAD: slid:%d sqpn:%d "
 781                         "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
 782                         in_wc->slid, in_wc->src_qp,
 783                         in_wc->dlid_path_bits,
 784                         in_wc->qp->qp_num,
 785                         in_wc->wc_flags,
 786                         in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
 787                         be16_to_cpu(in_mad->mad_hdr.attr_id));
 788                 if (in_wc->wc_flags & IB_WC_GRH) {
 789                         pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
 790                                  be64_to_cpu(in_grh->sgid.global.subnet_prefix),
 791                                  be64_to_cpu(in_grh->sgid.global.interface_id));
 792                         pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
 793                                  be64_to_cpu(in_grh->dgid.global.subnet_prefix),
 794                                  be64_to_cpu(in_grh->dgid.global.interface_id));
 795                 }
 796         }
 797
 798         slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
 799
 800         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
 801                 forward_trap(to_mdev(ibdev), port_num, in_mad);
 802                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 803         }
 804
 805         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 806             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
 807                 if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
 808                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
 809                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
 810                         return IB_MAD_RESULT_SUCCESS;
 811
 812                 /*
 813                  * Don't process SMInfo queries -- the SMA can't handle them.
 814                  */
 815                 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
 816                         return IB_MAD_RESULT_SUCCESS;
 817         } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
 818                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
 819                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
 820                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
 821                 if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
 822                     in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
 823                         return IB_MAD_RESULT_SUCCESS;
 824         } else
 825                 return IB_MAD_RESULT_SUCCESS;
 826
 827         if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 828              in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 829             in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
 830             in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
 831             !ib_query_port(ibdev, port_num, &pattr))
 832                 prev_lid = pattr.lid;
 833
 834         err = mlx4_MAD_IFC(to_mdev(ibdev),
 835                            (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
 836                            (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
 837                            MLX4_MAD_IFC_NET_VIEW,
 838                            port_num, in_wc, in_grh, in_mad, out_mad);
 839         if (err)
 840                 return IB_MAD_RESULT_FAILURE;
 841
 842         if (!out_mad->mad_hdr.status) {
 843                 smp_snoop(ibdev, port_num, in_mad, prev_lid);
 844                 /* slaves get node desc from FW */
 845                 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
 846                         node_desc_override(ibdev, out_mad);
 847         }
 848
 849         /* set return bit in status of directed route responses */
 850         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
 851                 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
 852
 853         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
 854                 /* no response for trap repress */
 855                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 856
 857         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 858 }
 859
 860 static void edit_counter(struct mlx4_counter *cnt, void *counters,
 861                          __be16 attr_id)
 862 {
 863         switch (attr_id) {
 864         case IB_PMA_PORT_COUNTERS:
 865         {
 866                 struct ib_pma_portcounters *pma_cnt =
 867                         (struct ib_pma_portcounters *)counters;
 868
 869                 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
 870                                      (be64_to_cpu(cnt->tx_bytes) >> 2));
 871                 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
 872                                      (be64_to_cpu(cnt->rx_bytes) >> 2));
 873                 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
 874                                      be64_to_cpu(cnt->tx_frames));
 875                 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
 876                                      be64_to_cpu(cnt->rx_frames));
 877                 break;
 878         }
 879         case IB_PMA_PORT_COUNTERS_EXT:
 880         {
 881                 struct ib_pma_portcounters_ext *pma_cnt_ext =
 882                         (struct ib_pma_portcounters_ext *)counters;
 883
 884                 pma_cnt_ext->port_xmit_data =
 885                         cpu_to_be64(be64_to_cpu(cnt->tx_bytes) >> 2);
 886                 pma_cnt_ext->port_rcv_data =
 887                         cpu_to_be64(be64_to_cpu(cnt->rx_bytes) >> 2);
 888                 pma_cnt_ext->port_xmit_packets = cnt->tx_frames;
 889                 pma_cnt_ext->port_rcv_packets = cnt->rx_frames;
 890                 break;
 891         }
 892         }
 893 }
 894
 895 static int iboe_process_mad_port_info(void *out_mad)
 896 {
 897         struct ib_class_port_info cpi = {};
 898
 899         cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
 900         memcpy(out_mad, &cpi, sizeof(cpi));
 901         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 902 }
 903
 904 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 905                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 906                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
 907 {
 908         struct mlx4_counter counter_stats;
 909         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 910         struct counter_index *tmp_counter;
 911         int err = IB_MAD_RESULT_FAILURE, stats_avail = 0;
 912
 913         if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
 914                 return -EINVAL;
 915
 916         if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)
 917                 return iboe_process_mad_port_info((void *)(out_mad->data + 40));
 918
 919         memset(&counter_stats, 0, sizeof(counter_stats));
 920         mutex_lock(&dev->counters_table[port_num - 1].mutex);
 921         list_for_each_entry(tmp_counter,
 922                             &dev->counters_table[port_num - 1].counters_list,
 923                             list) {
 924                 err = mlx4_get_counter_stats(dev->dev,
 925                                              tmp_counter->index,
 926                                              &counter_stats, 0);
 927                 if (err) {
 928                         err = IB_MAD_RESULT_FAILURE;
 929                         stats_avail = 0;
 930                         break;
 931                 }
 932                 stats_avail = 1;
 933         }
 934         mutex_unlock(&dev->counters_table[port_num - 1].mutex);
 935         if (stats_avail) {
 936                 memset(out_mad->data, 0, sizeof out_mad->data);
 937                 switch (counter_stats.counter_mode & 0xf) {
 938                 case 0:
 939                         edit_counter(&counter_stats,
 940                                      (void *)(out_mad->data + 40),
 941                                      in_mad->mad_hdr.attr_id);
 942                         err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 943                         break;
 944                 default:
 945                         err = IB_MAD_RESULT_FAILURE;
 946                 }
 947         }
 948
 949         return err;
 950 }
 951
 952 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 953                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 954                         const struct ib_mad_hdr *in, size_t in_mad_size,
 955                         struct ib_mad_hdr *out, size_t *out_mad_size,
 956                         u16 *out_mad_pkey_index)
 957 {
 958         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 959         const struct ib_mad *in_mad = (const struct ib_mad *)in;
 960         struct ib_mad *out_mad = (struct ib_mad *)out;
 961         enum rdma_link_layer link = rdma_port_get_link_layer(ibdev, port_num);
 962
 963         if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
 964                          *out_mad_size != sizeof(*out_mad)))
 965                 return IB_MAD_RESULT_FAILURE;
 966
 967         /* iboe_process_mad() which uses the HCA flow-counters to implement IB PMA
 968          * queries, should be called only by VFs and for that specific purpose
 969          */
 970         if (link == IB_LINK_LAYER_INFINIBAND) {
 971                 if (mlx4_is_slave(dev->dev) &&
 972                     (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
 973                      (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS ||
 974                       in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT ||
 975                       in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)))
 976                         return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 977                                                 in_grh, in_mad, out_mad);
 978
 979                 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
 980                                       in_grh, in_mad, out_mad);
 981         }
 982
 983         if (link == IB_LINK_LAYER_ETHERNET)
 984                 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 985                                         in_grh, in_mad, out_mad);
 986
 987         return -EINVAL;
 988 }
 989
 990 static void send_handler(struct ib_mad_agent *agent,
 991                          struct ib_mad_send_wc *mad_send_wc)
 992 {
 993         if (mad_send_wc->send_buf->context[0])
 994                 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
 995         ib_free_send_mad(mad_send_wc->send_buf);
 996 }
 997
 998 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
 999 {
1000         struct ib_mad_agent *agent;
1001         int p, q;
1002         int ret;
1003         enum rdma_link_layer ll;
1004
1005         for (p = 0; p < dev->num_ports; ++p) {
1006                 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
1007                 for (q = 0; q <= 1; ++q) {
1008                         if (ll == IB_LINK_LAYER_INFINIBAND) {
1009                                 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
1010                                                               q ? IB_QPT_GSI : IB_QPT_SMI,
1011                                                               NULL, 0, send_handler,
1012                                                               NULL, NULL, 0);
1013                                 if (IS_ERR(agent)) {
1014                                         ret = PTR_ERR(agent);
1015                                         goto err;
1016                                 }
1017                                 dev->send_agent[p][q] = agent;
1018                         } else
1019                                 dev->send_agent[p][q] = NULL;
1020                 }
1021         }
1022
1023         return 0;
1024
1025 err:
1026         for (p = 0; p < dev->num_ports; ++p)
1027                 for (q = 0; q <= 1; ++q)
1028                         if (dev->send_agent[p][q])
1029                                 ib_unregister_mad_agent(dev->send_agent[p][q]);
1030
1031         return ret;
1032 }
1033
1034 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
1035 {
1036         struct ib_mad_agent *agent;
1037         int p, q;
1038
1039         for (p = 0; p < dev->num_ports; ++p) {
1040                 for (q = 0; q <= 1; ++q) {
1041                         agent = dev->send_agent[p][q];
1042                         if (agent) {
1043                                 dev->send_agent[p][q] = NULL;
1044                                 ib_unregister_mad_agent(agent);
1045                         }
1046                 }
1047
1048                 if (dev->sm_ah[p])
1049                         ib_destroy_ah(dev->sm_ah[p]);
1050         }
1051 }
1052
1053 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
1054 {
1055         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
1056
1057         if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1058                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1059                                             MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
1060 }
1061
1062 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
1063 {
1064         /* re-configure the alias-guid and mcg's */
1065         if (mlx4_is_master(dev->dev)) {
1066                 mlx4_ib_invalidate_all_guid_record(dev, port_num);
1067
1068                 if (!dev->sriov.is_going_down) {
1069                         mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
1070                         mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1071                                                     MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
1072                 }
1073         }
1074
1075         /* Update the sl to vl table from inside client rereg
1076          * only if in secure-host mode (snooping is not possible)
1077          * and the sl-to-vl change event is not generated by FW.
1078          */
1079         if (!mlx4_is_slave(dev->dev) &&
1080             dev->dev->flags & MLX4_FLAG_SECURE_HOST &&
1081             !(dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) {
1082                 if (mlx4_is_master(dev->dev))
1083                         /* already in work queue from mlx4_ib_event queueing
1084                          * mlx4_handle_port_mgmt_change_event, which calls
1085                          * this procedure. Therefore, call sl2vl_update directly.
1086                          */
1087                         mlx4_ib_sl2vl_update(dev, port_num);
1088                 else
1089                         mlx4_sched_ib_sl2vl_update_work(dev, port_num);
1090         }
1091         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
1092 }
1093
1094 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
1095                               struct mlx4_eqe *eqe)
1096 {
1097         __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
1098                             GET_MASK_FROM_EQE(eqe));
1099 }
1100
1101 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
1102                                       u32 guid_tbl_blk_num, u32 change_bitmap)
1103 {
1104         struct ib_smp *in_mad  = NULL;
1105         struct ib_smp *out_mad  = NULL;
1106         u16 i;
1107
1108         if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
1109                 return;
1110
1111         in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
1112         out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1113         if (!in_mad || !out_mad) {
1114                 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
1115                 goto out;
1116         }
1117
1118         guid_tbl_blk_num  *= 4;
1119
1120         for (i = 0; i < 4; i++) {
1121                 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1122                         continue;
1123                 memset(in_mad, 0, sizeof *in_mad);
1124                 memset(out_mad, 0, sizeof *out_mad);
1125
1126                 in_mad->base_version  = 1;
1127                 in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1128                 in_mad->class_version = 1;
1129                 in_mad->method        = IB_MGMT_METHOD_GET;
1130                 in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
1131                 in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
1132
1133                 if (mlx4_MAD_IFC(dev,
1134                                  MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1135                                  port_num, NULL, NULL, in_mad, out_mad)) {
1136                         mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1137                         goto out;
1138                 }
1139
1140                 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1141                                                     port_num,
1142                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
1143                 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1144                                                      port_num,
1145                                                      (u8 *)(&((struct ib_smp *)out_mad)->data));
1146         }
1147
1148 out:
1149         kfree(in_mad);
1150         kfree(out_mad);
1151         return;
1152 }
1153
1154 void handle_port_mgmt_change_event(struct work_struct *work)
1155 {
1156         struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1157         struct mlx4_ib_dev *dev = ew->ib_dev;
1158         struct mlx4_eqe *eqe = &(ew->ib_eqe);
1159         u8 port = eqe->event.port_mgmt_change.port;
1160         u32 changed_attr;
1161         u32 tbl_block;
1162         u32 change_bitmap;
1163
1164         switch (eqe->subtype) {
1165         case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1166                 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1167
1168                 /* Update the SM ah - This should be done before handling
1169                    the other changed attributes so that MADs can be sent to the SM */
1170                 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1171                         u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1172                         u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1173                         update_sm_ah(dev, port, lid, sl);
1174                 }
1175
1176                 /* Check if it is a lid change event */
1177                 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1178                         handle_lid_change_event(dev, port);
1179
1180                 /* Generate GUID changed event */
1181                 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1182                         if (mlx4_is_master(dev->dev)) {
1183                                 union ib_gid gid;
1184                                 int err = 0;
1185
1186                                 if (!eqe->event.port_mgmt_change.params.port_info.gid_prefix)
1187                                         err = __mlx4_ib_query_gid(&dev->ib_dev, port, 0, &gid, 1);
1188                                 else
1189                                         gid.global.subnet_prefix =
1190                                                 eqe->event.port_mgmt_change.params.port_info.gid_prefix;
1191                                 if (err) {
1192                                         pr_warn("Could not change QP1 subnet prefix for port %d: query_gid error (%d)\n",
1193                                                 port, err);
1194                                 } else {
1195                                         pr_debug("Changing QP1 subnet prefix for port %d. old=0x%llx. new=0x%llx\n",
1196                                                  port,
1197                                                  (u64)atomic64_read(&dev->sriov.demux[port - 1].subnet_prefix),
1198                                                  be64_to_cpu(gid.global.subnet_prefix));
1199                                         atomic64_set(&dev->sriov.demux[port - 1].subnet_prefix,
1200                                                      be64_to_cpu(gid.global.subnet_prefix));
1201                                 }
1202                         }
1203                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1204                         /*if master, notify all slaves*/
1205                         if (mlx4_is_master(dev->dev))
1206                                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1207                                                             MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1208                 }
1209
1210                 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1211                         handle_client_rereg_event(dev, port);
1212                 break;
1213
1214         case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1215                 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1216                 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1217                         propagate_pkey_ev(dev, port, eqe);
1218                 break;
1219         case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1220                 /* paravirtualized master's guid is guid 0 -- does not change */
1221                 if (!mlx4_is_master(dev->dev))
1222                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1223                 /*if master, notify relevant slaves*/
1224                 else if (!dev->sriov.is_going_down) {
1225                         tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1226                         change_bitmap = GET_MASK_FROM_EQE(eqe);
1227                         handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1228                 }
1229                 break;
1230
1231         case MLX4_DEV_PMC_SUBTYPE_SL_TO_VL_MAP:
1232                 /* cache sl to vl mapping changes for use in
1233                  * filling QP1 LRH VL field when sending packets
1234                  */
1235                 if (!mlx4_is_slave(dev->dev)) {
1236                         union sl2vl_tbl_to_u64 sl2vl64;
1237                         int jj;
1238
1239                         for (jj = 0; jj < 8; jj++) {
1240                                 sl2vl64.sl8[jj] =
1241                                         eqe->event.port_mgmt_change.params.sl2vl_tbl_change_info.sl2vl_table[jj];
1242                                 pr_debug("port %u, sl2vl[%d] = %02x\n",
1243                                          port, jj, sl2vl64.sl8[jj]);
1244                         }
1245                         atomic64_set(&dev->sl2vl[port - 1], sl2vl64.sl64);
1246                 }
1247                 break;
1248         default:
1249                 pr_warn("Unsupported subtype 0x%x for "
1250                         "Port Management Change event\n", eqe->subtype);
1251         }
1252
1253         kfree(ew);
1254 }
1255
1256 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1257                             enum ib_event_type type)
1258 {
1259         struct ib_event event;
1260
1261         event.device            = &dev->ib_dev;
1262         event.element.port_num  = port_num;
1263         event.event             = type;
1264
1265         ib_dispatch_event(&event);
1266 }
1267
1268 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1269 {
1270         unsigned long flags;
1271         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1272         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1273         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1274         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1275                 queue_work(ctx->wq, &ctx->work);
1276         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1277 }
1278
1279 static void mlx4_ib_wire_comp_handler(struct ib_cq *cq, void *arg)
1280 {
1281         unsigned long flags;
1282         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1283         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1284
1285         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1286         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1287                 queue_work(ctx->wi_wq, &ctx->work);
1288         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1289 }
1290
1291 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1292                                   struct mlx4_ib_demux_pv_qp *tun_qp,
1293                                   int index)
1294 {
1295         struct ib_sge sg_list;
1296         struct ib_recv_wr recv_wr, *bad_recv_wr;
1297         int size;
1298
1299         size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1300                 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1301
1302         sg_list.addr = tun_qp->ring[index].map;
1303         sg_list.length = size;
1304         sg_list.lkey = ctx->pd->local_dma_lkey;
1305
1306         recv_wr.next = NULL;
1307         recv_wr.sg_list = &sg_list;
1308         recv_wr.num_sge = 1;
1309         recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1310                 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1311         ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1312                                       size, DMA_FROM_DEVICE);
1313         return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1314 }
1315
1316 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1317                 int slave, struct ib_sa_mad *sa_mad)
1318 {
1319         int ret = 0;
1320
1321         /* dispatch to different sa handlers */
1322         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1323         case IB_SA_ATTR_MC_MEMBER_REC:
1324                 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1325                 break;
1326         default:
1327                 break;
1328         }
1329         return ret;
1330 }
1331
1332 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1333 {
1334         int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1335
1336         return (qpn >= proxy_start && qpn <= proxy_start + 1);
1337 }
1338
1339
1340 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1341                          enum ib_qp_type dest_qpt, u16 pkey_index,
1342                          u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1343                          u8 *s_mac, u16 vlan_id, struct ib_mad *mad)
1344 {
1345         struct ib_sge list;
1346         struct ib_ud_wr wr;
1347         struct ib_send_wr *bad_wr;
1348         struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1349         struct mlx4_ib_demux_pv_qp *sqp;
1350         struct mlx4_mad_snd_buf *sqp_mad;
1351         struct ib_ah *ah;
1352         struct ib_qp *send_qp = NULL;
1353         unsigned wire_tx_ix = 0;
1354         int ret = 0;
1355         u16 wire_pkey_ix;
1356         int src_qpnum;
1357         u8 sgid_index;
1358
1359
1360         sqp_ctx = dev->sriov.sqps[port-1];
1361
1362         /* check if proxy qp created */
1363         if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1364                 return -EAGAIN;
1365
1366         if (dest_qpt == IB_QPT_SMI) {
1367                 src_qpnum = 0;
1368                 sqp = &sqp_ctx->qp[0];
1369                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1370         } else {
1371                 src_qpnum = 1;
1372                 sqp = &sqp_ctx->qp[1];
1373                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1374         }
1375
1376         send_qp = sqp->qp;
1377
1378         /* create ah */
1379         sgid_index = attr->grh.sgid_index;
1380         attr->grh.sgid_index = 0;
1381         ah = ib_create_ah(sqp_ctx->pd, attr);
1382         if (IS_ERR(ah))
1383                 return -ENOMEM;
1384         attr->grh.sgid_index = sgid_index;
1385         to_mah(ah)->av.ib.gid_index = sgid_index;
1386         /* get rid of force-loopback bit */
1387         to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1388         spin_lock(&sqp->tx_lock);
1389         if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1390             (MLX4_NUM_TUNNEL_BUFS - 1))
1391                 ret = -EAGAIN;
1392         else
1393                 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1394         spin_unlock(&sqp->tx_lock);
1395         if (ret)
1396                 goto out;
1397
1398         sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1399         if (sqp->tx_ring[wire_tx_ix].ah)
1400                 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1401         sqp->tx_ring[wire_tx_ix].ah = ah;
1402         ib_dma_sync_single_for_cpu(&dev->ib_dev,
1403                                    sqp->tx_ring[wire_tx_ix].buf.map,
1404                                    sizeof (struct mlx4_mad_snd_buf),
1405                                    DMA_TO_DEVICE);
1406
1407         memcpy(&sqp_mad->payload, mad, sizeof *mad);
1408
1409         ib_dma_sync_single_for_device(&dev->ib_dev,
1410                                       sqp->tx_ring[wire_tx_ix].buf.map,
1411                                       sizeof (struct mlx4_mad_snd_buf),
1412                                       DMA_TO_DEVICE);
1413
1414         list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1415         list.length = sizeof (struct mlx4_mad_snd_buf);
1416         list.lkey = sqp_ctx->pd->local_dma_lkey;
1417
1418         wr.ah = ah;
1419         wr.port_num = port;
1420         wr.pkey_index = wire_pkey_ix;
1421         wr.remote_qkey = qkey;
1422         wr.remote_qpn = remote_qpn;
1423         wr.wr.next = NULL;
1424         wr.wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1425         wr.wr.sg_list = &list;
1426         wr.wr.num_sge = 1;
1427         wr.wr.opcode = IB_WR_SEND;
1428         wr.wr.send_flags = IB_SEND_SIGNALED;
1429         if (s_mac)
1430                 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1431         if (vlan_id < 0x1000)
1432                 vlan_id |= (attr->sl & 7) << 13;
1433         to_mah(ah)->av.eth.vlan = cpu_to_be16(vlan_id);
1434
1435
1436         ret = ib_post_send(send_qp, &wr.wr, &bad_wr);
1437         if (!ret)
1438                 return 0;
1439
1440         spin_lock(&sqp->tx_lock);
1441         sqp->tx_ix_tail++;
1442         spin_unlock(&sqp->tx_lock);
1443         sqp->tx_ring[wire_tx_ix].ah = NULL;
1444 out:
1445         ib_destroy_ah(ah);
1446         return ret;
1447 }
1448
1449 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1450 {
1451         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1452                 return slave;
1453         return mlx4_get_base_gid_ix(dev->dev, slave, port);
1454 }
1455
1456 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1457                                     struct ib_ah_attr *ah_attr)
1458 {
1459         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1460                 ah_attr->grh.sgid_index = slave;
1461         else
1462                 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1463 }
1464
1465 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1466 {
1467         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1468         struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1469         int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1470         struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1471         struct mlx4_ib_ah ah;
1472         struct ib_ah_attr ah_attr;
1473         u8 *slave_id;
1474         int slave;
1475         int port;
1476         u16 vlan_id;
1477
1478         /* Get slave that sent this packet */
1479         if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1480             wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1481             (wc->src_qp & 0x1) != ctx->port - 1 ||
1482             wc->src_qp & 0x4) {
1483                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1484                 return;
1485         }
1486         slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1487         if (slave != ctx->slave) {
1488                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1489                              "belongs to another slave\n", wc->src_qp);
1490                 return;
1491         }
1492
1493         /* Map transaction ID */
1494         ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1495                                    sizeof (struct mlx4_tunnel_mad),
1496                                    DMA_FROM_DEVICE);
1497         switch (tunnel->mad.mad_hdr.method) {
1498         case IB_MGMT_METHOD_SET:
1499         case IB_MGMT_METHOD_GET:
1500         case IB_MGMT_METHOD_REPORT:
1501         case IB_SA_METHOD_GET_TABLE:
1502         case IB_SA_METHOD_DELETE:
1503         case IB_SA_METHOD_GET_MULTI:
1504         case IB_SA_METHOD_GET_TRACE_TBL:
1505                 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1506                 if (*slave_id) {
1507                         mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1508                                      "class:%d slave:%d\n", *slave_id,
1509                                      tunnel->mad.mad_hdr.mgmt_class, slave);
1510                         return;
1511                 } else
1512                         *slave_id = slave;
1513         default:
1514                 /* nothing */;
1515         }
1516
1517         /* Class-specific handling */
1518         switch (tunnel->mad.mad_hdr.mgmt_class) {
1519         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1520         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1521                 if (slave != mlx4_master_func_num(dev->dev) &&
1522                     !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1523                         return;
1524                 break;
1525         case IB_MGMT_CLASS_SUBN_ADM:
1526                 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1527                               (struct ib_sa_mad *) &tunnel->mad))
1528                         return;
1529                 break;
1530         case IB_MGMT_CLASS_CM:
1531                 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1532                               (struct ib_mad *) &tunnel->mad))
1533                         return;
1534                 break;
1535         case IB_MGMT_CLASS_DEVICE_MGMT:
1536                 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1537                     tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1538                         return;
1539                 break;
1540         default:
1541                 /* Drop unsupported classes for slaves in tunnel mode */
1542                 if (slave != mlx4_master_func_num(dev->dev)) {
1543                         mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1544                                      "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1545                         return;
1546                 }
1547         }
1548
1549         /* We are using standard ib_core services to send the mad, so generate a
1550          * stadard address handle by decoding the tunnelled mlx4_ah fields */
1551         memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1552         ah.ibah.device = ctx->ib_dev;
1553
1554         port = be32_to_cpu(ah.av.ib.port_pd) >> 24;
1555         port = mlx4_slave_convert_port(dev->dev, slave, port);
1556         if (port < 0)
1557                 return;
1558         ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff));
1559
1560         mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1561         if (ah_attr.ah_flags & IB_AH_GRH)
1562                 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1563
1564         memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1565         vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1566         /* if slave have default vlan use it */
1567         mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1568                                     &vlan_id, &ah_attr.sl);
1569
1570         mlx4_ib_send_to_wire(dev, slave, ctx->port,
1571                              is_proxy_qp0(dev, wc->src_qp, slave) ?
1572                              IB_QPT_SMI : IB_QPT_GSI,
1573                              be16_to_cpu(tunnel->hdr.pkey_index),
1574                              be32_to_cpu(tunnel->hdr.remote_qpn),
1575                              be32_to_cpu(tunnel->hdr.qkey),
1576                              &ah_attr, wc->smac, vlan_id, &tunnel->mad);
1577 }
1578
1579 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1580                                  enum ib_qp_type qp_type, int is_tun)
1581 {
1582         int i;
1583         struct mlx4_ib_demux_pv_qp *tun_qp;
1584         int rx_buf_size, tx_buf_size;
1585
1586         if (qp_type > IB_QPT_GSI)
1587                 return -EINVAL;
1588
1589         tun_qp = &ctx->qp[qp_type];
1590
1591         tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1592                                GFP_KERNEL);
1593         if (!tun_qp->ring)
1594                 return -ENOMEM;
1595
1596         tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1597                                   sizeof (struct mlx4_ib_tun_tx_buf),
1598                                   GFP_KERNEL);
1599         if (!tun_qp->tx_ring) {
1600                 kfree(tun_qp->ring);
1601                 tun_qp->ring = NULL;
1602                 return -ENOMEM;
1603         }
1604
1605         if (is_tun) {
1606                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1607                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1608         } else {
1609                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1610                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1611         }
1612
1613         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1614                 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1615                 if (!tun_qp->ring[i].addr)
1616                         goto err;
1617                 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1618                                                         tun_qp->ring[i].addr,
1619                                                         rx_buf_size,
1620                                                         DMA_FROM_DEVICE);
1621                 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1622                         kfree(tun_qp->ring[i].addr);
1623                         goto err;
1624                 }
1625         }
1626
1627         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1628                 tun_qp->tx_ring[i].buf.addr =
1629                         kmalloc(tx_buf_size, GFP_KERNEL);
1630                 if (!tun_qp->tx_ring[i].buf.addr)
1631                         goto tx_err;
1632                 tun_qp->tx_ring[i].buf.map =
1633                         ib_dma_map_single(ctx->ib_dev,
1634                                           tun_qp->tx_ring[i].buf.addr,
1635                                           tx_buf_size,
1636                                           DMA_TO_DEVICE);
1637                 if (ib_dma_mapping_error(ctx->ib_dev,
1638                                          tun_qp->tx_ring[i].buf.map)) {
1639                         kfree(tun_qp->tx_ring[i].buf.addr);
1640                         goto tx_err;
1641                 }
1642                 tun_qp->tx_ring[i].ah = NULL;
1643         }
1644         spin_lock_init(&tun_qp->tx_lock);
1645         tun_qp->tx_ix_head = 0;
1646         tun_qp->tx_ix_tail = 0;
1647         tun_qp->proxy_qpt = qp_type;
1648
1649         return 0;
1650
1651 tx_err:
1652         while (i > 0) {
1653                 --i;
1654                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1655                                     tx_buf_size, DMA_TO_DEVICE);
1656                 kfree(tun_qp->tx_ring[i].buf.addr);
1657         }
1658         i = MLX4_NUM_TUNNEL_BUFS;
1659 err:
1660         while (i > 0) {
1661                 --i;
1662                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1663                                     rx_buf_size, DMA_FROM_DEVICE);
1664                 kfree(tun_qp->ring[i].addr);
1665         }
1666         kfree(tun_qp->tx_ring);
1667         tun_qp->tx_ring = NULL;
1668         kfree(tun_qp->ring);
1669         tun_qp->ring = NULL;
1670         return -ENOMEM;
1671 }
1672
1673 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1674                                      enum ib_qp_type qp_type, int is_tun)
1675 {
1676         int i;
1677         struct mlx4_ib_demux_pv_qp *tun_qp;
1678         int rx_buf_size, tx_buf_size;
1679
1680         if (qp_type > IB_QPT_GSI)
1681                 return;
1682
1683         tun_qp = &ctx->qp[qp_type];
1684         if (is_tun) {
1685                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1686                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1687         } else {
1688                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1689                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1690         }
1691
1692
1693         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1694                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1695                                     rx_buf_size, DMA_FROM_DEVICE);
1696                 kfree(tun_qp->ring[i].addr);
1697         }
1698
1699         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1700                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1701                                     tx_buf_size, DMA_TO_DEVICE);
1702                 kfree(tun_qp->tx_ring[i].buf.addr);
1703                 if (tun_qp->tx_ring[i].ah)
1704                         ib_destroy_ah(tun_qp->tx_ring[i].ah);
1705         }
1706         kfree(tun_qp->tx_ring);
1707         kfree(tun_qp->ring);
1708 }
1709
1710 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1711 {
1712         struct mlx4_ib_demux_pv_ctx *ctx;
1713         struct mlx4_ib_demux_pv_qp *tun_qp;
1714         struct ib_wc wc;
1715         int ret;
1716         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1717         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1718
1719         while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1720                 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1721                 if (wc.status == IB_WC_SUCCESS) {
1722                         switch (wc.opcode) {
1723                         case IB_WC_RECV:
1724                                 mlx4_ib_multiplex_mad(ctx, &wc);
1725                                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1726                                                              wc.wr_id &
1727                                                              (MLX4_NUM_TUNNEL_BUFS - 1));
1728                                 if (ret)
1729                                         pr_err("Failed reposting tunnel "
1730                                                "buf:%lld\n", wc.wr_id);
1731                                 break;
1732                         case IB_WC_SEND:
1733                                 pr_debug("received tunnel send completion:"
1734                                          "wrid=0x%llx, status=0x%x\n",
1735                                          wc.wr_id, wc.status);
1736                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1737                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1738                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1739                                         = NULL;
1740                                 spin_lock(&tun_qp->tx_lock);
1741                                 tun_qp->tx_ix_tail++;
1742                                 spin_unlock(&tun_qp->tx_lock);
1743
1744                                 break;
1745                         default:
1746                                 break;
1747                         }
1748                 } else  {
1749                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1750                                  " status = %d, wrid = 0x%llx\n",
1751                                  ctx->slave, wc.status, wc.wr_id);
1752                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1753                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1754                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1755                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1756                                         = NULL;
1757                                 spin_lock(&tun_qp->tx_lock);
1758                                 tun_qp->tx_ix_tail++;
1759                                 spin_unlock(&tun_qp->tx_lock);
1760                         }
1761                 }
1762         }
1763 }
1764
1765 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1766 {
1767         struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1768
1769         /* It's worse than that! He's dead, Jim! */
1770         pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1771                event->event, sqp->port);
1772 }
1773
1774 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1775                             enum ib_qp_type qp_type, int create_tun)
1776 {
1777         int i, ret;
1778         struct mlx4_ib_demux_pv_qp *tun_qp;
1779         struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1780         struct ib_qp_attr attr;
1781         int qp_attr_mask_INIT;
1782
1783         if (qp_type > IB_QPT_GSI)
1784                 return -EINVAL;
1785
1786         tun_qp = &ctx->qp[qp_type];
1787
1788         memset(&qp_init_attr, 0, sizeof qp_init_attr);
1789         qp_init_attr.init_attr.send_cq = ctx->cq;
1790         qp_init_attr.init_attr.recv_cq = ctx->cq;
1791         qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1792         qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1793         qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1794         qp_init_attr.init_attr.cap.max_send_sge = 1;
1795         qp_init_attr.init_attr.cap.max_recv_sge = 1;
1796         if (create_tun) {
1797                 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1798                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1799                 qp_init_attr.port = ctx->port;
1800                 qp_init_attr.slave = ctx->slave;
1801                 qp_init_attr.proxy_qp_type = qp_type;
1802                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1803                            IB_QP_QKEY | IB_QP_PORT;
1804         } else {
1805                 qp_init_attr.init_attr.qp_type = qp_type;
1806                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1807                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1808         }
1809         qp_init_attr.init_attr.port_num = ctx->port;
1810         qp_init_attr.init_attr.qp_context = ctx;
1811         qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1812         tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1813         if (IS_ERR(tun_qp->qp)) {
1814                 ret = PTR_ERR(tun_qp->qp);
1815                 tun_qp->qp = NULL;
1816                 pr_err("Couldn't create %s QP (%d)\n",
1817                        create_tun ? "tunnel" : "special", ret);
1818                 return ret;
1819         }
1820
1821         memset(&attr, 0, sizeof attr);
1822         attr.qp_state = IB_QPS_INIT;
1823         ret = 0;
1824         if (create_tun)
1825                 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1826                                               ctx->port, IB_DEFAULT_PKEY_FULL,
1827                                               &attr.pkey_index);
1828         if (ret || !create_tun)
1829                 attr.pkey_index =
1830                         to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1831         attr.qkey = IB_QP1_QKEY;
1832         attr.port_num = ctx->port;
1833         ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1834         if (ret) {
1835                 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1836                        create_tun ? "tunnel" : "special", ret);
1837                 goto err_qp;
1838         }
1839         attr.qp_state = IB_QPS_RTR;
1840         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1841         if (ret) {
1842                 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1843                        create_tun ? "tunnel" : "special", ret);
1844                 goto err_qp;
1845         }
1846         attr.qp_state = IB_QPS_RTS;
1847         attr.sq_psn = 0;
1848         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1849         if (ret) {
1850                 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1851                        create_tun ? "tunnel" : "special", ret);
1852                 goto err_qp;
1853         }
1854
1855         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1856                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1857                 if (ret) {
1858                         pr_err(" mlx4_ib_post_pv_buf error"
1859                                " (err = %d, i = %d)\n", ret, i);
1860                         goto err_qp;
1861                 }
1862         }
1863         return 0;
1864
1865 err_qp:
1866         ib_destroy_qp(tun_qp->qp);
1867         tun_qp->qp = NULL;
1868         return ret;
1869 }
1870
1871 /*
1872  * IB MAD completion callback for real SQPs
1873  */
1874 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1875 {
1876         struct mlx4_ib_demux_pv_ctx *ctx;
1877         struct mlx4_ib_demux_pv_qp *sqp;
1878         struct ib_wc wc;
1879         struct ib_grh *grh;
1880         struct ib_mad *mad;
1881
1882         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1883         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1884
1885         while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1886                 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1887                 if (wc.status == IB_WC_SUCCESS) {
1888                         switch (wc.opcode) {
1889                         case IB_WC_SEND:
1890                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1891                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1892                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1893                                         = NULL;
1894                                 spin_lock(&sqp->tx_lock);
1895                                 sqp->tx_ix_tail++;
1896                                 spin_unlock(&sqp->tx_lock);
1897                                 break;
1898                         case IB_WC_RECV:
1899                                 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1900                                                 (sqp->ring[wc.wr_id &
1901                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1902                                 grh = &(((struct mlx4_mad_rcv_buf *)
1903                                                 (sqp->ring[wc.wr_id &
1904                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1905                                 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1906                                 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1907                                                            (MLX4_NUM_TUNNEL_BUFS - 1)))
1908                                         pr_err("Failed reposting SQP "
1909                                                "buf:%lld\n", wc.wr_id);
1910                                 break;
1911                         default:
1912                                 break;
1913                         }
1914                 } else  {
1915                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1916                                  " status = %d, wrid = 0x%llx\n",
1917                                  ctx->slave, wc.status, wc.wr_id);
1918                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1919                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1920                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1921                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1922                                         = NULL;
1923                                 spin_lock(&sqp->tx_lock);
1924                                 sqp->tx_ix_tail++;
1925                                 spin_unlock(&sqp->tx_lock);
1926                         }
1927                 }
1928         }
1929 }
1930
1931 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1932                                struct mlx4_ib_demux_pv_ctx **ret_ctx)
1933 {
1934         struct mlx4_ib_demux_pv_ctx *ctx;
1935
1936         *ret_ctx = NULL;
1937         ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1938         if (!ctx) {
1939                 pr_err("failed allocating pv resource context "
1940                        "for port %d, slave %d\n", port, slave);
1941                 return -ENOMEM;
1942         }
1943
1944         ctx->ib_dev = &dev->ib_dev;
1945         ctx->port = port;
1946         ctx->slave = slave;
1947         *ret_ctx = ctx;
1948         return 0;
1949 }
1950
1951 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1952 {
1953         if (dev->sriov.demux[port - 1].tun[slave]) {
1954                 kfree(dev->sriov.demux[port - 1].tun[slave]);
1955                 dev->sriov.demux[port - 1].tun[slave] = NULL;
1956         }
1957 }
1958
1959 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1960                                int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1961 {
1962         int ret, cq_size;
1963         struct ib_cq_init_attr cq_attr = {};
1964
1965         if (ctx->state != DEMUX_PV_STATE_DOWN)
1966                 return -EEXIST;
1967
1968         ctx->state = DEMUX_PV_STATE_STARTING;
1969         /* have QP0 only if link layer is IB */
1970         if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1971             IB_LINK_LAYER_INFINIBAND)
1972                 ctx->has_smi = 1;
1973
1974         if (ctx->has_smi) {
1975                 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1976                 if (ret) {
1977                         pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1978                         goto err_out;
1979                 }
1980         }
1981
1982         ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1983         if (ret) {
1984                 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1985                 goto err_out_qp0;
1986         }
1987
1988         cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1989         if (ctx->has_smi)
1990                 cq_size *= 2;
1991
1992         cq_attr.cqe = cq_size;
1993         ctx->cq = ib_create_cq(ctx->ib_dev,
1994                                create_tun ? mlx4_ib_tunnel_comp_handler : mlx4_ib_wire_comp_handler,
1995                                NULL, ctx, &cq_attr);
1996         if (IS_ERR(ctx->cq)) {
1997                 ret = PTR_ERR(ctx->cq);
1998                 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1999                 goto err_buf;
2000         }
2001
2002         ctx->pd = ib_alloc_pd(ctx->ib_dev, 0);
2003         if (IS_ERR(ctx->pd)) {
2004                 ret = PTR_ERR(ctx->pd);
2005                 pr_err("Couldn't create tunnel PD (%d)\n", ret);
2006                 goto err_cq;
2007         }
2008
2009         if (ctx->has_smi) {
2010                 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
2011                 if (ret) {
2012                         pr_err("Couldn't create %s QP0 (%d)\n",
2013                                create_tun ? "tunnel for" : "",  ret);
2014                         goto err_pd;
2015                 }
2016         }
2017
2018         ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
2019         if (ret) {
2020                 pr_err("Couldn't create %s QP1 (%d)\n",
2021                        create_tun ? "tunnel for" : "",  ret);
2022                 goto err_qp0;
2023         }
2024
2025         if (create_tun)
2026                 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
2027         else
2028                 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
2029
2030         ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
2031         ctx->wi_wq = to_mdev(ibdev)->sriov.demux[port - 1].wi_wq;
2032
2033         ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
2034         if (ret) {
2035                 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
2036                 goto err_wq;
2037         }
2038         ctx->state = DEMUX_PV_STATE_ACTIVE;
2039         return 0;
2040
2041 err_wq:
2042         ctx->wq = NULL;
2043         ib_destroy_qp(ctx->qp[1].qp);
2044         ctx->qp[1].qp = NULL;
2045
2046
2047 err_qp0:
2048         if (ctx->has_smi)
2049                 ib_destroy_qp(ctx->qp[0].qp);
2050         ctx->qp[0].qp = NULL;
2051
2052 err_pd:
2053         ib_dealloc_pd(ctx->pd);
2054         ctx->pd = NULL;
2055
2056 err_cq:
2057         ib_destroy_cq(ctx->cq);
2058         ctx->cq = NULL;
2059
2060 err_buf:
2061         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
2062
2063 err_out_qp0:
2064         if (ctx->has_smi)
2065                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
2066 err_out:
2067         ctx->state = DEMUX_PV_STATE_DOWN;
2068         return ret;
2069 }
2070
2071 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
2072                                  struct mlx4_ib_demux_pv_ctx *ctx, int flush)
2073 {
2074         if (!ctx)
2075                 return;
2076         if (ctx->state > DEMUX_PV_STATE_DOWN) {
2077                 ctx->state = DEMUX_PV_STATE_DOWNING;
2078                 if (flush)
2079                         flush_workqueue(ctx->wq);
2080                 if (ctx->has_smi) {
2081                         ib_destroy_qp(ctx->qp[0].qp);
2082                         ctx->qp[0].qp = NULL;
2083                         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
2084                 }
2085                 ib_destroy_qp(ctx->qp[1].qp);
2086                 ctx->qp[1].qp = NULL;
2087                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
2088                 ib_dealloc_pd(ctx->pd);
2089                 ctx->pd = NULL;
2090                 ib_destroy_cq(ctx->cq);
2091                 ctx->cq = NULL;
2092                 ctx->state = DEMUX_PV_STATE_DOWN;
2093         }
2094 }
2095
2096 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
2097                                   int port, int do_init)
2098 {
2099         int ret = 0;
2100
2101         if (!do_init) {
2102                 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
2103                 /* for master, destroy real sqp resources */
2104                 if (slave == mlx4_master_func_num(dev->dev))
2105                         destroy_pv_resources(dev, slave, port,
2106                                              dev->sriov.sqps[port - 1], 1);
2107                 /* destroy the tunnel qp resources */
2108                 destroy_pv_resources(dev, slave, port,
2109                                      dev->sriov.demux[port - 1].tun[slave], 1);
2110                 return 0;
2111         }
2112
2113         /* create the tunnel qp resources */
2114         ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
2115                                   dev->sriov.demux[port - 1].tun[slave]);
2116
2117         /* for master, create the real sqp resources */
2118         if (!ret && slave == mlx4_master_func_num(dev->dev))
2119                 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
2120                                           dev->sriov.sqps[port - 1]);
2121         return ret;
2122 }
2123
2124 void mlx4_ib_tunnels_update_work(struct work_struct *work)
2125 {
2126         struct mlx4_ib_demux_work *dmxw;
2127
2128         dmxw = container_of(work, struct mlx4_ib_demux_work, work);
2129         mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
2130                                dmxw->do_init);
2131         kfree(dmxw);
2132         return;
2133 }
2134
2135 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
2136                                        struct mlx4_ib_demux_ctx *ctx,
2137                                        int port)
2138 {
2139         char name[12];
2140         int ret = 0;
2141         int i;
2142
2143         ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
2144                            sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
2145         if (!ctx->tun)
2146                 return -ENOMEM;
2147
2148         ctx->dev = dev;
2149         ctx->port = port;
2150         ctx->ib_dev = &dev->ib_dev;
2151
2152         for (i = 0;
2153              i < min(dev->dev->caps.sqp_demux,
2154              (u16)(dev->dev->persist->num_vfs + 1));
2155              i++) {
2156                 struct mlx4_active_ports actv_ports =
2157                         mlx4_get_active_ports(dev->dev, i);
2158
2159                 if (!test_bit(port - 1, actv_ports.ports))
2160                         continue;
2161
2162                 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
2163                 if (ret) {
2164                         ret = -ENOMEM;
2165                         goto err_mcg;
2166                 }
2167         }
2168
2169         ret = mlx4_ib_mcg_port_init(ctx);
2170         if (ret) {
2171                 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
2172                 goto err_mcg;
2173         }
2174
2175         snprintf(name, sizeof(name), "mlx4_ibt%d", port);
2176         ctx->wq = alloc_ordered_workqueue(name, WQ_MEM_RECLAIM);
2177         if (!ctx->wq) {
2178                 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2179                 ret = -ENOMEM;
2180                 goto err_wq;
2181         }
2182
2183         snprintf(name, sizeof(name), "mlx4_ibwi%d", port);
2184         ctx->wi_wq = alloc_ordered_workqueue(name, WQ_MEM_RECLAIM);
2185         if (!ctx->wi_wq) {
2186                 pr_err("Failed to create wire WQ for port %d\n", port);
2187                 ret = -ENOMEM;
2188                 goto err_wiwq;
2189         }
2190
2191         snprintf(name, sizeof(name), "mlx4_ibud%d", port);
2192         ctx->ud_wq = alloc_ordered_workqueue(name, WQ_MEM_RECLAIM);
2193         if (!ctx->ud_wq) {
2194                 pr_err("Failed to create up/down WQ for port %d\n", port);
2195                 ret = -ENOMEM;
2196                 goto err_udwq;
2197         }
2198
2199         return 0;
2200
2201 err_udwq:
2202         destroy_workqueue(ctx->wi_wq);
2203         ctx->wi_wq = NULL;
2204
2205 err_wiwq:
2206         destroy_workqueue(ctx->wq);
2207         ctx->wq = NULL;
2208
2209 err_wq:
2210         mlx4_ib_mcg_port_cleanup(ctx, 1);
2211 err_mcg:
2212         for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2213                 free_pv_object(dev, i, port);
2214         kfree(ctx->tun);
2215         ctx->tun = NULL;
2216         return ret;
2217 }
2218
2219 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2220 {
2221         if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2222                 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2223                 flush_workqueue(sqp_ctx->wq);
2224                 if (sqp_ctx->has_smi) {
2225                         ib_destroy_qp(sqp_ctx->qp[0].qp);
2226                         sqp_ctx->qp[0].qp = NULL;
2227                         mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2228                 }
2229                 ib_destroy_qp(sqp_ctx->qp[1].qp);
2230                 sqp_ctx->qp[1].qp = NULL;
2231                 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2232                 ib_dealloc_pd(sqp_ctx->pd);
2233                 sqp_ctx->pd = NULL;
2234                 ib_destroy_cq(sqp_ctx->cq);
2235                 sqp_ctx->cq = NULL;
2236                 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2237         }
2238 }
2239
2240 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2241 {
2242         int i;
2243         if (ctx) {
2244                 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2245                 mlx4_ib_mcg_port_cleanup(ctx, 1);
2246                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2247                         if (!ctx->tun[i])
2248                                 continue;
2249                         if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2250                                 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2251                 }
2252                 flush_workqueue(ctx->wq);
2253                 flush_workqueue(ctx->wi_wq);
2254                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2255                         destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2256                         free_pv_object(dev, i, ctx->port);
2257                 }
2258                 kfree(ctx->tun);
2259                 destroy_workqueue(ctx->ud_wq);
2260                 destroy_workqueue(ctx->wi_wq);
2261                 destroy_workqueue(ctx->wq);
2262         }
2263 }
2264
2265 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2266 {
2267         int i;
2268
2269         if (!mlx4_is_master(dev->dev))
2270                 return;
2271         /* initialize or tear down tunnel QPs for the master */
2272         for (i = 0; i < dev->dev->caps.num_ports; i++)
2273                 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2274         return;
2275 }
2276
2277 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2278 {
2279         int i = 0;
2280         int err;
2281
2282         if (!mlx4_is_mfunc(dev->dev))
2283                 return 0;
2284
2285         dev->sriov.is_going_down = 0;
2286         spin_lock_init(&dev->sriov.going_down_lock);
2287         mlx4_ib_cm_paravirt_init(dev);
2288
2289         mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2290
2291         if (mlx4_is_slave(dev->dev)) {
2292                 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2293                 return 0;
2294         }
2295
2296         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2297                 if (i == mlx4_master_func_num(dev->dev))
2298                         mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2299                 else
2300                         mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2301         }
2302
2303         err = mlx4_ib_init_alias_guid_service(dev);
2304         if (err) {
2305                 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2306                 goto paravirt_err;
2307         }
2308         err = mlx4_ib_device_register_sysfs(dev);
2309         if (err) {
2310                 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2311                 goto sysfs_err;
2312         }
2313
2314         mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2315                      dev->dev->caps.sqp_demux);
2316         for (i = 0; i < dev->num_ports; i++) {
2317                 union ib_gid gid;
2318                 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2319                 if (err)
2320                         goto demux_err;
2321                 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2322                 atomic64_set(&dev->sriov.demux[i].subnet_prefix,
2323                              be64_to_cpu(gid.global.subnet_prefix));
2324                 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2325                                       &dev->sriov.sqps[i]);
2326                 if (err)
2327                         goto demux_err;
2328                 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2329                 if (err)
2330                         goto free_pv;
2331         }
2332         mlx4_ib_master_tunnels(dev, 1);
2333         return 0;
2334
2335 free_pv:
2336         free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2337 demux_err:
2338         while (--i >= 0) {
2339                 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2340                 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2341         }
2342         mlx4_ib_device_unregister_sysfs(dev);
2343
2344 sysfs_err:
2345         mlx4_ib_destroy_alias_guid_service(dev);
2346
2347 paravirt_err:
2348         mlx4_ib_cm_paravirt_clean(dev, -1);
2349
2350         return err;
2351 }
2352
2353 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2354 {
2355         int i;
2356         unsigned long flags;
2357
2358         if (!mlx4_is_mfunc(dev->dev))
2359                 return;
2360
2361         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2362         dev->sriov.is_going_down = 1;
2363         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2364         if (mlx4_is_master(dev->dev)) {
2365                 for (i = 0; i < dev->num_ports; i++) {
2366                         flush_workqueue(dev->sriov.demux[i].ud_wq);
2367                         mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2368                         kfree(dev->sriov.sqps[i]);
2369                         dev->sriov.sqps[i] = NULL;
2370                         mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2371                 }
2372
2373                 mlx4_ib_cm_paravirt_clean(dev, -1);
2374                 mlx4_ib_destroy_alias_guid_service(dev);
2375                 mlx4_ib_device_unregister_sysfs(dev);
2376         }
2377 }