1 /*******************************************************************************
3 * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenFabrics.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 *******************************************************************************/
38 struct i40iw_ucontext {
39 struct ib_ucontext ibucontext;
40 struct i40iw_device *iwdev;
41 struct list_head cq_reg_mem_list;
42 spinlock_t cq_reg_mem_list_lock; /* memory list for cq's */
43 struct list_head qp_reg_mem_list;
44 spinlock_t qp_reg_mem_list_lock; /* memory list for qp's */
50 struct i40iw_sc_pd sc_pd;
54 struct i40iw_hmc_pble {
62 struct i40iw_hmc_pble cq_pbl;
67 struct i40iw_hmc_pble sq_pbl;
68 struct i40iw_hmc_pble rq_pbl;
74 struct list_head list;
76 struct i40iw_qp_mr qp_mr;
77 struct i40iw_cq_mr cq_mr;
83 struct i40iw_pble_alloc pble_alloc;
84 struct i40iw_mr *iwmr;
87 #define MAX_SAVE_PAGE_ADDRS 4
94 struct ib_umem *region;
102 u64 pgaddrmem[MAX_SAVE_PAGE_ADDRS];
103 struct i40iw_pbl iwpbl;
108 struct i40iw_sc_cq sc_cq;
113 u32 polled_completions;
115 struct i40iw_dma_mem kmem;
116 spinlock_t lock; /* for poll cq */
117 struct i40iw_pbl *iwpbl;
120 struct disconn_work {
121 struct work_struct work;
122 struct i40iw_qp *iwqp;
126 struct ietf_mpa_frame;
127 struct i40iw_ud_file;
129 struct i40iw_qp_kmode {
130 struct i40iw_dma_mem dma_mem;
136 struct i40iw_sc_qp sc_qp;
137 struct i40iw_device *iwdev;
138 struct i40iw_cq *iwscq;
139 struct i40iw_cq *iwrcq;
140 struct i40iw_pd *iwpd;
141 struct i40iw_qp_host_ctx_info ctx_info;
142 struct i40iwarp_offload_info iwarp_info;
143 void *allocated_buffer;
145 struct iw_cm_id *cm_id;
147 struct ib_mr *lsmm_mr;
148 struct work_struct work;
149 enum ib_qp_state ibqp_state;
153 atomic_t close_timer_started;
154 spinlock_t lock; /* for post work requests */
155 struct i40iw_qp_context *iwqp_context;
157 dma_addr_t pbl_pbase;
167 u16 term_sq_flush_code;
168 u16 term_rq_flush_code;
171 struct i40iw_qp_kmode kqp;
172 struct i40iw_dma_mem host_ctx;
173 struct timer_list terminate_timer;
174 struct i40iw_pbl iwpbl;
175 struct i40iw_dma_mem q2_ctx_mem;
176 struct i40iw_dma_mem ietf_mem;
177 struct completion sq_drained;
178 struct completion rq_drained;