drivers/infiniband/hw/i40iw/i40iw_verbs.c

   1 /*******************************************************************************
   2 *
   3 * Copyright (c) 2015-2016 Intel Corporation.  All rights reserved.
   4 *
   5 * This software is available to you under a choice of one of two
   6 * licenses.  You may choose to be licensed under the terms of the GNU
   7 * General Public License (GPL) Version 2, available from the file
   8 * COPYING in the main directory of this source tree, or the
   9 * OpenFabrics.org BSD license below:
  10 *
  11 *   Redistribution and use in source and binary forms, with or
  12 *   without modification, are permitted provided that the following
  13 *   conditions are met:
  14 *
  15 *    - Redistributions of source code must retain the above
  16 *       copyright notice, this list of conditions and the following
  17 *       disclaimer.
  18 *
  19 *    - Redistributions in binary form must reproduce the above
  20 *       copyright notice, this list of conditions and the following
  21 *       disclaimer in the documentation and/or other materials
  22 *       provided with the distribution.
  23 *
  24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31 * SOFTWARE.
  32 *
  33 *******************************************************************************/
  34
  35 #include <linux/module.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/random.h>
  38 #include <linux/highmem.h>
  39 #include <linux/time.h>
  40 #include <linux/hugetlb.h>
  41 #include <asm/byteorder.h>
  42 #include <net/ip.h>
  43 #include <rdma/ib_verbs.h>
  44 #include <rdma/iw_cm.h>
  45 #include <rdma/ib_user_verbs.h>
  46 #include <rdma/ib_umem.h>
  47 #include "i40iw.h"
  48
  49 /**
  50  * i40iw_query_device - get device attributes
  51  * @ibdev: device pointer from stack
  52  * @props: returning device attributes
  53  * @udata: user data
  54  */
  55 static int i40iw_query_device(struct ib_device *ibdev,
  56                               struct ib_device_attr *props,
  57                               struct ib_udata *udata)
  58 {
  59         struct i40iw_device *iwdev = to_iwdev(ibdev);
  60
  61         if (udata->inlen || udata->outlen)
  62                 return -EINVAL;
  63         memset(props, 0, sizeof(*props));
  64         ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
  65         props->fw_ver = I40IW_FW_VERSION;
  66         props->device_cap_flags = iwdev->device_cap_flags;
  67         props->vendor_id = iwdev->ldev->pcidev->vendor;
  68         props->vendor_part_id = iwdev->ldev->pcidev->device;
  69         props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
  70         props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
  71         props->max_qp = iwdev->max_qp - iwdev->used_qps;
  72         props->max_qp_wr = (I40IW_MAX_WQ_ENTRIES >> 2) - 1;
  73         props->max_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  74         props->max_cq = iwdev->max_cq - iwdev->used_cqs;
  75         props->max_cqe = iwdev->max_cqe;
  76         props->max_mr = iwdev->max_mr - iwdev->used_mrs;
  77         props->max_pd = iwdev->max_pd - iwdev->used_pds;
  78         props->max_sge_rd = I40IW_MAX_SGE_RD;
  79         props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
  80         props->max_qp_init_rd_atom = props->max_qp_rd_atom;
  81         props->atomic_cap = IB_ATOMIC_NONE;
  82         props->max_map_per_fmr = 1;
  83         props->max_fast_reg_page_list_len = I40IW_MAX_PAGES_PER_FMR;
  84         return 0;
  85 }
  86
  87 /**
  88  * i40iw_query_port - get port attrubutes
  89  * @ibdev: device pointer from stack
  90  * @port: port number for query
  91  * @props: returning device attributes
  92  */
  93 static int i40iw_query_port(struct ib_device *ibdev,
  94                             u8 port,
  95                             struct ib_port_attr *props)
  96 {
  97         struct i40iw_device *iwdev = to_iwdev(ibdev);
  98         struct net_device *netdev = iwdev->netdev;
  99
 100         /* props being zeroed by the caller, avoid zeroing it here */
 101         props->max_mtu = IB_MTU_4096;
 102         props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
 103
 104         props->lid = 1;
 105         if (netif_carrier_ok(iwdev->netdev))
 106                 props->state = IB_PORT_ACTIVE;
 107         else
 108                 props->state = IB_PORT_DOWN;
 109         props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
 110                 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
 111         props->gid_tbl_len = 1;
 112         props->pkey_tbl_len = 1;
 113         props->active_width = IB_WIDTH_4X;
 114         props->active_speed = 1;
 115         props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
 116         return 0;
 117 }
 118
 119 /**
 120  * i40iw_alloc_ucontext - Allocate the user context data structure
 121  * @ibdev: device pointer from stack
 122  * @udata: user data
 123  *
 124  * This keeps track of all objects associated with a particular
 125  * user-mode client.
 126  */
 127 static struct ib_ucontext *i40iw_alloc_ucontext(struct ib_device *ibdev,
 128                                                 struct ib_udata *udata)
 129 {
 130         struct i40iw_device *iwdev = to_iwdev(ibdev);
 131         struct i40iw_alloc_ucontext_req req;
 132         struct i40iw_alloc_ucontext_resp uresp;
 133         struct i40iw_ucontext *ucontext;
 134
 135         if (ib_copy_from_udata(&req, udata, sizeof(req)))
 136                 return ERR_PTR(-EINVAL);
 137
 138         if (req.userspace_ver < 4 || req.userspace_ver > I40IW_ABI_VER) {
 139                 i40iw_pr_err("Unsupported provider library version %u.\n", req.userspace_ver);
 140                 return ERR_PTR(-EINVAL);
 141         }
 142
 143         memset(&uresp, 0, sizeof(uresp));
 144         uresp.max_qps = iwdev->max_qp;
 145         uresp.max_pds = iwdev->max_pd;
 146         uresp.wq_size = iwdev->max_qp_wr * 2;
 147         uresp.kernel_ver = req.userspace_ver;
 148
 149         ucontext = kzalloc(sizeof(*ucontext), GFP_KERNEL);
 150         if (!ucontext)
 151                 return ERR_PTR(-ENOMEM);
 152
 153         ucontext->iwdev = iwdev;
 154         ucontext->abi_ver = req.userspace_ver;
 155
 156         if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 157                 kfree(ucontext);
 158                 return ERR_PTR(-EFAULT);
 159         }
 160
 161         INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
 162         spin_lock_init(&ucontext->cq_reg_mem_list_lock);
 163         INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
 164         spin_lock_init(&ucontext->qp_reg_mem_list_lock);
 165
 166         return &ucontext->ibucontext;
 167 }
 168
 169 /**
 170  * i40iw_dealloc_ucontext - deallocate the user context data structure
 171  * @context: user context created during alloc
 172  */
 173 static int i40iw_dealloc_ucontext(struct ib_ucontext *context)
 174 {
 175         struct i40iw_ucontext *ucontext = to_ucontext(context);
 176         unsigned long flags;
 177
 178         spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
 179         if (!list_empty(&ucontext->cq_reg_mem_list)) {
 180                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 181                 return -EBUSY;
 182         }
 183         spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 184         spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
 185         if (!list_empty(&ucontext->qp_reg_mem_list)) {
 186                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 187                 return -EBUSY;
 188         }
 189         spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 190
 191         kfree(ucontext);
 192         return 0;
 193 }
 194
 195 /**
 196  * i40iw_mmap - user memory map
 197  * @context: context created during alloc
 198  * @vma: kernel info for user memory map
 199  */
 200 static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
 201 {
 202         struct i40iw_ucontext *ucontext = to_ucontext(context);
 203         u64 dbaddr;
 204
 205         if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
 206                 return -EINVAL;
 207
 208         dbaddr = I40IW_DB_ADDR_OFFSET + pci_resource_start(ucontext->iwdev->ldev->pcidev, 0);
 209
 210         if (io_remap_pfn_range(vma, vma->vm_start, dbaddr >> PAGE_SHIFT, PAGE_SIZE,
 211                                pgprot_noncached(vma->vm_page_prot)))
 212                 return -EAGAIN;
 213
 214         return 0;
 215 }
 216
 217 /**
 218  * i40iw_alloc_push_page - allocate a push page for qp
 219  * @iwdev: iwarp device
 220  * @qp: hardware control qp
 221  */
 222 static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 223 {
 224         struct i40iw_cqp_request *cqp_request;
 225         struct cqp_commands_info *cqp_info;
 226         enum i40iw_status_code status;
 227
 228         if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
 229                 return;
 230
 231         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
 232         if (!cqp_request)
 233                 return;
 234
 235         atomic_inc(&cqp_request->refcount);
 236
 237         cqp_info = &cqp_request->info;
 238         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 239         cqp_info->post_sq = 1;
 240
 241         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 242         cqp_info->in.u.manage_push_page.info.free_page = 0;
 243         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 244         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 245
 246         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 247         if (!status)
 248                 qp->push_idx = cqp_request->compl_info.op_ret_val;
 249         else
 250                 i40iw_pr_err("CQP-OP Push page fail");
 251         i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
 252 }
 253
 254 /**
 255  * i40iw_dealloc_push_page - free a push page for qp
 256  * @iwdev: iwarp device
 257  * @qp: hardware control qp
 258  */
 259 static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 260 {
 261         struct i40iw_cqp_request *cqp_request;
 262         struct cqp_commands_info *cqp_info;
 263         enum i40iw_status_code status;
 264
 265         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
 266                 return;
 267
 268         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
 269         if (!cqp_request)
 270                 return;
 271
 272         cqp_info = &cqp_request->info;
 273         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 274         cqp_info->post_sq = 1;
 275
 276         cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
 277         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 278         cqp_info->in.u.manage_push_page.info.free_page = 1;
 279         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 280         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 281
 282         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 283         if (!status)
 284                 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 285         else
 286                 i40iw_pr_err("CQP-OP Push page fail");
 287 }
 288
 289 /**
 290  * i40iw_alloc_pd - allocate protection domain
 291  * @ibdev: device pointer from stack
 292  * @context: user context created during alloc
 293  * @udata: user data
 294  */
 295 static struct ib_pd *i40iw_alloc_pd(struct ib_device *ibdev,
 296                                     struct ib_ucontext *context,
 297                                     struct ib_udata *udata)
 298 {
 299         struct i40iw_pd *iwpd;
 300         struct i40iw_device *iwdev = to_iwdev(ibdev);
 301         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 302         struct i40iw_alloc_pd_resp uresp;
 303         struct i40iw_sc_pd *sc_pd;
 304         struct i40iw_ucontext *ucontext;
 305         u32 pd_id = 0;
 306         int err;
 307
 308         if (iwdev->closing)
 309                 return ERR_PTR(-ENODEV);
 310
 311         err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
 312                                    iwdev->max_pd, &pd_id, &iwdev->next_pd);
 313         if (err) {
 314                 i40iw_pr_err("alloc resource failed\n");
 315                 return ERR_PTR(err);
 316         }
 317
 318         iwpd = kzalloc(sizeof(*iwpd), GFP_KERNEL);
 319         if (!iwpd) {
 320                 err = -ENOMEM;
 321                 goto free_res;
 322         }
 323
 324         sc_pd = &iwpd->sc_pd;
 325
 326         if (context) {
 327                 ucontext = to_ucontext(context);
 328                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
 329                 memset(&uresp, 0, sizeof(uresp));
 330                 uresp.pd_id = pd_id;
 331                 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 332                         err = -EFAULT;
 333                         goto error;
 334                 }
 335         } else {
 336                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, -1);
 337         }
 338
 339         i40iw_add_pdusecount(iwpd);
 340         return &iwpd->ibpd;
 341 error:
 342         kfree(iwpd);
 343 free_res:
 344         i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
 345         return ERR_PTR(err);
 346 }
 347
 348 /**
 349  * i40iw_dealloc_pd - deallocate pd
 350  * @ibpd: ptr of pd to be deallocated
 351  */
 352 static int i40iw_dealloc_pd(struct ib_pd *ibpd)
 353 {
 354         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 355         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 356
 357         i40iw_rem_pdusecount(iwpd, iwdev);
 358         return 0;
 359 }
 360
 361 /**
 362  * i40iw_qp_roundup - return round up qp ring size
 363  * @wr_ring_size: ring size to round up
 364  */
 365 static int i40iw_qp_roundup(u32 wr_ring_size)
 366 {
 367         int scount = 1;
 368
 369         if (wr_ring_size < I40IWQP_SW_MIN_WQSIZE)
 370                 wr_ring_size = I40IWQP_SW_MIN_WQSIZE;
 371
 372         for (wr_ring_size--; scount <= 16; scount *= 2)
 373                 wr_ring_size |= wr_ring_size >> scount;
 374         return ++wr_ring_size;
 375 }
 376
 377 /**
 378  * i40iw_get_pbl - Retrieve pbl from a list given a virtual
 379  * address
 380  * @va: user virtual address
 381  * @pbl_list: pbl list to search in (QP's or CQ's)
 382  */
 383 static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
 384                                        struct list_head *pbl_list)
 385 {
 386         struct i40iw_pbl *iwpbl;
 387
 388         list_for_each_entry(iwpbl, pbl_list, list) {
 389                 if (iwpbl->user_base == va) {
 390                         list_del(&iwpbl->list);
 391                         return iwpbl;
 392                 }
 393         }
 394         return NULL;
 395 }
 396
 397 /**
 398  * i40iw_free_qp_resources - free up memory resources for qp
 399  * @iwdev: iwarp device
 400  * @iwqp: qp ptr (user or kernel)
 401  * @qp_num: qp number assigned
 402  */
 403 void i40iw_free_qp_resources(struct i40iw_device *iwdev,
 404                              struct i40iw_qp *iwqp,
 405                              u32 qp_num)
 406 {
 407         struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
 408
 409         i40iw_ieq_cleanup_qp(iwdev->vsi.ieq, &iwqp->sc_qp);
 410         i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
 411         if (qp_num)
 412                 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
 413         if (iwpbl->pbl_allocated)
 414                 i40iw_free_pble(iwdev->pble_rsrc, &iwpbl->pble_alloc);
 415         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
 416         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
 417         kfree(iwqp->kqp.wrid_mem);
 418         iwqp->kqp.wrid_mem = NULL;
 419         kfree(iwqp->allocated_buffer);
 420 }
 421
 422 /**
 423  * i40iw_clean_cqes - clean cq entries for qp
 424  * @iwqp: qp ptr (user or kernel)
 425  * @iwcq: cq ptr
 426  */
 427 static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
 428 {
 429         struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
 430
 431         ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
 432 }
 433
 434 /**
 435  * i40iw_destroy_qp - destroy qp
 436  * @ibqp: qp's ib pointer also to get to device's qp address
 437  */
 438 static int i40iw_destroy_qp(struct ib_qp *ibqp)
 439 {
 440         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 441
 442         iwqp->destroyed = 1;
 443
 444         if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
 445                 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
 446
 447         if (!iwqp->user_mode) {
 448                 if (iwqp->iwscq) {
 449                         i40iw_clean_cqes(iwqp, iwqp->iwscq);
 450                         if (iwqp->iwrcq != iwqp->iwscq)
 451                                 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
 452                 }
 453         }
 454
 455         i40iw_rem_ref(&iwqp->ibqp);
 456         return 0;
 457 }
 458
 459 /**
 460  * i40iw_setup_virt_qp - setup for allocation of virtual qp
 461  * @dev: iwarp device
 462  * @qp: qp ptr
 463  * @init_info: initialize info to return
 464  */
 465 static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
 466                                struct i40iw_qp *iwqp,
 467                                struct i40iw_qp_init_info *init_info)
 468 {
 469         struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
 470         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
 471
 472         iwqp->page = qpmr->sq_page;
 473         init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
 474         if (iwpbl->pbl_allocated) {
 475                 init_info->virtual_map = true;
 476                 init_info->sq_pa = qpmr->sq_pbl.idx;
 477                 init_info->rq_pa = qpmr->rq_pbl.idx;
 478         } else {
 479                 init_info->sq_pa = qpmr->sq_pbl.addr;
 480                 init_info->rq_pa = qpmr->rq_pbl.addr;
 481         }
 482         return 0;
 483 }
 484
 485 /**
 486  * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
 487  * @iwdev: iwarp device
 488  * @iwqp: qp ptr (user or kernel)
 489  * @info: initialize info to return
 490  */
 491 static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
 492                                 struct i40iw_qp *iwqp,
 493                                 struct i40iw_qp_init_info *info)
 494 {
 495         struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
 496         u32 sqdepth, rqdepth;
 497         u32 sq_size, rq_size;
 498         u8 sqshift;
 499         u32 size;
 500         enum i40iw_status_code status;
 501         struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
 502
 503         sq_size = i40iw_qp_roundup(ukinfo->sq_size + 1);
 504         rq_size = i40iw_qp_roundup(ukinfo->rq_size + 1);
 505
 506         status = i40iw_get_wqe_shift(sq_size, ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
 507         if (status)
 508                 return -ENOMEM;
 509
 510         sqdepth = sq_size << sqshift;
 511         rqdepth = rq_size << I40IW_MAX_RQ_WQE_SHIFT;
 512
 513         size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
 514         iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
 515
 516         ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
 517         if (!ukinfo->sq_wrtrk_array)
 518                 return -ENOMEM;
 519
 520         ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
 521
 522         size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
 523         size += (I40IW_SHADOW_AREA_SIZE << 3);
 524
 525         status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
 526         if (status) {
 527                 kfree(ukinfo->sq_wrtrk_array);
 528                 ukinfo->sq_wrtrk_array = NULL;
 529                 return -ENOMEM;
 530         }
 531
 532         ukinfo->sq = mem->va;
 533         info->sq_pa = mem->pa;
 534
 535         ukinfo->rq = &ukinfo->sq[sqdepth];
 536         info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
 537
 538         ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
 539         info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
 540
 541         ukinfo->sq_size = sq_size;
 542         ukinfo->rq_size = rq_size;
 543         ukinfo->qp_id = iwqp->ibqp.qp_num;
 544         return 0;
 545 }
 546
 547 /**
 548  * i40iw_create_qp - create qp
 549  * @ibpd: ptr of pd
 550  * @init_attr: attributes for qp
 551  * @udata: user data for create qp
 552  */
 553 static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
 554                                      struct ib_qp_init_attr *init_attr,
 555                                      struct ib_udata *udata)
 556 {
 557         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 558         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 559         struct i40iw_cqp *iwcqp = &iwdev->cqp;
 560         struct i40iw_qp *iwqp;
 561         struct i40iw_ucontext *ucontext;
 562         struct i40iw_create_qp_req req;
 563         struct i40iw_create_qp_resp uresp;
 564         u32 qp_num = 0;
 565         void *mem;
 566         enum i40iw_status_code ret;
 567         int err_code;
 568         int sq_size;
 569         int rq_size;
 570         struct i40iw_sc_qp *qp;
 571         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 572         struct i40iw_qp_init_info init_info;
 573         struct i40iw_create_qp_info *qp_info;
 574         struct i40iw_cqp_request *cqp_request;
 575         struct cqp_commands_info *cqp_info;
 576
 577         struct i40iw_qp_host_ctx_info *ctx_info;
 578         struct i40iwarp_offload_info *iwarp_info;
 579         unsigned long flags;
 580
 581         if (iwdev->closing)
 582                 return ERR_PTR(-ENODEV);
 583
 584         if (init_attr->create_flags)
 585                 return ERR_PTR(-EINVAL);
 586         if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
 587                 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 588
 589         if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 590                 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 591
 592         if (init_attr->cap.max_recv_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 593                 init_attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 594
 595         memset(&init_info, 0, sizeof(init_info));
 596
 597         sq_size = init_attr->cap.max_send_wr;
 598         rq_size = init_attr->cap.max_recv_wr;
 599
 600         init_info.vsi = &iwdev->vsi;
 601         init_info.qp_uk_init_info.sq_size = sq_size;
 602         init_info.qp_uk_init_info.rq_size = rq_size;
 603         init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
 604         init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
 605         init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
 606
 607         mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
 608         if (!mem)
 609                 return ERR_PTR(-ENOMEM);
 610
 611         iwqp = (struct i40iw_qp *)mem;
 612         iwqp->allocated_buffer = mem;
 613         qp = &iwqp->sc_qp;
 614         qp->back_qp = (void *)iwqp;
 615         qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 616
 617         iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
 618
 619         if (i40iw_allocate_dma_mem(dev->hw,
 620                                    &iwqp->q2_ctx_mem,
 621                                    I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
 622                                    256)) {
 623                 i40iw_pr_err("dma_mem failed\n");
 624                 err_code = -ENOMEM;
 625                 goto error;
 626         }
 627
 628         init_info.q2 = iwqp->q2_ctx_mem.va;
 629         init_info.q2_pa = iwqp->q2_ctx_mem.pa;
 630
 631         init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
 632         init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
 633
 634         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
 635                                         &qp_num, &iwdev->next_qp);
 636         if (err_code) {
 637                 i40iw_pr_err("qp resource\n");
 638                 goto error;
 639         }
 640
 641         iwqp->iwdev = iwdev;
 642         iwqp->iwpd = iwpd;
 643         iwqp->ibqp.qp_num = qp_num;
 644         qp = &iwqp->sc_qp;
 645         iwqp->iwscq = to_iwcq(init_attr->send_cq);
 646         iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
 647
 648         iwqp->host_ctx.va = init_info.host_ctx;
 649         iwqp->host_ctx.pa = init_info.host_ctx_pa;
 650         iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
 651
 652         init_info.pd = &iwpd->sc_pd;
 653         init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
 654         iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
 655
 656         if (init_attr->qp_type != IB_QPT_RC) {
 657                 err_code = -EINVAL;
 658                 goto error;
 659         }
 660         if (iwdev->push_mode)
 661                 i40iw_alloc_push_page(iwdev, qp);
 662         if (udata) {
 663                 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
 664                 if (err_code) {
 665                         i40iw_pr_err("ib_copy_from_data\n");
 666                         goto error;
 667                 }
 668                 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
 669                 if (ibpd->uobject && ibpd->uobject->context) {
 670                         iwqp->user_mode = 1;
 671                         ucontext = to_ucontext(ibpd->uobject->context);
 672
 673                         if (req.user_wqe_buffers) {
 674                                 struct i40iw_pbl *iwpbl;
 675
 676                                 spin_lock_irqsave(
 677                                     &ucontext->qp_reg_mem_list_lock, flags);
 678                                 iwpbl = i40iw_get_pbl(
 679                                     (unsigned long)req.user_wqe_buffers,
 680                                     &ucontext->qp_reg_mem_list);
 681                                 spin_unlock_irqrestore(
 682                                     &ucontext->qp_reg_mem_list_lock, flags);
 683
 684                                 if (!iwpbl) {
 685                                         err_code = -ENODATA;
 686                                         i40iw_pr_err("no pbl info\n");
 687                                         goto error;
 688                                 }
 689                                 memcpy(&iwqp->iwpbl, iwpbl, sizeof(iwqp->iwpbl));
 690                         }
 691                 }
 692                 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
 693         } else {
 694                 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
 695         }
 696
 697         if (err_code) {
 698                 i40iw_pr_err("setup qp failed\n");
 699                 goto error;
 700         }
 701
 702         init_info.type = I40IW_QP_TYPE_IWARP;
 703         ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
 704         if (ret) {
 705                 err_code = -EPROTO;
 706                 i40iw_pr_err("qp_init fail\n");
 707                 goto error;
 708         }
 709         ctx_info = &iwqp->ctx_info;
 710         iwarp_info = &iwqp->iwarp_info;
 711         iwarp_info->rd_enable = true;
 712         iwarp_info->wr_rdresp_en = true;
 713         if (!iwqp->user_mode) {
 714                 iwarp_info->fast_reg_en = true;
 715                 iwarp_info->priv_mode_en = true;
 716         }
 717         iwarp_info->ddp_ver = 1;
 718         iwarp_info->rdmap_ver = 1;
 719
 720         ctx_info->iwarp_info_valid = true;
 721         ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 722         ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 723         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
 724                 ctx_info->push_mode_en = false;
 725         } else {
 726                 ctx_info->push_mode_en = true;
 727                 ctx_info->push_idx = qp->push_idx;
 728         }
 729
 730         ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 731                                              (u64 *)iwqp->host_ctx.va,
 732                                              ctx_info);
 733         ctx_info->iwarp_info_valid = false;
 734         cqp_request = i40iw_get_cqp_request(iwcqp, true);
 735         if (!cqp_request) {
 736                 err_code = -ENOMEM;
 737                 goto error;
 738         }
 739         cqp_info = &cqp_request->info;
 740         qp_info = &cqp_request->info.in.u.qp_create.info;
 741
 742         memset(qp_info, 0, sizeof(*qp_info));
 743
 744         qp_info->cq_num_valid = true;
 745         qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
 746
 747         cqp_info->cqp_cmd = OP_QP_CREATE;
 748         cqp_info->post_sq = 1;
 749         cqp_info->in.u.qp_create.qp = qp;
 750         cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
 751         ret = i40iw_handle_cqp_op(iwdev, cqp_request);
 752         if (ret) {
 753                 i40iw_pr_err("CQP-OP QP create fail");
 754                 err_code = -EACCES;
 755                 goto error;
 756         }
 757
 758         i40iw_add_ref(&iwqp->ibqp);
 759         spin_lock_init(&iwqp->lock);
 760         iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
 761         iwdev->qp_table[qp_num] = iwqp;
 762         i40iw_add_pdusecount(iwqp->iwpd);
 763         i40iw_add_devusecount(iwdev);
 764         if (ibpd->uobject && udata) {
 765                 memset(&uresp, 0, sizeof(uresp));
 766                 uresp.actual_sq_size = sq_size;
 767                 uresp.actual_rq_size = rq_size;
 768                 uresp.qp_id = qp_num;
 769                 uresp.push_idx = qp->push_idx;
 770                 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
 771                 if (err_code) {
 772                         i40iw_pr_err("copy_to_udata failed\n");
 773                         i40iw_destroy_qp(&iwqp->ibqp);
 774                            /* let the completion of the qp destroy free the qp */
 775                         return ERR_PTR(err_code);
 776                 }
 777         }
 778         init_completion(&iwqp->sq_drained);
 779         init_completion(&iwqp->rq_drained);
 780
 781         return &iwqp->ibqp;
 782 error:
 783         i40iw_free_qp_resources(iwdev, iwqp, qp_num);
 784         return ERR_PTR(err_code);
 785 }
 786
 787 /**
 788  * i40iw_query - query qp attributes
 789  * @ibqp: qp pointer
 790  * @attr: attributes pointer
 791  * @attr_mask: Not used
 792  * @init_attr: qp attributes to return
 793  */
 794 static int i40iw_query_qp(struct ib_qp *ibqp,
 795                           struct ib_qp_attr *attr,
 796                           int attr_mask,
 797                           struct ib_qp_init_attr *init_attr)
 798 {
 799         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 800         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
 801
 802         attr->qp_state = iwqp->ibqp_state;
 803         attr->cur_qp_state = attr->qp_state;
 804         attr->qp_access_flags = 0;
 805         attr->cap.max_send_wr = qp->qp_uk.sq_size;
 806         attr->cap.max_recv_wr = qp->qp_uk.rq_size;
 807         attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 808         attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 809         attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 810         attr->port_num = 1;
 811         init_attr->event_handler = iwqp->ibqp.event_handler;
 812         init_attr->qp_context = iwqp->ibqp.qp_context;
 813         init_attr->send_cq = iwqp->ibqp.send_cq;
 814         init_attr->recv_cq = iwqp->ibqp.recv_cq;
 815         init_attr->srq = iwqp->ibqp.srq;
 816         init_attr->cap = attr->cap;
 817         init_attr->port_num = 1;
 818         return 0;
 819 }
 820
 821 /**
 822  * i40iw_hw_modify_qp - setup cqp for modify qp
 823  * @iwdev: iwarp device
 824  * @iwqp: qp ptr (user or kernel)
 825  * @info: info for modify qp
 826  * @wait: flag to wait or not for modify qp completion
 827  */
 828 void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
 829                         struct i40iw_modify_qp_info *info, bool wait)
 830 {
 831         enum i40iw_status_code status;
 832         struct i40iw_cqp_request *cqp_request;
 833         struct cqp_commands_info *cqp_info;
 834         struct i40iw_modify_qp_info *m_info;
 835
 836         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
 837         if (!cqp_request)
 838                 return;
 839
 840         cqp_info = &cqp_request->info;
 841         m_info = &cqp_info->in.u.qp_modify.info;
 842         memcpy(m_info, info, sizeof(*m_info));
 843         cqp_info->cqp_cmd = OP_QP_MODIFY;
 844         cqp_info->post_sq = 1;
 845         cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
 846         cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
 847         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 848         if (status)
 849                 i40iw_pr_err("CQP-OP Modify QP fail");
 850 }
 851
 852 /**
 853  * i40iw_modify_qp - modify qp request
 854  * @ibqp: qp's pointer for modify
 855  * @attr: access attributes
 856  * @attr_mask: state mask
 857  * @udata: user data
 858  */
 859 int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
 860                     int attr_mask, struct ib_udata *udata)
 861 {
 862         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 863         struct i40iw_device *iwdev = iwqp->iwdev;
 864         struct i40iw_qp_host_ctx_info *ctx_info;
 865         struct i40iwarp_offload_info *iwarp_info;
 866         struct i40iw_modify_qp_info info;
 867         u8 issue_modify_qp = 0;
 868         u8 dont_wait = 0;
 869         u32 err;
 870         unsigned long flags;
 871
 872         memset(&info, 0, sizeof(info));
 873         ctx_info = &iwqp->ctx_info;
 874         iwarp_info = &iwqp->iwarp_info;
 875
 876         spin_lock_irqsave(&iwqp->lock, flags);
 877
 878         if (attr_mask & IB_QP_STATE) {
 879                 if (iwdev->closing && attr->qp_state != IB_QPS_ERR) {
 880                         err = -EINVAL;
 881                         goto exit;
 882                 }
 883
 884                 switch (attr->qp_state) {
 885                 case IB_QPS_INIT:
 886                 case IB_QPS_RTR:
 887                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
 888                                 err = -EINVAL;
 889                                 goto exit;
 890                         }
 891                         if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
 892                                 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
 893                                 issue_modify_qp = 1;
 894                         }
 895                         break;
 896                 case IB_QPS_RTS:
 897                         if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
 898                             (!iwqp->cm_id)) {
 899                                 err = -EINVAL;
 900                                 goto exit;
 901                         }
 902
 903                         issue_modify_qp = 1;
 904                         iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
 905                         iwqp->hte_added = 1;
 906                         info.next_iwarp_state = I40IW_QP_STATE_RTS;
 907                         info.tcp_ctx_valid = true;
 908                         info.ord_valid = true;
 909                         info.arp_cache_idx_valid = true;
 910                         info.cq_num_valid = true;
 911                         break;
 912                 case IB_QPS_SQD:
 913                         if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
 914                                 err = 0;
 915                                 goto exit;
 916                         }
 917                         if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
 918                             (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
 919                                 err = 0;
 920                                 goto exit;
 921                         }
 922                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
 923                                 err = -EINVAL;
 924                                 goto exit;
 925                         }
 926                         info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
 927                         issue_modify_qp = 1;
 928                         break;
 929                 case IB_QPS_SQE:
 930                         if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
 931                                 err = -EINVAL;
 932                                 goto exit;
 933                         }
 934                         info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
 935                         issue_modify_qp = 1;
 936                         break;
 937                 case IB_QPS_ERR:
 938                 case IB_QPS_RESET:
 939                         if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
 940                                 err = -EINVAL;
 941                                 goto exit;
 942                         }
 943                         if (iwqp->sc_qp.term_flags)
 944                                 i40iw_terminate_del_timer(&iwqp->sc_qp);
 945                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 946                         if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
 947                             iwdev->iw_status &&
 948                             (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
 949                                 info.reset_tcp_conn = true;
 950                         else
 951                                 dont_wait = 1;
 952                         issue_modify_qp = 1;
 953                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 954                         break;
 955                 default:
 956                         err = -EINVAL;
 957                         goto exit;
 958                 }
 959
 960                 iwqp->ibqp_state = attr->qp_state;
 961
 962                 if (issue_modify_qp)
 963                         iwqp->iwarp_state = info.next_iwarp_state;
 964                 else
 965                         info.next_iwarp_state = iwqp->iwarp_state;
 966         }
 967         if (attr_mask & IB_QP_ACCESS_FLAGS) {
 968                 ctx_info->iwarp_info_valid = true;
 969                 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
 970                         iwarp_info->wr_rdresp_en = true;
 971                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
 972                         iwarp_info->wr_rdresp_en = true;
 973                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
 974                         iwarp_info->rd_enable = true;
 975                 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
 976                         iwarp_info->bind_en = true;
 977
 978                 if (iwqp->user_mode) {
 979                         iwarp_info->rd_enable = true;
 980                         iwarp_info->wr_rdresp_en = true;
 981                         iwarp_info->priv_mode_en = false;
 982                 }
 983         }
 984
 985         if (ctx_info->iwarp_info_valid) {
 986                 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 987                 int ret;
 988
 989                 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 990                 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 991                 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 992                                                      (u64 *)iwqp->host_ctx.va,
 993                                                      ctx_info);
 994                 if (ret) {
 995                         i40iw_pr_err("setting QP context\n");
 996                         err = -EINVAL;
 997                         goto exit;
 998                 }
 999         }
1000
1001         spin_unlock_irqrestore(&iwqp->lock, flags);
1002
1003         if (issue_modify_qp)
1004                 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
1005
1006         if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
1007                 if (dont_wait) {
1008                         if (iwqp->cm_id && iwqp->hw_tcp_state) {
1009                                 spin_lock_irqsave(&iwqp->lock, flags);
1010                                 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
1011                                 iwqp->last_aeq = I40IW_AE_RESET_SENT;
1012                                 spin_unlock_irqrestore(&iwqp->lock, flags);
1013                                 i40iw_cm_disconn(iwqp);
1014                         }
1015                 } else {
1016                         spin_lock_irqsave(&iwqp->lock, flags);
1017                         if (iwqp->cm_id) {
1018                                 if (atomic_inc_return(&iwqp->close_timer_started) == 1) {
1019                                         iwqp->cm_id->add_ref(iwqp->cm_id);
1020                                         i40iw_schedule_cm_timer(iwqp->cm_node,
1021                                                                 (struct i40iw_puda_buf *)iwqp,
1022                                                                  I40IW_TIMER_TYPE_CLOSE, 1, 0);
1023                                 }
1024                         }
1025                         spin_unlock_irqrestore(&iwqp->lock, flags);
1026                 }
1027         }
1028         return 0;
1029 exit:
1030         spin_unlock_irqrestore(&iwqp->lock, flags);
1031         return err;
1032 }
1033
1034 /**
1035  * cq_free_resources - free up recources for cq
1036  * @iwdev: iwarp device
1037  * @iwcq: cq ptr
1038  */
1039 static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1040 {
1041         struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1042
1043         if (!iwcq->user_mode)
1044                 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1045         i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1046 }
1047
1048 /**
1049  * i40iw_cq_wq_destroy - send cq destroy cqp
1050  * @iwdev: iwarp device
1051  * @cq: hardware control cq
1052  */
1053 void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1054 {
1055         enum i40iw_status_code status;
1056         struct i40iw_cqp_request *cqp_request;
1057         struct cqp_commands_info *cqp_info;
1058
1059         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1060         if (!cqp_request)
1061                 return;
1062
1063         cqp_info = &cqp_request->info;
1064
1065         cqp_info->cqp_cmd = OP_CQ_DESTROY;
1066         cqp_info->post_sq = 1;
1067         cqp_info->in.u.cq_destroy.cq = cq;
1068         cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1069         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1070         if (status)
1071                 i40iw_pr_err("CQP-OP Destroy QP fail");
1072 }
1073
1074 /**
1075  * i40iw_destroy_cq - destroy cq
1076  * @ib_cq: cq pointer
1077  */
1078 static int i40iw_destroy_cq(struct ib_cq *ib_cq)
1079 {
1080         struct i40iw_cq *iwcq;
1081         struct i40iw_device *iwdev;
1082         struct i40iw_sc_cq *cq;
1083
1084         if (!ib_cq) {
1085                 i40iw_pr_err("ib_cq == NULL\n");
1086                 return 0;
1087         }
1088
1089         iwcq = to_iwcq(ib_cq);
1090         iwdev = to_iwdev(ib_cq->device);
1091         cq = &iwcq->sc_cq;
1092         i40iw_cq_wq_destroy(iwdev, cq);
1093         cq_free_resources(iwdev, iwcq);
1094         kfree(iwcq);
1095         i40iw_rem_devusecount(iwdev);
1096         return 0;
1097 }
1098
1099 /**
1100  * i40iw_create_cq - create cq
1101  * @ibdev: device pointer from stack
1102  * @attr: attributes for cq
1103  * @context: user context created during alloc
1104  * @udata: user data
1105  */
1106 static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev,
1107                                      const struct ib_cq_init_attr *attr,
1108                                      struct ib_ucontext *context,
1109                                      struct ib_udata *udata)
1110 {
1111         struct i40iw_device *iwdev = to_iwdev(ibdev);
1112         struct i40iw_cq *iwcq;
1113         struct i40iw_pbl *iwpbl;
1114         u32 cq_num = 0;
1115         struct i40iw_sc_cq *cq;
1116         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1117         struct i40iw_cq_init_info info;
1118         enum i40iw_status_code status;
1119         struct i40iw_cqp_request *cqp_request;
1120         struct cqp_commands_info *cqp_info;
1121         struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1122         unsigned long flags;
1123         int err_code;
1124         int entries = attr->cqe;
1125
1126         if (iwdev->closing)
1127                 return ERR_PTR(-ENODEV);
1128
1129         if (entries > iwdev->max_cqe)
1130                 return ERR_PTR(-EINVAL);
1131
1132         iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL);
1133         if (!iwcq)
1134                 return ERR_PTR(-ENOMEM);
1135
1136         memset(&info, 0, sizeof(info));
1137
1138         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1139                                         iwdev->max_cq, &cq_num,
1140                                         &iwdev->next_cq);
1141         if (err_code)
1142                 goto error;
1143
1144         cq = &iwcq->sc_cq;
1145         cq->back_cq = (void *)iwcq;
1146         spin_lock_init(&iwcq->lock);
1147
1148         info.dev = dev;
1149         ukinfo->cq_size = max(entries, 4);
1150         ukinfo->cq_id = cq_num;
1151         iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1152         info.ceqe_mask = 0;
1153         if (attr->comp_vector < iwdev->ceqs_count)
1154                 info.ceq_id = attr->comp_vector;
1155         info.ceq_id_valid = true;
1156         info.ceqe_mask = 1;
1157         info.type = I40IW_CQ_TYPE_IWARP;
1158         if (context) {
1159                 struct i40iw_ucontext *ucontext;
1160                 struct i40iw_create_cq_req req;
1161                 struct i40iw_cq_mr *cqmr;
1162
1163                 memset(&req, 0, sizeof(req));
1164                 iwcq->user_mode = true;
1165                 ucontext = to_ucontext(context);
1166                 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req))) {
1167                         err_code = -EFAULT;
1168                         goto cq_free_resources;
1169                 }
1170
1171                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1172                 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1173                                       &ucontext->cq_reg_mem_list);
1174                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1175                 if (!iwpbl) {
1176                         err_code = -EPROTO;
1177                         goto cq_free_resources;
1178                 }
1179
1180                 iwcq->iwpbl = iwpbl;
1181                 iwcq->cq_mem_size = 0;
1182                 cqmr = &iwpbl->cq_mr;
1183                 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1184                 if (iwpbl->pbl_allocated) {
1185                         info.virtual_map = true;
1186                         info.pbl_chunk_size = 1;
1187                         info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1188                 } else {
1189                         info.cq_base_pa = cqmr->cq_pbl.addr;
1190                 }
1191         } else {
1192                 /* Kmode allocations */
1193                 int rsize;
1194                 int shadow;
1195
1196                 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1197                 rsize = round_up(rsize, 256);
1198                 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1199                 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1200                                                 rsize + shadow, 256);
1201                 if (status) {
1202                         err_code = -ENOMEM;
1203                         goto cq_free_resources;
1204                 }
1205                 ukinfo->cq_base = iwcq->kmem.va;
1206                 info.cq_base_pa = iwcq->kmem.pa;
1207                 info.shadow_area_pa = info.cq_base_pa + rsize;
1208                 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1209         }
1210
1211         if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1212                 i40iw_pr_err("init cq fail\n");
1213                 err_code = -EPROTO;
1214                 goto cq_free_resources;
1215         }
1216
1217         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1218         if (!cqp_request) {
1219                 err_code = -ENOMEM;
1220                 goto cq_free_resources;
1221         }
1222
1223         cqp_info = &cqp_request->info;
1224         cqp_info->cqp_cmd = OP_CQ_CREATE;
1225         cqp_info->post_sq = 1;
1226         cqp_info->in.u.cq_create.cq = cq;
1227         cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1228         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1229         if (status) {
1230                 i40iw_pr_err("CQP-OP Create QP fail");
1231                 err_code = -EPROTO;
1232                 goto cq_free_resources;
1233         }
1234
1235         if (context) {
1236                 struct i40iw_create_cq_resp resp;
1237
1238                 memset(&resp, 0, sizeof(resp));
1239                 resp.cq_id = info.cq_uk_init_info.cq_id;
1240                 resp.cq_size = info.cq_uk_init_info.cq_size;
1241                 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1242                         i40iw_pr_err("copy to user data\n");
1243                         err_code = -EPROTO;
1244                         goto cq_destroy;
1245                 }
1246         }
1247
1248         i40iw_add_devusecount(iwdev);
1249         return (struct ib_cq *)iwcq;
1250
1251 cq_destroy:
1252         i40iw_cq_wq_destroy(iwdev, cq);
1253 cq_free_resources:
1254         cq_free_resources(iwdev, iwcq);
1255 error:
1256         kfree(iwcq);
1257         return ERR_PTR(err_code);
1258 }
1259
1260 /**
1261  * i40iw_get_user_access - get hw access from IB access
1262  * @acc: IB access to return hw access
1263  */
1264 static inline u16 i40iw_get_user_access(int acc)
1265 {
1266         u16 access = 0;
1267
1268         access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1269         access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1270         access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1271         access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1272         return access;
1273 }
1274
1275 /**
1276  * i40iw_free_stag - free stag resource
1277  * @iwdev: iwarp device
1278  * @stag: stag to free
1279  */
1280 static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1281 {
1282         u32 stag_idx;
1283
1284         stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1285         i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1286         i40iw_rem_devusecount(iwdev);
1287 }
1288
1289 /**
1290  * i40iw_create_stag - create random stag
1291  * @iwdev: iwarp device
1292  */
1293 static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1294 {
1295         u32 stag = 0;
1296         u32 stag_index = 0;
1297         u32 next_stag_index;
1298         u32 driver_key;
1299         u32 random;
1300         u8 consumer_key;
1301         int ret;
1302
1303         get_random_bytes(&random, sizeof(random));
1304         consumer_key = (u8)random;
1305
1306         driver_key = random & ~iwdev->mr_stagmask;
1307         next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1308         next_stag_index %= iwdev->max_mr;
1309
1310         ret = i40iw_alloc_resource(iwdev,
1311                                    iwdev->allocated_mrs, iwdev->max_mr,
1312                                    &stag_index, &next_stag_index);
1313         if (!ret) {
1314                 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1315                 stag |= driver_key;
1316                 stag += (u32)consumer_key;
1317                 i40iw_add_devusecount(iwdev);
1318         }
1319         return stag;
1320 }
1321
1322 /**
1323  * i40iw_next_pbl_addr - Get next pbl address
1324  * @pbl: pointer to a pble
1325  * @pinfo: info pointer
1326  * @idx: index
1327  */
1328 static inline u64 *i40iw_next_pbl_addr(u64 *pbl,
1329                                        struct i40iw_pble_info **pinfo,
1330                                        u32 *idx)
1331 {
1332         *idx += 1;
1333         if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1334                 return ++pbl;
1335         *idx = 0;
1336         (*pinfo)++;
1337         return (u64 *)(*pinfo)->addr;
1338 }
1339
1340 /**
1341  * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1342  * @iwmr: iwmr for IB's user page addresses
1343  * @pbl: ple pointer to save 1 level or 0 level pble
1344  * @level: indicated level 0, 1 or 2
1345  */
1346 static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1347                                     u64 *pbl,
1348                                     enum i40iw_pble_level level)
1349 {
1350         struct ib_umem *region = iwmr->region;
1351         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1352         int chunk_pages, entry, i;
1353         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1354         struct i40iw_pble_info *pinfo;
1355         struct scatterlist *sg;
1356         u64 pg_addr = 0;
1357         u32 idx = 0;
1358
1359         pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1360
1361         for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
1362                 chunk_pages = sg_dma_len(sg) >> region->page_shift;
1363                 if ((iwmr->type == IW_MEMREG_TYPE_QP) &&
1364                     !iwpbl->qp_mr.sq_page)
1365                         iwpbl->qp_mr.sq_page = sg_page(sg);
1366                 for (i = 0; i < chunk_pages; i++) {
1367                         pg_addr = sg_dma_address(sg) +
1368                                 (i << region->page_shift);
1369
1370                         if ((entry + i) == 0)
1371                                 *pbl = cpu_to_le64(pg_addr & iwmr->page_msk);
1372                         else if (!(pg_addr & ~iwmr->page_msk))
1373                                 *pbl = cpu_to_le64(pg_addr);
1374                         else
1375                                 continue;
1376                         pbl = i40iw_next_pbl_addr(pbl, &pinfo, &idx);
1377                 }
1378         }
1379 }
1380
1381 /**
1382  * i40iw_set_hugetlb_params - set MR pg size and mask to huge pg values.
1383  * @addr: virtual address
1384  * @iwmr: mr pointer for this memory registration
1385  */
1386 static void i40iw_set_hugetlb_values(u64 addr, struct i40iw_mr *iwmr)
1387 {
1388         struct vm_area_struct *vma;
1389         struct hstate *h;
1390
1391         down_read(&current->mm->mmap_sem);
1392         vma = find_vma(current->mm, addr);
1393         if (vma && is_vm_hugetlb_page(vma)) {
1394                 h = hstate_vma(vma);
1395                 if (huge_page_size(h) == 0x200000) {
1396                         iwmr->page_size = huge_page_size(h);
1397                         iwmr->page_msk = huge_page_mask(h);
1398                 }
1399         }
1400         up_read(&current->mm->mmap_sem);
1401 }
1402
1403 /**
1404  * i40iw_check_mem_contiguous - check if pbls stored in arr are contiguous
1405  * @arr: lvl1 pbl array
1406  * @npages: page count
1407  * pg_size: page size
1408  *
1409  */
1410 static bool i40iw_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
1411 {
1412         u32 pg_idx;
1413
1414         for (pg_idx = 0; pg_idx < npages; pg_idx++) {
1415                 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
1416                         return false;
1417         }
1418         return true;
1419 }
1420
1421 /**
1422  * i40iw_check_mr_contiguous - check if MR is physically contiguous
1423  * @palloc: pbl allocation struct
1424  * pg_size: page size
1425  */
1426 static bool i40iw_check_mr_contiguous(struct i40iw_pble_alloc *palloc, u32 pg_size)
1427 {
1428         struct i40iw_pble_level2 *lvl2 = &palloc->level2;
1429         struct i40iw_pble_info *leaf = lvl2->leaf;
1430         u64 *arr = NULL;
1431         u64 *start_addr = NULL;
1432         int i;
1433         bool ret;
1434
1435         if (palloc->level == I40IW_LEVEL_1) {
1436                 arr = (u64 *)palloc->level1.addr;
1437                 ret = i40iw_check_mem_contiguous(arr, palloc->total_cnt, pg_size);
1438                 return ret;
1439         }
1440
1441         start_addr = (u64 *)leaf->addr;
1442
1443         for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
1444                 arr = (u64 *)leaf->addr;
1445                 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
1446                         return false;
1447                 ret = i40iw_check_mem_contiguous(arr, leaf->cnt, pg_size);
1448                 if (!ret)
1449                         return false;
1450         }
1451
1452         return true;
1453 }
1454
1455 /**
1456  * i40iw_setup_pbles - copy user pg address to pble's
1457  * @iwdev: iwarp device
1458  * @iwmr: mr pointer for this memory registration
1459  * @use_pbles: flag if to use pble's
1460  */
1461 static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1462                              struct i40iw_mr *iwmr,
1463                              bool use_pbles)
1464 {
1465         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1466         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1467         struct i40iw_pble_info *pinfo;
1468         u64 *pbl;
1469         enum i40iw_status_code status;
1470         enum i40iw_pble_level level = I40IW_LEVEL_1;
1471
1472         if (use_pbles) {
1473                 mutex_lock(&iwdev->pbl_mutex);
1474                 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1475                 mutex_unlock(&iwdev->pbl_mutex);
1476                 if (status)
1477                         return -ENOMEM;
1478
1479                 iwpbl->pbl_allocated = true;
1480                 level = palloc->level;
1481                 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1482                 pbl = (u64 *)pinfo->addr;
1483         } else {
1484                 pbl = iwmr->pgaddrmem;
1485         }
1486
1487         i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1488
1489         if (use_pbles)
1490                 iwmr->pgaddrmem[0] = *pbl;
1491
1492         return 0;
1493 }
1494
1495 /**
1496  * i40iw_handle_q_mem - handle memory for qp and cq
1497  * @iwdev: iwarp device
1498  * @req: information for q memory management
1499  * @iwpbl: pble struct
1500  * @use_pbles: flag to use pble
1501  */
1502 static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1503                               struct i40iw_mem_reg_req *req,
1504                               struct i40iw_pbl *iwpbl,
1505                               bool use_pbles)
1506 {
1507         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1508         struct i40iw_mr *iwmr = iwpbl->iwmr;
1509         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1510         struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1511         struct i40iw_hmc_pble *hmc_p;
1512         u64 *arr = iwmr->pgaddrmem;
1513         u32 pg_size;
1514         int err;
1515         int total;
1516         bool ret = true;
1517
1518         total = req->sq_pages + req->rq_pages + req->cq_pages;
1519         pg_size = iwmr->page_size;
1520
1521         err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1522         if (err)
1523                 return err;
1524
1525         if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1526                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1527                 iwpbl->pbl_allocated = false;
1528                 return -ENOMEM;
1529         }
1530
1531         if (use_pbles)
1532                 arr = (u64 *)palloc->level1.addr;
1533
1534         if (iwmr->type == IW_MEMREG_TYPE_QP) {
1535                 hmc_p = &qpmr->sq_pbl;
1536                 qpmr->shadow = (dma_addr_t)arr[total];
1537
1538                 if (use_pbles) {
1539                         ret = i40iw_check_mem_contiguous(arr, req->sq_pages, pg_size);
1540                         if (ret)
1541                                 ret = i40iw_check_mem_contiguous(&arr[req->sq_pages], req->rq_pages, pg_size);
1542                 }
1543
1544                 if (!ret) {
1545                         hmc_p->idx = palloc->level1.idx;
1546                         hmc_p = &qpmr->rq_pbl;
1547                         hmc_p->idx = palloc->level1.idx + req->sq_pages;
1548                 } else {
1549                         hmc_p->addr = arr[0];
1550                         hmc_p = &qpmr->rq_pbl;
1551                         hmc_p->addr = arr[req->sq_pages];
1552                 }
1553         } else {                /* CQ */
1554                 hmc_p = &cqmr->cq_pbl;
1555                 cqmr->shadow = (dma_addr_t)arr[total];
1556
1557                 if (use_pbles)
1558                         ret = i40iw_check_mem_contiguous(arr, req->cq_pages, pg_size);
1559
1560                 if (!ret)
1561                         hmc_p->idx = palloc->level1.idx;
1562                 else
1563                         hmc_p->addr = arr[0];
1564         }
1565
1566         if (use_pbles && ret) {
1567                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1568                 iwpbl->pbl_allocated = false;
1569         }
1570
1571         return err;
1572 }
1573
1574 /**
1575  * i40iw_hw_alloc_stag - cqp command to allocate stag
1576  * @iwdev: iwarp device
1577  * @iwmr: iwarp mr pointer
1578  */
1579 static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1580 {
1581         struct i40iw_allocate_stag_info *info;
1582         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1583         enum i40iw_status_code status;
1584         int err = 0;
1585         struct i40iw_cqp_request *cqp_request;
1586         struct cqp_commands_info *cqp_info;
1587
1588         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1589         if (!cqp_request)
1590                 return -ENOMEM;
1591
1592         cqp_info = &cqp_request->info;
1593         info = &cqp_info->in.u.alloc_stag.info;
1594         memset(info, 0, sizeof(*info));
1595         info->page_size = PAGE_SIZE;
1596         info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1597         info->pd_id = iwpd->sc_pd.pd_id;
1598         info->total_len = iwmr->length;
1599         info->remote_access = true;
1600         cqp_info->cqp_cmd = OP_ALLOC_STAG;
1601         cqp_info->post_sq = 1;
1602         cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1603         cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1604
1605         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1606         if (status) {
1607                 err = -ENOMEM;
1608                 i40iw_pr_err("CQP-OP MR Reg fail");
1609         }
1610         return err;
1611 }
1612
1613 /**
1614  * i40iw_alloc_mr - register stag for fast memory registration
1615  * @pd: ibpd pointer
1616  * @mr_type: memory for stag registrion
1617  * @max_num_sg: man number of pages
1618  */
1619 static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd,
1620                                     enum ib_mr_type mr_type,
1621                                     u32 max_num_sg)
1622 {
1623         struct i40iw_pd *iwpd = to_iwpd(pd);
1624         struct i40iw_device *iwdev = to_iwdev(pd->device);
1625         struct i40iw_pble_alloc *palloc;
1626         struct i40iw_pbl *iwpbl;
1627         struct i40iw_mr *iwmr;
1628         enum i40iw_status_code status;
1629         u32 stag;
1630         int err_code = -ENOMEM;
1631
1632         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1633         if (!iwmr)
1634                 return ERR_PTR(-ENOMEM);
1635
1636         stag = i40iw_create_stag(iwdev);
1637         if (!stag) {
1638                 err_code = -EOVERFLOW;
1639                 goto err;
1640         }
1641         stag &= ~I40IW_CQPSQ_STAG_KEY_MASK;
1642         iwmr->stag = stag;
1643         iwmr->ibmr.rkey = stag;
1644         iwmr->ibmr.lkey = stag;
1645         iwmr->ibmr.pd = pd;
1646         iwmr->ibmr.device = pd->device;
1647         iwpbl = &iwmr->iwpbl;
1648         iwpbl->iwmr = iwmr;
1649         iwmr->type = IW_MEMREG_TYPE_MEM;
1650         palloc = &iwpbl->pble_alloc;
1651         iwmr->page_cnt = max_num_sg;
1652         mutex_lock(&iwdev->pbl_mutex);
1653         status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1654         mutex_unlock(&iwdev->pbl_mutex);
1655         if (status)
1656                 goto err1;
1657
1658         if (palloc->level != I40IW_LEVEL_1)
1659                 goto err2;
1660         err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1661         if (err_code)
1662                 goto err2;
1663         iwpbl->pbl_allocated = true;
1664         i40iw_add_pdusecount(iwpd);
1665         return &iwmr->ibmr;
1666 err2:
1667         i40iw_free_pble(iwdev->pble_rsrc, palloc);
1668 err1:
1669         i40iw_free_stag(iwdev, stag);
1670 err:
1671         kfree(iwmr);
1672         return ERR_PTR(err_code);
1673 }
1674
1675 /**
1676  * i40iw_set_page - populate pbl list for fmr
1677  * @ibmr: ib mem to access iwarp mr pointer
1678  * @addr: page dma address fro pbl list
1679  */
1680 static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1681 {
1682         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1683         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1684         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1685         u64 *pbl;
1686
1687         if (unlikely(iwmr->npages == iwmr->page_cnt))
1688                 return -ENOMEM;
1689
1690         pbl = (u64 *)palloc->level1.addr;
1691         pbl[iwmr->npages++] = cpu_to_le64(addr);
1692         return 0;
1693 }
1694
1695 /**
1696  * i40iw_map_mr_sg - map of sg list for fmr
1697  * @ibmr: ib mem to access iwarp mr pointer
1698  * @sg: scatter gather list for fmr
1699  * @sg_nents: number of sg pages
1700  */
1701 static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
1702                            int sg_nents, unsigned int *sg_offset)
1703 {
1704         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1705
1706         iwmr->npages = 0;
1707         return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
1708 }
1709
1710 /**
1711  * i40iw_drain_sq - drain the send queue
1712  * @ibqp: ib qp pointer
1713  */
1714 static void i40iw_drain_sq(struct ib_qp *ibqp)
1715 {
1716         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1717         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1718
1719         if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1720                 wait_for_completion(&iwqp->sq_drained);
1721 }
1722
1723 /**
1724  * i40iw_drain_rq - drain the receive queue
1725  * @ibqp: ib qp pointer
1726  */
1727 static void i40iw_drain_rq(struct ib_qp *ibqp)
1728 {
1729         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1730         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1731
1732         if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1733                 wait_for_completion(&iwqp->rq_drained);
1734 }
1735
1736 /**
1737  * i40iw_hwreg_mr - send cqp command for memory registration
1738  * @iwdev: iwarp device
1739  * @iwmr: iwarp mr pointer
1740  * @access: access for MR
1741  */
1742 static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1743                           struct i40iw_mr *iwmr,
1744                           u16 access)
1745 {
1746         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1747         struct i40iw_reg_ns_stag_info *stag_info;
1748         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1749         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1750         enum i40iw_status_code status;
1751         int err = 0;
1752         struct i40iw_cqp_request *cqp_request;
1753         struct cqp_commands_info *cqp_info;
1754
1755         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1756         if (!cqp_request)
1757                 return -ENOMEM;
1758
1759         cqp_info = &cqp_request->info;
1760         stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1761         memset(stag_info, 0, sizeof(*stag_info));
1762         stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1763         stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1764         stag_info->stag_key = (u8)iwmr->stag;
1765         stag_info->total_len = iwmr->length;
1766         stag_info->access_rights = access;
1767         stag_info->pd_id = iwpd->sc_pd.pd_id;
1768         stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1769         stag_info->page_size = iwmr->page_size;
1770
1771         if (iwpbl->pbl_allocated) {
1772                 if (palloc->level == I40IW_LEVEL_1) {
1773                         stag_info->first_pm_pbl_index = palloc->level1.idx;
1774                         stag_info->chunk_size = 1;
1775                 } else {
1776                         stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1777                         stag_info->chunk_size = 3;
1778                 }
1779         } else {
1780                 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1781         }
1782
1783         cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1784         cqp_info->post_sq = 1;
1785         cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1786         cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1787
1788         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1789         if (status) {
1790                 err = -ENOMEM;
1791                 i40iw_pr_err("CQP-OP MR Reg fail");
1792         }
1793         return err;
1794 }
1795
1796 /**
1797  * i40iw_reg_user_mr - Register a user memory region
1798  * @pd: ptr of pd
1799  * @start: virtual start address
1800  * @length: length of mr
1801  * @virt: virtual address
1802  * @acc: access of mr
1803  * @udata: user data
1804  */
1805 static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1806                                        u64 start,
1807                                        u64 length,
1808                                        u64 virt,
1809                                        int acc,
1810                                        struct ib_udata *udata)
1811 {
1812         struct i40iw_pd *iwpd = to_iwpd(pd);
1813         struct i40iw_device *iwdev = to_iwdev(pd->device);
1814         struct i40iw_ucontext *ucontext;
1815         struct i40iw_pble_alloc *palloc;
1816         struct i40iw_pbl *iwpbl;
1817         struct i40iw_mr *iwmr;
1818         struct ib_umem *region;
1819         struct i40iw_mem_reg_req req;
1820         u64 pbl_depth = 0;
1821         u32 stag = 0;
1822         u16 access;
1823         u64 region_length;
1824         bool use_pbles = false;
1825         unsigned long flags;
1826         int err = -ENOSYS;
1827         int ret;
1828         int pg_shift;
1829
1830         if (iwdev->closing)
1831                 return ERR_PTR(-ENODEV);
1832
1833         if (length > I40IW_MAX_MR_SIZE)
1834                 return ERR_PTR(-EINVAL);
1835         region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
1836         if (IS_ERR(region))
1837                 return (struct ib_mr *)region;
1838
1839         if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1840                 ib_umem_release(region);
1841                 return ERR_PTR(-EFAULT);
1842         }
1843
1844         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1845         if (!iwmr) {
1846                 ib_umem_release(region);
1847                 return ERR_PTR(-ENOMEM);
1848         }
1849
1850         iwpbl = &iwmr->iwpbl;
1851         iwpbl->iwmr = iwmr;
1852         iwmr->region = region;
1853         iwmr->ibmr.pd = pd;
1854         iwmr->ibmr.device = pd->device;
1855         ucontext = to_ucontext(pd->uobject->context);
1856
1857         iwmr->page_size = PAGE_SIZE;
1858         iwmr->page_msk = PAGE_MASK;
1859
1860         if (region->hugetlb && (req.reg_type == IW_MEMREG_TYPE_MEM))
1861                 i40iw_set_hugetlb_values(start, iwmr);
1862
1863         region_length = region->length + (start & (iwmr->page_size - 1));
1864         pg_shift = ffs(iwmr->page_size) - 1;
1865         pbl_depth = region_length >> pg_shift;
1866         pbl_depth += (region_length & (iwmr->page_size - 1)) ? 1 : 0;
1867         iwmr->length = region->length;
1868
1869         iwpbl->user_base = virt;
1870         palloc = &iwpbl->pble_alloc;
1871
1872         iwmr->type = req.reg_type;
1873         iwmr->page_cnt = (u32)pbl_depth;
1874
1875         switch (req.reg_type) {
1876         case IW_MEMREG_TYPE_QP:
1877                 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1878                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1879                 if (err)
1880                         goto error;
1881                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1882                 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1883                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1884                 break;
1885         case IW_MEMREG_TYPE_CQ:
1886                 use_pbles = (req.cq_pages > 1);
1887                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1888                 if (err)
1889                         goto error;
1890
1891                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1892                 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1893                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1894                 break;
1895         case IW_MEMREG_TYPE_MEM:
1896                 use_pbles = (iwmr->page_cnt != 1);
1897                 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1898
1899                 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1900                 if (err)
1901                         goto error;
1902
1903                 if (use_pbles) {
1904                         ret = i40iw_check_mr_contiguous(palloc, iwmr->page_size);
1905                         if (ret) {
1906                                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1907                                 iwpbl->pbl_allocated = false;
1908                         }
1909                 }
1910
1911                 access |= i40iw_get_user_access(acc);
1912                 stag = i40iw_create_stag(iwdev);
1913                 if (!stag) {
1914                         err = -ENOMEM;
1915                         goto error;
1916                 }
1917
1918                 iwmr->stag = stag;
1919                 iwmr->ibmr.rkey = stag;
1920                 iwmr->ibmr.lkey = stag;
1921
1922                 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1923                 if (err) {
1924                         i40iw_free_stag(iwdev, stag);
1925                         goto error;
1926                 }
1927
1928                 break;
1929         default:
1930                 goto error;
1931         }
1932
1933         iwmr->type = req.reg_type;
1934         if (req.reg_type == IW_MEMREG_TYPE_MEM)
1935                 i40iw_add_pdusecount(iwpd);
1936         return &iwmr->ibmr;
1937
1938 error:
1939         if (palloc->level != I40IW_LEVEL_0 && iwpbl->pbl_allocated)
1940                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1941         ib_umem_release(region);
1942         kfree(iwmr);
1943         return ERR_PTR(err);
1944 }
1945
1946 /**
1947  * i40iw_reg_phys_mr - register kernel physical memory
1948  * @pd: ibpd pointer
1949  * @addr: physical address of memory to register
1950  * @size: size of memory to register
1951  * @acc: Access rights
1952  * @iova_start: start of virtual address for physical buffers
1953  */
1954 struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1955                                 u64 addr,
1956                                 u64 size,
1957                                 int acc,
1958                                 u64 *iova_start)
1959 {
1960         struct i40iw_pd *iwpd = to_iwpd(pd);
1961         struct i40iw_device *iwdev = to_iwdev(pd->device);
1962         struct i40iw_pbl *iwpbl;
1963         struct i40iw_mr *iwmr;
1964         enum i40iw_status_code status;
1965         u32 stag;
1966         u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1967         int ret;
1968
1969         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1970         if (!iwmr)
1971                 return ERR_PTR(-ENOMEM);
1972         iwmr->ibmr.pd = pd;
1973         iwmr->ibmr.device = pd->device;
1974         iwpbl = &iwmr->iwpbl;
1975         iwpbl->iwmr = iwmr;
1976         iwmr->type = IW_MEMREG_TYPE_MEM;
1977         iwpbl->user_base = *iova_start;
1978         stag = i40iw_create_stag(iwdev);
1979         if (!stag) {
1980                 ret = -EOVERFLOW;
1981                 goto err;
1982         }
1983         access |= i40iw_get_user_access(acc);
1984         iwmr->stag = stag;
1985         iwmr->ibmr.rkey = stag;
1986         iwmr->ibmr.lkey = stag;
1987         iwmr->page_cnt = 1;
1988         iwmr->pgaddrmem[0]  = addr;
1989         iwmr->length = size;
1990         status = i40iw_hwreg_mr(iwdev, iwmr, access);
1991         if (status) {
1992                 i40iw_free_stag(iwdev, stag);
1993                 ret = -ENOMEM;
1994                 goto err;
1995         }
1996
1997         i40iw_add_pdusecount(iwpd);
1998         return &iwmr->ibmr;
1999  err:
2000         kfree(iwmr);
2001         return ERR_PTR(ret);
2002 }
2003
2004 /**
2005  * i40iw_get_dma_mr - register physical mem
2006  * @pd: ptr of pd
2007  * @acc: access for memory
2008  */
2009 static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
2010 {
2011         u64 kva = 0;
2012
2013         return i40iw_reg_phys_mr(pd, 0, 0, acc, &kva);
2014 }
2015
2016 /**
2017  * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
2018  * @iwmr: iwmr for IB's user page addresses
2019  * @ucontext: ptr to user context
2020  */
2021 static void i40iw_del_memlist(struct i40iw_mr *iwmr,
2022                               struct i40iw_ucontext *ucontext)
2023 {
2024         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2025         unsigned long flags;
2026
2027         switch (iwmr->type) {
2028         case IW_MEMREG_TYPE_CQ:
2029                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2030                 if (!list_empty(&ucontext->cq_reg_mem_list))
2031                         list_del(&iwpbl->list);
2032                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2033                 break;
2034         case IW_MEMREG_TYPE_QP:
2035                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2036                 if (!list_empty(&ucontext->qp_reg_mem_list))
2037                         list_del(&iwpbl->list);
2038                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2039                 break;
2040         default:
2041                 break;
2042         }
2043 }
2044
2045 /**
2046  * i40iw_dereg_mr - deregister mr
2047  * @ib_mr: mr ptr for dereg
2048  */
2049 static int i40iw_dereg_mr(struct ib_mr *ib_mr)
2050 {
2051         struct ib_pd *ibpd = ib_mr->pd;
2052         struct i40iw_pd *iwpd = to_iwpd(ibpd);
2053         struct i40iw_mr *iwmr = to_iwmr(ib_mr);
2054         struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
2055         enum i40iw_status_code status;
2056         struct i40iw_dealloc_stag_info *info;
2057         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2058         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
2059         struct i40iw_cqp_request *cqp_request;
2060         struct cqp_commands_info *cqp_info;
2061         u32 stag_idx;
2062
2063         if (iwmr->region)
2064                 ib_umem_release(iwmr->region);
2065
2066         if (iwmr->type != IW_MEMREG_TYPE_MEM) {
2067                 if (ibpd->uobject) {
2068                         struct i40iw_ucontext *ucontext;
2069
2070                         ucontext = to_ucontext(ibpd->uobject->context);
2071                         i40iw_del_memlist(iwmr, ucontext);
2072                 }
2073                 if (iwpbl->pbl_allocated && iwmr->type != IW_MEMREG_TYPE_QP)
2074                         i40iw_free_pble(iwdev->pble_rsrc, palloc);
2075                 kfree(iwmr);
2076                 return 0;
2077         }
2078
2079         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
2080         if (!cqp_request)
2081                 return -ENOMEM;
2082
2083         cqp_info = &cqp_request->info;
2084         info = &cqp_info->in.u.dealloc_stag.info;
2085         memset(info, 0, sizeof(*info));
2086
2087         info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
2088         info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
2089         stag_idx = info->stag_idx;
2090         info->mr = true;
2091         if (iwpbl->pbl_allocated)
2092                 info->dealloc_pbl = true;
2093
2094         cqp_info->cqp_cmd = OP_DEALLOC_STAG;
2095         cqp_info->post_sq = 1;
2096         cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
2097         cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2098         status = i40iw_handle_cqp_op(iwdev, cqp_request);
2099         if (status)
2100                 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
2101         i40iw_rem_pdusecount(iwpd, iwdev);
2102         i40iw_free_stag(iwdev, iwmr->stag);
2103         if (iwpbl->pbl_allocated)
2104                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
2105         kfree(iwmr);
2106         return 0;
2107 }
2108
2109 /**
2110  * i40iw_show_rev
2111  */
2112 static ssize_t i40iw_show_rev(struct device *dev,
2113                               struct device_attribute *attr, char *buf)
2114 {
2115         struct i40iw_ib_device *iwibdev = container_of(dev,
2116                                                        struct i40iw_ib_device,
2117                                                        ibdev.dev);
2118         u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
2119
2120         return sprintf(buf, "%x\n", hw_rev);
2121 }
2122
2123 /**
2124  * i40iw_show_hca
2125  */
2126 static ssize_t i40iw_show_hca(struct device *dev,
2127                               struct device_attribute *attr, char *buf)
2128 {
2129         return sprintf(buf, "I40IW\n");
2130 }
2131
2132 /**
2133  * i40iw_show_board
2134  */
2135 static ssize_t i40iw_show_board(struct device *dev,
2136                                 struct device_attribute *attr,
2137                                 char *buf)
2138 {
2139         return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
2140 }
2141
2142 static DEVICE_ATTR(hw_rev, S_IRUGO, i40iw_show_rev, NULL);
2143 static DEVICE_ATTR(hca_type, S_IRUGO, i40iw_show_hca, NULL);
2144 static DEVICE_ATTR(board_id, S_IRUGO, i40iw_show_board, NULL);
2145
2146 static struct device_attribute *i40iw_dev_attributes[] = {
2147         &dev_attr_hw_rev,
2148         &dev_attr_hca_type,
2149         &dev_attr_board_id
2150 };
2151
2152 /**
2153  * i40iw_copy_sg_list - copy sg list for qp
2154  * @sg_list: copied into sg_list
2155  * @sgl: copy from sgl
2156  * @num_sges: count of sg entries
2157  */
2158 static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2159 {
2160         unsigned int i;
2161
2162         for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2163                 sg_list[i].tag_off = sgl[i].addr;
2164                 sg_list[i].len = sgl[i].length;
2165                 sg_list[i].stag = sgl[i].lkey;
2166         }
2167 }
2168
2169 /**
2170  * i40iw_post_send -  kernel application wr
2171  * @ibqp: qp ptr for wr
2172  * @ib_wr: work request ptr
2173  * @bad_wr: return of bad wr if err
2174  */
2175 static int i40iw_post_send(struct ib_qp *ibqp,
2176                            struct ib_send_wr *ib_wr,
2177                            struct ib_send_wr **bad_wr)
2178 {
2179         struct i40iw_qp *iwqp;
2180         struct i40iw_qp_uk *ukqp;
2181         struct i40iw_post_sq_info info;
2182         enum i40iw_status_code ret;
2183         int err = 0;
2184         unsigned long flags;
2185         bool inv_stag;
2186
2187         iwqp = (struct i40iw_qp *)ibqp;
2188         ukqp = &iwqp->sc_qp.qp_uk;
2189
2190         spin_lock_irqsave(&iwqp->lock, flags);
2191         while (ib_wr) {
2192                 inv_stag = false;
2193                 memset(&info, 0, sizeof(info));
2194                 info.wr_id = (u64)(ib_wr->wr_id);
2195                 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2196                         info.signaled = true;
2197                 if (ib_wr->send_flags & IB_SEND_FENCE)
2198                         info.read_fence = true;
2199
2200                 switch (ib_wr->opcode) {
2201                 case IB_WR_SEND:
2202                         /* fall-through */
2203                 case IB_WR_SEND_WITH_INV:
2204                         if (ib_wr->opcode == IB_WR_SEND) {
2205                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2206                                         info.op_type = I40IW_OP_TYPE_SEND_SOL;
2207                                 else
2208                                         info.op_type = I40IW_OP_TYPE_SEND;
2209                         } else {
2210                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2211                                         info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2212                                 else
2213                                         info.op_type = I40IW_OP_TYPE_SEND_INV;
2214                         }
2215
2216                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2217                                 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2218                                 info.op.inline_send.len = ib_wr->sg_list[0].length;
2219                                 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2220                         } else {
2221                                 info.op.send.num_sges = ib_wr->num_sge;
2222                                 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2223                                 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2224                         }
2225
2226                         if (ret) {
2227                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2228                                         err = -ENOMEM;
2229                                 else
2230                                         err = -EINVAL;
2231                         }
2232                         break;
2233                 case IB_WR_RDMA_WRITE:
2234                         info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2235
2236                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2237                                 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2238                                 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2239                                 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2240                                 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2241                                 info.op.inline_rdma_write.rem_addr.len = ib_wr->sg_list->length;
2242                                 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2243                         } else {
2244                                 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2245                                 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2246                                 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2247                                 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2248                                 info.op.rdma_write.rem_addr.len = ib_wr->sg_list->length;
2249                                 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2250                         }
2251
2252                         if (ret) {
2253                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2254                                         err = -ENOMEM;
2255                                 else
2256                                         err = -EINVAL;
2257                         }
2258                         break;
2259                 case IB_WR_RDMA_READ_WITH_INV:
2260                         inv_stag = true;
2261                         /* fall-through*/
2262                 case IB_WR_RDMA_READ:
2263                         if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2264                                 err = -EINVAL;
2265                                 break;
2266                         }
2267                         info.op_type = I40IW_OP_TYPE_RDMA_READ;
2268                         info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2269                         info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2270                         info.op.rdma_read.rem_addr.len = ib_wr->sg_list->length;
2271                         info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2272                         info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2273                         info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2274                         ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2275                         if (ret) {
2276                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2277                                         err = -ENOMEM;
2278                                 else
2279                                         err = -EINVAL;
2280                         }
2281                         break;
2282                 case IB_WR_LOCAL_INV:
2283                         info.op_type = I40IW_OP_TYPE_INV_STAG;
2284                         info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2285                         ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2286                         if (ret)
2287                                 err = -ENOMEM;
2288                         break;
2289                 case IB_WR_REG_MR:
2290                 {
2291                         struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2292                         int flags = reg_wr(ib_wr)->access;
2293                         struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2294                         struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2295                         struct i40iw_fast_reg_stag_info info;
2296
2297                         memset(&info, 0, sizeof(info));
2298                         info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2299                         info.access_rights |= i40iw_get_user_access(flags);
2300                         info.stag_key = reg_wr(ib_wr)->key & 0xff;
2301                         info.stag_idx = reg_wr(ib_wr)->key >> 8;
2302                         info.page_size = reg_wr(ib_wr)->mr->page_size;
2303                         info.wr_id = ib_wr->wr_id;
2304
2305                         info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2306                         info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2307                         info.total_len = iwmr->ibmr.length;
2308                         info.reg_addr_pa = *(u64 *)palloc->level1.addr;
2309                         info.first_pm_pbl_index = palloc->level1.idx;
2310                         info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2311                         info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2312
2313                         if (iwmr->npages > I40IW_MIN_PAGES_PER_FMR)
2314                                 info.chunk_size = 1;
2315
2316                         ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2317                         if (ret)
2318                                 err = -ENOMEM;
2319                         break;
2320                 }
2321                 default:
2322                         err = -EINVAL;
2323                         i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2324                                      ib_wr->opcode);
2325                         break;
2326                 }
2327
2328                 if (err)
2329                         break;
2330                 ib_wr = ib_wr->next;
2331         }
2332
2333         if (err)
2334                 *bad_wr = ib_wr;
2335         else
2336                 ukqp->ops.iw_qp_post_wr(ukqp);
2337         spin_unlock_irqrestore(&iwqp->lock, flags);
2338
2339         return err;
2340 }
2341
2342 /**
2343  * i40iw_post_recv - post receive wr for kernel application
2344  * @ibqp: ib qp pointer
2345  * @ib_wr: work request for receive
2346  * @bad_wr: bad wr caused an error
2347  */
2348 static int i40iw_post_recv(struct ib_qp *ibqp,
2349                            struct ib_recv_wr *ib_wr,
2350                            struct ib_recv_wr **bad_wr)
2351 {
2352         struct i40iw_qp *iwqp;
2353         struct i40iw_qp_uk *ukqp;
2354         struct i40iw_post_rq_info post_recv;
2355         struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2356         enum i40iw_status_code ret = 0;
2357         unsigned long flags;
2358         int err = 0;
2359
2360         iwqp = (struct i40iw_qp *)ibqp;
2361         ukqp = &iwqp->sc_qp.qp_uk;
2362
2363         memset(&post_recv, 0, sizeof(post_recv));
2364         spin_lock_irqsave(&iwqp->lock, flags);
2365         while (ib_wr) {
2366                 post_recv.num_sges = ib_wr->num_sge;
2367                 post_recv.wr_id = ib_wr->wr_id;
2368                 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2369                 post_recv.sg_list = sg_list;
2370                 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2371                 if (ret) {
2372                         i40iw_pr_err(" post_recv err %d\n", ret);
2373                         if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2374                                 err = -ENOMEM;
2375                         else
2376                                 err = -EINVAL;
2377                         *bad_wr = ib_wr;
2378                         goto out;
2379                 }
2380                 ib_wr = ib_wr->next;
2381         }
2382  out:
2383         spin_unlock_irqrestore(&iwqp->lock, flags);
2384         return err;
2385 }
2386
2387 /**
2388  * i40iw_poll_cq - poll cq for completion (kernel apps)
2389  * @ibcq: cq to poll
2390  * @num_entries: number of entries to poll
2391  * @entry: wr of entry completed
2392  */
2393 static int i40iw_poll_cq(struct ib_cq *ibcq,
2394                          int num_entries,
2395                          struct ib_wc *entry)
2396 {
2397         struct i40iw_cq *iwcq;
2398         int cqe_count = 0;
2399         struct i40iw_cq_poll_info cq_poll_info;
2400         enum i40iw_status_code ret;
2401         struct i40iw_cq_uk *ukcq;
2402         struct i40iw_sc_qp *qp;
2403         struct i40iw_qp *iwqp;
2404         unsigned long flags;
2405
2406         iwcq = (struct i40iw_cq *)ibcq;
2407         ukcq = &iwcq->sc_cq.cq_uk;
2408
2409         spin_lock_irqsave(&iwcq->lock, flags);
2410         while (cqe_count < num_entries) {
2411                 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info);
2412                 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2413                         break;
2414                 } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2415                         continue;
2416                 } else if (ret) {
2417                         if (!cqe_count)
2418                                 cqe_count = -1;
2419                         break;
2420                 }
2421                 entry->wc_flags = 0;
2422                 entry->wr_id = cq_poll_info.wr_id;
2423                 if (cq_poll_info.error) {
2424                         entry->status = IB_WC_WR_FLUSH_ERR;
2425                         entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2426                 } else {
2427                         entry->status = IB_WC_SUCCESS;
2428                 }
2429
2430                 switch (cq_poll_info.op_type) {
2431                 case I40IW_OP_TYPE_RDMA_WRITE:
2432                         entry->opcode = IB_WC_RDMA_WRITE;
2433                         break;
2434                 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2435                 case I40IW_OP_TYPE_RDMA_READ:
2436                         entry->opcode = IB_WC_RDMA_READ;
2437                         break;
2438                 case I40IW_OP_TYPE_SEND_SOL:
2439                 case I40IW_OP_TYPE_SEND_SOL_INV:
2440                 case I40IW_OP_TYPE_SEND_INV:
2441                 case I40IW_OP_TYPE_SEND:
2442                         entry->opcode = IB_WC_SEND;
2443                         break;
2444                 case I40IW_OP_TYPE_REC:
2445                         entry->opcode = IB_WC_RECV;
2446                         break;
2447                 default:
2448                         entry->opcode = IB_WC_RECV;
2449                         break;
2450                 }
2451
2452                 entry->ex.imm_data = 0;
2453                 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2454                 entry->qp = (struct ib_qp *)qp->back_qp;
2455                 entry->src_qp = cq_poll_info.qp_id;
2456                 iwqp = (struct i40iw_qp *)qp->back_qp;
2457                 if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2458                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2459                                 complete(&iwqp->sq_drained);
2460                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2461                                 complete(&iwqp->rq_drained);
2462                 }
2463                 entry->byte_len = cq_poll_info.bytes_xfered;
2464                 entry++;
2465                 cqe_count++;
2466         }
2467         spin_unlock_irqrestore(&iwcq->lock, flags);
2468         return cqe_count;
2469 }
2470
2471 /**
2472  * i40iw_req_notify_cq - arm cq kernel application
2473  * @ibcq: cq to arm
2474  * @notify_flags: notofication flags
2475  */
2476 static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2477                                enum ib_cq_notify_flags notify_flags)
2478 {
2479         struct i40iw_cq *iwcq;
2480         struct i40iw_cq_uk *ukcq;
2481         unsigned long flags;
2482         enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_EVENT;
2483
2484         iwcq = (struct i40iw_cq *)ibcq;
2485         ukcq = &iwcq->sc_cq.cq_uk;
2486         if (notify_flags == IB_CQ_SOLICITED)
2487                 cq_notify = IW_CQ_COMPL_SOLICITED;
2488         spin_lock_irqsave(&iwcq->lock, flags);
2489         ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2490         spin_unlock_irqrestore(&iwcq->lock, flags);
2491         return 0;
2492 }
2493
2494 /**
2495  * i40iw_port_immutable - return port's immutable data
2496  * @ibdev: ib dev struct
2497  * @port_num: port number
2498  * @immutable: immutable data for the port return
2499  */
2500 static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2501                                 struct ib_port_immutable *immutable)
2502 {
2503         struct ib_port_attr attr;
2504         int err;
2505
2506         immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2507
2508         err = ib_query_port(ibdev, port_num, &attr);
2509
2510         if (err)
2511                 return err;
2512
2513         immutable->pkey_tbl_len = attr.pkey_tbl_len;
2514         immutable->gid_tbl_len = attr.gid_tbl_len;
2515
2516         return 0;
2517 }
2518
2519 static const char * const i40iw_hw_stat_names[] = {
2520         // 32bit names
2521         [I40IW_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
2522         [I40IW_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
2523         [I40IW_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
2524         [I40IW_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
2525         [I40IW_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
2526         [I40IW_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
2527         [I40IW_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
2528         [I40IW_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
2529         [I40IW_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
2530         // 64bit names
2531         [I40IW_HW_STAT_INDEX_IP4RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2532                 "ip4InOctets",
2533         [I40IW_HW_STAT_INDEX_IP4RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2534                 "ip4InPkts",
2535         [I40IW_HW_STAT_INDEX_IP4RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2536                 "ip4InReasmRqd",
2537         [I40IW_HW_STAT_INDEX_IP4RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2538                 "ip4InMcastPkts",
2539         [I40IW_HW_STAT_INDEX_IP4TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2540                 "ip4OutOctets",
2541         [I40IW_HW_STAT_INDEX_IP4TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2542                 "ip4OutPkts",
2543         [I40IW_HW_STAT_INDEX_IP4TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2544                 "ip4OutSegRqd",
2545         [I40IW_HW_STAT_INDEX_IP4TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2546                 "ip4OutMcastPkts",
2547         [I40IW_HW_STAT_INDEX_IP6RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2548                 "ip6InOctets",
2549         [I40IW_HW_STAT_INDEX_IP6RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2550                 "ip6InPkts",
2551         [I40IW_HW_STAT_INDEX_IP6RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2552                 "ip6InReasmRqd",
2553         [I40IW_HW_STAT_INDEX_IP6RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2554                 "ip6InMcastPkts",
2555         [I40IW_HW_STAT_INDEX_IP6TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2556                 "ip6OutOctets",
2557         [I40IW_HW_STAT_INDEX_IP6TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2558                 "ip6OutPkts",
2559         [I40IW_HW_STAT_INDEX_IP6TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2560                 "ip6OutSegRqd",
2561         [I40IW_HW_STAT_INDEX_IP6TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2562                 "ip6OutMcastPkts",
2563         [I40IW_HW_STAT_INDEX_TCPRXSEGS + I40IW_HW_STAT_INDEX_MAX_32] =
2564                 "tcpInSegs",
2565         [I40IW_HW_STAT_INDEX_TCPTXSEG + I40IW_HW_STAT_INDEX_MAX_32] =
2566                 "tcpOutSegs",
2567         [I40IW_HW_STAT_INDEX_RDMARXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2568                 "iwInRdmaReads",
2569         [I40IW_HW_STAT_INDEX_RDMARXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2570                 "iwInRdmaSends",
2571         [I40IW_HW_STAT_INDEX_RDMARXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2572                 "iwInRdmaWrites",
2573         [I40IW_HW_STAT_INDEX_RDMATXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2574                 "iwOutRdmaReads",
2575         [I40IW_HW_STAT_INDEX_RDMATXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2576                 "iwOutRdmaSends",
2577         [I40IW_HW_STAT_INDEX_RDMATXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2578                 "iwOutRdmaWrites",
2579         [I40IW_HW_STAT_INDEX_RDMAVBND + I40IW_HW_STAT_INDEX_MAX_32] =
2580                 "iwRdmaBnd",
2581         [I40IW_HW_STAT_INDEX_RDMAVINV + I40IW_HW_STAT_INDEX_MAX_32] =
2582                 "iwRdmaInv"
2583 };
2584
2585 static void i40iw_get_dev_fw_str(struct ib_device *dev, char *str)
2586 {
2587         u32 firmware_version = I40IW_FW_VERSION;
2588
2589         snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u", firmware_version,
2590                  (firmware_version & 0x000000ff));
2591 }
2592
2593 /**
2594  * i40iw_alloc_hw_stats - Allocate a hw stats structure
2595  * @ibdev: device pointer from stack
2596  * @port_num: port number
2597  */
2598 static struct rdma_hw_stats *i40iw_alloc_hw_stats(struct ib_device *ibdev,
2599                                                   u8 port_num)
2600 {
2601         struct i40iw_device *iwdev = to_iwdev(ibdev);
2602         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2603         int num_counters = I40IW_HW_STAT_INDEX_MAX_32 +
2604                 I40IW_HW_STAT_INDEX_MAX_64;
2605         unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
2606
2607         BUILD_BUG_ON(ARRAY_SIZE(i40iw_hw_stat_names) !=
2608                      (I40IW_HW_STAT_INDEX_MAX_32 +
2609                       I40IW_HW_STAT_INDEX_MAX_64));
2610
2611         /*
2612          * PFs get the default update lifespan, but VFs only update once
2613          * per second
2614          */
2615         if (!dev->is_pf)
2616                 lifespan = 1000;
2617         return rdma_alloc_hw_stats_struct(i40iw_hw_stat_names, num_counters,
2618                                           lifespan);
2619 }
2620
2621 /**
2622  * i40iw_get_hw_stats - Populates the rdma_hw_stats structure
2623  * @ibdev: device pointer from stack
2624  * @stats: stats pointer from stack
2625  * @port_num: port number
2626  * @index: which hw counter the stack is requesting we update
2627  */
2628 static int i40iw_get_hw_stats(struct ib_device *ibdev,
2629                               struct rdma_hw_stats *stats,
2630                               u8 port_num, int index)
2631 {
2632         struct i40iw_device *iwdev = to_iwdev(ibdev);
2633         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2634         struct i40iw_vsi_pestat *devstat = iwdev->vsi.pestat;
2635         struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2636
2637         if (dev->is_pf) {
2638                 i40iw_hw_stats_read_all(devstat, &devstat->hw_stats);
2639         } else {
2640                 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2641                         return -ENOSYS;
2642         }
2643
2644         memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
2645
2646         return stats->num_counters;
2647 }
2648
2649 /**
2650  * i40iw_query_gid - Query port GID
2651  * @ibdev: device pointer from stack
2652  * @port: port number
2653  * @index: Entry index
2654  * @gid: Global ID
2655  */
2656 static int i40iw_query_gid(struct ib_device *ibdev,
2657                            u8 port,
2658                            int index,
2659                            union ib_gid *gid)
2660 {
2661         struct i40iw_device *iwdev = to_iwdev(ibdev);
2662
2663         memset(gid->raw, 0, sizeof(gid->raw));
2664         ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2665         return 0;
2666 }
2667
2668 /**
2669  * i40iw_modify_port  Modify port properties
2670  * @ibdev: device pointer from stack
2671  * @port: port number
2672  * @port_modify_mask: mask for port modifications
2673  * @props: port properties
2674  */
2675 static int i40iw_modify_port(struct ib_device *ibdev,
2676                              u8 port,
2677                              int port_modify_mask,
2678                              struct ib_port_modify *props)
2679 {
2680         return -ENOSYS;
2681 }
2682
2683 /**
2684  * i40iw_query_pkey - Query partition key
2685  * @ibdev: device pointer from stack
2686  * @port: port number
2687  * @index: index of pkey
2688  * @pkey: pointer to store the pkey
2689  */
2690 static int i40iw_query_pkey(struct ib_device *ibdev,
2691                             u8 port,
2692                             u16 index,
2693                             u16 *pkey)
2694 {
2695         *pkey = 0;
2696         return 0;
2697 }
2698
2699 /**
2700  * i40iw_create_ah - create address handle
2701  * @ibpd: ptr of pd
2702  * @ah_attr: address handle attributes
2703  */
2704 static struct ib_ah *i40iw_create_ah(struct ib_pd *ibpd,
2705                                      struct rdma_ah_attr *attr,
2706                                      struct ib_udata *udata)
2707
2708 {
2709         return ERR_PTR(-ENOSYS);
2710 }
2711
2712 /**
2713  * i40iw_destroy_ah - Destroy address handle
2714  * @ah: pointer to address handle
2715  */
2716 static int i40iw_destroy_ah(struct ib_ah *ah)
2717 {
2718         return -ENOSYS;
2719 }
2720
2721 /**
2722  * i40iw_init_rdma_device - initialization of iwarp device
2723  * @iwdev: iwarp device
2724  */
2725 static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2726 {
2727         struct i40iw_ib_device *iwibdev;
2728         struct net_device *netdev = iwdev->netdev;
2729         struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2730
2731         iwibdev = (struct i40iw_ib_device *)ib_alloc_device(sizeof(*iwibdev));
2732         if (!iwibdev) {
2733                 i40iw_pr_err("iwdev == NULL\n");
2734                 return NULL;
2735         }
2736         strlcpy(iwibdev->ibdev.name, "i40iw%d", IB_DEVICE_NAME_MAX);
2737         iwibdev->ibdev.owner = THIS_MODULE;
2738         iwdev->iwibdev = iwibdev;
2739         iwibdev->iwdev = iwdev;
2740
2741         iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2742         ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2743
2744         iwibdev->ibdev.uverbs_cmd_mask =
2745             (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2746             (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2747             (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2748             (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2749             (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2750             (1ull << IB_USER_VERBS_CMD_REG_MR) |
2751             (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2752             (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2753             (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2754             (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2755             (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2756             (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2757             (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2758             (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2759             (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2760             (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2761             (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2762             (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2763             (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2764             (1ull << IB_USER_VERBS_CMD_POST_SEND);
2765         iwibdev->ibdev.phys_port_cnt = 1;
2766         iwibdev->ibdev.num_comp_vectors = iwdev->ceqs_count;
2767         iwibdev->ibdev.dev.parent = &pcidev->dev;
2768         iwibdev->ibdev.query_port = i40iw_query_port;
2769         iwibdev->ibdev.modify_port = i40iw_modify_port;
2770         iwibdev->ibdev.query_pkey = i40iw_query_pkey;
2771         iwibdev->ibdev.query_gid = i40iw_query_gid;
2772         iwibdev->ibdev.alloc_ucontext = i40iw_alloc_ucontext;
2773         iwibdev->ibdev.dealloc_ucontext = i40iw_dealloc_ucontext;
2774         iwibdev->ibdev.mmap = i40iw_mmap;
2775         iwibdev->ibdev.alloc_pd = i40iw_alloc_pd;
2776         iwibdev->ibdev.dealloc_pd = i40iw_dealloc_pd;
2777         iwibdev->ibdev.create_qp = i40iw_create_qp;
2778         iwibdev->ibdev.modify_qp = i40iw_modify_qp;
2779         iwibdev->ibdev.query_qp = i40iw_query_qp;
2780         iwibdev->ibdev.destroy_qp = i40iw_destroy_qp;
2781         iwibdev->ibdev.create_cq = i40iw_create_cq;
2782         iwibdev->ibdev.destroy_cq = i40iw_destroy_cq;
2783         iwibdev->ibdev.get_dma_mr = i40iw_get_dma_mr;
2784         iwibdev->ibdev.reg_user_mr = i40iw_reg_user_mr;
2785         iwibdev->ibdev.dereg_mr = i40iw_dereg_mr;
2786         iwibdev->ibdev.alloc_hw_stats = i40iw_alloc_hw_stats;
2787         iwibdev->ibdev.get_hw_stats = i40iw_get_hw_stats;
2788         iwibdev->ibdev.query_device = i40iw_query_device;
2789         iwibdev->ibdev.create_ah = i40iw_create_ah;
2790         iwibdev->ibdev.destroy_ah = i40iw_destroy_ah;
2791         iwibdev->ibdev.drain_sq = i40iw_drain_sq;
2792         iwibdev->ibdev.drain_rq = i40iw_drain_rq;
2793         iwibdev->ibdev.alloc_mr = i40iw_alloc_mr;
2794         iwibdev->ibdev.map_mr_sg = i40iw_map_mr_sg;
2795         iwibdev->ibdev.iwcm = kzalloc(sizeof(*iwibdev->ibdev.iwcm), GFP_KERNEL);
2796         if (!iwibdev->ibdev.iwcm) {
2797                 ib_dealloc_device(&iwibdev->ibdev);
2798                 return NULL;
2799         }
2800
2801         iwibdev->ibdev.iwcm->add_ref = i40iw_add_ref;
2802         iwibdev->ibdev.iwcm->rem_ref = i40iw_rem_ref;
2803         iwibdev->ibdev.iwcm->get_qp = i40iw_get_qp;
2804         iwibdev->ibdev.iwcm->connect = i40iw_connect;
2805         iwibdev->ibdev.iwcm->accept = i40iw_accept;
2806         iwibdev->ibdev.iwcm->reject = i40iw_reject;
2807         iwibdev->ibdev.iwcm->create_listen = i40iw_create_listen;
2808         iwibdev->ibdev.iwcm->destroy_listen = i40iw_destroy_listen;
2809         memcpy(iwibdev->ibdev.iwcm->ifname, netdev->name,
2810                sizeof(iwibdev->ibdev.iwcm->ifname));
2811         iwibdev->ibdev.get_port_immutable   = i40iw_port_immutable;
2812         iwibdev->ibdev.get_dev_fw_str       = i40iw_get_dev_fw_str;
2813         iwibdev->ibdev.poll_cq = i40iw_poll_cq;
2814         iwibdev->ibdev.req_notify_cq = i40iw_req_notify_cq;
2815         iwibdev->ibdev.post_send = i40iw_post_send;
2816         iwibdev->ibdev.post_recv = i40iw_post_recv;
2817
2818         return iwibdev;
2819 }
2820
2821 /**
2822  * i40iw_port_ibevent - indicate port event
2823  * @iwdev: iwarp device
2824  */
2825 void i40iw_port_ibevent(struct i40iw_device *iwdev)
2826 {
2827         struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2828         struct ib_event event;
2829
2830         event.device = &iwibdev->ibdev;
2831         event.element.port_num = 1;
2832         event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2833         ib_dispatch_event(&event);
2834 }
2835
2836 /**
2837  * i40iw_unregister_rdma_device - unregister of iwarp from IB
2838  * @iwibdev: rdma device ptr
2839  */
2840 static void i40iw_unregister_rdma_device(struct i40iw_ib_device *iwibdev)
2841 {
2842         int i;
2843
2844         for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i)
2845                 device_remove_file(&iwibdev->ibdev.dev,
2846                                    i40iw_dev_attributes[i]);
2847         ib_unregister_device(&iwibdev->ibdev);
2848 }
2849
2850 /**
2851  * i40iw_destroy_rdma_device - destroy rdma device and free resources
2852  * @iwibdev: IB device ptr
2853  */
2854 void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2855 {
2856         if (!iwibdev)
2857                 return;
2858
2859         i40iw_unregister_rdma_device(iwibdev);
2860         kfree(iwibdev->ibdev.iwcm);
2861         iwibdev->ibdev.iwcm = NULL;
2862         wait_event_timeout(iwibdev->iwdev->close_wq,
2863                            !atomic64_read(&iwibdev->iwdev->use_count),
2864                            I40IW_EVENT_TIMEOUT);
2865         ib_dealloc_device(&iwibdev->ibdev);
2866 }
2867
2868 /**
2869  * i40iw_register_rdma_device - register iwarp device to IB
2870  * @iwdev: iwarp device
2871  */
2872 int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2873 {
2874         int i, ret;
2875         struct i40iw_ib_device *iwibdev;
2876
2877         iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2878         if (!iwdev->iwibdev)
2879                 return -ENOMEM;
2880         iwibdev = iwdev->iwibdev;
2881
2882         ret = ib_register_device(&iwibdev->ibdev, NULL);
2883         if (ret)
2884                 goto error;
2885
2886         for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) {
2887                 ret =
2888                     device_create_file(&iwibdev->ibdev.dev,
2889                                        i40iw_dev_attributes[i]);
2890                 if (ret) {
2891                         while (i > 0) {
2892                                 i--;
2893                                 device_remove_file(&iwibdev->ibdev.dev, i40iw_dev_attributes[i]);
2894                         }
2895                         ib_unregister_device(&iwibdev->ibdev);
2896                         goto error;
2897                 }
2898         }
2899         return 0;
2900 error:
2901         kfree(iwdev->iwibdev->ibdev.iwcm);
2902         iwdev->iwibdev->ibdev.iwcm = NULL;
2903         ib_dealloc_device(&iwdev->iwibdev->ibdev);
2904         return ret;
2905 }