drivers/infiniband/hw/i40iw/i40iw_verbs.c

   1 /*******************************************************************************
   2 *
   3 * Copyright (c) 2015-2016 Intel Corporation.  All rights reserved.
   4 *
   5 * This software is available to you under a choice of one of two
   6 * licenses.  You may choose to be licensed under the terms of the GNU
   7 * General Public License (GPL) Version 2, available from the file
   8 * COPYING in the main directory of this source tree, or the
   9 * OpenFabrics.org BSD license below:
  10 *
  11 *   Redistribution and use in source and binary forms, with or
  12 *   without modification, are permitted provided that the following
  13 *   conditions are met:
  14 *
  15 *    - Redistributions of source code must retain the above
  16 *       copyright notice, this list of conditions and the following
  17 *       disclaimer.
  18 *
  19 *    - Redistributions in binary form must reproduce the above
  20 *       copyright notice, this list of conditions and the following
  21 *       disclaimer in the documentation and/or other materials
  22 *       provided with the distribution.
  23 *
  24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31 * SOFTWARE.
  32 *
  33 *******************************************************************************/
  34
  35 #include <linux/module.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/random.h>
  38 #include <linux/highmem.h>
  39 #include <linux/time.h>
  40 #include <linux/hugetlb.h>
  41 #include <linux/irq.h>
  42 #include <asm/byteorder.h>
  43 #include <net/ip.h>
  44 #include <rdma/ib_verbs.h>
  45 #include <rdma/iw_cm.h>
  46 #include <rdma/ib_user_verbs.h>
  47 #include <rdma/ib_umem.h>
  48 #include "i40iw.h"
  49
  50 /**
  51  * i40iw_query_device - get device attributes
  52  * @ibdev: device pointer from stack
  53  * @props: returning device attributes
  54  * @udata: user data
  55  */
  56 static int i40iw_query_device(struct ib_device *ibdev,
  57                               struct ib_device_attr *props,
  58                               struct ib_udata *udata)
  59 {
  60         struct i40iw_device *iwdev = to_iwdev(ibdev);
  61
  62         if (udata->inlen || udata->outlen)
  63                 return -EINVAL;
  64         memset(props, 0, sizeof(*props));
  65         ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
  66         props->fw_ver = I40IW_FW_VERSION;
  67         props->device_cap_flags = iwdev->device_cap_flags;
  68         props->vendor_id = iwdev->ldev->pcidev->vendor;
  69         props->vendor_part_id = iwdev->ldev->pcidev->device;
  70         props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
  71         props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
  72         props->max_qp = iwdev->max_qp - iwdev->used_qps;
  73         props->max_qp_wr = I40IW_MAX_QP_WRS;
  74         props->max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  75         props->max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  76         props->max_cq = iwdev->max_cq - iwdev->used_cqs;
  77         props->max_cqe = iwdev->max_cqe;
  78         props->max_mr = iwdev->max_mr - iwdev->used_mrs;
  79         props->max_pd = iwdev->max_pd - iwdev->used_pds;
  80         props->max_sge_rd = I40IW_MAX_SGE_RD;
  81         props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
  82         props->max_qp_init_rd_atom = props->max_qp_rd_atom;
  83         props->atomic_cap = IB_ATOMIC_NONE;
  84         props->max_map_per_fmr = 1;
  85         props->max_fast_reg_page_list_len = I40IW_MAX_PAGES_PER_FMR;
  86         return 0;
  87 }
  88
  89 /**
  90  * i40iw_query_port - get port attrubutes
  91  * @ibdev: device pointer from stack
  92  * @port: port number for query
  93  * @props: returning device attributes
  94  */
  95 static int i40iw_query_port(struct ib_device *ibdev,
  96                             u8 port,
  97                             struct ib_port_attr *props)
  98 {
  99         struct i40iw_device *iwdev = to_iwdev(ibdev);
 100         struct net_device *netdev = iwdev->netdev;
 101
 102         /* props being zeroed by the caller, avoid zeroing it here */
 103         props->max_mtu = IB_MTU_4096;
 104         props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
 105
 106         props->lid = 1;
 107         if (netif_carrier_ok(iwdev->netdev))
 108                 props->state = IB_PORT_ACTIVE;
 109         else
 110                 props->state = IB_PORT_DOWN;
 111         props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
 112                 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
 113         props->gid_tbl_len = 1;
 114         props->pkey_tbl_len = 1;
 115         props->active_width = IB_WIDTH_4X;
 116         props->active_speed = 1;
 117         props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
 118         return 0;
 119 }
 120
 121 /**
 122  * i40iw_alloc_ucontext - Allocate the user context data structure
 123  * @ibdev: device pointer from stack
 124  * @udata: user data
 125  *
 126  * This keeps track of all objects associated with a particular
 127  * user-mode client.
 128  */
 129 static struct ib_ucontext *i40iw_alloc_ucontext(struct ib_device *ibdev,
 130                                                 struct ib_udata *udata)
 131 {
 132         struct i40iw_device *iwdev = to_iwdev(ibdev);
 133         struct i40iw_alloc_ucontext_req req;
 134         struct i40iw_alloc_ucontext_resp uresp;
 135         struct i40iw_ucontext *ucontext;
 136
 137         if (ib_copy_from_udata(&req, udata, sizeof(req)))
 138                 return ERR_PTR(-EINVAL);
 139
 140         if (req.userspace_ver < 4 || req.userspace_ver > I40IW_ABI_VER) {
 141                 i40iw_pr_err("Unsupported provider library version %u.\n", req.userspace_ver);
 142                 return ERR_PTR(-EINVAL);
 143         }
 144
 145         memset(&uresp, 0, sizeof(uresp));
 146         uresp.max_qps = iwdev->max_qp;
 147         uresp.max_pds = iwdev->max_pd;
 148         uresp.wq_size = iwdev->max_qp_wr * 2;
 149         uresp.kernel_ver = req.userspace_ver;
 150
 151         ucontext = kzalloc(sizeof(*ucontext), GFP_KERNEL);
 152         if (!ucontext)
 153                 return ERR_PTR(-ENOMEM);
 154
 155         ucontext->iwdev = iwdev;
 156         ucontext->abi_ver = req.userspace_ver;
 157
 158         if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 159                 kfree(ucontext);
 160                 return ERR_PTR(-EFAULT);
 161         }
 162
 163         INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
 164         spin_lock_init(&ucontext->cq_reg_mem_list_lock);
 165         INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
 166         spin_lock_init(&ucontext->qp_reg_mem_list_lock);
 167
 168         return &ucontext->ibucontext;
 169 }
 170
 171 /**
 172  * i40iw_dealloc_ucontext - deallocate the user context data structure
 173  * @context: user context created during alloc
 174  */
 175 static int i40iw_dealloc_ucontext(struct ib_ucontext *context)
 176 {
 177         struct i40iw_ucontext *ucontext = to_ucontext(context);
 178         unsigned long flags;
 179
 180         spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
 181         if (!list_empty(&ucontext->cq_reg_mem_list)) {
 182                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 183                 return -EBUSY;
 184         }
 185         spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 186         spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
 187         if (!list_empty(&ucontext->qp_reg_mem_list)) {
 188                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 189                 return -EBUSY;
 190         }
 191         spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 192
 193         kfree(ucontext);
 194         return 0;
 195 }
 196
 197 /**
 198  * i40iw_mmap - user memory map
 199  * @context: context created during alloc
 200  * @vma: kernel info for user memory map
 201  */
 202 static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
 203 {
 204         struct i40iw_ucontext *ucontext = to_ucontext(context);
 205         u64 dbaddr;
 206
 207         if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
 208                 return -EINVAL;
 209
 210         dbaddr = I40IW_DB_ADDR_OFFSET + pci_resource_start(ucontext->iwdev->ldev->pcidev, 0);
 211
 212         if (io_remap_pfn_range(vma, vma->vm_start, dbaddr >> PAGE_SHIFT, PAGE_SIZE,
 213                                pgprot_noncached(vma->vm_page_prot)))
 214                 return -EAGAIN;
 215
 216         return 0;
 217 }
 218
 219 /**
 220  * i40iw_alloc_push_page - allocate a push page for qp
 221  * @iwdev: iwarp device
 222  * @qp: hardware control qp
 223  */
 224 static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 225 {
 226         struct i40iw_cqp_request *cqp_request;
 227         struct cqp_commands_info *cqp_info;
 228         enum i40iw_status_code status;
 229
 230         if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
 231                 return;
 232
 233         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
 234         if (!cqp_request)
 235                 return;
 236
 237         atomic_inc(&cqp_request->refcount);
 238
 239         cqp_info = &cqp_request->info;
 240         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 241         cqp_info->post_sq = 1;
 242
 243         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 244         cqp_info->in.u.manage_push_page.info.free_page = 0;
 245         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 246         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 247
 248         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 249         if (!status)
 250                 qp->push_idx = cqp_request->compl_info.op_ret_val;
 251         else
 252                 i40iw_pr_err("CQP-OP Push page fail");
 253         i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
 254 }
 255
 256 /**
 257  * i40iw_dealloc_push_page - free a push page for qp
 258  * @iwdev: iwarp device
 259  * @qp: hardware control qp
 260  */
 261 static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 262 {
 263         struct i40iw_cqp_request *cqp_request;
 264         struct cqp_commands_info *cqp_info;
 265         enum i40iw_status_code status;
 266
 267         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
 268                 return;
 269
 270         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
 271         if (!cqp_request)
 272                 return;
 273
 274         cqp_info = &cqp_request->info;
 275         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 276         cqp_info->post_sq = 1;
 277
 278         cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
 279         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 280         cqp_info->in.u.manage_push_page.info.free_page = 1;
 281         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 282         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 283
 284         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 285         if (!status)
 286                 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 287         else
 288                 i40iw_pr_err("CQP-OP Push page fail");
 289 }
 290
 291 /**
 292  * i40iw_alloc_pd - allocate protection domain
 293  * @ibdev: device pointer from stack
 294  * @context: user context created during alloc
 295  * @udata: user data
 296  */
 297 static struct ib_pd *i40iw_alloc_pd(struct ib_device *ibdev,
 298                                     struct ib_ucontext *context,
 299                                     struct ib_udata *udata)
 300 {
 301         struct i40iw_pd *iwpd;
 302         struct i40iw_device *iwdev = to_iwdev(ibdev);
 303         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 304         struct i40iw_alloc_pd_resp uresp;
 305         struct i40iw_sc_pd *sc_pd;
 306         struct i40iw_ucontext *ucontext;
 307         u32 pd_id = 0;
 308         int err;
 309
 310         if (iwdev->closing)
 311                 return ERR_PTR(-ENODEV);
 312
 313         err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
 314                                    iwdev->max_pd, &pd_id, &iwdev->next_pd);
 315         if (err) {
 316                 i40iw_pr_err("alloc resource failed\n");
 317                 return ERR_PTR(err);
 318         }
 319
 320         iwpd = kzalloc(sizeof(*iwpd), GFP_KERNEL);
 321         if (!iwpd) {
 322                 err = -ENOMEM;
 323                 goto free_res;
 324         }
 325
 326         sc_pd = &iwpd->sc_pd;
 327
 328         if (context) {
 329                 ucontext = to_ucontext(context);
 330                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
 331                 memset(&uresp, 0, sizeof(uresp));
 332                 uresp.pd_id = pd_id;
 333                 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 334                         err = -EFAULT;
 335                         goto error;
 336                 }
 337         } else {
 338                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, -1);
 339         }
 340
 341         i40iw_add_pdusecount(iwpd);
 342         return &iwpd->ibpd;
 343 error:
 344         kfree(iwpd);
 345 free_res:
 346         i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
 347         return ERR_PTR(err);
 348 }
 349
 350 /**
 351  * i40iw_dealloc_pd - deallocate pd
 352  * @ibpd: ptr of pd to be deallocated
 353  */
 354 static int i40iw_dealloc_pd(struct ib_pd *ibpd)
 355 {
 356         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 357         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 358
 359         i40iw_rem_pdusecount(iwpd, iwdev);
 360         return 0;
 361 }
 362
 363 /**
 364  * i40iw_get_pbl - Retrieve pbl from a list given a virtual
 365  * address
 366  * @va: user virtual address
 367  * @pbl_list: pbl list to search in (QP's or CQ's)
 368  */
 369 static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
 370                                        struct list_head *pbl_list)
 371 {
 372         struct i40iw_pbl *iwpbl;
 373
 374         list_for_each_entry(iwpbl, pbl_list, list) {
 375                 if (iwpbl->user_base == va) {
 376                         iwpbl->on_list = false;
 377                         list_del(&iwpbl->list);
 378                         return iwpbl;
 379                 }
 380         }
 381         return NULL;
 382 }
 383
 384 /**
 385  * i40iw_free_qp_resources - free up memory resources for qp
 386  * @iwdev: iwarp device
 387  * @iwqp: qp ptr (user or kernel)
 388  * @qp_num: qp number assigned
 389  */
 390 void i40iw_free_qp_resources(struct i40iw_device *iwdev,
 391                              struct i40iw_qp *iwqp,
 392                              u32 qp_num)
 393 {
 394         struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
 395
 396         i40iw_ieq_cleanup_qp(iwdev->vsi.ieq, &iwqp->sc_qp);
 397         i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
 398         if (qp_num)
 399                 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
 400         if (iwpbl->pbl_allocated)
 401                 i40iw_free_pble(iwdev->pble_rsrc, &iwpbl->pble_alloc);
 402         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
 403         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
 404         kfree(iwqp->kqp.wrid_mem);
 405         iwqp->kqp.wrid_mem = NULL;
 406         kfree(iwqp->allocated_buffer);
 407 }
 408
 409 /**
 410  * i40iw_clean_cqes - clean cq entries for qp
 411  * @iwqp: qp ptr (user or kernel)
 412  * @iwcq: cq ptr
 413  */
 414 static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
 415 {
 416         struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
 417
 418         ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
 419 }
 420
 421 /**
 422  * i40iw_destroy_qp - destroy qp
 423  * @ibqp: qp's ib pointer also to get to device's qp address
 424  */
 425 static int i40iw_destroy_qp(struct ib_qp *ibqp)
 426 {
 427         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 428
 429         iwqp->destroyed = 1;
 430
 431         if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
 432                 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
 433
 434         if (!iwqp->user_mode) {
 435                 if (iwqp->iwscq) {
 436                         i40iw_clean_cqes(iwqp, iwqp->iwscq);
 437                         if (iwqp->iwrcq != iwqp->iwscq)
 438                                 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
 439                 }
 440         }
 441
 442         i40iw_rem_ref(&iwqp->ibqp);
 443         return 0;
 444 }
 445
 446 /**
 447  * i40iw_setup_virt_qp - setup for allocation of virtual qp
 448  * @dev: iwarp device
 449  * @qp: qp ptr
 450  * @init_info: initialize info to return
 451  */
 452 static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
 453                                struct i40iw_qp *iwqp,
 454                                struct i40iw_qp_init_info *init_info)
 455 {
 456         struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
 457         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
 458
 459         iwqp->page = qpmr->sq_page;
 460         init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
 461         if (iwpbl->pbl_allocated) {
 462                 init_info->virtual_map = true;
 463                 init_info->sq_pa = qpmr->sq_pbl.idx;
 464                 init_info->rq_pa = qpmr->rq_pbl.idx;
 465         } else {
 466                 init_info->sq_pa = qpmr->sq_pbl.addr;
 467                 init_info->rq_pa = qpmr->rq_pbl.addr;
 468         }
 469         return 0;
 470 }
 471
 472 /**
 473  * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
 474  * @iwdev: iwarp device
 475  * @iwqp: qp ptr (user or kernel)
 476  * @info: initialize info to return
 477  */
 478 static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
 479                                 struct i40iw_qp *iwqp,
 480                                 struct i40iw_qp_init_info *info)
 481 {
 482         struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
 483         u32 sqdepth, rqdepth;
 484         u8 sqshift;
 485         u32 size;
 486         enum i40iw_status_code status;
 487         struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
 488
 489         i40iw_get_wqe_shift(ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
 490         status = i40iw_get_sqdepth(ukinfo->sq_size, sqshift, &sqdepth);
 491         if (status)
 492                 return -ENOMEM;
 493
 494         status = i40iw_get_rqdepth(ukinfo->rq_size, I40IW_MAX_RQ_WQE_SHIFT, &rqdepth);
 495         if (status)
 496                 return -ENOMEM;
 497
 498         size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
 499         iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
 500
 501         ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
 502         if (!ukinfo->sq_wrtrk_array)
 503                 return -ENOMEM;
 504
 505         ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
 506
 507         size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
 508         size += (I40IW_SHADOW_AREA_SIZE << 3);
 509
 510         status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
 511         if (status) {
 512                 kfree(ukinfo->sq_wrtrk_array);
 513                 ukinfo->sq_wrtrk_array = NULL;
 514                 return -ENOMEM;
 515         }
 516
 517         ukinfo->sq = mem->va;
 518         info->sq_pa = mem->pa;
 519
 520         ukinfo->rq = &ukinfo->sq[sqdepth];
 521         info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
 522
 523         ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
 524         info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
 525
 526         ukinfo->sq_size = sqdepth >> sqshift;
 527         ukinfo->rq_size = rqdepth >> I40IW_MAX_RQ_WQE_SHIFT;
 528         ukinfo->qp_id = iwqp->ibqp.qp_num;
 529         return 0;
 530 }
 531
 532 /**
 533  * i40iw_create_qp - create qp
 534  * @ibpd: ptr of pd
 535  * @init_attr: attributes for qp
 536  * @udata: user data for create qp
 537  */
 538 static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
 539                                      struct ib_qp_init_attr *init_attr,
 540                                      struct ib_udata *udata)
 541 {
 542         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 543         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 544         struct i40iw_cqp *iwcqp = &iwdev->cqp;
 545         struct i40iw_qp *iwqp;
 546         struct i40iw_ucontext *ucontext;
 547         struct i40iw_create_qp_req req;
 548         struct i40iw_create_qp_resp uresp;
 549         u32 qp_num = 0;
 550         void *mem;
 551         enum i40iw_status_code ret;
 552         int err_code;
 553         int sq_size;
 554         int rq_size;
 555         struct i40iw_sc_qp *qp;
 556         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 557         struct i40iw_qp_init_info init_info;
 558         struct i40iw_create_qp_info *qp_info;
 559         struct i40iw_cqp_request *cqp_request;
 560         struct cqp_commands_info *cqp_info;
 561
 562         struct i40iw_qp_host_ctx_info *ctx_info;
 563         struct i40iwarp_offload_info *iwarp_info;
 564         unsigned long flags;
 565
 566         if (iwdev->closing)
 567                 return ERR_PTR(-ENODEV);
 568
 569         if (init_attr->create_flags)
 570                 return ERR_PTR(-EINVAL);
 571         if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
 572                 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 573
 574         if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 575                 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 576
 577         if (init_attr->cap.max_recv_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 578                 init_attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 579
 580         memset(&init_info, 0, sizeof(init_info));
 581
 582         sq_size = init_attr->cap.max_send_wr;
 583         rq_size = init_attr->cap.max_recv_wr;
 584
 585         init_info.vsi = &iwdev->vsi;
 586         init_info.qp_uk_init_info.sq_size = sq_size;
 587         init_info.qp_uk_init_info.rq_size = rq_size;
 588         init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
 589         init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
 590         init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
 591
 592         mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
 593         if (!mem)
 594                 return ERR_PTR(-ENOMEM);
 595
 596         iwqp = (struct i40iw_qp *)mem;
 597         iwqp->allocated_buffer = mem;
 598         qp = &iwqp->sc_qp;
 599         qp->back_qp = (void *)iwqp;
 600         qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 601
 602         iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
 603
 604         if (i40iw_allocate_dma_mem(dev->hw,
 605                                    &iwqp->q2_ctx_mem,
 606                                    I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
 607                                    256)) {
 608                 i40iw_pr_err("dma_mem failed\n");
 609                 err_code = -ENOMEM;
 610                 goto error;
 611         }
 612
 613         init_info.q2 = iwqp->q2_ctx_mem.va;
 614         init_info.q2_pa = iwqp->q2_ctx_mem.pa;
 615
 616         init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
 617         init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
 618
 619         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
 620                                         &qp_num, &iwdev->next_qp);
 621         if (err_code) {
 622                 i40iw_pr_err("qp resource\n");
 623                 goto error;
 624         }
 625
 626         iwqp->iwdev = iwdev;
 627         iwqp->iwpd = iwpd;
 628         iwqp->ibqp.qp_num = qp_num;
 629         qp = &iwqp->sc_qp;
 630         iwqp->iwscq = to_iwcq(init_attr->send_cq);
 631         iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
 632
 633         iwqp->host_ctx.va = init_info.host_ctx;
 634         iwqp->host_ctx.pa = init_info.host_ctx_pa;
 635         iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
 636
 637         init_info.pd = &iwpd->sc_pd;
 638         init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
 639         iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
 640
 641         if (init_attr->qp_type != IB_QPT_RC) {
 642                 err_code = -EINVAL;
 643                 goto error;
 644         }
 645         if (iwdev->push_mode)
 646                 i40iw_alloc_push_page(iwdev, qp);
 647         if (udata) {
 648                 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
 649                 if (err_code) {
 650                         i40iw_pr_err("ib_copy_from_data\n");
 651                         goto error;
 652                 }
 653                 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
 654                 if (ibpd->uobject && ibpd->uobject->context) {
 655                         iwqp->user_mode = 1;
 656                         ucontext = to_ucontext(ibpd->uobject->context);
 657
 658                         if (req.user_wqe_buffers) {
 659                                 struct i40iw_pbl *iwpbl;
 660
 661                                 spin_lock_irqsave(
 662                                     &ucontext->qp_reg_mem_list_lock, flags);
 663                                 iwpbl = i40iw_get_pbl(
 664                                     (unsigned long)req.user_wqe_buffers,
 665                                     &ucontext->qp_reg_mem_list);
 666                                 spin_unlock_irqrestore(
 667                                     &ucontext->qp_reg_mem_list_lock, flags);
 668
 669                                 if (!iwpbl) {
 670                                         err_code = -ENODATA;
 671                                         i40iw_pr_err("no pbl info\n");
 672                                         goto error;
 673                                 }
 674                                 memcpy(&iwqp->iwpbl, iwpbl, sizeof(iwqp->iwpbl));
 675                         }
 676                 }
 677                 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
 678         } else {
 679                 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
 680         }
 681
 682         if (err_code) {
 683                 i40iw_pr_err("setup qp failed\n");
 684                 goto error;
 685         }
 686
 687         init_info.type = I40IW_QP_TYPE_IWARP;
 688         ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
 689         if (ret) {
 690                 err_code = -EPROTO;
 691                 i40iw_pr_err("qp_init fail\n");
 692                 goto error;
 693         }
 694         ctx_info = &iwqp->ctx_info;
 695         iwarp_info = &iwqp->iwarp_info;
 696         iwarp_info->rd_enable = true;
 697         iwarp_info->wr_rdresp_en = true;
 698         if (!iwqp->user_mode) {
 699                 iwarp_info->fast_reg_en = true;
 700                 iwarp_info->priv_mode_en = true;
 701         }
 702         iwarp_info->ddp_ver = 1;
 703         iwarp_info->rdmap_ver = 1;
 704
 705         ctx_info->iwarp_info_valid = true;
 706         ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 707         ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 708         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
 709                 ctx_info->push_mode_en = false;
 710         } else {
 711                 ctx_info->push_mode_en = true;
 712                 ctx_info->push_idx = qp->push_idx;
 713         }
 714
 715         ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 716                                              (u64 *)iwqp->host_ctx.va,
 717                                              ctx_info);
 718         ctx_info->iwarp_info_valid = false;
 719         cqp_request = i40iw_get_cqp_request(iwcqp, true);
 720         if (!cqp_request) {
 721                 err_code = -ENOMEM;
 722                 goto error;
 723         }
 724         cqp_info = &cqp_request->info;
 725         qp_info = &cqp_request->info.in.u.qp_create.info;
 726
 727         memset(qp_info, 0, sizeof(*qp_info));
 728
 729         qp_info->cq_num_valid = true;
 730         qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
 731
 732         cqp_info->cqp_cmd = OP_QP_CREATE;
 733         cqp_info->post_sq = 1;
 734         cqp_info->in.u.qp_create.qp = qp;
 735         cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
 736         ret = i40iw_handle_cqp_op(iwdev, cqp_request);
 737         if (ret) {
 738                 i40iw_pr_err("CQP-OP QP create fail");
 739                 err_code = -EACCES;
 740                 goto error;
 741         }
 742
 743         i40iw_add_ref(&iwqp->ibqp);
 744         spin_lock_init(&iwqp->lock);
 745         iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
 746         iwdev->qp_table[qp_num] = iwqp;
 747         i40iw_add_pdusecount(iwqp->iwpd);
 748         i40iw_add_devusecount(iwdev);
 749         if (ibpd->uobject && udata) {
 750                 memset(&uresp, 0, sizeof(uresp));
 751                 uresp.actual_sq_size = sq_size;
 752                 uresp.actual_rq_size = rq_size;
 753                 uresp.qp_id = qp_num;
 754                 uresp.push_idx = qp->push_idx;
 755                 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
 756                 if (err_code) {
 757                         i40iw_pr_err("copy_to_udata failed\n");
 758                         i40iw_destroy_qp(&iwqp->ibqp);
 759                            /* let the completion of the qp destroy free the qp */
 760                         return ERR_PTR(err_code);
 761                 }
 762         }
 763         init_completion(&iwqp->sq_drained);
 764         init_completion(&iwqp->rq_drained);
 765
 766         return &iwqp->ibqp;
 767 error:
 768         i40iw_free_qp_resources(iwdev, iwqp, qp_num);
 769         return ERR_PTR(err_code);
 770 }
 771
 772 /**
 773  * i40iw_query - query qp attributes
 774  * @ibqp: qp pointer
 775  * @attr: attributes pointer
 776  * @attr_mask: Not used
 777  * @init_attr: qp attributes to return
 778  */
 779 static int i40iw_query_qp(struct ib_qp *ibqp,
 780                           struct ib_qp_attr *attr,
 781                           int attr_mask,
 782                           struct ib_qp_init_attr *init_attr)
 783 {
 784         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 785         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
 786
 787         attr->qp_state = iwqp->ibqp_state;
 788         attr->cur_qp_state = attr->qp_state;
 789         attr->qp_access_flags = 0;
 790         attr->cap.max_send_wr = qp->qp_uk.sq_size;
 791         attr->cap.max_recv_wr = qp->qp_uk.rq_size;
 792         attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 793         attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 794         attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 795         attr->port_num = 1;
 796         init_attr->event_handler = iwqp->ibqp.event_handler;
 797         init_attr->qp_context = iwqp->ibqp.qp_context;
 798         init_attr->send_cq = iwqp->ibqp.send_cq;
 799         init_attr->recv_cq = iwqp->ibqp.recv_cq;
 800         init_attr->srq = iwqp->ibqp.srq;
 801         init_attr->cap = attr->cap;
 802         init_attr->port_num = 1;
 803         return 0;
 804 }
 805
 806 /**
 807  * i40iw_hw_modify_qp - setup cqp for modify qp
 808  * @iwdev: iwarp device
 809  * @iwqp: qp ptr (user or kernel)
 810  * @info: info for modify qp
 811  * @wait: flag to wait or not for modify qp completion
 812  */
 813 void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
 814                         struct i40iw_modify_qp_info *info, bool wait)
 815 {
 816         struct i40iw_cqp_request *cqp_request;
 817         struct cqp_commands_info *cqp_info;
 818         struct i40iw_modify_qp_info *m_info;
 819         struct i40iw_gen_ae_info ae_info;
 820
 821         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
 822         if (!cqp_request)
 823                 return;
 824
 825         cqp_info = &cqp_request->info;
 826         m_info = &cqp_info->in.u.qp_modify.info;
 827         memcpy(m_info, info, sizeof(*m_info));
 828         cqp_info->cqp_cmd = OP_QP_MODIFY;
 829         cqp_info->post_sq = 1;
 830         cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
 831         cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
 832         if (!i40iw_handle_cqp_op(iwdev, cqp_request))
 833                 return;
 834
 835         switch (m_info->next_iwarp_state) {
 836         case I40IW_QP_STATE_RTS:
 837                 if (iwqp->iwarp_state == I40IW_QP_STATE_IDLE)
 838                         i40iw_send_reset(iwqp->cm_node);
 839                 /* fall through */
 840         case I40IW_QP_STATE_IDLE:
 841         case I40IW_QP_STATE_TERMINATE:
 842         case I40IW_QP_STATE_CLOSING:
 843                 ae_info.ae_code = I40IW_AE_BAD_CLOSE;
 844                 ae_info.ae_source = 0;
 845                 i40iw_gen_ae(iwdev, &iwqp->sc_qp, &ae_info, false);
 846                 break;
 847         case I40IW_QP_STATE_ERROR:
 848         default:
 849                 break;
 850         }
 851 }
 852
 853 /**
 854  * i40iw_modify_qp - modify qp request
 855  * @ibqp: qp's pointer for modify
 856  * @attr: access attributes
 857  * @attr_mask: state mask
 858  * @udata: user data
 859  */
 860 int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
 861                     int attr_mask, struct ib_udata *udata)
 862 {
 863         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 864         struct i40iw_device *iwdev = iwqp->iwdev;
 865         struct i40iw_qp_host_ctx_info *ctx_info;
 866         struct i40iwarp_offload_info *iwarp_info;
 867         struct i40iw_modify_qp_info info;
 868         u8 issue_modify_qp = 0;
 869         u8 dont_wait = 0;
 870         u32 err;
 871         unsigned long flags;
 872
 873         memset(&info, 0, sizeof(info));
 874         ctx_info = &iwqp->ctx_info;
 875         iwarp_info = &iwqp->iwarp_info;
 876
 877         spin_lock_irqsave(&iwqp->lock, flags);
 878
 879         if (attr_mask & IB_QP_STATE) {
 880                 if (iwdev->closing && attr->qp_state != IB_QPS_ERR) {
 881                         err = -EINVAL;
 882                         goto exit;
 883                 }
 884
 885                 switch (attr->qp_state) {
 886                 case IB_QPS_INIT:
 887                 case IB_QPS_RTR:
 888                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
 889                                 err = -EINVAL;
 890                                 goto exit;
 891                         }
 892                         if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
 893                                 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
 894                                 issue_modify_qp = 1;
 895                         }
 896                         break;
 897                 case IB_QPS_RTS:
 898                         if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
 899                             (!iwqp->cm_id)) {
 900                                 err = -EINVAL;
 901                                 goto exit;
 902                         }
 903
 904                         issue_modify_qp = 1;
 905                         iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
 906                         iwqp->hte_added = 1;
 907                         info.next_iwarp_state = I40IW_QP_STATE_RTS;
 908                         info.tcp_ctx_valid = true;
 909                         info.ord_valid = true;
 910                         info.arp_cache_idx_valid = true;
 911                         info.cq_num_valid = true;
 912                         break;
 913                 case IB_QPS_SQD:
 914                         if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
 915                                 err = 0;
 916                                 goto exit;
 917                         }
 918                         if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
 919                             (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
 920                                 err = 0;
 921                                 goto exit;
 922                         }
 923                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
 924                                 err = -EINVAL;
 925                                 goto exit;
 926                         }
 927                         info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
 928                         issue_modify_qp = 1;
 929                         break;
 930                 case IB_QPS_SQE:
 931                         if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
 932                                 err = -EINVAL;
 933                                 goto exit;
 934                         }
 935                         info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
 936                         issue_modify_qp = 1;
 937                         break;
 938                 case IB_QPS_ERR:
 939                 case IB_QPS_RESET:
 940                         if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
 941                                 err = -EINVAL;
 942                                 goto exit;
 943                         }
 944                         if (iwqp->sc_qp.term_flags)
 945                                 i40iw_terminate_del_timer(&iwqp->sc_qp);
 946                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 947                         if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
 948                             iwdev->iw_status &&
 949                             (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
 950                                 info.reset_tcp_conn = true;
 951                         else
 952                                 dont_wait = 1;
 953                         issue_modify_qp = 1;
 954                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 955                         break;
 956                 default:
 957                         err = -EINVAL;
 958                         goto exit;
 959                 }
 960
 961                 iwqp->ibqp_state = attr->qp_state;
 962
 963         }
 964         if (attr_mask & IB_QP_ACCESS_FLAGS) {
 965                 ctx_info->iwarp_info_valid = true;
 966                 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
 967                         iwarp_info->wr_rdresp_en = true;
 968                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
 969                         iwarp_info->wr_rdresp_en = true;
 970                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
 971                         iwarp_info->rd_enable = true;
 972                 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
 973                         iwarp_info->bind_en = true;
 974
 975                 if (iwqp->user_mode) {
 976                         iwarp_info->rd_enable = true;
 977                         iwarp_info->wr_rdresp_en = true;
 978                         iwarp_info->priv_mode_en = false;
 979                 }
 980         }
 981
 982         if (ctx_info->iwarp_info_valid) {
 983                 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 984                 int ret;
 985
 986                 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 987                 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 988                 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 989                                                      (u64 *)iwqp->host_ctx.va,
 990                                                      ctx_info);
 991                 if (ret) {
 992                         i40iw_pr_err("setting QP context\n");
 993                         err = -EINVAL;
 994                         goto exit;
 995                 }
 996         }
 997
 998         spin_unlock_irqrestore(&iwqp->lock, flags);
 999
1000         if (issue_modify_qp) {
1001                 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
1002
1003                 spin_lock_irqsave(&iwqp->lock, flags);
1004                 iwqp->iwarp_state = info.next_iwarp_state;
1005                 spin_unlock_irqrestore(&iwqp->lock, flags);
1006         }
1007
1008         if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
1009                 if (dont_wait) {
1010                         if (iwqp->cm_id && iwqp->hw_tcp_state) {
1011                                 spin_lock_irqsave(&iwqp->lock, flags);
1012                                 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
1013                                 iwqp->last_aeq = I40IW_AE_RESET_SENT;
1014                                 spin_unlock_irqrestore(&iwqp->lock, flags);
1015                                 i40iw_cm_disconn(iwqp);
1016                         }
1017                 } else {
1018                         spin_lock_irqsave(&iwqp->lock, flags);
1019                         if (iwqp->cm_id) {
1020                                 if (atomic_inc_return(&iwqp->close_timer_started) == 1) {
1021                                         iwqp->cm_id->add_ref(iwqp->cm_id);
1022                                         i40iw_schedule_cm_timer(iwqp->cm_node,
1023                                                                 (struct i40iw_puda_buf *)iwqp,
1024                                                                  I40IW_TIMER_TYPE_CLOSE, 1, 0);
1025                                 }
1026                         }
1027                         spin_unlock_irqrestore(&iwqp->lock, flags);
1028                 }
1029         }
1030         return 0;
1031 exit:
1032         spin_unlock_irqrestore(&iwqp->lock, flags);
1033         return err;
1034 }
1035
1036 /**
1037  * cq_free_resources - free up recources for cq
1038  * @iwdev: iwarp device
1039  * @iwcq: cq ptr
1040  */
1041 static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1042 {
1043         struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1044
1045         if (!iwcq->user_mode)
1046                 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1047         i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1048 }
1049
1050 /**
1051  * i40iw_cq_wq_destroy - send cq destroy cqp
1052  * @iwdev: iwarp device
1053  * @cq: hardware control cq
1054  */
1055 void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1056 {
1057         enum i40iw_status_code status;
1058         struct i40iw_cqp_request *cqp_request;
1059         struct cqp_commands_info *cqp_info;
1060
1061         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1062         if (!cqp_request)
1063                 return;
1064
1065         cqp_info = &cqp_request->info;
1066
1067         cqp_info->cqp_cmd = OP_CQ_DESTROY;
1068         cqp_info->post_sq = 1;
1069         cqp_info->in.u.cq_destroy.cq = cq;
1070         cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1071         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1072         if (status)
1073                 i40iw_pr_err("CQP-OP Destroy QP fail");
1074 }
1075
1076 /**
1077  * i40iw_destroy_cq - destroy cq
1078  * @ib_cq: cq pointer
1079  */
1080 static int i40iw_destroy_cq(struct ib_cq *ib_cq)
1081 {
1082         struct i40iw_cq *iwcq;
1083         struct i40iw_device *iwdev;
1084         struct i40iw_sc_cq *cq;
1085
1086         if (!ib_cq) {
1087                 i40iw_pr_err("ib_cq == NULL\n");
1088                 return 0;
1089         }
1090
1091         iwcq = to_iwcq(ib_cq);
1092         iwdev = to_iwdev(ib_cq->device);
1093         cq = &iwcq->sc_cq;
1094         i40iw_cq_wq_destroy(iwdev, cq);
1095         cq_free_resources(iwdev, iwcq);
1096         kfree(iwcq);
1097         i40iw_rem_devusecount(iwdev);
1098         return 0;
1099 }
1100
1101 /**
1102  * i40iw_create_cq - create cq
1103  * @ibdev: device pointer from stack
1104  * @attr: attributes for cq
1105  * @context: user context created during alloc
1106  * @udata: user data
1107  */
1108 static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev,
1109                                      const struct ib_cq_init_attr *attr,
1110                                      struct ib_ucontext *context,
1111                                      struct ib_udata *udata)
1112 {
1113         struct i40iw_device *iwdev = to_iwdev(ibdev);
1114         struct i40iw_cq *iwcq;
1115         struct i40iw_pbl *iwpbl;
1116         u32 cq_num = 0;
1117         struct i40iw_sc_cq *cq;
1118         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1119         struct i40iw_cq_init_info info;
1120         enum i40iw_status_code status;
1121         struct i40iw_cqp_request *cqp_request;
1122         struct cqp_commands_info *cqp_info;
1123         struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1124         unsigned long flags;
1125         int err_code;
1126         int entries = attr->cqe;
1127
1128         if (iwdev->closing)
1129                 return ERR_PTR(-ENODEV);
1130
1131         if (entries > iwdev->max_cqe)
1132                 return ERR_PTR(-EINVAL);
1133
1134         iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL);
1135         if (!iwcq)
1136                 return ERR_PTR(-ENOMEM);
1137
1138         memset(&info, 0, sizeof(info));
1139
1140         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1141                                         iwdev->max_cq, &cq_num,
1142                                         &iwdev->next_cq);
1143         if (err_code)
1144                 goto error;
1145
1146         cq = &iwcq->sc_cq;
1147         cq->back_cq = (void *)iwcq;
1148         spin_lock_init(&iwcq->lock);
1149
1150         info.dev = dev;
1151         ukinfo->cq_size = max(entries, 4);
1152         ukinfo->cq_id = cq_num;
1153         iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1154         info.ceqe_mask = 0;
1155         if (attr->comp_vector < iwdev->ceqs_count)
1156                 info.ceq_id = attr->comp_vector;
1157         info.ceq_id_valid = true;
1158         info.ceqe_mask = 1;
1159         info.type = I40IW_CQ_TYPE_IWARP;
1160         if (context) {
1161                 struct i40iw_ucontext *ucontext;
1162                 struct i40iw_create_cq_req req;
1163                 struct i40iw_cq_mr *cqmr;
1164
1165                 memset(&req, 0, sizeof(req));
1166                 iwcq->user_mode = true;
1167                 ucontext = to_ucontext(context);
1168                 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req))) {
1169                         err_code = -EFAULT;
1170                         goto cq_free_resources;
1171                 }
1172
1173                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1174                 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1175                                       &ucontext->cq_reg_mem_list);
1176                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1177                 if (!iwpbl) {
1178                         err_code = -EPROTO;
1179                         goto cq_free_resources;
1180                 }
1181
1182                 iwcq->iwpbl = iwpbl;
1183                 iwcq->cq_mem_size = 0;
1184                 cqmr = &iwpbl->cq_mr;
1185                 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1186                 if (iwpbl->pbl_allocated) {
1187                         info.virtual_map = true;
1188                         info.pbl_chunk_size = 1;
1189                         info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1190                 } else {
1191                         info.cq_base_pa = cqmr->cq_pbl.addr;
1192                 }
1193         } else {
1194                 /* Kmode allocations */
1195                 int rsize;
1196                 int shadow;
1197
1198                 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1199                 rsize = round_up(rsize, 256);
1200                 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1201                 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1202                                                 rsize + shadow, 256);
1203                 if (status) {
1204                         err_code = -ENOMEM;
1205                         goto cq_free_resources;
1206                 }
1207                 ukinfo->cq_base = iwcq->kmem.va;
1208                 info.cq_base_pa = iwcq->kmem.pa;
1209                 info.shadow_area_pa = info.cq_base_pa + rsize;
1210                 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1211         }
1212
1213         if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1214                 i40iw_pr_err("init cq fail\n");
1215                 err_code = -EPROTO;
1216                 goto cq_free_resources;
1217         }
1218
1219         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1220         if (!cqp_request) {
1221                 err_code = -ENOMEM;
1222                 goto cq_free_resources;
1223         }
1224
1225         cqp_info = &cqp_request->info;
1226         cqp_info->cqp_cmd = OP_CQ_CREATE;
1227         cqp_info->post_sq = 1;
1228         cqp_info->in.u.cq_create.cq = cq;
1229         cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1230         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1231         if (status) {
1232                 i40iw_pr_err("CQP-OP Create QP fail");
1233                 err_code = -EPROTO;
1234                 goto cq_free_resources;
1235         }
1236
1237         if (context) {
1238                 struct i40iw_create_cq_resp resp;
1239
1240                 memset(&resp, 0, sizeof(resp));
1241                 resp.cq_id = info.cq_uk_init_info.cq_id;
1242                 resp.cq_size = info.cq_uk_init_info.cq_size;
1243                 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1244                         i40iw_pr_err("copy to user data\n");
1245                         err_code = -EPROTO;
1246                         goto cq_destroy;
1247                 }
1248         }
1249
1250         i40iw_add_devusecount(iwdev);
1251         return (struct ib_cq *)iwcq;
1252
1253 cq_destroy:
1254         i40iw_cq_wq_destroy(iwdev, cq);
1255 cq_free_resources:
1256         cq_free_resources(iwdev, iwcq);
1257 error:
1258         kfree(iwcq);
1259         return ERR_PTR(err_code);
1260 }
1261
1262 /**
1263  * i40iw_get_user_access - get hw access from IB access
1264  * @acc: IB access to return hw access
1265  */
1266 static inline u16 i40iw_get_user_access(int acc)
1267 {
1268         u16 access = 0;
1269
1270         access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1271         access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1272         access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1273         access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1274         return access;
1275 }
1276
1277 /**
1278  * i40iw_free_stag - free stag resource
1279  * @iwdev: iwarp device
1280  * @stag: stag to free
1281  */
1282 static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1283 {
1284         u32 stag_idx;
1285
1286         stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1287         i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1288         i40iw_rem_devusecount(iwdev);
1289 }
1290
1291 /**
1292  * i40iw_create_stag - create random stag
1293  * @iwdev: iwarp device
1294  */
1295 static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1296 {
1297         u32 stag = 0;
1298         u32 stag_index = 0;
1299         u32 next_stag_index;
1300         u32 driver_key;
1301         u32 random;
1302         u8 consumer_key;
1303         int ret;
1304
1305         get_random_bytes(&random, sizeof(random));
1306         consumer_key = (u8)random;
1307
1308         driver_key = random & ~iwdev->mr_stagmask;
1309         next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1310         next_stag_index %= iwdev->max_mr;
1311
1312         ret = i40iw_alloc_resource(iwdev,
1313                                    iwdev->allocated_mrs, iwdev->max_mr,
1314                                    &stag_index, &next_stag_index);
1315         if (!ret) {
1316                 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1317                 stag |= driver_key;
1318                 stag += (u32)consumer_key;
1319                 i40iw_add_devusecount(iwdev);
1320         }
1321         return stag;
1322 }
1323
1324 /**
1325  * i40iw_next_pbl_addr - Get next pbl address
1326  * @pbl: pointer to a pble
1327  * @pinfo: info pointer
1328  * @idx: index
1329  */
1330 static inline u64 *i40iw_next_pbl_addr(u64 *pbl,
1331                                        struct i40iw_pble_info **pinfo,
1332                                        u32 *idx)
1333 {
1334         *idx += 1;
1335         if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1336                 return ++pbl;
1337         *idx = 0;
1338         (*pinfo)++;
1339         return (u64 *)(*pinfo)->addr;
1340 }
1341
1342 /**
1343  * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1344  * @iwmr: iwmr for IB's user page addresses
1345  * @pbl: ple pointer to save 1 level or 0 level pble
1346  * @level: indicated level 0, 1 or 2
1347  */
1348 static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1349                                     u64 *pbl,
1350                                     enum i40iw_pble_level level)
1351 {
1352         struct ib_umem *region = iwmr->region;
1353         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1354         int chunk_pages, entry, i;
1355         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1356         struct i40iw_pble_info *pinfo;
1357         struct scatterlist *sg;
1358         u64 pg_addr = 0;
1359         u32 idx = 0;
1360
1361         pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1362
1363         for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
1364                 chunk_pages = sg_dma_len(sg) >> region->page_shift;
1365                 if ((iwmr->type == IW_MEMREG_TYPE_QP) &&
1366                     !iwpbl->qp_mr.sq_page)
1367                         iwpbl->qp_mr.sq_page = sg_page(sg);
1368                 for (i = 0; i < chunk_pages; i++) {
1369                         pg_addr = sg_dma_address(sg) +
1370                                 (i << region->page_shift);
1371
1372                         if ((entry + i) == 0)
1373                                 *pbl = cpu_to_le64(pg_addr & iwmr->page_msk);
1374                         else if (!(pg_addr & ~iwmr->page_msk))
1375                                 *pbl = cpu_to_le64(pg_addr);
1376                         else
1377                                 continue;
1378                         pbl = i40iw_next_pbl_addr(pbl, &pinfo, &idx);
1379                 }
1380         }
1381 }
1382
1383 /**
1384  * i40iw_set_hugetlb_params - set MR pg size and mask to huge pg values.
1385  * @addr: virtual address
1386  * @iwmr: mr pointer for this memory registration
1387  */
1388 static void i40iw_set_hugetlb_values(u64 addr, struct i40iw_mr *iwmr)
1389 {
1390         struct vm_area_struct *vma;
1391         struct hstate *h;
1392
1393         down_read(&current->mm->mmap_sem);
1394         vma = find_vma(current->mm, addr);
1395         if (vma && is_vm_hugetlb_page(vma)) {
1396                 h = hstate_vma(vma);
1397                 if (huge_page_size(h) == 0x200000) {
1398                         iwmr->page_size = huge_page_size(h);
1399                         iwmr->page_msk = huge_page_mask(h);
1400                 }
1401         }
1402         up_read(&current->mm->mmap_sem);
1403 }
1404
1405 /**
1406  * i40iw_check_mem_contiguous - check if pbls stored in arr are contiguous
1407  * @arr: lvl1 pbl array
1408  * @npages: page count
1409  * pg_size: page size
1410  *
1411  */
1412 static bool i40iw_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
1413 {
1414         u32 pg_idx;
1415
1416         for (pg_idx = 0; pg_idx < npages; pg_idx++) {
1417                 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
1418                         return false;
1419         }
1420         return true;
1421 }
1422
1423 /**
1424  * i40iw_check_mr_contiguous - check if MR is physically contiguous
1425  * @palloc: pbl allocation struct
1426  * pg_size: page size
1427  */
1428 static bool i40iw_check_mr_contiguous(struct i40iw_pble_alloc *palloc, u32 pg_size)
1429 {
1430         struct i40iw_pble_level2 *lvl2 = &palloc->level2;
1431         struct i40iw_pble_info *leaf = lvl2->leaf;
1432         u64 *arr = NULL;
1433         u64 *start_addr = NULL;
1434         int i;
1435         bool ret;
1436
1437         if (palloc->level == I40IW_LEVEL_1) {
1438                 arr = (u64 *)palloc->level1.addr;
1439                 ret = i40iw_check_mem_contiguous(arr, palloc->total_cnt, pg_size);
1440                 return ret;
1441         }
1442
1443         start_addr = (u64 *)leaf->addr;
1444
1445         for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
1446                 arr = (u64 *)leaf->addr;
1447                 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
1448                         return false;
1449                 ret = i40iw_check_mem_contiguous(arr, leaf->cnt, pg_size);
1450                 if (!ret)
1451                         return false;
1452         }
1453
1454         return true;
1455 }
1456
1457 /**
1458  * i40iw_setup_pbles - copy user pg address to pble's
1459  * @iwdev: iwarp device
1460  * @iwmr: mr pointer for this memory registration
1461  * @use_pbles: flag if to use pble's
1462  */
1463 static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1464                              struct i40iw_mr *iwmr,
1465                              bool use_pbles)
1466 {
1467         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1468         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1469         struct i40iw_pble_info *pinfo;
1470         u64 *pbl;
1471         enum i40iw_status_code status;
1472         enum i40iw_pble_level level = I40IW_LEVEL_1;
1473
1474         if (use_pbles) {
1475                 mutex_lock(&iwdev->pbl_mutex);
1476                 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1477                 mutex_unlock(&iwdev->pbl_mutex);
1478                 if (status)
1479                         return -ENOMEM;
1480
1481                 iwpbl->pbl_allocated = true;
1482                 level = palloc->level;
1483                 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1484                 pbl = (u64 *)pinfo->addr;
1485         } else {
1486                 pbl = iwmr->pgaddrmem;
1487         }
1488
1489         i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1490
1491         if (use_pbles)
1492                 iwmr->pgaddrmem[0] = *pbl;
1493
1494         return 0;
1495 }
1496
1497 /**
1498  * i40iw_handle_q_mem - handle memory for qp and cq
1499  * @iwdev: iwarp device
1500  * @req: information for q memory management
1501  * @iwpbl: pble struct
1502  * @use_pbles: flag to use pble
1503  */
1504 static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1505                               struct i40iw_mem_reg_req *req,
1506                               struct i40iw_pbl *iwpbl,
1507                               bool use_pbles)
1508 {
1509         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1510         struct i40iw_mr *iwmr = iwpbl->iwmr;
1511         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1512         struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1513         struct i40iw_hmc_pble *hmc_p;
1514         u64 *arr = iwmr->pgaddrmem;
1515         u32 pg_size;
1516         int err;
1517         int total;
1518         bool ret = true;
1519
1520         total = req->sq_pages + req->rq_pages + req->cq_pages;
1521         pg_size = iwmr->page_size;
1522
1523         err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1524         if (err)
1525                 return err;
1526
1527         if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1528                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1529                 iwpbl->pbl_allocated = false;
1530                 return -ENOMEM;
1531         }
1532
1533         if (use_pbles)
1534                 arr = (u64 *)palloc->level1.addr;
1535
1536         if (iwmr->type == IW_MEMREG_TYPE_QP) {
1537                 hmc_p = &qpmr->sq_pbl;
1538                 qpmr->shadow = (dma_addr_t)arr[total];
1539
1540                 if (use_pbles) {
1541                         ret = i40iw_check_mem_contiguous(arr, req->sq_pages, pg_size);
1542                         if (ret)
1543                                 ret = i40iw_check_mem_contiguous(&arr[req->sq_pages], req->rq_pages, pg_size);
1544                 }
1545
1546                 if (!ret) {
1547                         hmc_p->idx = palloc->level1.idx;
1548                         hmc_p = &qpmr->rq_pbl;
1549                         hmc_p->idx = palloc->level1.idx + req->sq_pages;
1550                 } else {
1551                         hmc_p->addr = arr[0];
1552                         hmc_p = &qpmr->rq_pbl;
1553                         hmc_p->addr = arr[req->sq_pages];
1554                 }
1555         } else {                /* CQ */
1556                 hmc_p = &cqmr->cq_pbl;
1557                 cqmr->shadow = (dma_addr_t)arr[total];
1558
1559                 if (use_pbles)
1560                         ret = i40iw_check_mem_contiguous(arr, req->cq_pages, pg_size);
1561
1562                 if (!ret)
1563                         hmc_p->idx = palloc->level1.idx;
1564                 else
1565                         hmc_p->addr = arr[0];
1566         }
1567
1568         if (use_pbles && ret) {
1569                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1570                 iwpbl->pbl_allocated = false;
1571         }
1572
1573         return err;
1574 }
1575
1576 /**
1577  * i40iw_hw_alloc_stag - cqp command to allocate stag
1578  * @iwdev: iwarp device
1579  * @iwmr: iwarp mr pointer
1580  */
1581 static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1582 {
1583         struct i40iw_allocate_stag_info *info;
1584         struct ib_pd *pd = iwmr->ibmr.pd;
1585         struct i40iw_pd *iwpd = to_iwpd(pd);
1586         enum i40iw_status_code status;
1587         int err = 0;
1588         struct i40iw_cqp_request *cqp_request;
1589         struct cqp_commands_info *cqp_info;
1590
1591         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1592         if (!cqp_request)
1593                 return -ENOMEM;
1594
1595         cqp_info = &cqp_request->info;
1596         info = &cqp_info->in.u.alloc_stag.info;
1597         memset(info, 0, sizeof(*info));
1598         info->page_size = PAGE_SIZE;
1599         info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1600         info->pd_id = iwpd->sc_pd.pd_id;
1601         info->total_len = iwmr->length;
1602         info->all_memory = pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY;
1603         info->remote_access = true;
1604         cqp_info->cqp_cmd = OP_ALLOC_STAG;
1605         cqp_info->post_sq = 1;
1606         cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1607         cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1608
1609         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1610         if (status) {
1611                 err = -ENOMEM;
1612                 i40iw_pr_err("CQP-OP MR Reg fail");
1613         }
1614         return err;
1615 }
1616
1617 /**
1618  * i40iw_alloc_mr - register stag for fast memory registration
1619  * @pd: ibpd pointer
1620  * @mr_type: memory for stag registrion
1621  * @max_num_sg: man number of pages
1622  */
1623 static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd,
1624                                     enum ib_mr_type mr_type,
1625                                     u32 max_num_sg)
1626 {
1627         struct i40iw_pd *iwpd = to_iwpd(pd);
1628         struct i40iw_device *iwdev = to_iwdev(pd->device);
1629         struct i40iw_pble_alloc *palloc;
1630         struct i40iw_pbl *iwpbl;
1631         struct i40iw_mr *iwmr;
1632         enum i40iw_status_code status;
1633         u32 stag;
1634         int err_code = -ENOMEM;
1635
1636         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1637         if (!iwmr)
1638                 return ERR_PTR(-ENOMEM);
1639
1640         stag = i40iw_create_stag(iwdev);
1641         if (!stag) {
1642                 err_code = -EOVERFLOW;
1643                 goto err;
1644         }
1645         stag &= ~I40IW_CQPSQ_STAG_KEY_MASK;
1646         iwmr->stag = stag;
1647         iwmr->ibmr.rkey = stag;
1648         iwmr->ibmr.lkey = stag;
1649         iwmr->ibmr.pd = pd;
1650         iwmr->ibmr.device = pd->device;
1651         iwpbl = &iwmr->iwpbl;
1652         iwpbl->iwmr = iwmr;
1653         iwmr->type = IW_MEMREG_TYPE_MEM;
1654         palloc = &iwpbl->pble_alloc;
1655         iwmr->page_cnt = max_num_sg;
1656         /* Use system PAGE_SIZE as the sg page sizes are unknown at this point */
1657         iwmr->length = max_num_sg * PAGE_SIZE;
1658         mutex_lock(&iwdev->pbl_mutex);
1659         status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1660         mutex_unlock(&iwdev->pbl_mutex);
1661         if (status)
1662                 goto err1;
1663
1664         if (palloc->level != I40IW_LEVEL_1)
1665                 goto err2;
1666         err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1667         if (err_code)
1668                 goto err2;
1669         iwpbl->pbl_allocated = true;
1670         i40iw_add_pdusecount(iwpd);
1671         return &iwmr->ibmr;
1672 err2:
1673         i40iw_free_pble(iwdev->pble_rsrc, palloc);
1674 err1:
1675         i40iw_free_stag(iwdev, stag);
1676 err:
1677         kfree(iwmr);
1678         return ERR_PTR(err_code);
1679 }
1680
1681 /**
1682  * i40iw_set_page - populate pbl list for fmr
1683  * @ibmr: ib mem to access iwarp mr pointer
1684  * @addr: page dma address fro pbl list
1685  */
1686 static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1687 {
1688         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1689         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1690         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1691         u64 *pbl;
1692
1693         if (unlikely(iwmr->npages == iwmr->page_cnt))
1694                 return -ENOMEM;
1695
1696         pbl = (u64 *)palloc->level1.addr;
1697         pbl[iwmr->npages++] = cpu_to_le64(addr);
1698         return 0;
1699 }
1700
1701 /**
1702  * i40iw_map_mr_sg - map of sg list for fmr
1703  * @ibmr: ib mem to access iwarp mr pointer
1704  * @sg: scatter gather list for fmr
1705  * @sg_nents: number of sg pages
1706  */
1707 static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
1708                            int sg_nents, unsigned int *sg_offset)
1709 {
1710         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1711
1712         iwmr->npages = 0;
1713         return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
1714 }
1715
1716 /**
1717  * i40iw_drain_sq - drain the send queue
1718  * @ibqp: ib qp pointer
1719  */
1720 static void i40iw_drain_sq(struct ib_qp *ibqp)
1721 {
1722         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1723         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1724
1725         if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1726                 wait_for_completion(&iwqp->sq_drained);
1727 }
1728
1729 /**
1730  * i40iw_drain_rq - drain the receive queue
1731  * @ibqp: ib qp pointer
1732  */
1733 static void i40iw_drain_rq(struct ib_qp *ibqp)
1734 {
1735         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1736         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1737
1738         if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1739                 wait_for_completion(&iwqp->rq_drained);
1740 }
1741
1742 /**
1743  * i40iw_hwreg_mr - send cqp command for memory registration
1744  * @iwdev: iwarp device
1745  * @iwmr: iwarp mr pointer
1746  * @access: access for MR
1747  */
1748 static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1749                           struct i40iw_mr *iwmr,
1750                           u16 access)
1751 {
1752         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1753         struct i40iw_reg_ns_stag_info *stag_info;
1754         struct ib_pd *pd = iwmr->ibmr.pd;
1755         struct i40iw_pd *iwpd = to_iwpd(pd);
1756         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1757         enum i40iw_status_code status;
1758         int err = 0;
1759         struct i40iw_cqp_request *cqp_request;
1760         struct cqp_commands_info *cqp_info;
1761
1762         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1763         if (!cqp_request)
1764                 return -ENOMEM;
1765
1766         cqp_info = &cqp_request->info;
1767         stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1768         memset(stag_info, 0, sizeof(*stag_info));
1769         stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1770         stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1771         stag_info->stag_key = (u8)iwmr->stag;
1772         stag_info->total_len = iwmr->length;
1773         stag_info->access_rights = access;
1774         stag_info->pd_id = iwpd->sc_pd.pd_id;
1775         stag_info->all_memory = pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY;
1776         stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1777         stag_info->page_size = iwmr->page_size;
1778
1779         if (iwpbl->pbl_allocated) {
1780                 if (palloc->level == I40IW_LEVEL_1) {
1781                         stag_info->first_pm_pbl_index = palloc->level1.idx;
1782                         stag_info->chunk_size = 1;
1783                 } else {
1784                         stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1785                         stag_info->chunk_size = 3;
1786                 }
1787         } else {
1788                 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1789         }
1790
1791         cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1792         cqp_info->post_sq = 1;
1793         cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1794         cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1795
1796         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1797         if (status) {
1798                 err = -ENOMEM;
1799                 i40iw_pr_err("CQP-OP MR Reg fail");
1800         }
1801         return err;
1802 }
1803
1804 /**
1805  * i40iw_reg_user_mr - Register a user memory region
1806  * @pd: ptr of pd
1807  * @start: virtual start address
1808  * @length: length of mr
1809  * @virt: virtual address
1810  * @acc: access of mr
1811  * @udata: user data
1812  */
1813 static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1814                                        u64 start,
1815                                        u64 length,
1816                                        u64 virt,
1817                                        int acc,
1818                                        struct ib_udata *udata)
1819 {
1820         struct i40iw_pd *iwpd = to_iwpd(pd);
1821         struct i40iw_device *iwdev = to_iwdev(pd->device);
1822         struct i40iw_ucontext *ucontext;
1823         struct i40iw_pble_alloc *palloc;
1824         struct i40iw_pbl *iwpbl;
1825         struct i40iw_mr *iwmr;
1826         struct ib_umem *region;
1827         struct i40iw_mem_reg_req req;
1828         u64 pbl_depth = 0;
1829         u32 stag = 0;
1830         u16 access;
1831         u64 region_length;
1832         bool use_pbles = false;
1833         unsigned long flags;
1834         int err = -ENOSYS;
1835         int ret;
1836         int pg_shift;
1837
1838         if (iwdev->closing)
1839                 return ERR_PTR(-ENODEV);
1840
1841         if (length > I40IW_MAX_MR_SIZE)
1842                 return ERR_PTR(-EINVAL);
1843         region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
1844         if (IS_ERR(region))
1845                 return (struct ib_mr *)region;
1846
1847         if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1848                 ib_umem_release(region);
1849                 return ERR_PTR(-EFAULT);
1850         }
1851
1852         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1853         if (!iwmr) {
1854                 ib_umem_release(region);
1855                 return ERR_PTR(-ENOMEM);
1856         }
1857
1858         iwpbl = &iwmr->iwpbl;
1859         iwpbl->iwmr = iwmr;
1860         iwmr->region = region;
1861         iwmr->ibmr.pd = pd;
1862         iwmr->ibmr.device = pd->device;
1863         ucontext = to_ucontext(pd->uobject->context);
1864
1865         iwmr->page_size = PAGE_SIZE;
1866         iwmr->page_msk = PAGE_MASK;
1867
1868         if (region->hugetlb && (req.reg_type == IW_MEMREG_TYPE_MEM))
1869                 i40iw_set_hugetlb_values(start, iwmr);
1870
1871         region_length = region->length + (start & (iwmr->page_size - 1));
1872         pg_shift = ffs(iwmr->page_size) - 1;
1873         pbl_depth = region_length >> pg_shift;
1874         pbl_depth += (region_length & (iwmr->page_size - 1)) ? 1 : 0;
1875         iwmr->length = region->length;
1876
1877         iwpbl->user_base = virt;
1878         palloc = &iwpbl->pble_alloc;
1879
1880         iwmr->type = req.reg_type;
1881         iwmr->page_cnt = (u32)pbl_depth;
1882
1883         switch (req.reg_type) {
1884         case IW_MEMREG_TYPE_QP:
1885                 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1886                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1887                 if (err)
1888                         goto error;
1889                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1890                 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1891                 iwpbl->on_list = true;
1892                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1893                 break;
1894         case IW_MEMREG_TYPE_CQ:
1895                 use_pbles = (req.cq_pages > 1);
1896                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1897                 if (err)
1898                         goto error;
1899
1900                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1901                 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1902                 iwpbl->on_list = true;
1903                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1904                 break;
1905         case IW_MEMREG_TYPE_MEM:
1906                 use_pbles = (iwmr->page_cnt != 1);
1907                 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1908
1909                 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1910                 if (err)
1911                         goto error;
1912
1913                 if (use_pbles) {
1914                         ret = i40iw_check_mr_contiguous(palloc, iwmr->page_size);
1915                         if (ret) {
1916                                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1917                                 iwpbl->pbl_allocated = false;
1918                         }
1919                 }
1920
1921                 access |= i40iw_get_user_access(acc);
1922                 stag = i40iw_create_stag(iwdev);
1923                 if (!stag) {
1924                         err = -ENOMEM;
1925                         goto error;
1926                 }
1927
1928                 iwmr->stag = stag;
1929                 iwmr->ibmr.rkey = stag;
1930                 iwmr->ibmr.lkey = stag;
1931
1932                 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1933                 if (err) {
1934                         i40iw_free_stag(iwdev, stag);
1935                         goto error;
1936                 }
1937
1938                 break;
1939         default:
1940                 goto error;
1941         }
1942
1943         iwmr->type = req.reg_type;
1944         if (req.reg_type == IW_MEMREG_TYPE_MEM)
1945                 i40iw_add_pdusecount(iwpd);
1946         return &iwmr->ibmr;
1947
1948 error:
1949         if (palloc->level != I40IW_LEVEL_0 && iwpbl->pbl_allocated)
1950                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1951         ib_umem_release(region);
1952         kfree(iwmr);
1953         return ERR_PTR(err);
1954 }
1955
1956 /**
1957  * i40iw_reg_phys_mr - register kernel physical memory
1958  * @pd: ibpd pointer
1959  * @addr: physical address of memory to register
1960  * @size: size of memory to register
1961  * @acc: Access rights
1962  * @iova_start: start of virtual address for physical buffers
1963  */
1964 struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1965                                 u64 addr,
1966                                 u64 size,
1967                                 int acc,
1968                                 u64 *iova_start)
1969 {
1970         struct i40iw_pd *iwpd = to_iwpd(pd);
1971         struct i40iw_device *iwdev = to_iwdev(pd->device);
1972         struct i40iw_pbl *iwpbl;
1973         struct i40iw_mr *iwmr;
1974         enum i40iw_status_code status;
1975         u32 stag;
1976         u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1977         int ret;
1978
1979         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1980         if (!iwmr)
1981                 return ERR_PTR(-ENOMEM);
1982         iwmr->ibmr.pd = pd;
1983         iwmr->ibmr.device = pd->device;
1984         iwpbl = &iwmr->iwpbl;
1985         iwpbl->iwmr = iwmr;
1986         iwmr->type = IW_MEMREG_TYPE_MEM;
1987         iwpbl->user_base = *iova_start;
1988         stag = i40iw_create_stag(iwdev);
1989         if (!stag) {
1990                 ret = -EOVERFLOW;
1991                 goto err;
1992         }
1993         access |= i40iw_get_user_access(acc);
1994         iwmr->stag = stag;
1995         iwmr->ibmr.rkey = stag;
1996         iwmr->ibmr.lkey = stag;
1997         iwmr->page_cnt = 1;
1998         iwmr->pgaddrmem[0]  = addr;
1999         iwmr->length = size;
2000         status = i40iw_hwreg_mr(iwdev, iwmr, access);
2001         if (status) {
2002                 i40iw_free_stag(iwdev, stag);
2003                 ret = -ENOMEM;
2004                 goto err;
2005         }
2006
2007         i40iw_add_pdusecount(iwpd);
2008         return &iwmr->ibmr;
2009  err:
2010         kfree(iwmr);
2011         return ERR_PTR(ret);
2012 }
2013
2014 /**
2015  * i40iw_get_dma_mr - register physical mem
2016  * @pd: ptr of pd
2017  * @acc: access for memory
2018  */
2019 static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
2020 {
2021         u64 kva = 0;
2022
2023         return i40iw_reg_phys_mr(pd, 0, 0, acc, &kva);
2024 }
2025
2026 /**
2027  * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
2028  * @iwmr: iwmr for IB's user page addresses
2029  * @ucontext: ptr to user context
2030  */
2031 static void i40iw_del_memlist(struct i40iw_mr *iwmr,
2032                               struct i40iw_ucontext *ucontext)
2033 {
2034         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2035         unsigned long flags;
2036
2037         switch (iwmr->type) {
2038         case IW_MEMREG_TYPE_CQ:
2039                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2040                 if (iwpbl->on_list) {
2041                         iwpbl->on_list = false;
2042                         list_del(&iwpbl->list);
2043                 }
2044                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2045                 break;
2046         case IW_MEMREG_TYPE_QP:
2047                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2048                 if (iwpbl->on_list) {
2049                         iwpbl->on_list = false;
2050                         list_del(&iwpbl->list);
2051                 }
2052                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2053                 break;
2054         default:
2055                 break;
2056         }
2057 }
2058
2059 /**
2060  * i40iw_dereg_mr - deregister mr
2061  * @ib_mr: mr ptr for dereg
2062  */
2063 static int i40iw_dereg_mr(struct ib_mr *ib_mr)
2064 {
2065         struct ib_pd *ibpd = ib_mr->pd;
2066         struct i40iw_pd *iwpd = to_iwpd(ibpd);
2067         struct i40iw_mr *iwmr = to_iwmr(ib_mr);
2068         struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
2069         enum i40iw_status_code status;
2070         struct i40iw_dealloc_stag_info *info;
2071         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2072         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
2073         struct i40iw_cqp_request *cqp_request;
2074         struct cqp_commands_info *cqp_info;
2075         u32 stag_idx;
2076
2077         if (iwmr->region)
2078                 ib_umem_release(iwmr->region);
2079
2080         if (iwmr->type != IW_MEMREG_TYPE_MEM) {
2081                 if (ibpd->uobject) {
2082                         struct i40iw_ucontext *ucontext;
2083
2084                         ucontext = to_ucontext(ibpd->uobject->context);
2085                         i40iw_del_memlist(iwmr, ucontext);
2086                 }
2087                 if (iwpbl->pbl_allocated && iwmr->type != IW_MEMREG_TYPE_QP)
2088                         i40iw_free_pble(iwdev->pble_rsrc, palloc);
2089                 kfree(iwmr);
2090                 return 0;
2091         }
2092
2093         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
2094         if (!cqp_request)
2095                 return -ENOMEM;
2096
2097         cqp_info = &cqp_request->info;
2098         info = &cqp_info->in.u.dealloc_stag.info;
2099         memset(info, 0, sizeof(*info));
2100
2101         info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
2102         info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
2103         stag_idx = info->stag_idx;
2104         info->mr = true;
2105         if (iwpbl->pbl_allocated)
2106                 info->dealloc_pbl = true;
2107
2108         cqp_info->cqp_cmd = OP_DEALLOC_STAG;
2109         cqp_info->post_sq = 1;
2110         cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
2111         cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2112         status = i40iw_handle_cqp_op(iwdev, cqp_request);
2113         if (status)
2114                 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
2115         i40iw_rem_pdusecount(iwpd, iwdev);
2116         i40iw_free_stag(iwdev, iwmr->stag);
2117         if (iwpbl->pbl_allocated)
2118                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
2119         kfree(iwmr);
2120         return 0;
2121 }
2122
2123 /**
2124  * i40iw_show_rev
2125  */
2126 static ssize_t i40iw_show_rev(struct device *dev,
2127                               struct device_attribute *attr, char *buf)
2128 {
2129         struct i40iw_ib_device *iwibdev = container_of(dev,
2130                                                        struct i40iw_ib_device,
2131                                                        ibdev.dev);
2132         u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
2133
2134         return sprintf(buf, "%x\n", hw_rev);
2135 }
2136
2137 /**
2138  * i40iw_show_hca
2139  */
2140 static ssize_t i40iw_show_hca(struct device *dev,
2141                               struct device_attribute *attr, char *buf)
2142 {
2143         return sprintf(buf, "I40IW\n");
2144 }
2145
2146 /**
2147  * i40iw_show_board
2148  */
2149 static ssize_t i40iw_show_board(struct device *dev,
2150                                 struct device_attribute *attr,
2151                                 char *buf)
2152 {
2153         return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
2154 }
2155
2156 static DEVICE_ATTR(hw_rev, S_IRUGO, i40iw_show_rev, NULL);
2157 static DEVICE_ATTR(hca_type, S_IRUGO, i40iw_show_hca, NULL);
2158 static DEVICE_ATTR(board_id, S_IRUGO, i40iw_show_board, NULL);
2159
2160 static struct device_attribute *i40iw_dev_attributes[] = {
2161         &dev_attr_hw_rev,
2162         &dev_attr_hca_type,
2163         &dev_attr_board_id
2164 };
2165
2166 /**
2167  * i40iw_copy_sg_list - copy sg list for qp
2168  * @sg_list: copied into sg_list
2169  * @sgl: copy from sgl
2170  * @num_sges: count of sg entries
2171  */
2172 static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2173 {
2174         unsigned int i;
2175
2176         for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2177                 sg_list[i].tag_off = sgl[i].addr;
2178                 sg_list[i].len = sgl[i].length;
2179                 sg_list[i].stag = sgl[i].lkey;
2180         }
2181 }
2182
2183 /**
2184  * i40iw_post_send -  kernel application wr
2185  * @ibqp: qp ptr for wr
2186  * @ib_wr: work request ptr
2187  * @bad_wr: return of bad wr if err
2188  */
2189 static int i40iw_post_send(struct ib_qp *ibqp,
2190                            const struct ib_send_wr *ib_wr,
2191                            const struct ib_send_wr **bad_wr)
2192 {
2193         struct i40iw_qp *iwqp;
2194         struct i40iw_qp_uk *ukqp;
2195         struct i40iw_post_sq_info info;
2196         enum i40iw_status_code ret;
2197         int err = 0;
2198         unsigned long flags;
2199         bool inv_stag;
2200
2201         iwqp = (struct i40iw_qp *)ibqp;
2202         ukqp = &iwqp->sc_qp.qp_uk;
2203
2204         spin_lock_irqsave(&iwqp->lock, flags);
2205
2206         if (iwqp->flush_issued) {
2207                 err = -EINVAL;
2208                 goto out;
2209         }
2210
2211         while (ib_wr) {
2212                 inv_stag = false;
2213                 memset(&info, 0, sizeof(info));
2214                 info.wr_id = (u64)(ib_wr->wr_id);
2215                 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2216                         info.signaled = true;
2217                 if (ib_wr->send_flags & IB_SEND_FENCE)
2218                         info.read_fence = true;
2219
2220                 switch (ib_wr->opcode) {
2221                 case IB_WR_SEND:
2222                         /* fall-through */
2223                 case IB_WR_SEND_WITH_INV:
2224                         if (ib_wr->opcode == IB_WR_SEND) {
2225                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2226                                         info.op_type = I40IW_OP_TYPE_SEND_SOL;
2227                                 else
2228                                         info.op_type = I40IW_OP_TYPE_SEND;
2229                         } else {
2230                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2231                                         info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2232                                 else
2233                                         info.op_type = I40IW_OP_TYPE_SEND_INV;
2234                         }
2235
2236                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2237                                 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2238                                 info.op.inline_send.len = ib_wr->sg_list[0].length;
2239                                 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2240                         } else {
2241                                 info.op.send.num_sges = ib_wr->num_sge;
2242                                 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2243                                 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2244                         }
2245
2246                         if (ret) {
2247                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2248                                         err = -ENOMEM;
2249                                 else
2250                                         err = -EINVAL;
2251                         }
2252                         break;
2253                 case IB_WR_RDMA_WRITE:
2254                         info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2255
2256                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2257                                 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2258                                 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2259                                 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2260                                 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2261                                 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2262                         } else {
2263                                 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2264                                 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2265                                 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2266                                 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2267                                 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2268                         }
2269
2270                         if (ret) {
2271                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2272                                         err = -ENOMEM;
2273                                 else
2274                                         err = -EINVAL;
2275                         }
2276                         break;
2277                 case IB_WR_RDMA_READ_WITH_INV:
2278                         inv_stag = true;
2279                         /* fall-through*/
2280                 case IB_WR_RDMA_READ:
2281                         if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2282                                 err = -EINVAL;
2283                                 break;
2284                         }
2285                         info.op_type = I40IW_OP_TYPE_RDMA_READ;
2286                         info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2287                         info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2288                         info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2289                         info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2290                         info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2291                         ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2292                         if (ret) {
2293                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2294                                         err = -ENOMEM;
2295                                 else
2296                                         err = -EINVAL;
2297                         }
2298                         break;
2299                 case IB_WR_LOCAL_INV:
2300                         info.op_type = I40IW_OP_TYPE_INV_STAG;
2301                         info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2302                         ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2303                         if (ret)
2304                                 err = -ENOMEM;
2305                         break;
2306                 case IB_WR_REG_MR:
2307                 {
2308                         struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2309                         int flags = reg_wr(ib_wr)->access;
2310                         struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2311                         struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2312                         struct i40iw_fast_reg_stag_info info;
2313
2314                         memset(&info, 0, sizeof(info));
2315                         info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2316                         info.access_rights |= i40iw_get_user_access(flags);
2317                         info.stag_key = reg_wr(ib_wr)->key & 0xff;
2318                         info.stag_idx = reg_wr(ib_wr)->key >> 8;
2319                         info.page_size = reg_wr(ib_wr)->mr->page_size;
2320                         info.wr_id = ib_wr->wr_id;
2321
2322                         info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2323                         info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2324                         info.total_len = iwmr->ibmr.length;
2325                         info.reg_addr_pa = *(u64 *)palloc->level1.addr;
2326                         info.first_pm_pbl_index = palloc->level1.idx;
2327                         info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2328                         info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2329
2330                         if (iwmr->npages > I40IW_MIN_PAGES_PER_FMR)
2331                                 info.chunk_size = 1;
2332
2333                         ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2334                         if (ret)
2335                                 err = -ENOMEM;
2336                         break;
2337                 }
2338                 default:
2339                         err = -EINVAL;
2340                         i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2341                                      ib_wr->opcode);
2342                         break;
2343                 }
2344
2345                 if (err)
2346                         break;
2347                 ib_wr = ib_wr->next;
2348         }
2349
2350 out:
2351         if (err)
2352                 *bad_wr = ib_wr;
2353         else
2354                 ukqp->ops.iw_qp_post_wr(ukqp);
2355         spin_unlock_irqrestore(&iwqp->lock, flags);
2356
2357         return err;
2358 }
2359
2360 /**
2361  * i40iw_post_recv - post receive wr for kernel application
2362  * @ibqp: ib qp pointer
2363  * @ib_wr: work request for receive
2364  * @bad_wr: bad wr caused an error
2365  */
2366 static int i40iw_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *ib_wr,
2367                            const struct ib_recv_wr **bad_wr)
2368 {
2369         struct i40iw_qp *iwqp;
2370         struct i40iw_qp_uk *ukqp;
2371         struct i40iw_post_rq_info post_recv;
2372         struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2373         enum i40iw_status_code ret = 0;
2374         unsigned long flags;
2375         int err = 0;
2376
2377         iwqp = (struct i40iw_qp *)ibqp;
2378         ukqp = &iwqp->sc_qp.qp_uk;
2379
2380         memset(&post_recv, 0, sizeof(post_recv));
2381         spin_lock_irqsave(&iwqp->lock, flags);
2382
2383         if (iwqp->flush_issued) {
2384                 err = -EINVAL;
2385                 goto out;
2386         }
2387
2388         while (ib_wr) {
2389                 post_recv.num_sges = ib_wr->num_sge;
2390                 post_recv.wr_id = ib_wr->wr_id;
2391                 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2392                 post_recv.sg_list = sg_list;
2393                 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2394                 if (ret) {
2395                         i40iw_pr_err(" post_recv err %d\n", ret);
2396                         if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2397                                 err = -ENOMEM;
2398                         else
2399                                 err = -EINVAL;
2400                         *bad_wr = ib_wr;
2401                         goto out;
2402                 }
2403                 ib_wr = ib_wr->next;
2404         }
2405  out:
2406         spin_unlock_irqrestore(&iwqp->lock, flags);
2407         return err;
2408 }
2409
2410 /**
2411  * i40iw_poll_cq - poll cq for completion (kernel apps)
2412  * @ibcq: cq to poll
2413  * @num_entries: number of entries to poll
2414  * @entry: wr of entry completed
2415  */
2416 static int i40iw_poll_cq(struct ib_cq *ibcq,
2417                          int num_entries,
2418                          struct ib_wc *entry)
2419 {
2420         struct i40iw_cq *iwcq;
2421         int cqe_count = 0;
2422         struct i40iw_cq_poll_info cq_poll_info;
2423         enum i40iw_status_code ret;
2424         struct i40iw_cq_uk *ukcq;
2425         struct i40iw_sc_qp *qp;
2426         struct i40iw_qp *iwqp;
2427         unsigned long flags;
2428
2429         iwcq = (struct i40iw_cq *)ibcq;
2430         ukcq = &iwcq->sc_cq.cq_uk;
2431
2432         spin_lock_irqsave(&iwcq->lock, flags);
2433         while (cqe_count < num_entries) {
2434                 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info);
2435                 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2436                         break;
2437                 } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2438                         continue;
2439                 } else if (ret) {
2440                         if (!cqe_count)
2441                                 cqe_count = -1;
2442                         break;
2443                 }
2444                 entry->wc_flags = 0;
2445                 entry->wr_id = cq_poll_info.wr_id;
2446                 if (cq_poll_info.error) {
2447                         entry->status = IB_WC_WR_FLUSH_ERR;
2448                         entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2449                 } else {
2450                         entry->status = IB_WC_SUCCESS;
2451                 }
2452
2453                 switch (cq_poll_info.op_type) {
2454                 case I40IW_OP_TYPE_RDMA_WRITE:
2455                         entry->opcode = IB_WC_RDMA_WRITE;
2456                         break;
2457                 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2458                 case I40IW_OP_TYPE_RDMA_READ:
2459                         entry->opcode = IB_WC_RDMA_READ;
2460                         break;
2461                 case I40IW_OP_TYPE_SEND_SOL:
2462                 case I40IW_OP_TYPE_SEND_SOL_INV:
2463                 case I40IW_OP_TYPE_SEND_INV:
2464                 case I40IW_OP_TYPE_SEND:
2465                         entry->opcode = IB_WC_SEND;
2466                         break;
2467                 case I40IW_OP_TYPE_REC:
2468                         entry->opcode = IB_WC_RECV;
2469                         break;
2470                 default:
2471                         entry->opcode = IB_WC_RECV;
2472                         break;
2473                 }
2474
2475                 entry->ex.imm_data = 0;
2476                 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2477                 entry->qp = (struct ib_qp *)qp->back_qp;
2478                 entry->src_qp = cq_poll_info.qp_id;
2479                 iwqp = (struct i40iw_qp *)qp->back_qp;
2480                 if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2481                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2482                                 complete(&iwqp->sq_drained);
2483                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2484                                 complete(&iwqp->rq_drained);
2485                 }
2486                 entry->byte_len = cq_poll_info.bytes_xfered;
2487                 entry++;
2488                 cqe_count++;
2489         }
2490         spin_unlock_irqrestore(&iwcq->lock, flags);
2491         return cqe_count;
2492 }
2493
2494 /**
2495  * i40iw_req_notify_cq - arm cq kernel application
2496  * @ibcq: cq to arm
2497  * @notify_flags: notofication flags
2498  */
2499 static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2500                                enum ib_cq_notify_flags notify_flags)
2501 {
2502         struct i40iw_cq *iwcq;
2503         struct i40iw_cq_uk *ukcq;
2504         unsigned long flags;
2505         enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_EVENT;
2506
2507         iwcq = (struct i40iw_cq *)ibcq;
2508         ukcq = &iwcq->sc_cq.cq_uk;
2509         if (notify_flags == IB_CQ_SOLICITED)
2510                 cq_notify = IW_CQ_COMPL_SOLICITED;
2511         spin_lock_irqsave(&iwcq->lock, flags);
2512         ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2513         spin_unlock_irqrestore(&iwcq->lock, flags);
2514         return 0;
2515 }
2516
2517 /**
2518  * i40iw_port_immutable - return port's immutable data
2519  * @ibdev: ib dev struct
2520  * @port_num: port number
2521  * @immutable: immutable data for the port return
2522  */
2523 static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2524                                 struct ib_port_immutable *immutable)
2525 {
2526         struct ib_port_attr attr;
2527         int err;
2528
2529         immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2530
2531         err = ib_query_port(ibdev, port_num, &attr);
2532
2533         if (err)
2534                 return err;
2535
2536         immutable->pkey_tbl_len = attr.pkey_tbl_len;
2537         immutable->gid_tbl_len = attr.gid_tbl_len;
2538
2539         return 0;
2540 }
2541
2542 static const char * const i40iw_hw_stat_names[] = {
2543         // 32bit names
2544         [I40IW_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
2545         [I40IW_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
2546         [I40IW_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
2547         [I40IW_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
2548         [I40IW_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
2549         [I40IW_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
2550         [I40IW_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
2551         [I40IW_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
2552         [I40IW_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
2553         // 64bit names
2554         [I40IW_HW_STAT_INDEX_IP4RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2555                 "ip4InOctets",
2556         [I40IW_HW_STAT_INDEX_IP4RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2557                 "ip4InPkts",
2558         [I40IW_HW_STAT_INDEX_IP4RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2559                 "ip4InReasmRqd",
2560         [I40IW_HW_STAT_INDEX_IP4RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2561                 "ip4InMcastPkts",
2562         [I40IW_HW_STAT_INDEX_IP4TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2563                 "ip4OutOctets",
2564         [I40IW_HW_STAT_INDEX_IP4TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2565                 "ip4OutPkts",
2566         [I40IW_HW_STAT_INDEX_IP4TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2567                 "ip4OutSegRqd",
2568         [I40IW_HW_STAT_INDEX_IP4TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2569                 "ip4OutMcastPkts",
2570         [I40IW_HW_STAT_INDEX_IP6RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2571                 "ip6InOctets",
2572         [I40IW_HW_STAT_INDEX_IP6RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2573                 "ip6InPkts",
2574         [I40IW_HW_STAT_INDEX_IP6RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2575                 "ip6InReasmRqd",
2576         [I40IW_HW_STAT_INDEX_IP6RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2577                 "ip6InMcastPkts",
2578         [I40IW_HW_STAT_INDEX_IP6TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2579                 "ip6OutOctets",
2580         [I40IW_HW_STAT_INDEX_IP6TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2581                 "ip6OutPkts",
2582         [I40IW_HW_STAT_INDEX_IP6TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2583                 "ip6OutSegRqd",
2584         [I40IW_HW_STAT_INDEX_IP6TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2585                 "ip6OutMcastPkts",
2586         [I40IW_HW_STAT_INDEX_TCPRXSEGS + I40IW_HW_STAT_INDEX_MAX_32] =
2587                 "tcpInSegs",
2588         [I40IW_HW_STAT_INDEX_TCPTXSEG + I40IW_HW_STAT_INDEX_MAX_32] =
2589                 "tcpOutSegs",
2590         [I40IW_HW_STAT_INDEX_RDMARXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2591                 "iwInRdmaReads",
2592         [I40IW_HW_STAT_INDEX_RDMARXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2593                 "iwInRdmaSends",
2594         [I40IW_HW_STAT_INDEX_RDMARXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2595                 "iwInRdmaWrites",
2596         [I40IW_HW_STAT_INDEX_RDMATXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2597                 "iwOutRdmaReads",
2598         [I40IW_HW_STAT_INDEX_RDMATXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2599                 "iwOutRdmaSends",
2600         [I40IW_HW_STAT_INDEX_RDMATXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2601                 "iwOutRdmaWrites",
2602         [I40IW_HW_STAT_INDEX_RDMAVBND + I40IW_HW_STAT_INDEX_MAX_32] =
2603                 "iwRdmaBnd",
2604         [I40IW_HW_STAT_INDEX_RDMAVINV + I40IW_HW_STAT_INDEX_MAX_32] =
2605                 "iwRdmaInv"
2606 };
2607
2608 static void i40iw_get_dev_fw_str(struct ib_device *dev, char *str)
2609 {
2610         u32 firmware_version = I40IW_FW_VERSION;
2611
2612         snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u", firmware_version,
2613                  (firmware_version & 0x000000ff));
2614 }
2615
2616 /**
2617  * i40iw_alloc_hw_stats - Allocate a hw stats structure
2618  * @ibdev: device pointer from stack
2619  * @port_num: port number
2620  */
2621 static struct rdma_hw_stats *i40iw_alloc_hw_stats(struct ib_device *ibdev,
2622                                                   u8 port_num)
2623 {
2624         struct i40iw_device *iwdev = to_iwdev(ibdev);
2625         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2626         int num_counters = I40IW_HW_STAT_INDEX_MAX_32 +
2627                 I40IW_HW_STAT_INDEX_MAX_64;
2628         unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
2629
2630         BUILD_BUG_ON(ARRAY_SIZE(i40iw_hw_stat_names) !=
2631                      (I40IW_HW_STAT_INDEX_MAX_32 +
2632                       I40IW_HW_STAT_INDEX_MAX_64));
2633
2634         /*
2635          * PFs get the default update lifespan, but VFs only update once
2636          * per second
2637          */
2638         if (!dev->is_pf)
2639                 lifespan = 1000;
2640         return rdma_alloc_hw_stats_struct(i40iw_hw_stat_names, num_counters,
2641                                           lifespan);
2642 }
2643
2644 /**
2645  * i40iw_get_hw_stats - Populates the rdma_hw_stats structure
2646  * @ibdev: device pointer from stack
2647  * @stats: stats pointer from stack
2648  * @port_num: port number
2649  * @index: which hw counter the stack is requesting we update
2650  */
2651 static int i40iw_get_hw_stats(struct ib_device *ibdev,
2652                               struct rdma_hw_stats *stats,
2653                               u8 port_num, int index)
2654 {
2655         struct i40iw_device *iwdev = to_iwdev(ibdev);
2656         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2657         struct i40iw_vsi_pestat *devstat = iwdev->vsi.pestat;
2658         struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2659
2660         if (dev->is_pf) {
2661                 i40iw_hw_stats_read_all(devstat, &devstat->hw_stats);
2662         } else {
2663                 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2664                         return -ENOSYS;
2665         }
2666
2667         memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
2668
2669         return stats->num_counters;
2670 }
2671
2672 /**
2673  * i40iw_query_gid - Query port GID
2674  * @ibdev: device pointer from stack
2675  * @port: port number
2676  * @index: Entry index
2677  * @gid: Global ID
2678  */
2679 static int i40iw_query_gid(struct ib_device *ibdev,
2680                            u8 port,
2681                            int index,
2682                            union ib_gid *gid)
2683 {
2684         struct i40iw_device *iwdev = to_iwdev(ibdev);
2685
2686         memset(gid->raw, 0, sizeof(gid->raw));
2687         ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2688         return 0;
2689 }
2690
2691 /**
2692  * i40iw_query_pkey - Query partition key
2693  * @ibdev: device pointer from stack
2694  * @port: port number
2695  * @index: index of pkey
2696  * @pkey: pointer to store the pkey
2697  */
2698 static int i40iw_query_pkey(struct ib_device *ibdev,
2699                             u8 port,
2700                             u16 index,
2701                             u16 *pkey)
2702 {
2703         *pkey = 0;
2704         return 0;
2705 }
2706
2707 /**
2708  * i40iw_get_vector_affinity - report IRQ affinity mask
2709  * @ibdev: IB device
2710  * @comp_vector: completion vector index
2711  */
2712 static const struct cpumask *i40iw_get_vector_affinity(struct ib_device *ibdev,
2713                                                        int comp_vector)
2714 {
2715         struct i40iw_device *iwdev = to_iwdev(ibdev);
2716         struct i40iw_msix_vector *msix_vec;
2717
2718         if (iwdev->msix_shared)
2719                 msix_vec = &iwdev->iw_msixtbl[comp_vector];
2720         else
2721                 msix_vec = &iwdev->iw_msixtbl[comp_vector + 1];
2722
2723         return irq_get_affinity_mask(msix_vec->irq);
2724 }
2725
2726 /**
2727  * i40iw_init_rdma_device - initialization of iwarp device
2728  * @iwdev: iwarp device
2729  */
2730 static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2731 {
2732         struct i40iw_ib_device *iwibdev;
2733         struct net_device *netdev = iwdev->netdev;
2734         struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2735
2736         iwibdev = (struct i40iw_ib_device *)ib_alloc_device(sizeof(*iwibdev));
2737         if (!iwibdev) {
2738                 i40iw_pr_err("iwdev == NULL\n");
2739                 return NULL;
2740         }
2741         strlcpy(iwibdev->ibdev.name, "i40iw%d", IB_DEVICE_NAME_MAX);
2742         iwibdev->ibdev.owner = THIS_MODULE;
2743         iwdev->iwibdev = iwibdev;
2744         iwibdev->iwdev = iwdev;
2745
2746         iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2747         ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2748
2749         iwibdev->ibdev.uverbs_cmd_mask =
2750             (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2751             (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2752             (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2753             (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2754             (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2755             (1ull << IB_USER_VERBS_CMD_REG_MR) |
2756             (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2757             (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2758             (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2759             (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2760             (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2761             (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2762             (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2763             (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2764             (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2765             (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2766             (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2767             (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2768             (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2769             (1ull << IB_USER_VERBS_CMD_POST_SEND);
2770         iwibdev->ibdev.phys_port_cnt = 1;
2771         iwibdev->ibdev.num_comp_vectors = iwdev->ceqs_count;
2772         iwibdev->ibdev.dev.parent = &pcidev->dev;
2773         iwibdev->ibdev.query_port = i40iw_query_port;
2774         iwibdev->ibdev.query_pkey = i40iw_query_pkey;
2775         iwibdev->ibdev.query_gid = i40iw_query_gid;
2776         iwibdev->ibdev.alloc_ucontext = i40iw_alloc_ucontext;
2777         iwibdev->ibdev.dealloc_ucontext = i40iw_dealloc_ucontext;
2778         iwibdev->ibdev.mmap = i40iw_mmap;
2779         iwibdev->ibdev.alloc_pd = i40iw_alloc_pd;
2780         iwibdev->ibdev.dealloc_pd = i40iw_dealloc_pd;
2781         iwibdev->ibdev.create_qp = i40iw_create_qp;
2782         iwibdev->ibdev.modify_qp = i40iw_modify_qp;
2783         iwibdev->ibdev.query_qp = i40iw_query_qp;
2784         iwibdev->ibdev.destroy_qp = i40iw_destroy_qp;
2785         iwibdev->ibdev.create_cq = i40iw_create_cq;
2786         iwibdev->ibdev.destroy_cq = i40iw_destroy_cq;
2787         iwibdev->ibdev.get_dma_mr = i40iw_get_dma_mr;
2788         iwibdev->ibdev.reg_user_mr = i40iw_reg_user_mr;
2789         iwibdev->ibdev.dereg_mr = i40iw_dereg_mr;
2790         iwibdev->ibdev.alloc_hw_stats = i40iw_alloc_hw_stats;
2791         iwibdev->ibdev.get_hw_stats = i40iw_get_hw_stats;
2792         iwibdev->ibdev.query_device = i40iw_query_device;
2793         iwibdev->ibdev.drain_sq = i40iw_drain_sq;
2794         iwibdev->ibdev.drain_rq = i40iw_drain_rq;
2795         iwibdev->ibdev.alloc_mr = i40iw_alloc_mr;
2796         iwibdev->ibdev.map_mr_sg = i40iw_map_mr_sg;
2797         iwibdev->ibdev.iwcm = kzalloc(sizeof(*iwibdev->ibdev.iwcm), GFP_KERNEL);
2798         if (!iwibdev->ibdev.iwcm) {
2799                 ib_dealloc_device(&iwibdev->ibdev);
2800                 return NULL;
2801         }
2802
2803         iwibdev->ibdev.iwcm->add_ref = i40iw_add_ref;
2804         iwibdev->ibdev.iwcm->rem_ref = i40iw_rem_ref;
2805         iwibdev->ibdev.iwcm->get_qp = i40iw_get_qp;
2806         iwibdev->ibdev.iwcm->connect = i40iw_connect;
2807         iwibdev->ibdev.iwcm->accept = i40iw_accept;
2808         iwibdev->ibdev.iwcm->reject = i40iw_reject;
2809         iwibdev->ibdev.iwcm->create_listen = i40iw_create_listen;
2810         iwibdev->ibdev.iwcm->destroy_listen = i40iw_destroy_listen;
2811         memcpy(iwibdev->ibdev.iwcm->ifname, netdev->name,
2812                sizeof(iwibdev->ibdev.iwcm->ifname));
2813         iwibdev->ibdev.get_port_immutable   = i40iw_port_immutable;
2814         iwibdev->ibdev.get_dev_fw_str       = i40iw_get_dev_fw_str;
2815         iwibdev->ibdev.poll_cq = i40iw_poll_cq;
2816         iwibdev->ibdev.req_notify_cq = i40iw_req_notify_cq;
2817         iwibdev->ibdev.post_send = i40iw_post_send;
2818         iwibdev->ibdev.post_recv = i40iw_post_recv;
2819         iwibdev->ibdev.get_vector_affinity = i40iw_get_vector_affinity;
2820
2821         return iwibdev;
2822 }
2823
2824 /**
2825  * i40iw_port_ibevent - indicate port event
2826  * @iwdev: iwarp device
2827  */
2828 void i40iw_port_ibevent(struct i40iw_device *iwdev)
2829 {
2830         struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2831         struct ib_event event;
2832
2833         event.device = &iwibdev->ibdev;
2834         event.element.port_num = 1;
2835         event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2836         ib_dispatch_event(&event);
2837 }
2838
2839 /**
2840  * i40iw_unregister_rdma_device - unregister of iwarp from IB
2841  * @iwibdev: rdma device ptr
2842  */
2843 static void i40iw_unregister_rdma_device(struct i40iw_ib_device *iwibdev)
2844 {
2845         int i;
2846
2847         for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i)
2848                 device_remove_file(&iwibdev->ibdev.dev,
2849                                    i40iw_dev_attributes[i]);
2850         ib_unregister_device(&iwibdev->ibdev);
2851 }
2852
2853 /**
2854  * i40iw_destroy_rdma_device - destroy rdma device and free resources
2855  * @iwibdev: IB device ptr
2856  */
2857 void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2858 {
2859         if (!iwibdev)
2860                 return;
2861
2862         i40iw_unregister_rdma_device(iwibdev);
2863         kfree(iwibdev->ibdev.iwcm);
2864         iwibdev->ibdev.iwcm = NULL;
2865         wait_event_timeout(iwibdev->iwdev->close_wq,
2866                            !atomic64_read(&iwibdev->iwdev->use_count),
2867                            I40IW_EVENT_TIMEOUT);
2868         ib_dealloc_device(&iwibdev->ibdev);
2869 }
2870
2871 /**
2872  * i40iw_register_rdma_device - register iwarp device to IB
2873  * @iwdev: iwarp device
2874  */
2875 int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2876 {
2877         int i, ret;
2878         struct i40iw_ib_device *iwibdev;
2879
2880         iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2881         if (!iwdev->iwibdev)
2882                 return -ENOMEM;
2883         iwibdev = iwdev->iwibdev;
2884
2885         iwibdev->ibdev.driver_id = RDMA_DRIVER_I40IW;
2886         ret = ib_register_device(&iwibdev->ibdev, NULL);
2887         if (ret)
2888                 goto error;
2889
2890         for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) {
2891                 ret =
2892                     device_create_file(&iwibdev->ibdev.dev,
2893                                        i40iw_dev_attributes[i]);
2894                 if (ret) {
2895                         while (i > 0) {
2896                                 i--;
2897                                 device_remove_file(&iwibdev->ibdev.dev, i40iw_dev_attributes[i]);
2898                         }
2899                         ib_unregister_device(&iwibdev->ibdev);
2900                         goto error;
2901                 }
2902         }
2903         return 0;
2904 error:
2905         kfree(iwdev->iwibdev->ibdev.iwcm);
2906         iwdev->iwibdev->ibdev.iwcm = NULL;
2907         ib_dealloc_device(&iwdev->iwibdev->ibdev);
2908         return ret;
2909 }