1 #ifndef _HFI1_USER_SDMA_H
2 #define _HFI1_USER_SDMA_H
4 * Copyright(c) 2020 - Cornelis Networks, Inc.
5 * Copyright(c) 2015 - 2018 Intel Corporation.
7 * This file is provided under a dual BSD/GPLv2 license. When using or
8 * redistributing this file, you may do so under either license.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50 #include <linux/device.h>
51 #include <linux/wait.h>
55 #include "user_exp_rcv.h"
58 /* The maximum number of Data io vectors per message/request */
59 #define MAX_VECTORS_PER_REQ 8
61 * Maximum number of packet to send from each message/request
62 * before moving to the next one.
64 #define MAX_PKTS_PER_QUEUE 16
66 #define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT))
68 #define req_opcode(x) \
69 (((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
70 #define req_version(x) \
71 (((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
72 #define req_iovcnt(x) \
73 (((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK)
75 /* Number of BTH.PSN bits used for sequence number in expected rcvs */
76 #define BTH_SEQ_MASK 0x7ffull
78 #define AHG_KDETH_INTR_SHIFT 12
79 #define AHG_KDETH_SH_SHIFT 13
80 #define AHG_KDETH_ARRAY_SIZE 9
82 #define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4)
83 #define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff)
86 * Build an SDMA AHG header update descriptor and save it to an array.
87 * @arr - Array to save the descriptor to.
88 * @idx - Index of the array at which the descriptor will be saved.
89 * @array_size - Size of the array arr.
90 * @dw - Update index into the header in DWs.
92 * @width - Field width.
93 * @value - 16 bits of immediate data to write into the field.
94 * Returns -ERANGE if idx is invalid. If successful, returns the next index
95 * (idx + 1) of the array to be used for the next descriptor.
97 static inline int ahg_header_set(u32 *arr, int idx, size_t array_size,
98 u8 dw, u8 bit, u8 width, u16 value)
100 if ((size_t)idx >= array_size)
102 arr[idx++] = sdma_build_ahg_descriptor(value, dw, bit, width);
106 /* Tx request flag bits */
107 #define TXREQ_FLAGS_REQ_ACK BIT(0) /* Set the ACK bit in the header */
108 #define TXREQ_FLAGS_REQ_DISABLE_SH BIT(1) /* Disable header suppression */
110 enum pkt_q_sdma_state {
115 #define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */
117 #define SDMA_DBG(req, fmt, ...) \
118 hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \
119 (req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \
122 struct hfi1_user_sdma_pkt_q {
128 struct hfi1_devdata *dd;
129 struct kmem_cache *txreq_cache;
130 struct user_sdma_request *reqs;
131 unsigned long *req_in_use;
133 enum pkt_q_sdma_state state;
134 wait_queue_head_t wait;
135 unsigned long unpinned;
136 struct mmu_rb_handler *handler;
140 struct hfi1_user_sdma_comp_q {
142 struct hfi1_sdma_comp_entry *comps;
145 struct sdma_mmu_node {
146 struct mmu_rb_node rb;
147 struct hfi1_user_sdma_pkt_q *pq;
152 struct user_sdma_iovec {
153 struct list_head list;
156 * offset into the virtual address space of the vector at
157 * which we last left off.
162 /* evict operation argument */
164 u32 cleared; /* count evicted so far */
165 u32 target; /* target count to evict */
168 struct user_sdma_request {
169 /* This is the original header from user space */
170 struct hfi1_pkt_header hdr;
172 /* Read mostly fields */
173 struct hfi1_user_sdma_pkt_q *pq ____cacheline_aligned_in_smp;
174 struct hfi1_user_sdma_comp_q *cq;
176 * Pointer to the SDMA engine for this request.
177 * Since different request could be on different VLs,
178 * each request will need it's own engine pointer.
180 struct sdma_engine *sde;
181 struct sdma_req_info info;
182 /* TID array values copied from the tid_iov vector */
184 /* total length of the data in the request */
186 /* number of elements copied to the tids array */
189 * We copy the iovs for this request (based on
190 * info.iovcnt). These are only the data vectors
195 /* Writeable fields shared with interrupt */
196 u16 seqcomp ____cacheline_aligned_in_smp;
199 /* Send side fields */
200 struct list_head txps ____cacheline_aligned_in_smp;
203 * KDETH.OFFSET (TID) field
204 * The offset can cover multiple packets, depending on the
205 * size of the TID entry.
209 * KDETH.Offset (Eager) field
210 * We need to remember the initial value so the headers
211 * can be updated properly.
215 /* TID index copied from the tid_iov vector */
217 /* progress index moving along the iovs array */
221 struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ];
222 } ____cacheline_aligned_in_smp;
225 * A single txreq could span up to 3 physical pages when the MTU
226 * is sufficiently large (> 4K). Each of the IOV pointers also
227 * needs it's own set of flags so the vector has been handled
228 * independently of each other.
230 struct user_sdma_txreq {
231 /* Packet header for the txreq */
232 struct hfi1_pkt_header hdr;
233 struct sdma_txreq txreq;
234 struct list_head list;
235 struct user_sdma_request *req;
240 int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt,
241 struct hfi1_filedata *fd);
242 int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd,
243 struct hfi1_ctxtdata *uctxt);
244 int hfi1_user_sdma_process_request(struct hfi1_filedata *fd,
245 struct iovec *iovec, unsigned long dim,
246 unsigned long *count);
248 static inline struct mm_struct *mm_from_sdma_node(struct sdma_mmu_node *node)
250 return node->rb.handler->mn.mm;
253 #endif /* _HFI1_USER_SDMA_H */