1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) Linumiz 2021
6 * max31865.c - Maxim MAX31865 RTD-to-Digital Converter sensor driver
8 * Author: Navin Sankar Velliangiri <navin@linumiz.com>
11 #include <linux/ctype.h>
12 #include <linux/delay.h>
13 #include <linux/err.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/iio/iio.h>
17 #include <linux/iio/sysfs.h>
18 #include <linux/spi/spi.h>
19 #include <asm/unaligned.h>
22 * The MSB of the register value determines whether the following byte will
23 * be written or read. If it is 0, read will follow and if it is 1, write
26 #define MAX31865_RD_WR_BIT BIT(7)
28 #define MAX31865_CFG_VBIAS BIT(7)
29 #define MAX31865_CFG_1SHOT BIT(5)
30 #define MAX31865_3WIRE_RTD BIT(4)
31 #define MAX31865_FAULT_STATUS_CLEAR BIT(1)
32 #define MAX31865_FILTER_50HZ BIT(0)
34 /* The MAX31865 registers */
35 #define MAX31865_CFG_REG 0x00
36 #define MAX31865_RTD_MSB 0x01
37 #define MAX31865_FAULT_STATUS 0x07
39 #define MAX31865_FAULT_OVUV BIT(2)
41 static const char max31865_show_samp_freq[] = "50 60";
43 static const struct iio_chan_spec max31865_channels[] = {
44 { /* RTD Temperature */
47 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE)
51 struct max31865_data {
52 struct spi_device *spi;
56 u8 buf[2] ____cacheline_aligned;
59 static int max31865_read(struct max31865_data *data, u8 reg,
60 unsigned int read_size)
62 return spi_write_then_read(data->spi, ®, 1, data->buf, read_size);
65 static int max31865_write(struct max31865_data *data, size_t len)
67 return spi_write(data->spi, data->buf, len);
70 static int enable_bias(struct max31865_data *data)
75 ret = max31865_read(data, MAX31865_CFG_REG, 1);
81 data->buf[0] = MAX31865_CFG_REG | MAX31865_RD_WR_BIT;
82 data->buf[1] = cfg | MAX31865_CFG_VBIAS;
84 return max31865_write(data, 2);
87 static int disable_bias(struct max31865_data *data)
92 ret = max31865_read(data, MAX31865_CFG_REG, 1);
97 cfg &= ~MAX31865_CFG_VBIAS;
99 data->buf[0] = MAX31865_CFG_REG | MAX31865_RD_WR_BIT;
102 return max31865_write(data, 2);
105 static int max31865_rtd_read(struct max31865_data *data, int *val)
110 /* Enable BIAS to start the conversion */
111 ret = enable_bias(data);
115 /* wait 10.5ms before initiating the conversion */
118 ret = max31865_read(data, MAX31865_CFG_REG, 1);
123 reg |= MAX31865_CFG_1SHOT | MAX31865_FAULT_STATUS_CLEAR;
124 data->buf[0] = MAX31865_CFG_REG | MAX31865_RD_WR_BIT;
127 ret = max31865_write(data, 2);
131 if (data->filter_50hz) {
132 /* 50Hz filter mode requires 62.5ms to complete */
135 /* 60Hz filter mode requires 52ms to complete */
139 ret = max31865_read(data, MAX31865_RTD_MSB, 2);
143 *val = get_unaligned_be16(&data->buf) >> 1;
145 return disable_bias(data);
148 static int max31865_read_raw(struct iio_dev *indio_dev,
149 struct iio_chan_spec const *chan,
150 int *val, int *val2, long mask)
152 struct max31865_data *data = iio_priv(indio_dev);
156 case IIO_CHAN_INFO_RAW:
157 mutex_lock(&data->lock);
158 ret = max31865_rtd_read(data, val);
159 mutex_unlock(&data->lock);
163 case IIO_CHAN_INFO_SCALE:
164 /* Temp. Data resolution is 0.03125 degree centigrade */
166 *val2 = 250000; /* 1000 * 0.03125 */
167 return IIO_VAL_INT_PLUS_MICRO;
173 static int max31865_init(struct max31865_data *data)
178 ret = max31865_read(data, MAX31865_CFG_REG, 1);
184 if (data->three_wire)
185 /* 3-wire RTD connection */
186 cfg |= MAX31865_3WIRE_RTD;
188 if (data->filter_50hz)
189 /* 50Hz noise rejection filter */
190 cfg |= MAX31865_FILTER_50HZ;
192 data->buf[0] = MAX31865_CFG_REG | MAX31865_RD_WR_BIT;
195 return max31865_write(data, 2);
198 static ssize_t show_fault(struct device *dev, u8 faultbit, char *buf)
202 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
203 struct max31865_data *data = iio_priv(indio_dev);
205 ret = max31865_read(data, MAX31865_FAULT_STATUS, 1);
209 fault = data->buf[0] & faultbit;
211 return sprintf(buf, "%d\n", fault);
214 static ssize_t show_fault_ovuv(struct device *dev,
215 struct device_attribute *attr,
218 return show_fault(dev, MAX31865_FAULT_OVUV, buf);
221 static ssize_t show_filter(struct device *dev,
222 struct device_attribute *attr,
225 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
226 struct max31865_data *data = iio_priv(indio_dev);
228 return sprintf(buf, "%d\n", data->filter_50hz ? 50 : 60);
231 static ssize_t set_filter(struct device *dev,
232 struct device_attribute *attr,
236 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
237 struct max31865_data *data = iio_priv(indio_dev);
241 ret = kstrtouint(buf, 10, &freq);
247 data->filter_50hz = true;
250 data->filter_50hz = false;
256 mutex_lock(&data->lock);
257 ret = max31865_init(data);
258 mutex_unlock(&data->lock);
265 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(max31865_show_samp_freq);
266 static IIO_DEVICE_ATTR(fault_ovuv, 0444, show_fault_ovuv, NULL, 0);
267 static IIO_DEVICE_ATTR(in_filter_notch_center_frequency, 0644,
268 show_filter, set_filter, 0);
270 static struct attribute *max31865_attributes[] = {
271 &iio_dev_attr_fault_ovuv.dev_attr.attr,
272 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
273 &iio_dev_attr_in_filter_notch_center_frequency.dev_attr.attr,
277 static const struct attribute_group max31865_group = {
278 .attrs = max31865_attributes,
281 static const struct iio_info max31865_info = {
282 .read_raw = max31865_read_raw,
283 .attrs = &max31865_group,
286 static int max31865_probe(struct spi_device *spi)
288 const struct spi_device_id *id = spi_get_device_id(spi);
289 struct iio_dev *indio_dev;
290 struct max31865_data *data;
293 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*data));
297 data = iio_priv(indio_dev);
299 data->filter_50hz = false;
300 mutex_init(&data->lock);
302 indio_dev->info = &max31865_info;
303 indio_dev->name = id->name;
304 indio_dev->modes = INDIO_DIRECT_MODE;
305 indio_dev->channels = max31865_channels;
306 indio_dev->num_channels = ARRAY_SIZE(max31865_channels);
308 if (of_property_read_bool(spi->dev.of_node, "maxim,3-wire")) {
310 data->three_wire = 1;
312 /* select 2 or 4 wire */
313 data->three_wire = 0;
316 ret = max31865_init(data);
318 dev_err(&spi->dev, "error: Failed to configure max31865\n");
322 return devm_iio_device_register(&spi->dev, indio_dev);
325 static const struct spi_device_id max31865_id[] = {
329 MODULE_DEVICE_TABLE(spi, max31865_id);
331 static const struct of_device_id max31865_of_match[] = {
332 { .compatible = "maxim,max31865" },
335 MODULE_DEVICE_TABLE(of, max31865_of_match);
337 static struct spi_driver max31865_driver = {
340 .of_match_table = max31865_of_match,
342 .probe = max31865_probe,
343 .id_table = max31865_id,
345 module_spi_driver(max31865_driver);
347 MODULE_AUTHOR("Navin Sankar Velliangiri <navin@linumiz.com>");
348 MODULE_DESCRIPTION("Maxim MAX31865 RTD-to-Digital Converter sensor driver");
349 MODULE_LICENSE("GPL v2");