1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2021 Google LLC.
5 * Driver for Semtech's SX9360 capacitive proximity/button solution.
6 * Based on SX9360 driver and copy of datasheet at:
7 * https://edit.wpgdadawant.com/uploads/news_file/program/2019/30184/tech_files/program_30184_suggest_other_file.pdf
10 #include <linux/acpi.h>
11 #include <linux/bits.h>
12 #include <linux/bitfield.h>
13 #include <linux/delay.h>
14 #include <linux/i2c.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel.h>
17 #include <linux/log2.h>
18 #include <linux/mod_devicetable.h>
19 #include <linux/module.h>
21 #include <linux/property.h>
22 #include <linux/regmap.h>
24 #include <linux/iio/iio.h>
26 #include "sx_common.h"
28 /* Nominal Oscillator Frequency. */
29 #define SX9360_FOSC_MHZ 4
30 #define SX9360_FOSC_HZ (SX9360_FOSC_MHZ * 1000000)
32 /* Register definitions. */
33 #define SX9360_REG_IRQ_SRC SX_COMMON_REG_IRQ_SRC
34 #define SX9360_REG_STAT 0x01
35 #define SX9360_REG_STAT_COMPSTAT_MASK GENMASK(2, 1)
36 #define SX9360_REG_IRQ_MSK 0x02
37 #define SX9360_CONVDONE_IRQ BIT(0)
38 #define SX9360_FAR_IRQ BIT(2)
39 #define SX9360_CLOSE_IRQ BIT(3)
40 #define SX9360_REG_IRQ_CFG 0x03
42 #define SX9360_REG_GNRL_CTRL0 0x10
43 #define SX9360_REG_GNRL_CTRL0_PHEN_MASK GENMASK(1, 0)
44 #define SX9360_REG_GNRL_CTRL1 0x11
45 #define SX9360_REG_GNRL_CTRL1_SCANPERIOD_MASK GENMASK(2, 0)
46 #define SX9360_REG_GNRL_CTRL2 0x12
47 #define SX9360_REG_GNRL_CTRL2_PERIOD_102MS 0x32
48 #define SX9360_REG_GNRL_REG_2_PERIOD_MS(_r) \
49 (((_r) * 8192) / (SX9360_FOSC_HZ / 1000))
50 #define SX9360_REG_GNRL_FREQ_2_REG(_f) (((_f) * 8192) / SX9360_FOSC_HZ)
51 #define SX9360_REG_GNRL_REG_2_FREQ(_r) (SX9360_FOSC_HZ / ((_r) * 8192))
53 #define SX9360_REG_AFE_CTRL1 0x21
54 #define SX9360_REG_AFE_PARAM0_PHR 0x22
55 #define SX9360_REG_AFE_PARAM1_PHR 0x23
56 #define SX9360_REG_AFE_PARAM0_PHM 0x24
57 #define SX9360_REG_AFE_PARAM0_RSVD 0x08
58 #define SX9360_REG_AFE_PARAM0_RESOLUTION_MASK GENMASK(2, 0)
59 #define SX9360_REG_AFE_PARAM0_RESOLUTION_128 0x02
60 #define SX9360_REG_AFE_PARAM1_PHM 0x25
61 #define SX9360_REG_AFE_PARAM1_AGAIN_PHM_6PF 0x40
62 #define SX9360_REG_AFE_PARAM1_FREQ_83_33HZ 0x06
64 #define SX9360_REG_PROX_CTRL0_PHR 0x40
65 #define SX9360_REG_PROX_CTRL0_PHM 0x41
66 #define SX9360_REG_PROX_CTRL0_GAIN_MASK GENMASK(5, 3)
67 #define SX9360_REG_PROX_CTRL0_GAIN_1 0x80
68 #define SX9360_REG_PROX_CTRL0_RAWFILT_MASK GENMASK(2, 0)
69 #define SX9360_REG_PROX_CTRL0_RAWFILT_1P50 0x01
70 #define SX9360_REG_PROX_CTRL1 0x42
71 #define SX9360_REG_PROX_CTRL1_AVGNEG_THRESH_MASK GENMASK(5, 3)
72 #define SX9360_REG_PROX_CTRL1_AVGNEG_THRESH_16K 0x20
73 #define SX9360_REG_PROX_CTRL2 0x43
74 #define SX9360_REG_PROX_CTRL2_AVGDEB_MASK GENMASK(7, 6)
75 #define SX9360_REG_PROX_CTRL2_AVGDEB_2SAMPLES 0x40
76 #define SX9360_REG_PROX_CTRL2_AVGPOS_THRESH_16K 0x20
77 #define SX9360_REG_PROX_CTRL3 0x44
78 #define SX9360_REG_PROX_CTRL3_AVGNEG_FILT_MASK GENMASK(5, 3)
79 #define SX9360_REG_PROX_CTRL3_AVGNEG_FILT_2 0x08
80 #define SX9360_REG_PROX_CTRL3_AVGPOS_FILT_MASK GENMASK(2, 0)
81 #define SX9360_REG_PROX_CTRL3_AVGPOS_FILT_256 0x04
82 #define SX9360_REG_PROX_CTRL4 0x45
83 #define SX9360_REG_PROX_CTRL4_HYST_MASK GENMASK(5, 4)
84 #define SX9360_REG_PROX_CTRL4_CLOSE_DEBOUNCE_MASK GENMASK(3, 2)
85 #define SX9360_REG_PROX_CTRL4_FAR_DEBOUNCE_MASK GENMASK(1, 0)
86 #define SX9360_REG_PROX_CTRL5 0x46
87 #define SX9360_REG_PROX_CTRL5_PROXTHRESH_32 0x08
89 #define SX9360_REG_REF_CORR0 0x60
90 #define SX9360_REG_REF_CORR1 0x61
92 #define SX9360_REG_USEFUL_PHR_MSB 0x90
93 #define SX9360_REG_USEFUL_PHR_LSB 0x91
95 #define SX9360_REG_OFFSET_PMR_MSB 0x92
96 #define SX9360_REG_OFFSET_PMR_LSB 0x93
98 #define SX9360_REG_USEFUL_PHM_MSB 0x94
99 #define SX9360_REG_USEFUL_PHM_LSB 0x95
101 #define SX9360_REG_AVG_PHM_MSB 0x96
102 #define SX9360_REG_AVG_PHM_LSB 0x97
104 #define SX9360_REG_DIFF_PHM_MSB 0x98
105 #define SX9360_REG_DIFF_PHM_LSB 0x99
107 #define SX9360_REG_OFFSET_PHM_MSB 0x9a
108 #define SX9360_REG_OFFSET_PHM_LSB 0x9b
110 #define SX9360_REG_USE_FILTER_MSB 0x9a
111 #define SX9360_REG_USE_FILTER_LSB 0x9b
113 #define SX9360_REG_RESET 0xcf
114 /* Write this to REG_RESET to do a soft reset. */
115 #define SX9360_SOFT_RESET 0xde
117 #define SX9360_REG_WHOAMI 0xfa
118 #define SX9360_WHOAMI_VALUE 0x60
120 #define SX9360_REG_REVISION 0xfe
122 /* 2 channels, Phase Reference and Measurement. */
123 #define SX9360_NUM_CHANNELS 2
125 static const struct iio_chan_spec sx9360_channels[] = {
127 .type = IIO_PROXIMITY,
128 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
129 BIT(IIO_CHAN_INFO_HARDWAREGAIN),
130 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
131 .info_mask_separate_available =
132 BIT(IIO_CHAN_INFO_HARDWAREGAIN),
133 .info_mask_shared_by_all_available =
134 BIT(IIO_CHAN_INFO_SAMP_FREQ),
136 .address = SX9360_REG_USEFUL_PHR_MSB,
143 .endianness = IIO_BE,
147 .type = IIO_PROXIMITY,
148 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
149 BIT(IIO_CHAN_INFO_HARDWAREGAIN),
150 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
151 .info_mask_separate_available =
152 BIT(IIO_CHAN_INFO_HARDWAREGAIN),
153 .info_mask_shared_by_all_available =
154 BIT(IIO_CHAN_INFO_SAMP_FREQ),
156 .address = SX9360_REG_USEFUL_PHM_MSB,
157 .event_spec = sx_common_events,
158 .num_event_specs = ARRAY_SIZE(sx_common_events),
165 .endianness = IIO_BE,
168 IIO_CHAN_SOFT_TIMESTAMP(2),
172 * Each entry contains the integer part (val) and the fractional part, in micro
173 * seconds. It conforms to the IIO output IIO_VAL_INT_PLUS_MICRO.
175 * The frequency control register holds the period, with a ~2ms increment.
176 * Therefore the smallest frequency is 4MHz / (2047 * 8192),
177 * The fastest is 4MHz / 8192.
178 * The interval is not linear, but given there is 2047 possible value,
179 * Returns the fake increment of (Max-Min)/2047
181 static const struct {
184 } sx9360_samp_freq_interval[] = {
185 { 0, 281250 }, /* 4MHz / (8192 * 2047) */
187 { 448, 281250 }, /* 4MHz / 8192 */
190 static const struct regmap_range sx9360_writable_reg_ranges[] = {
192 * To set COMPSTAT for compensation, even if datasheet says register is
195 regmap_reg_range(SX9360_REG_STAT, SX9360_REG_IRQ_CFG),
196 regmap_reg_range(SX9360_REG_GNRL_CTRL0, SX9360_REG_GNRL_CTRL2),
197 regmap_reg_range(SX9360_REG_AFE_CTRL1, SX9360_REG_AFE_PARAM1_PHM),
198 regmap_reg_range(SX9360_REG_PROX_CTRL0_PHR, SX9360_REG_PROX_CTRL5),
199 regmap_reg_range(SX9360_REG_REF_CORR0, SX9360_REG_REF_CORR1),
200 regmap_reg_range(SX9360_REG_OFFSET_PMR_MSB, SX9360_REG_OFFSET_PMR_LSB),
201 regmap_reg_range(SX9360_REG_RESET, SX9360_REG_RESET),
204 static const struct regmap_access_table sx9360_writeable_regs = {
205 .yes_ranges = sx9360_writable_reg_ranges,
206 .n_yes_ranges = ARRAY_SIZE(sx9360_writable_reg_ranges),
210 * All allocated registers are readable, so we just list unallocated
213 static const struct regmap_range sx9360_non_readable_reg_ranges[] = {
214 regmap_reg_range(SX9360_REG_IRQ_CFG + 1, SX9360_REG_GNRL_CTRL0 - 1),
215 regmap_reg_range(SX9360_REG_GNRL_CTRL2 + 1, SX9360_REG_AFE_CTRL1 - 1),
216 regmap_reg_range(SX9360_REG_AFE_PARAM1_PHM + 1,
217 SX9360_REG_PROX_CTRL0_PHR - 1),
218 regmap_reg_range(SX9360_REG_PROX_CTRL5 + 1, SX9360_REG_REF_CORR0 - 1),
219 regmap_reg_range(SX9360_REG_REF_CORR1 + 1,
220 SX9360_REG_USEFUL_PHR_MSB - 1),
221 regmap_reg_range(SX9360_REG_USE_FILTER_LSB + 1, SX9360_REG_RESET - 1),
222 regmap_reg_range(SX9360_REG_RESET + 1, SX9360_REG_WHOAMI - 1),
223 regmap_reg_range(SX9360_REG_WHOAMI + 1, SX9360_REG_REVISION - 1),
226 static const struct regmap_access_table sx9360_readable_regs = {
227 .no_ranges = sx9360_non_readable_reg_ranges,
228 .n_no_ranges = ARRAY_SIZE(sx9360_non_readable_reg_ranges),
231 static const struct regmap_range sx9360_volatile_reg_ranges[] = {
232 regmap_reg_range(SX9360_REG_IRQ_SRC, SX9360_REG_STAT),
233 regmap_reg_range(SX9360_REG_USEFUL_PHR_MSB, SX9360_REG_USE_FILTER_LSB),
234 regmap_reg_range(SX9360_REG_WHOAMI, SX9360_REG_WHOAMI),
235 regmap_reg_range(SX9360_REG_REVISION, SX9360_REG_REVISION),
238 static const struct regmap_access_table sx9360_volatile_regs = {
239 .yes_ranges = sx9360_volatile_reg_ranges,
240 .n_yes_ranges = ARRAY_SIZE(sx9360_volatile_reg_ranges),
243 static const struct regmap_config sx9360_regmap_config = {
247 .max_register = SX9360_REG_REVISION,
248 .cache_type = REGCACHE_RBTREE,
250 .wr_table = &sx9360_writeable_regs,
251 .rd_table = &sx9360_readable_regs,
252 .volatile_table = &sx9360_volatile_regs,
255 static int sx9360_read_prox_data(struct sx_common_data *data,
256 const struct iio_chan_spec *chan,
259 return regmap_bulk_read(data->regmap, chan->address, val, sizeof(*val));
263 * If we have no interrupt support, we have to wait for a scan period
264 * after enabling a channel to get a result.
266 static int sx9360_wait_for_sample(struct sx_common_data *data)
271 ret = regmap_bulk_read(data->regmap, SX9360_REG_GNRL_CTRL1,
275 msleep(SX9360_REG_GNRL_REG_2_PERIOD_MS(be16_to_cpu(buf)));
280 static int sx9360_read_gain(struct sx_common_data *data,
281 const struct iio_chan_spec *chan, int *val)
283 unsigned int reg, regval;
286 reg = SX9360_REG_PROX_CTRL0_PHR + chan->channel;
287 ret = regmap_read(data->regmap, reg, ®val);
291 *val = 1 << FIELD_GET(SX9360_REG_PROX_CTRL0_GAIN_MASK, regval);
296 static int sx9360_read_samp_freq(struct sx_common_data *data,
302 ret = regmap_bulk_read(data->regmap, SX9360_REG_GNRL_CTRL1,
306 divisor = be16_to_cpu(buf);
312 *val = SX9360_FOSC_HZ;
313 *val2 = divisor * 8192;
315 return IIO_VAL_FRACTIONAL;
318 static int sx9360_read_raw(struct iio_dev *indio_dev,
319 const struct iio_chan_spec *chan,
320 int *val, int *val2, long mask)
322 struct sx_common_data *data = iio_priv(indio_dev);
326 case IIO_CHAN_INFO_RAW:
327 ret = iio_device_claim_direct_mode(indio_dev);
331 ret = sx_common_read_proximity(data, chan, val);
332 iio_device_release_direct_mode(indio_dev);
334 case IIO_CHAN_INFO_HARDWAREGAIN:
335 ret = iio_device_claim_direct_mode(indio_dev);
339 ret = sx9360_read_gain(data, chan, val);
340 iio_device_release_direct_mode(indio_dev);
342 case IIO_CHAN_INFO_SAMP_FREQ:
343 return sx9360_read_samp_freq(data, val, val2);
349 static const char *sx9360_channel_labels[SX9360_NUM_CHANNELS] = {
353 static int sx9360_read_label(struct iio_dev *iio_dev, const struct iio_chan_spec *chan,
356 return sysfs_emit(label, "%s\n", sx9360_channel_labels[chan->channel]);
359 static const int sx9360_gain_vals[] = { 1, 2, 4, 8 };
361 static int sx9360_read_avail(struct iio_dev *indio_dev,
362 struct iio_chan_spec const *chan,
363 const int **vals, int *type, int *length,
366 if (chan->type != IIO_PROXIMITY)
370 case IIO_CHAN_INFO_HARDWAREGAIN:
372 *length = ARRAY_SIZE(sx9360_gain_vals);
373 *vals = sx9360_gain_vals;
374 return IIO_AVAIL_LIST;
375 case IIO_CHAN_INFO_SAMP_FREQ:
376 *type = IIO_VAL_INT_PLUS_MICRO;
377 *length = ARRAY_SIZE(sx9360_samp_freq_interval) * 2;
378 *vals = (int *)sx9360_samp_freq_interval;
379 return IIO_AVAIL_RANGE;
385 static int sx9360_set_samp_freq(struct sx_common_data *data,
391 reg = val * 8192 / SX9360_FOSC_HZ + val2 * 8192 / (SX9360_FOSC_MHZ);
392 buf = cpu_to_be16(reg);
393 mutex_lock(&data->mutex);
395 ret = regmap_bulk_write(data->regmap, SX9360_REG_GNRL_CTRL1, &buf,
398 mutex_unlock(&data->mutex);
403 static int sx9360_read_thresh(struct sx_common_data *data, int *val)
408 ret = regmap_read(data->regmap, SX9360_REG_PROX_CTRL5, ®val);
415 *val = (regval * regval) / 2;
420 static int sx9360_read_hysteresis(struct sx_common_data *data, int *val)
422 unsigned int regval, pthresh;
425 ret = sx9360_read_thresh(data, &pthresh);
429 ret = regmap_read(data->regmap, SX9360_REG_PROX_CTRL4, ®val);
433 regval = FIELD_GET(SX9360_REG_PROX_CTRL4_HYST_MASK, regval);
437 *val = pthresh >> (5 - regval);
442 static int sx9360_read_far_debounce(struct sx_common_data *data, int *val)
447 ret = regmap_read(data->regmap, SX9360_REG_PROX_CTRL4, ®val);
451 regval = FIELD_GET(SX9360_REG_PROX_CTRL4_FAR_DEBOUNCE_MASK, regval);
460 static int sx9360_read_close_debounce(struct sx_common_data *data, int *val)
465 ret = regmap_read(data->regmap, SX9360_REG_PROX_CTRL4, ®val);
469 regval = FIELD_GET(SX9360_REG_PROX_CTRL4_CLOSE_DEBOUNCE_MASK, regval);
478 static int sx9360_read_event_val(struct iio_dev *indio_dev,
479 const struct iio_chan_spec *chan,
480 enum iio_event_type type,
481 enum iio_event_direction dir,
482 enum iio_event_info info, int *val, int *val2)
484 struct sx_common_data *data = iio_priv(indio_dev);
486 if (chan->type != IIO_PROXIMITY)
490 case IIO_EV_INFO_VALUE:
491 return sx9360_read_thresh(data, val);
492 case IIO_EV_INFO_PERIOD:
494 case IIO_EV_DIR_RISING:
495 return sx9360_read_far_debounce(data, val);
496 case IIO_EV_DIR_FALLING:
497 return sx9360_read_close_debounce(data, val);
501 case IIO_EV_INFO_HYSTERESIS:
502 return sx9360_read_hysteresis(data, val);
508 static int sx9360_write_thresh(struct sx_common_data *data, int _val)
510 unsigned int val = _val;
514 val = int_sqrt(2 * val);
519 mutex_lock(&data->mutex);
520 ret = regmap_write(data->regmap, SX9360_REG_PROX_CTRL5, val);
521 mutex_unlock(&data->mutex);
526 static int sx9360_write_hysteresis(struct sx_common_data *data, int _val)
528 unsigned int hyst, val = _val;
531 ret = sx9360_read_thresh(data, &pthresh);
537 else if (val >= pthresh >> 2)
539 else if (val >= pthresh >> 3)
541 else if (val >= pthresh >> 4)
546 hyst = FIELD_PREP(SX9360_REG_PROX_CTRL4_HYST_MASK, hyst);
547 mutex_lock(&data->mutex);
548 ret = regmap_update_bits(data->regmap, SX9360_REG_PROX_CTRL4,
549 SX9360_REG_PROX_CTRL4_HYST_MASK, hyst);
550 mutex_unlock(&data->mutex);
555 static int sx9360_write_far_debounce(struct sx_common_data *data, int _val)
557 unsigned int regval, val = _val;
562 if (!FIELD_FIT(SX9360_REG_PROX_CTRL4_FAR_DEBOUNCE_MASK, val))
565 regval = FIELD_PREP(SX9360_REG_PROX_CTRL4_FAR_DEBOUNCE_MASK, val);
567 mutex_lock(&data->mutex);
568 ret = regmap_update_bits(data->regmap, SX9360_REG_PROX_CTRL4,
569 SX9360_REG_PROX_CTRL4_FAR_DEBOUNCE_MASK,
571 mutex_unlock(&data->mutex);
576 static int sx9360_write_close_debounce(struct sx_common_data *data, int _val)
578 unsigned int regval, val = _val;
583 if (!FIELD_FIT(SX9360_REG_PROX_CTRL4_CLOSE_DEBOUNCE_MASK, val))
586 regval = FIELD_PREP(SX9360_REG_PROX_CTRL4_CLOSE_DEBOUNCE_MASK, val);
588 mutex_lock(&data->mutex);
589 ret = regmap_update_bits(data->regmap, SX9360_REG_PROX_CTRL4,
590 SX9360_REG_PROX_CTRL4_CLOSE_DEBOUNCE_MASK,
592 mutex_unlock(&data->mutex);
597 static int sx9360_write_event_val(struct iio_dev *indio_dev,
598 const struct iio_chan_spec *chan,
599 enum iio_event_type type,
600 enum iio_event_direction dir,
601 enum iio_event_info info, int val, int val2)
603 struct sx_common_data *data = iio_priv(indio_dev);
605 if (chan->type != IIO_PROXIMITY)
609 case IIO_EV_INFO_VALUE:
610 return sx9360_write_thresh(data, val);
611 case IIO_EV_INFO_PERIOD:
613 case IIO_EV_DIR_RISING:
614 return sx9360_write_far_debounce(data, val);
615 case IIO_EV_DIR_FALLING:
616 return sx9360_write_close_debounce(data, val);
620 case IIO_EV_INFO_HYSTERESIS:
621 return sx9360_write_hysteresis(data, val);
627 static int sx9360_write_gain(struct sx_common_data *data,
628 const struct iio_chan_spec *chan, int val)
630 unsigned int gain, reg;
634 reg = SX9360_REG_PROX_CTRL0_PHR + chan->channel;
635 gain = FIELD_PREP(SX9360_REG_PROX_CTRL0_GAIN_MASK, gain);
637 mutex_lock(&data->mutex);
638 ret = regmap_update_bits(data->regmap, reg,
639 SX9360_REG_PROX_CTRL0_GAIN_MASK,
641 mutex_unlock(&data->mutex);
646 static int sx9360_write_raw(struct iio_dev *indio_dev,
647 const struct iio_chan_spec *chan, int val, int val2,
650 struct sx_common_data *data = iio_priv(indio_dev);
653 case IIO_CHAN_INFO_SAMP_FREQ:
654 return sx9360_set_samp_freq(data, val, val2);
655 case IIO_CHAN_INFO_HARDWAREGAIN:
656 return sx9360_write_gain(data, chan, val);
662 static const struct sx_common_reg_default sx9360_default_regs[] = {
663 { SX9360_REG_IRQ_MSK, 0x00 },
664 { SX9360_REG_IRQ_CFG, 0x00 },
666 * The lower 2 bits should not be set as it enable sensors measurements.
667 * Turning the detection on before the configuration values are set to
668 * good values can cause the device to return erroneous readings.
670 { SX9360_REG_GNRL_CTRL0, 0x00 },
671 { SX9360_REG_GNRL_CTRL1, 0x00 },
672 { SX9360_REG_GNRL_CTRL2, SX9360_REG_GNRL_CTRL2_PERIOD_102MS },
674 { SX9360_REG_AFE_CTRL1, 0x00 },
675 { SX9360_REG_AFE_PARAM0_PHR, SX9360_REG_AFE_PARAM0_RSVD |
676 SX9360_REG_AFE_PARAM0_RESOLUTION_128 },
677 { SX9360_REG_AFE_PARAM1_PHR, SX9360_REG_AFE_PARAM1_AGAIN_PHM_6PF |
678 SX9360_REG_AFE_PARAM1_FREQ_83_33HZ },
679 { SX9360_REG_AFE_PARAM0_PHM, SX9360_REG_AFE_PARAM0_RSVD |
680 SX9360_REG_AFE_PARAM0_RESOLUTION_128 },
681 { SX9360_REG_AFE_PARAM1_PHM, SX9360_REG_AFE_PARAM1_AGAIN_PHM_6PF |
682 SX9360_REG_AFE_PARAM1_FREQ_83_33HZ },
684 { SX9360_REG_PROX_CTRL0_PHR, SX9360_REG_PROX_CTRL0_GAIN_1 |
685 SX9360_REG_PROX_CTRL0_RAWFILT_1P50 },
686 { SX9360_REG_PROX_CTRL0_PHM, SX9360_REG_PROX_CTRL0_GAIN_1 |
687 SX9360_REG_PROX_CTRL0_RAWFILT_1P50 },
688 { SX9360_REG_PROX_CTRL1, SX9360_REG_PROX_CTRL1_AVGNEG_THRESH_16K },
689 { SX9360_REG_PROX_CTRL2, SX9360_REG_PROX_CTRL2_AVGDEB_2SAMPLES |
690 SX9360_REG_PROX_CTRL2_AVGPOS_THRESH_16K },
691 { SX9360_REG_PROX_CTRL3, SX9360_REG_PROX_CTRL3_AVGNEG_FILT_2 |
692 SX9360_REG_PROX_CTRL3_AVGPOS_FILT_256 },
693 { SX9360_REG_PROX_CTRL4, 0x00 },
694 { SX9360_REG_PROX_CTRL5, SX9360_REG_PROX_CTRL5_PROXTHRESH_32 },
697 /* Activate all channels and perform an initial compensation. */
698 static int sx9360_init_compensation(struct iio_dev *indio_dev)
700 struct sx_common_data *data = iio_priv(indio_dev);
704 /* run the compensation phase on all channels */
705 ret = regmap_update_bits(data->regmap, SX9360_REG_STAT,
706 SX9360_REG_STAT_COMPSTAT_MASK,
707 SX9360_REG_STAT_COMPSTAT_MASK);
711 return regmap_read_poll_timeout(data->regmap, SX9360_REG_STAT, val,
712 !(val & SX9360_REG_STAT_COMPSTAT_MASK),
716 static const struct sx_common_reg_default *
717 sx9360_get_default_reg(struct device *dev, int idx,
718 struct sx_common_reg_default *reg_def)
720 u32 raw = 0, pos = 0;
723 memcpy(reg_def, &sx9360_default_regs[idx], sizeof(*reg_def));
724 switch (reg_def->reg) {
725 case SX9360_REG_AFE_PARAM0_PHR:
726 case SX9360_REG_AFE_PARAM0_PHM:
727 ret = device_property_read_u32(dev, "semtech,resolution", &raw);
731 raw = ilog2(raw) - 3;
733 reg_def->def &= ~SX9360_REG_AFE_PARAM0_RESOLUTION_MASK;
734 reg_def->def |= FIELD_PREP(SX9360_REG_AFE_PARAM0_RESOLUTION_MASK, raw);
736 case SX9360_REG_PROX_CTRL0_PHR:
737 case SX9360_REG_PROX_CTRL0_PHM:
738 ret = device_property_read_u32(dev, "semtech,proxraw-strength", &raw);
742 reg_def->def &= ~SX9360_REG_PROX_CTRL0_RAWFILT_MASK;
743 reg_def->def |= FIELD_PREP(SX9360_REG_PROX_CTRL0_RAWFILT_MASK, raw);
745 case SX9360_REG_PROX_CTRL3:
746 ret = device_property_read_u32(dev, "semtech,avg-pos-strength",
751 /* Powers of 2, except for a gap between 16 and 64 */
752 raw = clamp(ilog2(pos), 3, 11) - (pos >= 32 ? 4 : 3);
753 reg_def->def &= ~SX9360_REG_PROX_CTRL3_AVGPOS_FILT_MASK;
754 reg_def->def |= FIELD_PREP(SX9360_REG_PROX_CTRL3_AVGPOS_FILT_MASK, raw);
761 static int sx9360_check_whoami(struct device *dev, struct iio_dev *indio_dev)
764 * Only one sensor for this driver. Assuming the device tree
765 * is correct, just set the sensor name.
767 indio_dev->name = "sx9360";
771 static const struct sx_common_chip_info sx9360_chip_info = {
772 .reg_stat = SX9360_REG_STAT,
773 .reg_irq_msk = SX9360_REG_IRQ_MSK,
774 .reg_enable_chan = SX9360_REG_GNRL_CTRL0,
775 .reg_reset = SX9360_REG_RESET,
777 .mask_enable_chan = SX9360_REG_GNRL_CTRL0_PHEN_MASK,
779 .num_channels = SX9360_NUM_CHANNELS,
780 .num_default_regs = ARRAY_SIZE(sx9360_default_regs),
783 .read_prox_data = sx9360_read_prox_data,
784 .check_whoami = sx9360_check_whoami,
785 .init_compensation = sx9360_init_compensation,
786 .wait_for_sample = sx9360_wait_for_sample,
787 .get_default_reg = sx9360_get_default_reg,
790 .iio_channels = sx9360_channels,
791 .num_iio_channels = ARRAY_SIZE(sx9360_channels),
793 .read_raw = sx9360_read_raw,
794 .read_avail = sx9360_read_avail,
795 .read_label = sx9360_read_label,
796 .read_event_value = sx9360_read_event_val,
797 .write_event_value = sx9360_write_event_val,
798 .write_raw = sx9360_write_raw,
799 .read_event_config = sx_common_read_event_config,
800 .write_event_config = sx_common_write_event_config,
804 static int sx9360_probe(struct i2c_client *client)
806 return sx_common_probe(client, &sx9360_chip_info, &sx9360_regmap_config);
809 static int __maybe_unused sx9360_suspend(struct device *dev)
811 struct sx_common_data *data = iio_priv(dev_get_drvdata(dev));
815 disable_irq_nosync(data->client->irq);
817 mutex_lock(&data->mutex);
818 ret = regmap_read(data->regmap, SX9360_REG_GNRL_CTRL0, ®val);
821 FIELD_GET(SX9360_REG_GNRL_CTRL0_PHEN_MASK, regval);
826 /* Disable all phases, send the device to sleep. */
827 ret = regmap_write(data->regmap, SX9360_REG_GNRL_CTRL0, 0);
830 mutex_unlock(&data->mutex);
834 static int __maybe_unused sx9360_resume(struct device *dev)
836 struct sx_common_data *data = iio_priv(dev_get_drvdata(dev));
839 mutex_lock(&data->mutex);
840 ret = regmap_update_bits(data->regmap, SX9360_REG_GNRL_CTRL0,
841 SX9360_REG_GNRL_CTRL0_PHEN_MASK,
843 mutex_unlock(&data->mutex);
847 enable_irq(data->client->irq);
851 static SIMPLE_DEV_PM_OPS(sx9360_pm_ops, sx9360_suspend, sx9360_resume);
853 static const struct acpi_device_id sx9360_acpi_match[] = {
854 { "STH9360", SX9360_WHOAMI_VALUE },
857 MODULE_DEVICE_TABLE(acpi, sx9360_acpi_match);
859 static const struct of_device_id sx9360_of_match[] = {
860 { .compatible = "semtech,sx9360", (void *)SX9360_WHOAMI_VALUE },
863 MODULE_DEVICE_TABLE(of, sx9360_of_match);
865 static const struct i2c_device_id sx9360_id[] = {
866 {"sx9360", SX9360_WHOAMI_VALUE },
869 MODULE_DEVICE_TABLE(i2c, sx9360_id);
871 static struct i2c_driver sx9360_driver = {
874 .acpi_match_table = sx9360_acpi_match,
875 .of_match_table = sx9360_of_match,
876 .pm = &sx9360_pm_ops,
879 * Lots of i2c transfers in probe + over 200 ms waiting in
880 * sx9360_init_compensation() mean a slow probe; prefer async
881 * so we don't delay boot if we're builtin to the kernel.
883 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
885 .probe_new = sx9360_probe,
886 .id_table = sx9360_id,
888 module_i2c_driver(sx9360_driver);
890 MODULE_AUTHOR("Gwendal Grignou <gwendal@chromium.org>");
891 MODULE_DESCRIPTION("Driver for Semtech SX9360 proximity sensor");
892 MODULE_LICENSE("GPL v2");
893 MODULE_IMPORT_NS(SEMTECH_PROX);