1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2018 Google LLC.
5 * Driver for Semtech's SX9310/SX9311 capacitive proximity/button solution.
6 * Based on SX9500 driver and Semtech driver using the input framework
7 * <https://my.syncplicity.com/share/teouwsim8niiaud/
8 * linux-driver-SX9310_NoSmartHSensing>.
9 * Reworked in April 2019 by Evan Green <evgreen@chromium.org>
10 * and in January 2020 by Daniel Campello <campello@chromium.org>.
13 #include <linux/bitfield.h>
14 #include <linux/delay.h>
15 #include <linux/i2c.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel.h>
18 #include <linux/log2.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/module.h>
22 #include <linux/property.h>
23 #include <linux/regmap.h>
24 #include <linux/iio/iio.h>
26 #include "sx_common.h"
28 /* Register definitions. */
29 #define SX9310_REG_IRQ_SRC SX_COMMON_REG_IRQ_SRC
30 #define SX9310_REG_STAT0 0x01
31 #define SX9310_REG_STAT1 0x02
32 #define SX9310_REG_STAT1_COMPSTAT_MASK GENMASK(3, 0)
33 #define SX9310_REG_IRQ_MSK 0x03
34 #define SX9310_CONVDONE_IRQ BIT(3)
35 #define SX9310_FAR_IRQ BIT(5)
36 #define SX9310_CLOSE_IRQ BIT(6)
37 #define SX9310_REG_IRQ_FUNC 0x04
39 #define SX9310_REG_PROX_CTRL0 0x10
40 #define SX9310_REG_PROX_CTRL0_SENSOREN_MASK GENMASK(3, 0)
41 #define SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK GENMASK(7, 4)
42 #define SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS 0x01
43 #define SX9310_REG_PROX_CTRL1 0x11
44 #define SX9310_REG_PROX_CTRL2 0x12
45 #define SX9310_REG_PROX_CTRL2_COMBMODE_MASK GENMASK(7, 6)
46 #define SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3 (0x03 << 6)
47 #define SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 (0x02 << 6)
48 #define SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1 (0x01 << 6)
49 #define SX9310_REG_PROX_CTRL2_COMBMODE_CS3 (0x00 << 6)
50 #define SX9310_REG_PROX_CTRL2_SHIELDEN_MASK GENMASK(3, 2)
51 #define SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC (0x01 << 2)
52 #define SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND (0x02 << 2)
53 #define SX9310_REG_PROX_CTRL3 0x13
54 #define SX9310_REG_PROX_CTRL3_GAIN0_MASK GENMASK(3, 2)
55 #define SX9310_REG_PROX_CTRL3_GAIN0_X8 (0x03 << 2)
56 #define SX9310_REG_PROX_CTRL3_GAIN12_MASK GENMASK(1, 0)
57 #define SX9310_REG_PROX_CTRL3_GAIN12_X4 0x02
58 #define SX9310_REG_PROX_CTRL4 0x14
59 #define SX9310_REG_PROX_CTRL4_RESOLUTION_MASK GENMASK(2, 0)
60 #define SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST 0x07
61 #define SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE 0x06
62 #define SX9310_REG_PROX_CTRL4_RESOLUTION_FINE 0x05
63 #define SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM 0x04
64 #define SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE 0x03
65 #define SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE 0x02
66 #define SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE 0x01
67 #define SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST 0x00
68 #define SX9310_REG_PROX_CTRL5 0x15
69 #define SX9310_REG_PROX_CTRL5_RANGE_SMALL (0x03 << 6)
70 #define SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK GENMASK(3, 2)
71 #define SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 (0x01 << 2)
72 #define SX9310_REG_PROX_CTRL5_RAWFILT_MASK GENMASK(1, 0)
73 #define SX9310_REG_PROX_CTRL5_RAWFILT_SHIFT 0
74 #define SX9310_REG_PROX_CTRL5_RAWFILT_1P25 0x02
75 #define SX9310_REG_PROX_CTRL6 0x16
76 #define SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT 0x20
77 #define SX9310_REG_PROX_CTRL7 0x17
78 #define SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 (0x01 << 3)
79 #define SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK GENMASK(2, 0)
80 #define SX9310_REG_PROX_CTRL7_AVGPOSFILT_SHIFT 0
81 #define SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 0x05
82 #define SX9310_REG_PROX_CTRL8 0x18
83 #define SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK GENMASK(7, 3)
84 #define SX9310_REG_PROX_CTRL9 0x19
85 #define SX9310_REG_PROX_CTRL8_9_PTHRESH_28 (0x08 << 3)
86 #define SX9310_REG_PROX_CTRL8_9_PTHRESH_96 (0x11 << 3)
87 #define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 0x03
88 #define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 0x05
89 #define SX9310_REG_PROX_CTRL10 0x1a
90 #define SX9310_REG_PROX_CTRL10_HYST_MASK GENMASK(5, 4)
91 #define SX9310_REG_PROX_CTRL10_HYST_6PCT (0x01 << 4)
92 #define SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK GENMASK(3, 2)
93 #define SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK GENMASK(1, 0)
94 #define SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 0x01
95 #define SX9310_REG_PROX_CTRL11 0x1b
96 #define SX9310_REG_PROX_CTRL12 0x1c
97 #define SX9310_REG_PROX_CTRL13 0x1d
98 #define SX9310_REG_PROX_CTRL14 0x1e
99 #define SX9310_REG_PROX_CTRL15 0x1f
100 #define SX9310_REG_PROX_CTRL16 0x20
101 #define SX9310_REG_PROX_CTRL17 0x21
102 #define SX9310_REG_PROX_CTRL18 0x22
103 #define SX9310_REG_PROX_CTRL19 0x23
104 #define SX9310_REG_SAR_CTRL0 0x2a
105 #define SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES (0x02 << 5)
106 #define SX9310_REG_SAR_CTRL0_SARHYST_8 (0x02 << 3)
107 #define SX9310_REG_SAR_CTRL1 0x2b
108 /* Each increment of the slope register is 0.0078125. */
109 #define SX9310_REG_SAR_CTRL1_SLOPE(_hnslope) (_hnslope / 78125)
110 #define SX9310_REG_SAR_CTRL2 0x2c
111 #define SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT 0x3c
113 #define SX9310_REG_SENSOR_SEL 0x30
114 #define SX9310_REG_USE_MSB 0x31
115 #define SX9310_REG_USE_LSB 0x32
116 #define SX9310_REG_AVG_MSB 0x33
117 #define SX9310_REG_AVG_LSB 0x34
118 #define SX9310_REG_DIFF_MSB 0x35
119 #define SX9310_REG_DIFF_LSB 0x36
120 #define SX9310_REG_OFFSET_MSB 0x37
121 #define SX9310_REG_OFFSET_LSB 0x38
122 #define SX9310_REG_SAR_MSB 0x39
123 #define SX9310_REG_SAR_LSB 0x3a
124 #define SX9310_REG_I2C_ADDR 0x40
125 #define SX9310_REG_PAUSE 0x41
126 #define SX9310_REG_WHOAMI 0x42
127 #define SX9310_WHOAMI_VALUE 0x01
128 #define SX9311_WHOAMI_VALUE 0x02
129 #define SX9310_REG_RESET 0x7f
132 /* 4 hardware channels, as defined in STAT0: COMB, CS2, CS1 and CS0. */
133 #define SX9310_NUM_CHANNELS 4
134 static_assert(SX9310_NUM_CHANNELS <= SX_COMMON_MAX_NUM_CHANNELS);
136 #define SX9310_NAMED_CHANNEL(idx, name) \
138 .type = IIO_PROXIMITY, \
139 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
140 BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
141 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
142 .info_mask_separate_available = \
143 BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
144 .info_mask_shared_by_all_available = \
145 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
148 .extend_name = name, \
149 .address = SX9310_REG_DIFF_MSB, \
150 .event_spec = sx_common_events, \
151 .num_event_specs = ARRAY_SIZE(sx_common_events), \
157 .endianness = IIO_BE, \
160 #define SX9310_CHANNEL(idx) SX9310_NAMED_CHANNEL(idx, NULL)
167 static const struct iio_chan_spec sx9310_channels[] = {
168 SX9310_CHANNEL(0), /* CS0 */
169 SX9310_CHANNEL(1), /* CS1 */
170 SX9310_CHANNEL(2), /* CS2 */
171 SX9310_NAMED_CHANNEL(3, "comb"), /* COMB */
173 IIO_CHAN_SOFT_TIMESTAMP(4),
177 * Each entry contains the integer part (val) and the fractional part, in micro
178 * seconds. It conforms to the IIO output IIO_VAL_INT_PLUS_MICRO.
180 static const struct {
183 } sx9310_samp_freq_table[] = {
184 { 500, 0 }, /* 0000: Min (no idle time) */
185 { 66, 666666 }, /* 0001: 15 ms */
186 { 33, 333333 }, /* 0010: 30 ms (Typ.) */
187 { 22, 222222 }, /* 0011: 45 ms */
188 { 16, 666666 }, /* 0100: 60 ms */
189 { 11, 111111 }, /* 0101: 90 ms */
190 { 8, 333333 }, /* 0110: 120 ms */
191 { 5, 0 }, /* 0111: 200 ms */
192 { 2, 500000 }, /* 1000: 400 ms */
193 { 1, 666666 }, /* 1001: 600 ms */
194 { 1, 250000 }, /* 1010: 800 ms */
195 { 1, 0 }, /* 1011: 1 s */
196 { 0, 500000 }, /* 1100: 2 s */
197 { 0, 333333 }, /* 1101: 3 s */
198 { 0, 250000 }, /* 1110: 4 s */
199 { 0, 200000 }, /* 1111: 5 s */
201 static const unsigned int sx9310_scan_period_table[] = {
202 2, 15, 30, 45, 60, 90, 120, 200,
203 400, 600, 800, 1000, 2000, 3000, 4000, 5000,
206 static const struct regmap_range sx9310_writable_reg_ranges[] = {
207 regmap_reg_range(SX9310_REG_IRQ_MSK, SX9310_REG_IRQ_FUNC),
208 regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19),
209 regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2),
210 regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SENSOR_SEL),
211 regmap_reg_range(SX9310_REG_OFFSET_MSB, SX9310_REG_OFFSET_LSB),
212 regmap_reg_range(SX9310_REG_PAUSE, SX9310_REG_PAUSE),
213 regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
216 static const struct regmap_access_table sx9310_writeable_regs = {
217 .yes_ranges = sx9310_writable_reg_ranges,
218 .n_yes_ranges = ARRAY_SIZE(sx9310_writable_reg_ranges),
221 static const struct regmap_range sx9310_readable_reg_ranges[] = {
222 regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_IRQ_FUNC),
223 regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19),
224 regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2),
225 regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SAR_LSB),
226 regmap_reg_range(SX9310_REG_I2C_ADDR, SX9310_REG_WHOAMI),
227 regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
230 static const struct regmap_access_table sx9310_readable_regs = {
231 .yes_ranges = sx9310_readable_reg_ranges,
232 .n_yes_ranges = ARRAY_SIZE(sx9310_readable_reg_ranges),
235 static const struct regmap_range sx9310_volatile_reg_ranges[] = {
236 regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_STAT1),
237 regmap_reg_range(SX9310_REG_USE_MSB, SX9310_REG_DIFF_LSB),
238 regmap_reg_range(SX9310_REG_SAR_MSB, SX9310_REG_SAR_LSB),
239 regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
242 static const struct regmap_access_table sx9310_volatile_regs = {
243 .yes_ranges = sx9310_volatile_reg_ranges,
244 .n_yes_ranges = ARRAY_SIZE(sx9310_volatile_reg_ranges),
247 static const struct regmap_config sx9310_regmap_config = {
251 .max_register = SX9310_REG_RESET,
252 .cache_type = REGCACHE_RBTREE,
254 .wr_table = &sx9310_writeable_regs,
255 .rd_table = &sx9310_readable_regs,
256 .volatile_table = &sx9310_volatile_regs,
259 static int sx9310_read_prox_data(struct sx_common_data *data,
260 const struct iio_chan_spec *chan, __be16 *val)
264 ret = regmap_write(data->regmap, SX9310_REG_SENSOR_SEL, chan->channel);
268 return regmap_bulk_read(data->regmap, chan->address, val, sizeof(*val));
272 * If we have no interrupt support, we have to wait for a scan period
273 * after enabling a channel to get a result.
275 static int sx9310_wait_for_sample(struct sx_common_data *data)
280 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &val);
284 val = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, val);
286 msleep(sx9310_scan_period_table[val]);
291 static int sx9310_read_gain(struct sx_common_data *data,
292 const struct iio_chan_spec *chan, int *val)
294 unsigned int regval, gain;
297 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL3, ®val);
301 switch (chan->channel) {
304 gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN0_MASK, regval);
308 gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN12_MASK, regval);
319 static int sx9310_read_samp_freq(struct sx_common_data *data, int *val, int *val2)
324 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, ®val);
328 regval = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, regval);
329 *val = sx9310_samp_freq_table[regval].val;
330 *val2 = sx9310_samp_freq_table[regval].val2;
332 return IIO_VAL_INT_PLUS_MICRO;
335 static int sx9310_read_raw(struct iio_dev *indio_dev,
336 const struct iio_chan_spec *chan, int *val,
337 int *val2, long mask)
339 struct sx_common_data *data = iio_priv(indio_dev);
342 if (chan->type != IIO_PROXIMITY)
346 case IIO_CHAN_INFO_RAW:
347 ret = iio_device_claim_direct_mode(indio_dev);
351 ret = sx_common_read_proximity(data, chan, val);
352 iio_device_release_direct_mode(indio_dev);
354 case IIO_CHAN_INFO_HARDWAREGAIN:
355 ret = iio_device_claim_direct_mode(indio_dev);
359 ret = sx9310_read_gain(data, chan, val);
360 iio_device_release_direct_mode(indio_dev);
362 case IIO_CHAN_INFO_SAMP_FREQ:
363 return sx9310_read_samp_freq(data, val, val2);
369 static const int sx9310_gain_vals[] = { 1, 2, 4, 8 };
371 static int sx9310_read_avail(struct iio_dev *indio_dev,
372 struct iio_chan_spec const *chan,
373 const int **vals, int *type, int *length,
376 if (chan->type != IIO_PROXIMITY)
380 case IIO_CHAN_INFO_HARDWAREGAIN:
382 *length = ARRAY_SIZE(sx9310_gain_vals);
383 *vals = sx9310_gain_vals;
384 return IIO_AVAIL_LIST;
385 case IIO_CHAN_INFO_SAMP_FREQ:
386 *type = IIO_VAL_INT_PLUS_MICRO;
387 *length = ARRAY_SIZE(sx9310_samp_freq_table) * 2;
388 *vals = (int *)sx9310_samp_freq_table;
389 return IIO_AVAIL_LIST;
395 static const unsigned int sx9310_pthresh_codes[] = {
396 2, 4, 6, 8, 12, 16, 20, 24, 28, 32, 40, 48, 56, 64, 72, 80, 88, 96, 112,
397 128, 144, 160, 192, 224, 256, 320, 384, 512, 640, 768, 1024, 1536
400 static int sx9310_get_thresh_reg(unsigned int channel)
405 return SX9310_REG_PROX_CTRL8;
408 return SX9310_REG_PROX_CTRL9;
414 static int sx9310_read_thresh(struct sx_common_data *data,
415 const struct iio_chan_spec *chan, int *val)
421 reg = ret = sx9310_get_thresh_reg(chan->channel);
425 ret = regmap_read(data->regmap, reg, ®val);
429 regval = FIELD_GET(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
430 if (regval >= ARRAY_SIZE(sx9310_pthresh_codes))
433 *val = sx9310_pthresh_codes[regval];
437 static int sx9310_read_hysteresis(struct sx_common_data *data,
438 const struct iio_chan_spec *chan, int *val)
440 unsigned int regval, pthresh;
443 ret = sx9310_read_thresh(data, chan, &pthresh);
447 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val);
451 regval = FIELD_GET(SX9310_REG_PROX_CTRL10_HYST_MASK, regval);
455 /* regval is at most 5 */
456 *val = pthresh >> (5 - regval);
461 static int sx9310_read_far_debounce(struct sx_common_data *data, int *val)
466 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val);
470 regval = FIELD_GET(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, regval);
479 static int sx9310_read_close_debounce(struct sx_common_data *data, int *val)
484 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val);
488 regval = FIELD_GET(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, regval);
497 static int sx9310_read_event_val(struct iio_dev *indio_dev,
498 const struct iio_chan_spec *chan,
499 enum iio_event_type type,
500 enum iio_event_direction dir,
501 enum iio_event_info info, int *val, int *val2)
503 struct sx_common_data *data = iio_priv(indio_dev);
505 if (chan->type != IIO_PROXIMITY)
509 case IIO_EV_INFO_VALUE:
510 return sx9310_read_thresh(data, chan, val);
511 case IIO_EV_INFO_PERIOD:
513 case IIO_EV_DIR_RISING:
514 return sx9310_read_far_debounce(data, val);
515 case IIO_EV_DIR_FALLING:
516 return sx9310_read_close_debounce(data, val);
520 case IIO_EV_INFO_HYSTERESIS:
521 return sx9310_read_hysteresis(data, chan, val);
527 static int sx9310_write_thresh(struct sx_common_data *data,
528 const struct iio_chan_spec *chan, int val)
534 reg = ret = sx9310_get_thresh_reg(chan->channel);
538 for (i = 0; i < ARRAY_SIZE(sx9310_pthresh_codes); i++) {
539 if (sx9310_pthresh_codes[i] == val) {
545 if (i == ARRAY_SIZE(sx9310_pthresh_codes))
548 regval = FIELD_PREP(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
549 mutex_lock(&data->mutex);
550 ret = regmap_update_bits(data->regmap, reg,
551 SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
552 mutex_unlock(&data->mutex);
557 static int sx9310_write_hysteresis(struct sx_common_data *data,
558 const struct iio_chan_spec *chan, int _val)
560 unsigned int hyst, val = _val;
563 ret = sx9310_read_thresh(data, chan, &pthresh);
569 else if (val == pthresh >> 2)
571 else if (val == pthresh >> 3)
573 else if (val == pthresh >> 4)
578 hyst = FIELD_PREP(SX9310_REG_PROX_CTRL10_HYST_MASK, hyst);
579 mutex_lock(&data->mutex);
580 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
581 SX9310_REG_PROX_CTRL10_HYST_MASK, hyst);
582 mutex_unlock(&data->mutex);
587 static int sx9310_write_far_debounce(struct sx_common_data *data, int val)
594 if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val))
597 regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val);
599 mutex_lock(&data->mutex);
600 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
601 SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK,
603 mutex_unlock(&data->mutex);
608 static int sx9310_write_close_debounce(struct sx_common_data *data, int val)
615 if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val))
618 regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val);
620 mutex_lock(&data->mutex);
621 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
622 SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK,
624 mutex_unlock(&data->mutex);
629 static int sx9310_write_event_val(struct iio_dev *indio_dev,
630 const struct iio_chan_spec *chan,
631 enum iio_event_type type,
632 enum iio_event_direction dir,
633 enum iio_event_info info, int val, int val2)
635 struct sx_common_data *data = iio_priv(indio_dev);
637 if (chan->type != IIO_PROXIMITY)
641 case IIO_EV_INFO_VALUE:
642 return sx9310_write_thresh(data, chan, val);
643 case IIO_EV_INFO_PERIOD:
645 case IIO_EV_DIR_RISING:
646 return sx9310_write_far_debounce(data, val);
647 case IIO_EV_DIR_FALLING:
648 return sx9310_write_close_debounce(data, val);
652 case IIO_EV_INFO_HYSTERESIS:
653 return sx9310_write_hysteresis(data, chan, val);
659 static int sx9310_set_samp_freq(struct sx_common_data *data, int val, int val2)
663 for (i = 0; i < ARRAY_SIZE(sx9310_samp_freq_table); i++)
664 if (val == sx9310_samp_freq_table[i].val &&
665 val2 == sx9310_samp_freq_table[i].val2)
668 if (i == ARRAY_SIZE(sx9310_samp_freq_table))
671 mutex_lock(&data->mutex);
673 ret = regmap_update_bits(
674 data->regmap, SX9310_REG_PROX_CTRL0,
675 SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK,
676 FIELD_PREP(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, i));
678 mutex_unlock(&data->mutex);
683 static int sx9310_write_gain(struct sx_common_data *data,
684 const struct iio_chan_spec *chan, int val)
686 unsigned int gain, mask;
691 switch (chan->channel) {
694 mask = SX9310_REG_PROX_CTRL3_GAIN0_MASK;
695 gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN0_MASK, gain);
699 mask = SX9310_REG_PROX_CTRL3_GAIN12_MASK;
700 gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN12_MASK, gain);
706 mutex_lock(&data->mutex);
707 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL3, mask,
709 mutex_unlock(&data->mutex);
714 static int sx9310_write_raw(struct iio_dev *indio_dev,
715 const struct iio_chan_spec *chan, int val, int val2,
718 struct sx_common_data *data = iio_priv(indio_dev);
720 if (chan->type != IIO_PROXIMITY)
724 case IIO_CHAN_INFO_SAMP_FREQ:
725 return sx9310_set_samp_freq(data, val, val2);
726 case IIO_CHAN_INFO_HARDWAREGAIN:
727 return sx9310_write_gain(data, chan, val);
733 static const struct sx_common_reg_default sx9310_default_regs[] = {
734 { SX9310_REG_IRQ_MSK, 0x00 },
735 { SX9310_REG_IRQ_FUNC, 0x00 },
737 * The lower 4 bits should not be set as it enable sensors measurements.
738 * Turning the detection on before the configuration values are set to
739 * good values can cause the device to return erroneous readings.
741 { SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS },
742 { SX9310_REG_PROX_CTRL1, 0x00 },
743 { SX9310_REG_PROX_CTRL2, SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 |
744 SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC },
745 { SX9310_REG_PROX_CTRL3, SX9310_REG_PROX_CTRL3_GAIN0_X8 |
746 SX9310_REG_PROX_CTRL3_GAIN12_X4 },
747 { SX9310_REG_PROX_CTRL4, SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST },
748 { SX9310_REG_PROX_CTRL5, SX9310_REG_PROX_CTRL5_RANGE_SMALL |
749 SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 |
750 SX9310_REG_PROX_CTRL5_RAWFILT_1P25 },
751 { SX9310_REG_PROX_CTRL6, SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT },
752 { SX9310_REG_PROX_CTRL7, SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 |
753 SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 },
754 { SX9310_REG_PROX_CTRL8, SX9310_REG_PROX_CTRL8_9_PTHRESH_96 |
755 SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 },
756 { SX9310_REG_PROX_CTRL9, SX9310_REG_PROX_CTRL8_9_PTHRESH_28 |
757 SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 },
758 { SX9310_REG_PROX_CTRL10, SX9310_REG_PROX_CTRL10_HYST_6PCT |
759 SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 },
760 { SX9310_REG_PROX_CTRL11, 0x00 },
761 { SX9310_REG_PROX_CTRL12, 0x00 },
762 { SX9310_REG_PROX_CTRL13, 0x00 },
763 { SX9310_REG_PROX_CTRL14, 0x00 },
764 { SX9310_REG_PROX_CTRL15, 0x00 },
765 { SX9310_REG_PROX_CTRL16, 0x00 },
766 { SX9310_REG_PROX_CTRL17, 0x00 },
767 { SX9310_REG_PROX_CTRL18, 0x00 },
768 { SX9310_REG_PROX_CTRL19, 0x00 },
769 { SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES |
770 SX9310_REG_SAR_CTRL0_SARHYST_8 },
771 { SX9310_REG_SAR_CTRL1, SX9310_REG_SAR_CTRL1_SLOPE(10781250) },
772 { SX9310_REG_SAR_CTRL2, SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT },
775 /* Activate all channels and perform an initial compensation. */
776 static int sx9310_init_compensation(struct iio_dev *indio_dev)
778 struct sx_common_data *data = iio_priv(indio_dev);
783 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &ctrl0);
787 /* run the compensation phase on all channels */
788 ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0,
789 ctrl0 | SX9310_REG_PROX_CTRL0_SENSOREN_MASK);
793 ret = regmap_read_poll_timeout(data->regmap, SX9310_REG_STAT1, val,
794 !(val & SX9310_REG_STAT1_COMPSTAT_MASK),
799 regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);
803 static const struct sx_common_reg_default *
804 sx9310_get_default_reg(struct device *dev, int idx,
805 struct sx_common_reg_default *reg_def)
807 u32 combined[SX9310_NUM_CHANNELS];
808 u32 start = 0, raw = 0, pos = 0;
809 unsigned long comb_mask = 0;
813 memcpy(reg_def, &sx9310_default_regs[idx], sizeof(*reg_def));
814 switch (reg_def->reg) {
815 case SX9310_REG_PROX_CTRL2:
816 if (device_property_read_bool(dev, "semtech,cs0-ground")) {
817 reg_def->def &= ~SX9310_REG_PROX_CTRL2_SHIELDEN_MASK;
818 reg_def->def |= SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND;
821 count = device_property_count_u32(dev, "semtech,combined-sensors");
822 if (count < 0 || count > ARRAY_SIZE(combined))
824 ret = device_property_read_u32_array(dev, "semtech,combined-sensors",
829 for (i = 0; i < count; i++)
830 comb_mask |= BIT(combined[i]);
832 reg_def->def &= ~SX9310_REG_PROX_CTRL2_COMBMODE_MASK;
833 if (comb_mask == (BIT(3) | BIT(2) | BIT(1) | BIT(0)))
834 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3;
835 else if (comb_mask == (BIT(1) | BIT(2)))
836 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2;
837 else if (comb_mask == (BIT(0) | BIT(1)))
838 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1;
839 else if (comb_mask == BIT(3))
840 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS3;
843 case SX9310_REG_PROX_CTRL4:
844 ret = device_property_read_string(dev, "semtech,resolution", &res);
848 reg_def->def &= ~SX9310_REG_PROX_CTRL4_RESOLUTION_MASK;
849 if (!strcmp(res, "coarsest"))
850 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST;
851 else if (!strcmp(res, "very-coarse"))
852 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE;
853 else if (!strcmp(res, "coarse"))
854 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE;
855 else if (!strcmp(res, "medium-coarse"))
856 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE;
857 else if (!strcmp(res, "medium"))
858 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM;
859 else if (!strcmp(res, "fine"))
860 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINE;
861 else if (!strcmp(res, "very-fine"))
862 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE;
863 else if (!strcmp(res, "finest"))
864 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST;
867 case SX9310_REG_PROX_CTRL5:
868 ret = device_property_read_u32(dev, "semtech,startup-sensor", &start);
870 start = FIELD_GET(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK,
874 reg_def->def &= ~SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK;
875 reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK,
878 ret = device_property_read_u32(dev, "semtech,proxraw-strength", &raw);
880 raw = FIELD_GET(SX9310_REG_PROX_CTRL5_RAWFILT_MASK,
886 reg_def->def &= ~SX9310_REG_PROX_CTRL5_RAWFILT_MASK;
887 reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_RAWFILT_MASK,
890 case SX9310_REG_PROX_CTRL7:
891 ret = device_property_read_u32(dev, "semtech,avg-pos-strength", &pos);
895 /* Powers of 2, except for a gap between 16 and 64 */
896 pos = clamp(ilog2(pos), 3, 11) - (pos >= 32 ? 4 : 3);
897 reg_def->def &= ~SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK;
898 reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK,
906 static int sx9310_check_whoami(struct device *dev,
907 struct iio_dev *indio_dev)
909 struct sx_common_data *data = iio_priv(indio_dev);
910 const struct sx931x_info *ddata;
914 ret = regmap_read(data->regmap, SX9310_REG_WHOAMI, &whoami);
918 ddata = device_get_match_data(dev);
919 if (ddata->whoami != whoami)
922 indio_dev->name = ddata->name;
927 static const struct sx_common_chip_info sx9310_chip_info = {
928 .reg_stat = SX9310_REG_STAT0,
929 .reg_irq_msk = SX9310_REG_IRQ_MSK,
930 .reg_enable_chan = SX9310_REG_PROX_CTRL0,
931 .reg_reset = SX9310_REG_RESET,
933 .mask_enable_chan = SX9310_REG_STAT1_COMPSTAT_MASK,
935 .num_channels = SX9310_NUM_CHANNELS,
936 .num_default_regs = ARRAY_SIZE(sx9310_default_regs),
939 .read_prox_data = sx9310_read_prox_data,
940 .check_whoami = sx9310_check_whoami,
941 .init_compensation = sx9310_init_compensation,
942 .wait_for_sample = sx9310_wait_for_sample,
943 .get_default_reg = sx9310_get_default_reg,
946 .iio_channels = sx9310_channels,
947 .num_iio_channels = ARRAY_SIZE(sx9310_channels),
949 .read_raw = sx9310_read_raw,
950 .read_avail = sx9310_read_avail,
951 .read_event_value = sx9310_read_event_val,
952 .write_event_value = sx9310_write_event_val,
953 .write_raw = sx9310_write_raw,
954 .read_event_config = sx_common_read_event_config,
955 .write_event_config = sx_common_write_event_config,
959 static int sx9310_probe(struct i2c_client *client)
961 return sx_common_probe(client, &sx9310_chip_info, &sx9310_regmap_config);
964 static int sx9310_suspend(struct device *dev)
966 struct sx_common_data *data = iio_priv(dev_get_drvdata(dev));
970 disable_irq_nosync(data->client->irq);
972 mutex_lock(&data->mutex);
973 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0,
974 &data->suspend_ctrl);
978 ctrl0 = data->suspend_ctrl & ~SX9310_REG_PROX_CTRL0_SENSOREN_MASK;
979 ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);
983 ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 0);
986 mutex_unlock(&data->mutex);
990 static int sx9310_resume(struct device *dev)
992 struct sx_common_data *data = iio_priv(dev_get_drvdata(dev));
995 mutex_lock(&data->mutex);
996 ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 1);
1000 ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0,
1001 data->suspend_ctrl);
1004 mutex_unlock(&data->mutex);
1008 enable_irq(data->client->irq);
1012 static DEFINE_SIMPLE_DEV_PM_OPS(sx9310_pm_ops, sx9310_suspend, sx9310_resume);
1014 static const struct sx931x_info sx9310_info = {
1016 .whoami = SX9310_WHOAMI_VALUE,
1019 static const struct sx931x_info sx9311_info = {
1021 .whoami = SX9311_WHOAMI_VALUE,
1024 static const struct acpi_device_id sx9310_acpi_match[] = {
1025 { "STH9310", (kernel_ulong_t)&sx9310_info },
1026 { "STH9311", (kernel_ulong_t)&sx9311_info },
1029 MODULE_DEVICE_TABLE(acpi, sx9310_acpi_match);
1031 static const struct of_device_id sx9310_of_match[] = {
1032 { .compatible = "semtech,sx9310", &sx9310_info },
1033 { .compatible = "semtech,sx9311", &sx9311_info },
1036 MODULE_DEVICE_TABLE(of, sx9310_of_match);
1038 static const struct i2c_device_id sx9310_id[] = {
1039 { "sx9310", (kernel_ulong_t)&sx9310_info },
1040 { "sx9311", (kernel_ulong_t)&sx9311_info },
1043 MODULE_DEVICE_TABLE(i2c, sx9310_id);
1045 static struct i2c_driver sx9310_driver = {
1048 .acpi_match_table = sx9310_acpi_match,
1049 .of_match_table = sx9310_of_match,
1050 .pm = pm_sleep_ptr(&sx9310_pm_ops),
1053 * Lots of i2c transfers in probe + over 200 ms waiting in
1054 * sx9310_init_compensation() mean a slow probe; prefer async
1055 * so we don't delay boot if we're builtin to the kernel.
1057 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
1059 .probe = sx9310_probe,
1060 .id_table = sx9310_id,
1062 module_i2c_driver(sx9310_driver);
1064 MODULE_AUTHOR("Gwendal Grignou <gwendal@chromium.org>");
1065 MODULE_AUTHOR("Daniel Campello <campello@chromium.org>");
1066 MODULE_DESCRIPTION("Driver for Semtech SX9310/SX9311 proximity sensor");
1067 MODULE_LICENSE("GPL v2");
1068 MODULE_IMPORT_NS(SEMTECH_PROX);