drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * STMicroelectronics st_lsm6dsx sensor driver
   4  *
   5  * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
   6  * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
   7  * interface standard output.
   8  * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
   9  * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
  10  * +-125/+-245/+-500/+-1000/+-2000 dps
  11  * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
  12  * allowing dynamic batching of sensor data.
  13  * LSM9DSx series is similar but includes an additional magnetometer, handled
  14  * by a different driver.
  15  *
  16  * Supported sensors:
  17  * - LSM6DS3:
  18  *   - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
  19  *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  20  *   - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
  21  *   - FIFO size: 8KB
  22  *
  23  * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C:
  24  *   - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
  25  *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  26  *   - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
  27  *   - FIFO size: 4KB
  28  *
  29  * - LSM6DSO/LSM6DSOX/ASM330LHH/LSM6DSR/ISM330DHCX/LSM6DST/LSM6DSOP:
  30  *   - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416,
  31  *     833
  32  *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  33  *   - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
  34  *   - FIFO size: 3KB
  35  *
  36  * - LSM9DS1/LSM6DS0:
  37  *   - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952
  38  *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  39  *   - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952
  40  *   - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000
  41  *   - FIFO size: 32
  42  *
  43  * Copyright 2016 STMicroelectronics Inc.
  44  *
  45  * Lorenzo Bianconi <lorenzo.bianconi@st.com>
  46  * Denis Ciocca <denis.ciocca@st.com>
  47  */
  48
  49 #include <linux/kernel.h>
  50 #include <linux/module.h>
  51 #include <linux/delay.h>
  52 #include <linux/iio/events.h>
  53 #include <linux/iio/iio.h>
  54 #include <linux/iio/sysfs.h>
  55 #include <linux/interrupt.h>
  56 #include <linux/irq.h>
  57 #include <linux/pm.h>
  58 #include <linux/property.h>
  59 #include <linux/regmap.h>
  60 #include <linux/bitfield.h>
  61
  62 #include <linux/platform_data/st_sensors_pdata.h>
  63
  64 #include "st_lsm6dsx.h"
  65
  66 #define ST_LSM6DSX_REG_WHOAMI_ADDR              0x0f
  67
  68 #define ST_LSM6DSX_TS_SENSITIVITY               25000UL /* 25us */
  69
  70 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
  71         ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
  72         ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
  73         ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
  74         IIO_CHAN_SOFT_TIMESTAMP(3),
  75 };
  76
  77 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
  78         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
  79         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
  80         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
  81         IIO_CHAN_SOFT_TIMESTAMP(3),
  82 };
  83
  84 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
  85         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
  86         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
  87         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
  88         IIO_CHAN_SOFT_TIMESTAMP(3),
  89 };
  90
  91 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
  92         {
  93                 .reset = {
  94                         .addr = 0x22,
  95                         .mask = BIT(0),
  96                 },
  97                 .boot = {
  98                         .addr = 0x22,
  99                         .mask = BIT(7),
 100                 },
 101                 .bdu = {
 102                         .addr = 0x22,
 103                         .mask = BIT(6),
 104                 },
 105                 .max_fifo_size = 32,
 106                 .id = {
 107                         {
 108                                 .hw_id = ST_LSM9DS1_ID,
 109                                 .name = ST_LSM9DS1_DEV_NAME,
 110                                 .wai = 0x68,
 111                         }, {
 112                                 .hw_id = ST_LSM6DS0_ID,
 113                                 .name = ST_LSM6DS0_DEV_NAME,
 114                                 .wai = 0x68,
 115                         },
 116                 },
 117                 .channels = {
 118                         [ST_LSM6DSX_ID_ACC] = {
 119                                 .chan = st_lsm6dsx_acc_channels,
 120                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 121                         },
 122                         [ST_LSM6DSX_ID_GYRO] = {
 123                                 .chan = st_lsm6ds0_gyro_channels,
 124                                 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
 125                         },
 126                 },
 127                 .odr_table = {
 128                         [ST_LSM6DSX_ID_ACC] = {
 129                                 .reg = {
 130                                         .addr = 0x20,
 131                                         .mask = GENMASK(7, 5),
 132                                 },
 133                                 .odr_avl[0] = {  10000, 0x01 },
 134                                 .odr_avl[1] = {  50000, 0x02 },
 135                                 .odr_avl[2] = { 119000, 0x03 },
 136                                 .odr_avl[3] = { 238000, 0x04 },
 137                                 .odr_avl[4] = { 476000, 0x05 },
 138                                 .odr_avl[5] = { 952000, 0x06 },
 139                                 .odr_len = 6,
 140                         },
 141                         [ST_LSM6DSX_ID_GYRO] = {
 142                                 .reg = {
 143                                         .addr = 0x10,
 144                                         .mask = GENMASK(7, 5),
 145                                 },
 146                                 .odr_avl[0] = {  14900, 0x01 },
 147                                 .odr_avl[1] = {  59500, 0x02 },
 148                                 .odr_avl[2] = { 119000, 0x03 },
 149                                 .odr_avl[3] = { 238000, 0x04 },
 150                                 .odr_avl[4] = { 476000, 0x05 },
 151                                 .odr_avl[5] = { 952000, 0x06 },
 152                                 .odr_len = 6,
 153                         },
 154                 },
 155                 .fs_table = {
 156                         [ST_LSM6DSX_ID_ACC] = {
 157                                 .reg = {
 158                                         .addr = 0x20,
 159                                         .mask = GENMASK(4, 3),
 160                                 },
 161                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
 162                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
 163                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
 164                                 .fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 },
 165                                 .fs_len = 4,
 166                         },
 167                         [ST_LSM6DSX_ID_GYRO] = {
 168                                 .reg = {
 169                                         .addr = 0x10,
 170                                         .mask = GENMASK(4, 3),
 171                                 },
 172
 173                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
 174                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
 175                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 176                                 .fs_len = 3,
 177                         },
 178                 },
 179                 .irq_config = {
 180                         .irq1 = {
 181                                 .addr = 0x0c,
 182                                 .mask = BIT(3),
 183                         },
 184                         .irq2 = {
 185                                 .addr = 0x0d,
 186                                 .mask = BIT(3),
 187                         },
 188                         .hla = {
 189                                 .addr = 0x22,
 190                                 .mask = BIT(5),
 191                         },
 192                         .od = {
 193                                 .addr = 0x22,
 194                                 .mask = BIT(4),
 195                         },
 196                 },
 197         },
 198         {
 199                 .reset = {
 200                         .addr = 0x12,
 201                         .mask = BIT(0),
 202                 },
 203                 .boot = {
 204                         .addr = 0x12,
 205                         .mask = BIT(7),
 206                 },
 207                 .bdu = {
 208                         .addr = 0x12,
 209                         .mask = BIT(6),
 210                 },
 211                 .max_fifo_size = 1365,
 212                 .id = {
 213                         {
 214                                 .hw_id = ST_LSM6DS3_ID,
 215                                 .name = ST_LSM6DS3_DEV_NAME,
 216                                 .wai = 0x69,
 217                         },
 218                 },
 219                 .channels = {
 220                         [ST_LSM6DSX_ID_ACC] = {
 221                                 .chan = st_lsm6dsx_acc_channels,
 222                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 223                         },
 224                         [ST_LSM6DSX_ID_GYRO] = {
 225                                 .chan = st_lsm6dsx_gyro_channels,
 226                                 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 227                         },
 228                 },
 229                 .odr_table = {
 230                         [ST_LSM6DSX_ID_ACC] = {
 231                                 .reg = {
 232                                         .addr = 0x10,
 233                                         .mask = GENMASK(7, 4),
 234                                 },
 235                                 .odr_avl[0] = {  12500, 0x01 },
 236                                 .odr_avl[1] = {  26000, 0x02 },
 237                                 .odr_avl[2] = {  52000, 0x03 },
 238                                 .odr_avl[3] = { 104000, 0x04 },
 239                                 .odr_avl[4] = { 208000, 0x05 },
 240                                 .odr_avl[5] = { 416000, 0x06 },
 241                                 .odr_len = 6,
 242                         },
 243                         [ST_LSM6DSX_ID_GYRO] = {
 244                                 .reg = {
 245                                         .addr = 0x11,
 246                                         .mask = GENMASK(7, 4),
 247                                 },
 248                                 .odr_avl[0] = {  12500, 0x01 },
 249                                 .odr_avl[1] = {  26000, 0x02 },
 250                                 .odr_avl[2] = {  52000, 0x03 },
 251                                 .odr_avl[3] = { 104000, 0x04 },
 252                                 .odr_avl[4] = { 208000, 0x05 },
 253                                 .odr_avl[5] = { 416000, 0x06 },
 254                                 .odr_len = 6,
 255                         },
 256                 },
 257                 .fs_table = {
 258                         [ST_LSM6DSX_ID_ACC] = {
 259                                 .reg = {
 260                                         .addr = 0x10,
 261                                         .mask = GENMASK(3, 2),
 262                                 },
 263                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
 264                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
 265                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
 266                                 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 267                                 .fs_len = 4,
 268                         },
 269                         [ST_LSM6DSX_ID_GYRO] = {
 270                                 .reg = {
 271                                         .addr = 0x11,
 272                                         .mask = GENMASK(3, 2),
 273                                 },
 274                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
 275                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
 276                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
 277                                 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 278                                 .fs_len = 4,
 279                         },
 280                 },
 281                 .irq_config = {
 282                         .irq1 = {
 283                                 .addr = 0x0d,
 284                                 .mask = BIT(3),
 285                         },
 286                         .irq2 = {
 287                                 .addr = 0x0e,
 288                                 .mask = BIT(3),
 289                         },
 290                         .lir = {
 291                                 .addr = 0x58,
 292                                 .mask = BIT(0),
 293                         },
 294                         .irq1_func = {
 295                                 .addr = 0x5e,
 296                                 .mask = BIT(5),
 297                         },
 298                         .irq2_func = {
 299                                 .addr = 0x5f,
 300                                 .mask = BIT(5),
 301                         },
 302                         .hla = {
 303                                 .addr = 0x12,
 304                                 .mask = BIT(5),
 305                         },
 306                         .od = {
 307                                 .addr = 0x12,
 308                                 .mask = BIT(4),
 309                         },
 310                 },
 311                 .decimator = {
 312                         [ST_LSM6DSX_ID_ACC] = {
 313                                 .addr = 0x08,
 314                                 .mask = GENMASK(2, 0),
 315                         },
 316                         [ST_LSM6DSX_ID_GYRO] = {
 317                                 .addr = 0x08,
 318                                 .mask = GENMASK(5, 3),
 319                         },
 320                 },
 321                 .fifo_ops = {
 322                         .update_fifo = st_lsm6dsx_update_fifo,
 323                         .read_fifo = st_lsm6dsx_read_fifo,
 324                         .fifo_th = {
 325                                 .addr = 0x06,
 326                                 .mask = GENMASK(11, 0),
 327                         },
 328                         .fifo_diff = {
 329                                 .addr = 0x3a,
 330                                 .mask = GENMASK(11, 0),
 331                         },
 332                         .th_wl = 3, /* 1LSB = 2B */
 333                 },
 334                 .ts_settings = {
 335                         .timer_en = {
 336                                 .addr = 0x58,
 337                                 .mask = BIT(7),
 338                         },
 339                         .hr_timer = {
 340                                 .addr = 0x5c,
 341                                 .mask = BIT(4),
 342                         },
 343                         .fifo_en = {
 344                                 .addr = 0x07,
 345                                 .mask = BIT(7),
 346                         },
 347                         .decimator = {
 348                                 .addr = 0x09,
 349                                 .mask = GENMASK(5, 3),
 350                         },
 351                 },
 352                 .event_settings = {
 353                         .wakeup_reg = {
 354                                 .addr = 0x5B,
 355                                 .mask = GENMASK(5, 0),
 356                         },
 357                         .wakeup_src_reg = 0x1b,
 358                         .wakeup_src_status_mask = BIT(3),
 359                         .wakeup_src_z_mask = BIT(0),
 360                         .wakeup_src_y_mask = BIT(1),
 361                         .wakeup_src_x_mask = BIT(2),
 362                 },
 363         },
 364         {
 365                 .reset = {
 366                         .addr = 0x12,
 367                         .mask = BIT(0),
 368                 },
 369                 .boot = {
 370                         .addr = 0x12,
 371                         .mask = BIT(7),
 372                 },
 373                 .bdu = {
 374                         .addr = 0x12,
 375                         .mask = BIT(6),
 376                 },
 377                 .max_fifo_size = 682,
 378                 .id = {
 379                         {
 380                                 .hw_id = ST_LSM6DS3H_ID,
 381                                 .name = ST_LSM6DS3H_DEV_NAME,
 382                                 .wai = 0x69,
 383                         },
 384                 },
 385                 .channels = {
 386                         [ST_LSM6DSX_ID_ACC] = {
 387                                 .chan = st_lsm6dsx_acc_channels,
 388                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 389                         },
 390                         [ST_LSM6DSX_ID_GYRO] = {
 391                                 .chan = st_lsm6dsx_gyro_channels,
 392                                 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 393                         },
 394                 },
 395                 .odr_table = {
 396                         [ST_LSM6DSX_ID_ACC] = {
 397                                 .reg = {
 398                                         .addr = 0x10,
 399                                         .mask = GENMASK(7, 4),
 400                                 },
 401                                 .odr_avl[0] = {  12500, 0x01 },
 402                                 .odr_avl[1] = {  26000, 0x02 },
 403                                 .odr_avl[2] = {  52000, 0x03 },
 404                                 .odr_avl[3] = { 104000, 0x04 },
 405                                 .odr_avl[4] = { 208000, 0x05 },
 406                                 .odr_avl[5] = { 416000, 0x06 },
 407                                 .odr_len = 6,
 408                         },
 409                         [ST_LSM6DSX_ID_GYRO] = {
 410                                 .reg = {
 411                                         .addr = 0x11,
 412                                         .mask = GENMASK(7, 4),
 413                                 },
 414                                 .odr_avl[0] = {  12500, 0x01 },
 415                                 .odr_avl[1] = {  26000, 0x02 },
 416                                 .odr_avl[2] = {  52000, 0x03 },
 417                                 .odr_avl[3] = { 104000, 0x04 },
 418                                 .odr_avl[4] = { 208000, 0x05 },
 419                                 .odr_avl[5] = { 416000, 0x06 },
 420                                 .odr_len = 6,
 421                         },
 422                 },
 423                 .fs_table = {
 424                         [ST_LSM6DSX_ID_ACC] = {
 425                                 .reg = {
 426                                         .addr = 0x10,
 427                                         .mask = GENMASK(3, 2),
 428                                 },
 429                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
 430                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
 431                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
 432                                 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 433                                 .fs_len = 4,
 434                         },
 435                         [ST_LSM6DSX_ID_GYRO] = {
 436                                 .reg = {
 437                                         .addr = 0x11,
 438                                         .mask = GENMASK(3, 2),
 439                                 },
 440                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
 441                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
 442                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
 443                                 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 444                                 .fs_len = 4,
 445                         },
 446                 },
 447                 .irq_config = {
 448                         .irq1 = {
 449                                 .addr = 0x0d,
 450                                 .mask = BIT(3),
 451                         },
 452                         .irq2 = {
 453                                 .addr = 0x0e,
 454                                 .mask = BIT(3),
 455                         },
 456                         .lir = {
 457                                 .addr = 0x58,
 458                                 .mask = BIT(0),
 459                         },
 460                         .irq1_func = {
 461                                 .addr = 0x5e,
 462                                 .mask = BIT(5),
 463                         },
 464                         .irq2_func = {
 465                                 .addr = 0x5f,
 466                                 .mask = BIT(5),
 467                         },
 468                         .hla = {
 469                                 .addr = 0x12,
 470                                 .mask = BIT(5),
 471                         },
 472                         .od = {
 473                                 .addr = 0x12,
 474                                 .mask = BIT(4),
 475                         },
 476                 },
 477                 .decimator = {
 478                         [ST_LSM6DSX_ID_ACC] = {
 479                                 .addr = 0x08,
 480                                 .mask = GENMASK(2, 0),
 481                         },
 482                         [ST_LSM6DSX_ID_GYRO] = {
 483                                 .addr = 0x08,
 484                                 .mask = GENMASK(5, 3),
 485                         },
 486                 },
 487                 .fifo_ops = {
 488                         .update_fifo = st_lsm6dsx_update_fifo,
 489                         .read_fifo = st_lsm6dsx_read_fifo,
 490                         .fifo_th = {
 491                                 .addr = 0x06,
 492                                 .mask = GENMASK(11, 0),
 493                         },
 494                         .fifo_diff = {
 495                                 .addr = 0x3a,
 496                                 .mask = GENMASK(11, 0),
 497                         },
 498                         .th_wl = 3, /* 1LSB = 2B */
 499                 },
 500                 .ts_settings = {
 501                         .timer_en = {
 502                                 .addr = 0x58,
 503                                 .mask = BIT(7),
 504                         },
 505                         .hr_timer = {
 506                                 .addr = 0x5c,
 507                                 .mask = BIT(4),
 508                         },
 509                         .fifo_en = {
 510                                 .addr = 0x07,
 511                                 .mask = BIT(7),
 512                         },
 513                         .decimator = {
 514                                 .addr = 0x09,
 515                                 .mask = GENMASK(5, 3),
 516                         },
 517                 },
 518                 .event_settings = {
 519                         .wakeup_reg = {
 520                                 .addr = 0x5B,
 521                                 .mask = GENMASK(5, 0),
 522                         },
 523                         .wakeup_src_reg = 0x1b,
 524                         .wakeup_src_status_mask = BIT(3),
 525                         .wakeup_src_z_mask = BIT(0),
 526                         .wakeup_src_y_mask = BIT(1),
 527                         .wakeup_src_x_mask = BIT(2),
 528                 },
 529         },
 530         {
 531                 .reset = {
 532                         .addr = 0x12,
 533                         .mask = BIT(0),
 534                 },
 535                 .boot = {
 536                         .addr = 0x12,
 537                         .mask = BIT(7),
 538                 },
 539                 .bdu = {
 540                         .addr = 0x12,
 541                         .mask = BIT(6),
 542                 },
 543                 .max_fifo_size = 682,
 544                 .id = {
 545                         {
 546                                 .hw_id = ST_LSM6DSL_ID,
 547                                 .name = ST_LSM6DSL_DEV_NAME,
 548                                 .wai = 0x6a,
 549                         }, {
 550                                 .hw_id = ST_LSM6DSM_ID,
 551                                 .name = ST_LSM6DSM_DEV_NAME,
 552                                 .wai = 0x6a,
 553                         }, {
 554                                 .hw_id = ST_ISM330DLC_ID,
 555                                 .name = ST_ISM330DLC_DEV_NAME,
 556                                 .wai = 0x6a,
 557                         }, {
 558                                 .hw_id = ST_LSM6DS3TRC_ID,
 559                                 .name = ST_LSM6DS3TRC_DEV_NAME,
 560                                 .wai = 0x6a,
 561                         },
 562                 },
 563                 .channels = {
 564                         [ST_LSM6DSX_ID_ACC] = {
 565                                 .chan = st_lsm6dsx_acc_channels,
 566                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 567                         },
 568                         [ST_LSM6DSX_ID_GYRO] = {
 569                                 .chan = st_lsm6dsx_gyro_channels,
 570                                 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 571                         },
 572                 },
 573                 .odr_table = {
 574                         [ST_LSM6DSX_ID_ACC] = {
 575                                 .reg = {
 576                                         .addr = 0x10,
 577                                         .mask = GENMASK(7, 4),
 578                                 },
 579                                 .odr_avl[0] = {  12500, 0x01 },
 580                                 .odr_avl[1] = {  26000, 0x02 },
 581                                 .odr_avl[2] = {  52000, 0x03 },
 582                                 .odr_avl[3] = { 104000, 0x04 },
 583                                 .odr_avl[4] = { 208000, 0x05 },
 584                                 .odr_avl[5] = { 416000, 0x06 },
 585                                 .odr_len = 6,
 586                         },
 587                         [ST_LSM6DSX_ID_GYRO] = {
 588                                 .reg = {
 589                                         .addr = 0x11,
 590                                         .mask = GENMASK(7, 4),
 591                                 },
 592                                 .odr_avl[0] = {  12500, 0x01 },
 593                                 .odr_avl[1] = {  26000, 0x02 },
 594                                 .odr_avl[2] = {  52000, 0x03 },
 595                                 .odr_avl[3] = { 104000, 0x04 },
 596                                 .odr_avl[4] = { 208000, 0x05 },
 597                                 .odr_avl[5] = { 416000, 0x06 },
 598                                 .odr_len = 6,
 599                         },
 600                 },
 601                 .fs_table = {
 602                         [ST_LSM6DSX_ID_ACC] = {
 603                                 .reg = {
 604                                         .addr = 0x10,
 605                                         .mask = GENMASK(3, 2),
 606                                 },
 607                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
 608                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
 609                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
 610                                 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 611                                 .fs_len = 4,
 612                         },
 613                         [ST_LSM6DSX_ID_GYRO] = {
 614                                 .reg = {
 615                                         .addr = 0x11,
 616                                         .mask = GENMASK(3, 2),
 617                                 },
 618                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
 619                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
 620                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
 621                                 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 622                                 .fs_len = 4,
 623                         },
 624                 },
 625                 .irq_config = {
 626                         .irq1 = {
 627                                 .addr = 0x0d,
 628                                 .mask = BIT(3),
 629                         },
 630                         .irq2 = {
 631                                 .addr = 0x0e,
 632                                 .mask = BIT(3),
 633                         },
 634                         .lir = {
 635                                 .addr = 0x58,
 636                                 .mask = BIT(0),
 637                         },
 638                         .irq1_func = {
 639                                 .addr = 0x5e,
 640                                 .mask = BIT(5),
 641                         },
 642                         .irq2_func = {
 643                                 .addr = 0x5f,
 644                                 .mask = BIT(5),
 645                         },
 646                         .hla = {
 647                                 .addr = 0x12,
 648                                 .mask = BIT(5),
 649                         },
 650                         .od = {
 651                                 .addr = 0x12,
 652                                 .mask = BIT(4),
 653                         },
 654                 },
 655                 .decimator = {
 656                         [ST_LSM6DSX_ID_ACC] = {
 657                                 .addr = 0x08,
 658                                 .mask = GENMASK(2, 0),
 659                         },
 660                         [ST_LSM6DSX_ID_GYRO] = {
 661                                 .addr = 0x08,
 662                                 .mask = GENMASK(5, 3),
 663                         },
 664                         [ST_LSM6DSX_ID_EXT0] = {
 665                                 .addr = 0x09,
 666                                 .mask = GENMASK(2, 0),
 667                         },
 668                 },
 669                 .fifo_ops = {
 670                         .update_fifo = st_lsm6dsx_update_fifo,
 671                         .read_fifo = st_lsm6dsx_read_fifo,
 672                         .fifo_th = {
 673                                 .addr = 0x06,
 674                                 .mask = GENMASK(10, 0),
 675                         },
 676                         .fifo_diff = {
 677                                 .addr = 0x3a,
 678                                 .mask = GENMASK(10, 0),
 679                         },
 680                         .th_wl = 3, /* 1LSB = 2B */
 681                 },
 682                 .ts_settings = {
 683                         .timer_en = {
 684                                 .addr = 0x19,
 685                                 .mask = BIT(5),
 686                         },
 687                         .hr_timer = {
 688                                 .addr = 0x5c,
 689                                 .mask = BIT(4),
 690                         },
 691                         .fifo_en = {
 692                                 .addr = 0x07,
 693                                 .mask = BIT(7),
 694                         },
 695                         .decimator = {
 696                                 .addr = 0x09,
 697                                 .mask = GENMASK(5, 3),
 698                         },
 699                 },
 700                 .shub_settings = {
 701                         .page_mux = {
 702                                 .addr = 0x01,
 703                                 .mask = BIT(7),
 704                         },
 705                         .master_en = {
 706                                 .addr = 0x1a,
 707                                 .mask = BIT(0),
 708                         },
 709                         .pullup_en = {
 710                                 .addr = 0x1a,
 711                                 .mask = BIT(3),
 712                         },
 713                         .aux_sens = {
 714                                 .addr = 0x04,
 715                                 .mask = GENMASK(5, 4),
 716                         },
 717                         .wr_once = {
 718                                 .addr = 0x07,
 719                                 .mask = BIT(5),
 720                         },
 721                         .emb_func = {
 722                                 .addr = 0x19,
 723                                 .mask = BIT(2),
 724                         },
 725                         .num_ext_dev = 1,
 726                         .shub_out = {
 727                                 .addr = 0x2e,
 728                         },
 729                         .slv0_addr = 0x02,
 730                         .dw_slv0_addr = 0x0e,
 731                         .pause = 0x7,
 732                 },
 733                 .event_settings = {
 734                         .enable_reg = {
 735                                 .addr = 0x58,
 736                                 .mask = BIT(7),
 737                         },
 738                         .wakeup_reg = {
 739                                 .addr = 0x5B,
 740                                 .mask = GENMASK(5, 0),
 741                         },
 742                         .wakeup_src_reg = 0x1b,
 743                         .wakeup_src_status_mask = BIT(3),
 744                         .wakeup_src_z_mask = BIT(0),
 745                         .wakeup_src_y_mask = BIT(1),
 746                         .wakeup_src_x_mask = BIT(2),
 747                 },
 748         },
 749         {
 750                 .reset = {
 751                         .addr = 0x12,
 752                         .mask = BIT(0),
 753                 },
 754                 .boot = {
 755                         .addr = 0x12,
 756                         .mask = BIT(7),
 757                 },
 758                 .bdu = {
 759                         .addr = 0x12,
 760                         .mask = BIT(6),
 761                 },
 762                 .max_fifo_size = 512,
 763                 .id = {
 764                         {
 765                                 .hw_id = ST_LSM6DSR_ID,
 766                                 .name = ST_LSM6DSR_DEV_NAME,
 767                                 .wai = 0x6b,
 768                         }, {
 769                                 .hw_id = ST_ISM330DHCX_ID,
 770                                 .name = ST_ISM330DHCX_DEV_NAME,
 771                                 .wai = 0x6b,
 772                         }, {
 773                                 .hw_id = ST_LSM6DSRX_ID,
 774                                 .name = ST_LSM6DSRX_DEV_NAME,
 775                                 .wai = 0x6b,
 776                         }, {
 777                                 .hw_id = ST_LSM6DSO_ID,
 778                                 .name = ST_LSM6DSO_DEV_NAME,
 779                                 .wai = 0x6c,
 780                         }, {
 781                                 .hw_id = ST_LSM6DSOX_ID,
 782                                 .name = ST_LSM6DSOX_DEV_NAME,
 783                                 .wai = 0x6c,
 784                         }, {
 785                                 .hw_id = ST_LSM6DST_ID,
 786                                 .name = ST_LSM6DST_DEV_NAME,
 787                                 .wai = 0x6d,
 788                         },
 789                 },
 790                 .channels = {
 791                         [ST_LSM6DSX_ID_ACC] = {
 792                                 .chan = st_lsm6dsx_acc_channels,
 793                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 794                         },
 795                         [ST_LSM6DSX_ID_GYRO] = {
 796                                 .chan = st_lsm6dsx_gyro_channels,
 797                                 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 798                         },
 799                 },
 800                 .drdy_mask = {
 801                         .addr = 0x13,
 802                         .mask = BIT(3),
 803                 },
 804                 .odr_table = {
 805                         [ST_LSM6DSX_ID_ACC] = {
 806                                 .reg = {
 807                                         .addr = 0x10,
 808                                         .mask = GENMASK(7, 4),
 809                                 },
 810                                 .odr_avl[0] = {  12500, 0x01 },
 811                                 .odr_avl[1] = {  26000, 0x02 },
 812                                 .odr_avl[2] = {  52000, 0x03 },
 813                                 .odr_avl[3] = { 104000, 0x04 },
 814                                 .odr_avl[4] = { 208000, 0x05 },
 815                                 .odr_avl[5] = { 416000, 0x06 },
 816                                 .odr_avl[6] = { 833000, 0x07 },
 817                                 .odr_len = 7,
 818                         },
 819                         [ST_LSM6DSX_ID_GYRO] = {
 820                                 .reg = {
 821                                         .addr = 0x11,
 822                                         .mask = GENMASK(7, 4),
 823                                 },
 824                                 .odr_avl[0] = {  12500, 0x01 },
 825                                 .odr_avl[1] = {  26000, 0x02 },
 826                                 .odr_avl[2] = {  52000, 0x03 },
 827                                 .odr_avl[3] = { 104000, 0x04 },
 828                                 .odr_avl[4] = { 208000, 0x05 },
 829                                 .odr_avl[5] = { 416000, 0x06 },
 830                                 .odr_avl[6] = { 833000, 0x07 },
 831                                 .odr_len = 7,
 832                         },
 833                 },
 834                 .fs_table = {
 835                         [ST_LSM6DSX_ID_ACC] = {
 836                                 .reg = {
 837                                         .addr = 0x10,
 838                                         .mask = GENMASK(3, 2),
 839                                 },
 840                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
 841                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
 842                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
 843                                 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 844                                 .fs_len = 4,
 845                         },
 846                         [ST_LSM6DSX_ID_GYRO] = {
 847                                 .reg = {
 848                                         .addr = 0x11,
 849                                         .mask = GENMASK(3, 2),
 850                                 },
 851                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
 852                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
 853                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
 854                                 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 855                                 .fs_len = 4,
 856                         },
 857                 },
 858                 .irq_config = {
 859                         .irq1 = {
 860                                 .addr = 0x0d,
 861                                 .mask = BIT(3),
 862                         },
 863                         .irq2 = {
 864                                 .addr = 0x0e,
 865                                 .mask = BIT(3),
 866                         },
 867                         .lir = {
 868                                 .addr = 0x56,
 869                                 .mask = BIT(0),
 870                         },
 871                         .clear_on_read = {
 872                                 .addr = 0x56,
 873                                 .mask = BIT(6),
 874                         },
 875                         .irq1_func = {
 876                                 .addr = 0x5e,
 877                                 .mask = BIT(5),
 878                         },
 879                         .irq2_func = {
 880                                 .addr = 0x5f,
 881                                 .mask = BIT(5),
 882                         },
 883                         .hla = {
 884                                 .addr = 0x12,
 885                                 .mask = BIT(5),
 886                         },
 887                         .od = {
 888                                 .addr = 0x12,
 889                                 .mask = BIT(4),
 890                         },
 891                 },
 892                 .batch = {
 893                         [ST_LSM6DSX_ID_ACC] = {
 894                                 .addr = 0x09,
 895                                 .mask = GENMASK(3, 0),
 896                         },
 897                         [ST_LSM6DSX_ID_GYRO] = {
 898                                 .addr = 0x09,
 899                                 .mask = GENMASK(7, 4),
 900                         },
 901                 },
 902                 .fifo_ops = {
 903                         .update_fifo = st_lsm6dsx_update_fifo,
 904                         .read_fifo = st_lsm6dsx_read_tagged_fifo,
 905                         .fifo_th = {
 906                                 .addr = 0x07,
 907                                 .mask = GENMASK(8, 0),
 908                         },
 909                         .fifo_diff = {
 910                                 .addr = 0x3a,
 911                                 .mask = GENMASK(9, 0),
 912                         },
 913                         .th_wl = 1,
 914                 },
 915                 .ts_settings = {
 916                         .timer_en = {
 917                                 .addr = 0x19,
 918                                 .mask = BIT(5),
 919                         },
 920                         .decimator = {
 921                                 .addr = 0x0a,
 922                                 .mask = GENMASK(7, 6),
 923                         },
 924                         .freq_fine = 0x63,
 925                 },
 926                 .shub_settings = {
 927                         .page_mux = {
 928                                 .addr = 0x01,
 929                                 .mask = BIT(6),
 930                         },
 931                         .master_en = {
 932                                 .sec_page = true,
 933                                 .addr = 0x14,
 934                                 .mask = BIT(2),
 935                         },
 936                         .pullup_en = {
 937                                 .sec_page = true,
 938                                 .addr = 0x14,
 939                                 .mask = BIT(3),
 940                         },
 941                         .aux_sens = {
 942                                 .addr = 0x14,
 943                                 .mask = GENMASK(1, 0),
 944                         },
 945                         .wr_once = {
 946                                 .addr = 0x14,
 947                                 .mask = BIT(6),
 948                         },
 949                         .num_ext_dev = 3,
 950                         .shub_out = {
 951                                 .sec_page = true,
 952                                 .addr = 0x02,
 953                         },
 954                         .slv0_addr = 0x15,
 955                         .dw_slv0_addr = 0x21,
 956                         .batch_en = BIT(3),
 957                 },
 958                 .event_settings = {
 959                         .enable_reg = {
 960                                 .addr = 0x58,
 961                                 .mask = BIT(7),
 962                         },
 963                         .wakeup_reg = {
 964                                 .addr = 0x5b,
 965                                 .mask = GENMASK(5, 0),
 966                         },
 967                         .wakeup_src_reg = 0x1b,
 968                         .wakeup_src_status_mask = BIT(3),
 969                         .wakeup_src_z_mask = BIT(0),
 970                         .wakeup_src_y_mask = BIT(1),
 971                         .wakeup_src_x_mask = BIT(2),
 972                 },
 973         },
 974         {
 975                 .reset = {
 976                         .addr = 0x12,
 977                         .mask = BIT(0),
 978                 },
 979                 .boot = {
 980                         .addr = 0x12,
 981                         .mask = BIT(7),
 982                 },
 983                 .bdu = {
 984                         .addr = 0x12,
 985                         .mask = BIT(6),
 986                 },
 987                 .max_fifo_size = 512,
 988                 .id = {
 989                         {
 990                                 .hw_id = ST_ASM330LHH_ID,
 991                                 .name = ST_ASM330LHH_DEV_NAME,
 992                                 .wai = 0x6b,
 993                         }, {
 994                                 .hw_id = ST_LSM6DSOP_ID,
 995                                 .name = ST_LSM6DSOP_DEV_NAME,
 996                                 .wai = 0x6c,
 997                         },
 998                 },
 999                 .channels = {
1000                         [ST_LSM6DSX_ID_ACC] = {
1001                                 .chan = st_lsm6dsx_acc_channels,
1002                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1003                         },
1004                         [ST_LSM6DSX_ID_GYRO] = {
1005                                 .chan = st_lsm6dsx_gyro_channels,
1006                                 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1007                         },
1008                 },
1009                 .drdy_mask = {
1010                         .addr = 0x13,
1011                         .mask = BIT(3),
1012                 },
1013                 .odr_table = {
1014                         [ST_LSM6DSX_ID_ACC] = {
1015                                 .reg = {
1016                                         .addr = 0x10,
1017                                         .mask = GENMASK(7, 4),
1018                                 },
1019                                 .odr_avl[0] = {  12500, 0x01 },
1020                                 .odr_avl[1] = {  26000, 0x02 },
1021                                 .odr_avl[2] = {  52000, 0x03 },
1022                                 .odr_avl[3] = { 104000, 0x04 },
1023                                 .odr_avl[4] = { 208000, 0x05 },
1024                                 .odr_avl[5] = { 416000, 0x06 },
1025                                 .odr_avl[6] = { 833000, 0x07 },
1026                                 .odr_len = 7,
1027                         },
1028                         [ST_LSM6DSX_ID_GYRO] = {
1029                                 .reg = {
1030                                         .addr = 0x11,
1031                                         .mask = GENMASK(7, 4),
1032                                 },
1033                                 .odr_avl[0] = {  12500, 0x01 },
1034                                 .odr_avl[1] = {  26000, 0x02 },
1035                                 .odr_avl[2] = {  52000, 0x03 },
1036                                 .odr_avl[3] = { 104000, 0x04 },
1037                                 .odr_avl[4] = { 208000, 0x05 },
1038                                 .odr_avl[5] = { 416000, 0x06 },
1039                                 .odr_avl[6] = { 833000, 0x07 },
1040                                 .odr_len = 7,
1041                         },
1042                 },
1043                 .fs_table = {
1044                         [ST_LSM6DSX_ID_ACC] = {
1045                                 .reg = {
1046                                         .addr = 0x10,
1047                                         .mask = GENMASK(3, 2),
1048                                 },
1049                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
1050                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1051                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1052                                 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1053                                 .fs_len = 4,
1054                         },
1055                         [ST_LSM6DSX_ID_GYRO] = {
1056                                 .reg = {
1057                                         .addr = 0x11,
1058                                         .mask = GENMASK(3, 2),
1059                                 },
1060                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
1061                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1062                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1063                                 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1064                                 .fs_len = 4,
1065                         },
1066                 },
1067                 .irq_config = {
1068                         .irq1 = {
1069                                 .addr = 0x0d,
1070                                 .mask = BIT(3),
1071                         },
1072                         .irq2 = {
1073                                 .addr = 0x0e,
1074                                 .mask = BIT(3),
1075                         },
1076                         .lir = {
1077                                 .addr = 0x56,
1078                                 .mask = BIT(0),
1079                         },
1080                         .clear_on_read = {
1081                                 .addr = 0x56,
1082                                 .mask = BIT(6),
1083                         },
1084                         .irq1_func = {
1085                                 .addr = 0x5e,
1086                                 .mask = BIT(5),
1087                         },
1088                         .irq2_func = {
1089                                 .addr = 0x5f,
1090                                 .mask = BIT(5),
1091                         },
1092                         .hla = {
1093                                 .addr = 0x12,
1094                                 .mask = BIT(5),
1095                         },
1096                         .od = {
1097                                 .addr = 0x12,
1098                                 .mask = BIT(4),
1099                         },
1100                 },
1101                 .batch = {
1102                         [ST_LSM6DSX_ID_ACC] = {
1103                                 .addr = 0x09,
1104                                 .mask = GENMASK(3, 0),
1105                         },
1106                         [ST_LSM6DSX_ID_GYRO] = {
1107                                 .addr = 0x09,
1108                                 .mask = GENMASK(7, 4),
1109                         },
1110                 },
1111                 .fifo_ops = {
1112                         .update_fifo = st_lsm6dsx_update_fifo,
1113                         .read_fifo = st_lsm6dsx_read_tagged_fifo,
1114                         .fifo_th = {
1115                                 .addr = 0x07,
1116                                 .mask = GENMASK(8, 0),
1117                         },
1118                         .fifo_diff = {
1119                                 .addr = 0x3a,
1120                                 .mask = GENMASK(9, 0),
1121                         },
1122                         .th_wl = 1,
1123                 },
1124                 .ts_settings = {
1125                         .timer_en = {
1126                                 .addr = 0x19,
1127                                 .mask = BIT(5),
1128                         },
1129                         .decimator = {
1130                                 .addr = 0x0a,
1131                                 .mask = GENMASK(7, 6),
1132                         },
1133                         .freq_fine = 0x63,
1134                 },
1135                 .event_settings = {
1136                         .enable_reg = {
1137                                 .addr = 0x58,
1138                                 .mask = BIT(7),
1139                         },
1140                         .wakeup_reg = {
1141                                 .addr = 0x5B,
1142                                 .mask = GENMASK(5, 0),
1143                         },
1144                         .wakeup_src_reg = 0x1b,
1145                         .wakeup_src_status_mask = BIT(3),
1146                         .wakeup_src_z_mask = BIT(0),
1147                         .wakeup_src_y_mask = BIT(1),
1148                         .wakeup_src_x_mask = BIT(2),
1149                 },
1150         },
1151 };
1152
1153 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
1154 {
1155         const struct st_lsm6dsx_shub_settings *hub_settings;
1156         unsigned int data;
1157         int err;
1158
1159         hub_settings = &hw->settings->shub_settings;
1160         data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
1161         err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
1162                                  hub_settings->page_mux.mask, data);
1163         usleep_range(100, 150);
1164
1165         return err;
1166 }
1167
1168 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
1169                                    const char **name)
1170 {
1171         int err, i, j, data;
1172
1173         for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
1174                 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
1175                         if (st_lsm6dsx_sensor_settings[i].id[j].name &&
1176                             id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
1177                                 break;
1178                 }
1179                 if (j < ST_LSM6DSX_MAX_ID)
1180                         break;
1181         }
1182
1183         if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
1184                 dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
1185                 return -ENODEV;
1186         }
1187
1188         err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
1189         if (err < 0) {
1190                 dev_err(hw->dev, "failed to read whoami register\n");
1191                 return err;
1192         }
1193
1194         if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) {
1195                 dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
1196                 return -ENODEV;
1197         }
1198
1199         *name = st_lsm6dsx_sensor_settings[i].id[j].name;
1200         hw->settings = &st_lsm6dsx_sensor_settings[i];
1201
1202         return 0;
1203 }
1204
1205 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
1206                                      u32 gain)
1207 {
1208         const struct st_lsm6dsx_fs_table_entry *fs_table;
1209         unsigned int data;
1210         int i, err;
1211
1212         fs_table = &sensor->hw->settings->fs_table[sensor->id];
1213         for (i = 0; i < fs_table->fs_len; i++) {
1214                 if (fs_table->fs_avl[i].gain == gain)
1215                         break;
1216         }
1217
1218         if (i == fs_table->fs_len)
1219                 return -EINVAL;
1220
1221         data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
1222                                     fs_table->reg.mask);
1223         err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
1224                                             fs_table->reg.mask, data);
1225         if (err < 0)
1226                 return err;
1227
1228         sensor->gain = gain;
1229
1230         return 0;
1231 }
1232
1233 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val)
1234 {
1235         const struct st_lsm6dsx_odr_table_entry *odr_table;
1236         int i;
1237
1238         odr_table = &sensor->hw->settings->odr_table[sensor->id];
1239         for (i = 0; i < odr_table->odr_len; i++) {
1240                 /*
1241                  * ext devices can run at different odr respect to
1242                  * accel sensor
1243                  */
1244                 if (odr_table->odr_avl[i].milli_hz >= odr)
1245                         break;
1246         }
1247
1248         if (i == odr_table->odr_len)
1249                 return -EINVAL;
1250
1251         *val = odr_table->odr_avl[i].val;
1252         return odr_table->odr_avl[i].milli_hz;
1253 }
1254
1255 static int
1256 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr,
1257                                 enum st_lsm6dsx_sensor_id id)
1258 {
1259         struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
1260
1261         if (odr > 0) {
1262                 if (hw->enable_mask & BIT(id))
1263                         return max_t(u32, ref->odr, odr);
1264                 else
1265                         return odr;
1266         } else {
1267                 return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
1268         }
1269 }
1270
1271 static int
1272 st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
1273 {
1274         struct st_lsm6dsx_sensor *ref_sensor = sensor;
1275         struct st_lsm6dsx_hw *hw = sensor->hw;
1276         const struct st_lsm6dsx_reg *reg;
1277         unsigned int data;
1278         u8 val = 0;
1279         int err;
1280
1281         switch (sensor->id) {
1282         case ST_LSM6DSX_ID_GYRO:
1283                 break;
1284         case ST_LSM6DSX_ID_EXT0:
1285         case ST_LSM6DSX_ID_EXT1:
1286         case ST_LSM6DSX_ID_EXT2:
1287         case ST_LSM6DSX_ID_ACC: {
1288                 u32 odr;
1289                 int i;
1290
1291                 /*
1292                  * i2c embedded controller relies on the accelerometer sensor as
1293                  * bus read/write trigger so we need to enable accel device
1294                  * at odr = max(accel_odr, ext_odr) in order to properly
1295                  * communicate with i2c slave devices
1296                  */
1297                 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
1298                 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
1299                         if (!hw->iio_devs[i] || i == sensor->id)
1300                                 continue;
1301
1302                         odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
1303                         if (odr != req_odr)
1304                                 /* device already configured */
1305                                 return 0;
1306                 }
1307                 break;
1308         }
1309         default: /* should never occur */
1310                 return -EINVAL;
1311         }
1312
1313         if (req_odr > 0) {
1314                 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
1315                 if (err < 0)
1316                         return err;
1317         }
1318
1319         reg = &hw->settings->odr_table[ref_sensor->id].reg;
1320         data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1321         return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
1322 }
1323
1324 static int
1325 __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1326                                bool enable)
1327 {
1328         struct st_lsm6dsx_hw *hw = sensor->hw;
1329         u32 odr = enable ? sensor->odr : 0;
1330         int err;
1331
1332         err = st_lsm6dsx_set_odr(sensor, odr);
1333         if (err < 0)
1334                 return err;
1335
1336         if (enable)
1337                 hw->enable_mask |= BIT(sensor->id);
1338         else
1339                 hw->enable_mask &= ~BIT(sensor->id);
1340
1341         return 0;
1342 }
1343
1344 static int
1345 st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable)
1346 {
1347         struct st_lsm6dsx_hw *hw = sensor->hw;
1348
1349         if (sensor->id == ST_LSM6DSX_ID_GYRO || enable)
1350                 return 0;
1351
1352         return hw->enable_event;
1353 }
1354
1355 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1356                                  bool enable)
1357 {
1358         if (st_lsm6dsx_check_events(sensor, enable))
1359                 return 0;
1360
1361         return __st_lsm6dsx_sensor_set_enable(sensor, enable);
1362 }
1363
1364 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
1365                                    u8 addr, int *val)
1366 {
1367         struct st_lsm6dsx_hw *hw = sensor->hw;
1368         int err, delay;
1369         __le16 data;
1370
1371         err = st_lsm6dsx_sensor_set_enable(sensor, true);
1372         if (err < 0)
1373                 return err;
1374
1375         /*
1376          * we need to wait for sensor settling time before
1377          * reading data in order to avoid corrupted samples
1378          */
1379         delay = 1000000000 / sensor->odr;
1380         usleep_range(3 * delay, 4 * delay);
1381
1382         err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
1383         if (err < 0)
1384                 return err;
1385
1386         if (!hw->enable_event) {
1387                 err = st_lsm6dsx_sensor_set_enable(sensor, false);
1388                 if (err < 0)
1389                         return err;
1390         }
1391
1392         *val = (s16)le16_to_cpu(data);
1393
1394         return IIO_VAL_INT;
1395 }
1396
1397 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
1398                                struct iio_chan_spec const *ch,
1399                                int *val, int *val2, long mask)
1400 {
1401         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1402         int ret;
1403
1404         switch (mask) {
1405         case IIO_CHAN_INFO_RAW:
1406                 ret = iio_device_claim_direct_mode(iio_dev);
1407                 if (ret)
1408                         break;
1409
1410                 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
1411                 iio_device_release_direct_mode(iio_dev);
1412                 break;
1413         case IIO_CHAN_INFO_SAMP_FREQ:
1414                 *val = sensor->odr / 1000;
1415                 *val2 = (sensor->odr % 1000) * 1000;
1416                 ret = IIO_VAL_INT_PLUS_MICRO;
1417                 break;
1418         case IIO_CHAN_INFO_SCALE:
1419                 *val = 0;
1420                 *val2 = sensor->gain;
1421                 ret = IIO_VAL_INT_PLUS_NANO;
1422                 break;
1423         default:
1424                 ret = -EINVAL;
1425                 break;
1426         }
1427
1428         return ret;
1429 }
1430
1431 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
1432                                 struct iio_chan_spec const *chan,
1433                                 int val, int val2, long mask)
1434 {
1435         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1436         int err;
1437
1438         err = iio_device_claim_direct_mode(iio_dev);
1439         if (err)
1440                 return err;
1441
1442         switch (mask) {
1443         case IIO_CHAN_INFO_SCALE:
1444                 err = st_lsm6dsx_set_full_scale(sensor, val2);
1445                 break;
1446         case IIO_CHAN_INFO_SAMP_FREQ: {
1447                 u8 data;
1448
1449                 val = val * 1000 + val2 / 1000;
1450                 val = st_lsm6dsx_check_odr(sensor, val, &data);
1451                 if (val < 0)
1452                         err = val;
1453                 else
1454                         sensor->odr = val;
1455                 break;
1456         }
1457         default:
1458                 err = -EINVAL;
1459                 break;
1460         }
1461
1462         iio_device_release_direct_mode(iio_dev);
1463
1464         return err;
1465 }
1466
1467 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state)
1468 {
1469         const struct st_lsm6dsx_reg *reg;
1470         unsigned int data;
1471         int err;
1472
1473         if (!hw->settings->irq_config.irq1_func.addr)
1474                 return -ENOTSUPP;
1475
1476         reg = &hw->settings->event_settings.enable_reg;
1477         if (reg->addr) {
1478                 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask);
1479                 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1480                                                     reg->mask, data);
1481                 if (err < 0)
1482                         return err;
1483         }
1484
1485         /* Enable wakeup interrupt */
1486         data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
1487         return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
1488                                              hw->irq_routing->mask, data);
1489 }
1490
1491 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
1492                                  const struct iio_chan_spec *chan,
1493                                  enum iio_event_type type,
1494                                  enum iio_event_direction dir,
1495                                  enum iio_event_info info,
1496                                  int *val, int *val2)
1497 {
1498         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1499         struct st_lsm6dsx_hw *hw = sensor->hw;
1500
1501         if (type != IIO_EV_TYPE_THRESH)
1502                 return -EINVAL;
1503
1504         *val2 = 0;
1505         *val = hw->event_threshold;
1506
1507         return IIO_VAL_INT;
1508 }
1509
1510 static int
1511 st_lsm6dsx_write_event(struct iio_dev *iio_dev,
1512                        const struct iio_chan_spec *chan,
1513                        enum iio_event_type type,
1514                        enum iio_event_direction dir,
1515                        enum iio_event_info info,
1516                        int val, int val2)
1517 {
1518         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1519         struct st_lsm6dsx_hw *hw = sensor->hw;
1520         const struct st_lsm6dsx_reg *reg;
1521         unsigned int data;
1522         int err;
1523
1524         if (type != IIO_EV_TYPE_THRESH)
1525                 return -EINVAL;
1526
1527         if (val < 0 || val > 31)
1528                 return -EINVAL;
1529
1530         reg = &hw->settings->event_settings.wakeup_reg;
1531         data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1532         err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1533                                             reg->mask, data);
1534         if (err < 0)
1535                 return -EINVAL;
1536
1537         hw->event_threshold = val;
1538
1539         return 0;
1540 }
1541
1542 static int
1543 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev,
1544                              const struct iio_chan_spec *chan,
1545                              enum iio_event_type type,
1546                              enum iio_event_direction dir)
1547 {
1548         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1549         struct st_lsm6dsx_hw *hw = sensor->hw;
1550
1551         if (type != IIO_EV_TYPE_THRESH)
1552                 return -EINVAL;
1553
1554         return !!(hw->enable_event & BIT(chan->channel2));
1555 }
1556
1557 static int
1558 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
1559                               const struct iio_chan_spec *chan,
1560                               enum iio_event_type type,
1561                               enum iio_event_direction dir, int state)
1562 {
1563         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1564         struct st_lsm6dsx_hw *hw = sensor->hw;
1565         u8 enable_event;
1566         int err;
1567
1568         if (type != IIO_EV_TYPE_THRESH)
1569                 return -EINVAL;
1570
1571         if (state) {
1572                 enable_event = hw->enable_event | BIT(chan->channel2);
1573
1574                 /* do not enable events if they are already enabled */
1575                 if (hw->enable_event)
1576                         goto out;
1577         } else {
1578                 enable_event = hw->enable_event & ~BIT(chan->channel2);
1579
1580                 /* only turn off sensor if no events is enabled */
1581                 if (enable_event)
1582                         goto out;
1583         }
1584
1585         /* stop here if no changes have been made */
1586         if (hw->enable_event == enable_event)
1587                 return 0;
1588
1589         err = st_lsm6dsx_event_setup(hw, state);
1590         if (err < 0)
1591                 return err;
1592
1593         mutex_lock(&hw->conf_lock);
1594         if (enable_event || !(hw->fifo_mask & BIT(sensor->id)))
1595                 err = __st_lsm6dsx_sensor_set_enable(sensor, state);
1596         mutex_unlock(&hw->conf_lock);
1597         if (err < 0)
1598                 return err;
1599
1600 out:
1601         hw->enable_event = enable_event;
1602
1603         return 0;
1604 }
1605
1606 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
1607 {
1608         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1609         struct st_lsm6dsx_hw *hw = sensor->hw;
1610         int err;
1611
1612         if (val < 1 || val > hw->settings->max_fifo_size)
1613                 return -EINVAL;
1614
1615         mutex_lock(&hw->conf_lock);
1616
1617         err = st_lsm6dsx_update_watermark(sensor, val);
1618
1619         mutex_unlock(&hw->conf_lock);
1620
1621         if (err < 0)
1622                 return err;
1623
1624         sensor->watermark = val;
1625
1626         return 0;
1627 }
1628
1629 static ssize_t
1630 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
1631                                           struct device_attribute *attr,
1632                                           char *buf)
1633 {
1634         struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
1635         const struct st_lsm6dsx_odr_table_entry *odr_table;
1636         int i, len = 0;
1637
1638         odr_table = &sensor->hw->settings->odr_table[sensor->id];
1639         for (i = 0; i < odr_table->odr_len; i++)
1640                 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ",
1641                                  odr_table->odr_avl[i].milli_hz / 1000,
1642                                  odr_table->odr_avl[i].milli_hz % 1000);
1643         buf[len - 1] = '\n';
1644
1645         return len;
1646 }
1647
1648 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
1649                                             struct device_attribute *attr,
1650                                             char *buf)
1651 {
1652         struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
1653         const struct st_lsm6dsx_fs_table_entry *fs_table;
1654         struct st_lsm6dsx_hw *hw = sensor->hw;
1655         int i, len = 0;
1656
1657         fs_table = &hw->settings->fs_table[sensor->id];
1658         for (i = 0; i < fs_table->fs_len; i++)
1659                 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%09u ",
1660                                  fs_table->fs_avl[i].gain);
1661         buf[len - 1] = '\n';
1662
1663         return len;
1664 }
1665
1666 static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev,
1667                                         struct iio_chan_spec const *chan,
1668                                         long mask)
1669 {
1670         switch (mask) {
1671         case IIO_CHAN_INFO_SCALE:
1672                 switch (chan->type) {
1673                 case IIO_ANGL_VEL:
1674                 case IIO_ACCEL:
1675                         return IIO_VAL_INT_PLUS_NANO;
1676                 default:
1677                         return IIO_VAL_INT_PLUS_MICRO;
1678                 }
1679         default:
1680                 return IIO_VAL_INT_PLUS_MICRO;
1681         }
1682 }
1683
1684 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
1685 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
1686                        st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1687 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
1688                        st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1689
1690 static struct attribute *st_lsm6dsx_acc_attributes[] = {
1691         &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1692         &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
1693         NULL,
1694 };
1695
1696 static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
1697         .attrs = st_lsm6dsx_acc_attributes,
1698 };
1699
1700 static const struct iio_info st_lsm6dsx_acc_info = {
1701         .attrs = &st_lsm6dsx_acc_attribute_group,
1702         .read_raw = st_lsm6dsx_read_raw,
1703         .write_raw = st_lsm6dsx_write_raw,
1704         .read_event_value = st_lsm6dsx_read_event,
1705         .write_event_value = st_lsm6dsx_write_event,
1706         .read_event_config = st_lsm6dsx_read_event_config,
1707         .write_event_config = st_lsm6dsx_write_event_config,
1708         .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1709         .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
1710 };
1711
1712 static struct attribute *st_lsm6dsx_gyro_attributes[] = {
1713         &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1714         &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
1715         NULL,
1716 };
1717
1718 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
1719         .attrs = st_lsm6dsx_gyro_attributes,
1720 };
1721
1722 static const struct iio_info st_lsm6dsx_gyro_info = {
1723         .attrs = &st_lsm6dsx_gyro_attribute_group,
1724         .read_raw = st_lsm6dsx_read_raw,
1725         .write_raw = st_lsm6dsx_write_raw,
1726         .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1727         .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
1728 };
1729
1730 static int st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)
1731 {
1732         struct device *dev = hw->dev;
1733
1734         if (!dev_fwnode(dev))
1735                 return -EINVAL;
1736
1737         return device_property_read_u32(dev, "st,drdy-int-pin", drdy_pin);
1738 }
1739
1740 static int
1741 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
1742                         const struct st_lsm6dsx_reg **drdy_reg)
1743 {
1744         int err = 0, drdy_pin;
1745
1746         if (st_lsm6dsx_get_drdy_pin(hw, &drdy_pin) < 0) {
1747                 struct st_sensors_platform_data *pdata;
1748                 struct device *dev = hw->dev;
1749
1750                 pdata = (struct st_sensors_platform_data *)dev->platform_data;
1751                 drdy_pin = pdata ? pdata->drdy_int_pin : 1;
1752         }
1753
1754         switch (drdy_pin) {
1755         case 1:
1756                 hw->irq_routing = &hw->settings->irq_config.irq1_func;
1757                 *drdy_reg = &hw->settings->irq_config.irq1;
1758                 break;
1759         case 2:
1760                 hw->irq_routing = &hw->settings->irq_config.irq2_func;
1761                 *drdy_reg = &hw->settings->irq_config.irq2;
1762                 break;
1763         default:
1764                 dev_err(hw->dev, "unsupported data ready pin\n");
1765                 err = -EINVAL;
1766                 break;
1767         }
1768
1769         return err;
1770 }
1771
1772 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
1773 {
1774         const struct st_lsm6dsx_shub_settings *hub_settings;
1775         struct st_sensors_platform_data *pdata;
1776         struct device *dev = hw->dev;
1777         unsigned int data;
1778         int err = 0;
1779
1780         hub_settings = &hw->settings->shub_settings;
1781
1782         pdata = (struct st_sensors_platform_data *)dev->platform_data;
1783         if ((dev_fwnode(dev) && device_property_read_bool(dev, "st,pullups")) ||
1784             (pdata && pdata->pullups)) {
1785                 if (hub_settings->pullup_en.sec_page) {
1786                         err = st_lsm6dsx_set_page(hw, true);
1787                         if (err < 0)
1788                                 return err;
1789                 }
1790
1791                 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
1792                 err = regmap_update_bits(hw->regmap,
1793                                          hub_settings->pullup_en.addr,
1794                                          hub_settings->pullup_en.mask, data);
1795
1796                 if (hub_settings->pullup_en.sec_page)
1797                         st_lsm6dsx_set_page(hw, false);
1798
1799                 if (err < 0)
1800                         return err;
1801         }
1802
1803         if (hub_settings->aux_sens.addr) {
1804                 /* configure aux sensors */
1805                 err = st_lsm6dsx_set_page(hw, true);
1806                 if (err < 0)
1807                         return err;
1808
1809                 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
1810                 err = regmap_update_bits(hw->regmap,
1811                                          hub_settings->aux_sens.addr,
1812                                          hub_settings->aux_sens.mask, data);
1813
1814                 st_lsm6dsx_set_page(hw, false);
1815
1816                 if (err < 0)
1817                         return err;
1818         }
1819
1820         if (hub_settings->emb_func.addr) {
1821                 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask);
1822                 err = regmap_update_bits(hw->regmap,
1823                                          hub_settings->emb_func.addr,
1824                                          hub_settings->emb_func.mask, data);
1825         }
1826
1827         return err;
1828 }
1829
1830 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
1831 {
1832         const struct st_lsm6dsx_hw_ts_settings *ts_settings;
1833         int err, val;
1834
1835         ts_settings = &hw->settings->ts_settings;
1836         /* enable hw timestamp generation if necessary */
1837         if (ts_settings->timer_en.addr) {
1838                 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
1839                 err = regmap_update_bits(hw->regmap,
1840                                          ts_settings->timer_en.addr,
1841                                          ts_settings->timer_en.mask, val);
1842                 if (err < 0)
1843                         return err;
1844         }
1845
1846         /* enable high resolution for hw ts timer if necessary */
1847         if (ts_settings->hr_timer.addr) {
1848                 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
1849                 err = regmap_update_bits(hw->regmap,
1850                                          ts_settings->hr_timer.addr,
1851                                          ts_settings->hr_timer.mask, val);
1852                 if (err < 0)
1853                         return err;
1854         }
1855
1856         /* enable ts queueing in FIFO if necessary */
1857         if (ts_settings->fifo_en.addr) {
1858                 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
1859                 err = regmap_update_bits(hw->regmap,
1860                                          ts_settings->fifo_en.addr,
1861                                          ts_settings->fifo_en.mask, val);
1862                 if (err < 0)
1863                         return err;
1864         }
1865
1866         /* calibrate timestamp sensitivity */
1867         hw->ts_gain = ST_LSM6DSX_TS_SENSITIVITY;
1868         if (ts_settings->freq_fine) {
1869                 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val);
1870                 if (err < 0)
1871                         return err;
1872
1873                 /*
1874                  * linearize the AN5192 formula:
1875                  * 1 / (1 + x) ~= 1 - x (Taylor’s Series)
1876                  * ttrim[s] = 1 / (40000 * (1 + 0.0015 * val))
1877                  * ttrim[ns] ~= 25000 - 37.5 * val
1878                  * ttrim[ns] ~= 25000 - (37500 * val) / 1000
1879                  */
1880                 hw->ts_gain -= ((s8)val * 37500) / 1000;
1881         }
1882
1883         return 0;
1884 }
1885
1886 static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
1887 {
1888         const struct st_lsm6dsx_reg *reg;
1889         int err;
1890
1891         /*
1892          * flush hw FIFO before device reset in order to avoid
1893          * possible races on interrupt line 1. If the first interrupt
1894          * line is asserted during hw reset the device will work in
1895          * I3C-only mode (if it is supported)
1896          */
1897         err = st_lsm6dsx_flush_fifo(hw);
1898         if (err < 0 && err != -ENOTSUPP)
1899                 return err;
1900
1901         /* device sw reset */
1902         reg = &hw->settings->reset;
1903         err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1904                                  ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1905         if (err < 0)
1906                 return err;
1907
1908         msleep(50);
1909
1910         /* reload trimming parameter */
1911         reg = &hw->settings->boot;
1912         err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1913                                  ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1914         if (err < 0)
1915                 return err;
1916
1917         msleep(50);
1918
1919         return 0;
1920 }
1921
1922 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
1923 {
1924         const struct st_lsm6dsx_reg *reg;
1925         int err;
1926
1927         err = st_lsm6dsx_reset_device(hw);
1928         if (err < 0)
1929                 return err;
1930
1931         /* enable Block Data Update */
1932         reg = &hw->settings->bdu;
1933         err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1934                                  ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1935         if (err < 0)
1936                 return err;
1937
1938         /* enable FIFO watermak interrupt */
1939         err = st_lsm6dsx_get_drdy_reg(hw, &reg);
1940         if (err < 0)
1941                 return err;
1942
1943         err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1944                                  ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1945         if (err < 0)
1946                 return err;
1947
1948         /* enable Latched interrupts for device events */
1949         if (hw->settings->irq_config.lir.addr) {
1950                 reg = &hw->settings->irq_config.lir;
1951                 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1952                                          ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1953                 if (err < 0)
1954                         return err;
1955
1956                 /* enable clear on read for latched interrupts */
1957                 if (hw->settings->irq_config.clear_on_read.addr) {
1958                         reg = &hw->settings->irq_config.clear_on_read;
1959                         err = regmap_update_bits(hw->regmap,
1960                                         reg->addr, reg->mask,
1961                                         ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1962                         if (err < 0)
1963                                 return err;
1964                 }
1965         }
1966
1967         /* enable drdy-mas if available */
1968         if (hw->settings->drdy_mask.addr) {
1969                 reg = &hw->settings->drdy_mask;
1970                 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1971                                          ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1972                 if (err < 0)
1973                         return err;
1974         }
1975
1976         err = st_lsm6dsx_init_shub(hw);
1977         if (err < 0)
1978                 return err;
1979
1980         return st_lsm6dsx_init_hw_timer(hw);
1981 }
1982
1983 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
1984                                                enum st_lsm6dsx_sensor_id id,
1985                                                const char *name)
1986 {
1987         struct st_lsm6dsx_sensor *sensor;
1988         struct iio_dev *iio_dev;
1989
1990         iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
1991         if (!iio_dev)
1992                 return NULL;
1993
1994         iio_dev->modes = INDIO_DIRECT_MODE;
1995         iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
1996         iio_dev->channels = hw->settings->channels[id].chan;
1997         iio_dev->num_channels = hw->settings->channels[id].len;
1998
1999         sensor = iio_priv(iio_dev);
2000         sensor->id = id;
2001         sensor->hw = hw;
2002         sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz;
2003         sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
2004         sensor->watermark = 1;
2005
2006         switch (id) {
2007         case ST_LSM6DSX_ID_ACC:
2008                 iio_dev->info = &st_lsm6dsx_acc_info;
2009                 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
2010                           name);
2011                 break;
2012         case ST_LSM6DSX_ID_GYRO:
2013                 iio_dev->info = &st_lsm6dsx_gyro_info;
2014                 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
2015                           name);
2016                 break;
2017         default:
2018                 return NULL;
2019         }
2020         iio_dev->name = sensor->name;
2021
2022         return iio_dev;
2023 }
2024
2025 static bool
2026 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw)
2027 {
2028         const struct st_lsm6dsx_event_settings *event_settings;
2029         int err, data;
2030         s64 timestamp;
2031
2032         if (!hw->enable_event)
2033                 return false;
2034
2035         event_settings = &hw->settings->event_settings;
2036         err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg,
2037                                      &data, sizeof(data));
2038         if (err < 0)
2039                 return false;
2040
2041         timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
2042         if ((data & hw->settings->event_settings.wakeup_src_z_mask) &&
2043             (hw->enable_event & BIT(IIO_MOD_Z)))
2044                 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2045                                IIO_MOD_EVENT_CODE(IIO_ACCEL,
2046                                                   0,
2047                                                   IIO_MOD_Z,
2048                                                   IIO_EV_TYPE_THRESH,
2049                                                   IIO_EV_DIR_EITHER),
2050                                                   timestamp);
2051
2052         if ((data & hw->settings->event_settings.wakeup_src_y_mask) &&
2053             (hw->enable_event & BIT(IIO_MOD_Y)))
2054                 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2055                                IIO_MOD_EVENT_CODE(IIO_ACCEL,
2056                                                   0,
2057                                                   IIO_MOD_Y,
2058                                                   IIO_EV_TYPE_THRESH,
2059                                                   IIO_EV_DIR_EITHER),
2060                                                   timestamp);
2061
2062         if ((data & hw->settings->event_settings.wakeup_src_x_mask) &&
2063             (hw->enable_event & BIT(IIO_MOD_X)))
2064                 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2065                                IIO_MOD_EVENT_CODE(IIO_ACCEL,
2066                                                   0,
2067                                                   IIO_MOD_X,
2068                                                   IIO_EV_TYPE_THRESH,
2069                                                   IIO_EV_DIR_EITHER),
2070                                                   timestamp);
2071
2072         return data & event_settings->wakeup_src_status_mask;
2073 }
2074
2075 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
2076 {
2077         struct st_lsm6dsx_hw *hw = private;
2078         int fifo_len = 0, len;
2079         bool event;
2080
2081         event = st_lsm6dsx_report_motion_event(hw);
2082
2083         if (!hw->settings->fifo_ops.read_fifo)
2084                 return event ? IRQ_HANDLED : IRQ_NONE;
2085
2086         /*
2087          * If we are using edge IRQs, new samples can arrive while
2088          * processing current interrupt since there are no hw
2089          * guarantees the irq line stays "low" long enough to properly
2090          * detect the new interrupt. In this case the new sample will
2091          * be missed.
2092          * Polling FIFO status register allow us to read new
2093          * samples even if the interrupt arrives while processing
2094          * previous data and the timeslot where the line is "low" is
2095          * too short to be properly detected.
2096          */
2097         do {
2098                 mutex_lock(&hw->fifo_lock);
2099                 len = hw->settings->fifo_ops.read_fifo(hw);
2100                 mutex_unlock(&hw->fifo_lock);
2101
2102                 if (len > 0)
2103                         fifo_len += len;
2104         } while (len > 0);
2105
2106         return fifo_len || event ? IRQ_HANDLED : IRQ_NONE;
2107 }
2108
2109 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
2110 {
2111         struct st_sensors_platform_data *pdata;
2112         const struct st_lsm6dsx_reg *reg;
2113         struct device *dev = hw->dev;
2114         unsigned long irq_type;
2115         bool irq_active_low;
2116         int err;
2117
2118         irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq));
2119
2120         switch (irq_type) {
2121         case IRQF_TRIGGER_HIGH:
2122         case IRQF_TRIGGER_RISING:
2123                 irq_active_low = false;
2124                 break;
2125         case IRQF_TRIGGER_LOW:
2126         case IRQF_TRIGGER_FALLING:
2127                 irq_active_low = true;
2128                 break;
2129         default:
2130                 dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
2131                 return -EINVAL;
2132         }
2133
2134         reg = &hw->settings->irq_config.hla;
2135         err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2136                                  ST_LSM6DSX_SHIFT_VAL(irq_active_low,
2137                                                       reg->mask));
2138         if (err < 0)
2139                 return err;
2140
2141         pdata = (struct st_sensors_platform_data *)dev->platform_data;
2142         if ((dev_fwnode(dev) && device_property_read_bool(dev, "drive-open-drain")) ||
2143             (pdata && pdata->open_drain)) {
2144                 reg = &hw->settings->irq_config.od;
2145                 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2146                                          ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2147                 if (err < 0)
2148                         return err;
2149
2150                 irq_type |= IRQF_SHARED;
2151         }
2152
2153         err = devm_request_threaded_irq(hw->dev, hw->irq,
2154                                         NULL,
2155                                         st_lsm6dsx_handler_thread,
2156                                         irq_type | IRQF_ONESHOT,
2157                                         "lsm6dsx", hw);
2158         if (err) {
2159                 dev_err(hw->dev, "failed to request trigger irq %d\n",
2160                         hw->irq);
2161                 return err;
2162         }
2163
2164         return 0;
2165 }
2166
2167 static int st_lsm6dsx_init_regulators(struct device *dev)
2168 {
2169         struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2170         int err;
2171
2172         /* vdd-vddio power regulators */
2173         hw->regulators[0].supply = "vdd";
2174         hw->regulators[1].supply = "vddio";
2175         err = devm_regulator_bulk_get(dev, ARRAY_SIZE(hw->regulators),
2176                                       hw->regulators);
2177         if (err)
2178                 return dev_err_probe(dev, err, "failed to get regulators\n");
2179
2180         err = regulator_bulk_enable(ARRAY_SIZE(hw->regulators),
2181                                     hw->regulators);
2182         if (err) {
2183                 dev_err(dev, "failed to enable regulators: %d\n", err);
2184                 return err;
2185         }
2186
2187         msleep(50);
2188
2189         return 0;
2190 }
2191
2192 static void st_lsm6dsx_chip_uninit(void *data)
2193 {
2194         struct st_lsm6dsx_hw *hw = data;
2195
2196         regulator_bulk_disable(ARRAY_SIZE(hw->regulators), hw->regulators);
2197 }
2198
2199 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
2200                      struct regmap *regmap)
2201 {
2202         struct st_sensors_platform_data *pdata = dev->platform_data;
2203         const struct st_lsm6dsx_shub_settings *hub_settings;
2204         struct st_lsm6dsx_hw *hw;
2205         const char *name = NULL;
2206         int i, err;
2207
2208         hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
2209         if (!hw)
2210                 return -ENOMEM;
2211
2212         dev_set_drvdata(dev, (void *)hw);
2213
2214         mutex_init(&hw->fifo_lock);
2215         mutex_init(&hw->conf_lock);
2216         mutex_init(&hw->page_lock);
2217
2218         err = st_lsm6dsx_init_regulators(dev);
2219         if (err)
2220                 return err;
2221
2222         err = devm_add_action_or_reset(dev, st_lsm6dsx_chip_uninit, hw);
2223         if (err)
2224                 return err;
2225
2226         hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
2227         if (!hw->buff)
2228                 return -ENOMEM;
2229
2230         hw->dev = dev;
2231         hw->irq = irq;
2232         hw->regmap = regmap;
2233
2234         err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
2235         if (err < 0)
2236                 return err;
2237
2238         for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
2239                 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
2240                 if (!hw->iio_devs[i])
2241                         return -ENOMEM;
2242         }
2243
2244         err = st_lsm6dsx_init_device(hw);
2245         if (err < 0)
2246                 return err;
2247
2248         hub_settings = &hw->settings->shub_settings;
2249         if (hub_settings->master_en.addr) {
2250                 err = st_lsm6dsx_shub_probe(hw, name);
2251                 if (err < 0)
2252                         return err;
2253         }
2254
2255         if (hw->irq > 0) {
2256                 err = st_lsm6dsx_irq_setup(hw);
2257                 if (err < 0)
2258                         return err;
2259
2260                 err = st_lsm6dsx_fifo_setup(hw);
2261                 if (err < 0)
2262                         return err;
2263         }
2264
2265         err = iio_read_mount_matrix(hw->dev, &hw->orientation);
2266         if (err)
2267                 return err;
2268
2269         for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2270                 if (!hw->iio_devs[i])
2271                         continue;
2272
2273                 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
2274                 if (err)
2275                         return err;
2276         }
2277
2278         if ((dev_fwnode(dev) && device_property_read_bool(dev, "wakeup-source")) ||
2279             (pdata && pdata->wakeup_source))
2280                 device_init_wakeup(dev, true);
2281
2282         return 0;
2283 }
2284 EXPORT_SYMBOL(st_lsm6dsx_probe);
2285
2286 static int __maybe_unused st_lsm6dsx_suspend(struct device *dev)
2287 {
2288         struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2289         struct st_lsm6dsx_sensor *sensor;
2290         int i, err = 0;
2291
2292         for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2293                 if (!hw->iio_devs[i])
2294                         continue;
2295
2296                 sensor = iio_priv(hw->iio_devs[i]);
2297                 if (!(hw->enable_mask & BIT(sensor->id)))
2298                         continue;
2299
2300                 if (device_may_wakeup(dev) &&
2301                     sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) {
2302                         /* Enable wake from IRQ */
2303                         enable_irq_wake(hw->irq);
2304                         continue;
2305                 }
2306
2307                 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2308                     sensor->id == ST_LSM6DSX_ID_EXT1 ||
2309                     sensor->id == ST_LSM6DSX_ID_EXT2)
2310                         err = st_lsm6dsx_shub_set_enable(sensor, false);
2311                 else
2312                         err = st_lsm6dsx_sensor_set_enable(sensor, false);
2313                 if (err < 0)
2314                         return err;
2315
2316                 hw->suspend_mask |= BIT(sensor->id);
2317         }
2318
2319         if (hw->fifo_mask)
2320                 err = st_lsm6dsx_flush_fifo(hw);
2321
2322         return err;
2323 }
2324
2325 static int __maybe_unused st_lsm6dsx_resume(struct device *dev)
2326 {
2327         struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2328         struct st_lsm6dsx_sensor *sensor;
2329         int i, err = 0;
2330
2331         for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2332                 if (!hw->iio_devs[i])
2333                         continue;
2334
2335                 sensor = iio_priv(hw->iio_devs[i]);
2336                 if (device_may_wakeup(dev) &&
2337                     sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event)
2338                         disable_irq_wake(hw->irq);
2339
2340                 if (!(hw->suspend_mask & BIT(sensor->id)))
2341                         continue;
2342
2343                 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2344                     sensor->id == ST_LSM6DSX_ID_EXT1 ||
2345                     sensor->id == ST_LSM6DSX_ID_EXT2)
2346                         err = st_lsm6dsx_shub_set_enable(sensor, true);
2347                 else
2348                         err = st_lsm6dsx_sensor_set_enable(sensor, true);
2349                 if (err < 0)
2350                         return err;
2351
2352                 hw->suspend_mask &= ~BIT(sensor->id);
2353         }
2354
2355         if (hw->fifo_mask)
2356                 err = st_lsm6dsx_resume_fifo(hw);
2357
2358         return err;
2359 }
2360
2361 const struct dev_pm_ops st_lsm6dsx_pm_ops = {
2362         SET_SYSTEM_SLEEP_PM_OPS(st_lsm6dsx_suspend, st_lsm6dsx_resume)
2363 };
2364 EXPORT_SYMBOL(st_lsm6dsx_pm_ops);
2365
2366 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
2367 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
2368 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
2369 MODULE_LICENSE("GPL v2");