2 * Copyright (C) 2012 Invensense, Inc.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/i2c.h>
17 #include <linux/err.h>
18 #include <linux/delay.h>
19 #include <linux/sysfs.h>
20 #include <linux/jiffies.h>
21 #include <linux/irq.h>
22 #include <linux/interrupt.h>
23 #include <linux/kfifo.h>
24 #include <linux/spinlock.h>
25 #include <linux/iio/iio.h>
26 #include <linux/acpi.h>
27 #include "inv_mpu_iio.h"
30 * this is the gyro scale translated from dynamic range plus/minus
31 * {250, 500, 1000, 2000} to rad/s
33 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
36 * this is the accel scale translated from dynamic range plus/minus
37 * {2, 4, 8, 16} to m/s^2
39 static const int accel_scale[] = {598, 1196, 2392, 4785};
41 static const struct inv_mpu6050_reg_map reg_set_6500 = {
42 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
43 .lpf = INV_MPU6050_REG_CONFIG,
44 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
45 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
46 .fifo_en = INV_MPU6050_REG_FIFO_EN,
47 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
48 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
49 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
50 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
51 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
52 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
53 .temperature = INV_MPU6050_REG_TEMPERATURE,
54 .int_enable = INV_MPU6050_REG_INT_ENABLE,
55 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
56 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
57 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
58 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
59 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
62 static const struct inv_mpu6050_reg_map reg_set_6050 = {
63 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
64 .lpf = INV_MPU6050_REG_CONFIG,
65 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
66 .fifo_en = INV_MPU6050_REG_FIFO_EN,
67 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
68 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
69 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
70 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
71 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
72 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
73 .temperature = INV_MPU6050_REG_TEMPERATURE,
74 .int_enable = INV_MPU6050_REG_INT_ENABLE,
75 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
76 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
77 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
78 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET,
79 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
82 static const struct inv_mpu6050_chip_config chip_config_6050 = {
83 .fsr = INV_MPU6050_FSR_2000DPS,
84 .lpf = INV_MPU6050_FILTER_20HZ,
85 .fifo_rate = INV_MPU6050_INIT_FIFO_RATE,
86 .gyro_fifo_enable = false,
87 .accl_fifo_enable = false,
88 .accl_fs = INV_MPU6050_FS_02G,
91 /* Indexed by enum inv_devices */
92 static const struct inv_mpu6050_hw hw_info[] = {
94 .whoami = INV_MPU6050_WHOAMI_VALUE,
97 .config = &chip_config_6050,
100 .whoami = INV_MPU6500_WHOAMI_VALUE,
102 .reg = ®_set_6500,
103 .config = &chip_config_6050,
106 .whoami = INV_MPU6000_WHOAMI_VALUE,
108 .reg = ®_set_6050,
109 .config = &chip_config_6050,
112 .whoami = INV_MPU9150_WHOAMI_VALUE,
114 .reg = ®_set_6050,
115 .config = &chip_config_6050,
118 .whoami = INV_MPU9250_WHOAMI_VALUE,
120 .reg = ®_set_6500,
121 .config = &chip_config_6050,
124 .whoami = INV_ICM20608_WHOAMI_VALUE,
126 .reg = ®_set_6500,
127 .config = &chip_config_6050,
131 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
133 unsigned int d, mgmt_1;
136 * switch clock needs to be careful. Only when gyro is on, can
137 * clock source be switched to gyro. Otherwise, it must be set to
140 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
141 result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1);
145 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
148 if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) {
150 * turning off gyro requires switch to internal clock first.
151 * Then turn off gyro engine
153 mgmt_1 |= INV_CLK_INTERNAL;
154 result = regmap_write(st->map, st->reg->pwr_mgmt_1, mgmt_1);
159 result = regmap_read(st->map, st->reg->pwr_mgmt_2, &d);
166 result = regmap_write(st->map, st->reg->pwr_mgmt_2, d);
171 /* Wait for output stabilize */
172 msleep(INV_MPU6050_TEMP_UP_TIME);
173 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
174 /* switch internal clock to PLL */
175 mgmt_1 |= INV_CLK_PLL;
176 result = regmap_write(st->map,
177 st->reg->pwr_mgmt_1, mgmt_1);
186 int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on)
191 if (!st->powerup_count)
192 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 0);
197 if (!st->powerup_count)
198 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
199 INV_MPU6050_BIT_SLEEP);
206 usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
207 INV_MPU6050_REG_UP_TIME_MAX);
211 EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg);
214 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
216 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
217 * MPU6500 and above have a dedicated register for accelerometer
219 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
220 enum inv_mpu6050_filter_e val)
224 result = regmap_write(st->map, st->reg->lpf, val);
228 switch (st->chip_type) {
232 /* old chips, nothing to do */
237 result = regmap_write(st->map, st->reg->accel_lpf, val);
245 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
247 * Initial configuration:
251 * Clock source: Gyro PLL
253 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
257 struct inv_mpu6050_state *st = iio_priv(indio_dev);
259 result = inv_mpu6050_set_power_itg(st, true);
262 d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
263 result = regmap_write(st->map, st->reg->gyro_config, d);
267 result = inv_mpu6050_set_lpf_regs(st, INV_MPU6050_FILTER_20HZ);
271 d = INV_MPU6050_ONE_K_HZ / INV_MPU6050_INIT_FIFO_RATE - 1;
272 result = regmap_write(st->map, st->reg->sample_rate_div, d);
276 d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
277 result = regmap_write(st->map, st->reg->accl_config, d);
281 memcpy(&st->chip_config, hw_info[st->chip_type].config,
282 sizeof(struct inv_mpu6050_chip_config));
283 result = inv_mpu6050_set_power_itg(st, false);
288 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg,
292 __be16 d = cpu_to_be16(val);
294 ind = (axis - IIO_MOD_X) * 2;
295 result = regmap_bulk_write(st->map, reg + ind, (u8 *)&d, 2);
302 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
308 ind = (axis - IIO_MOD_X) * 2;
309 result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2);
312 *val = (short)be16_to_cpup(&d);
318 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
319 struct iio_chan_spec const *chan,
320 int *val, int *val2, long mask)
322 struct inv_mpu6050_state *st = iio_priv(indio_dev);
326 case IIO_CHAN_INFO_RAW:
331 mutex_lock(&st->lock);
332 result = iio_device_claim_direct_mode(indio_dev);
334 goto error_read_raw_unlock;
335 result = inv_mpu6050_set_power_itg(st, true);
337 goto error_read_raw_release;
338 switch (chan->type) {
340 result = inv_mpu6050_switch_engine(st, true,
341 INV_MPU6050_BIT_PWR_GYRO_STBY);
343 goto error_read_raw_power_off;
344 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
345 chan->channel2, val);
346 result = inv_mpu6050_switch_engine(st, false,
347 INV_MPU6050_BIT_PWR_GYRO_STBY);
349 goto error_read_raw_power_off;
352 result = inv_mpu6050_switch_engine(st, true,
353 INV_MPU6050_BIT_PWR_ACCL_STBY);
355 goto error_read_raw_power_off;
356 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
357 chan->channel2, val);
358 result = inv_mpu6050_switch_engine(st, false,
359 INV_MPU6050_BIT_PWR_ACCL_STBY);
361 goto error_read_raw_power_off;
364 /* wait for stablization */
365 msleep(INV_MPU6050_SENSOR_UP_TIME);
366 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
373 error_read_raw_power_off:
374 result |= inv_mpu6050_set_power_itg(st, false);
375 error_read_raw_release:
376 iio_device_release_direct_mode(indio_dev);
377 error_read_raw_unlock:
378 mutex_unlock(&st->lock);
384 case IIO_CHAN_INFO_SCALE:
385 switch (chan->type) {
387 mutex_lock(&st->lock);
389 *val2 = gyro_scale_6050[st->chip_config.fsr];
390 mutex_unlock(&st->lock);
392 return IIO_VAL_INT_PLUS_NANO;
394 mutex_lock(&st->lock);
396 *val2 = accel_scale[st->chip_config.accl_fs];
397 mutex_unlock(&st->lock);
399 return IIO_VAL_INT_PLUS_MICRO;
402 *val2 = INV_MPU6050_TEMP_SCALE;
404 return IIO_VAL_INT_PLUS_MICRO;
408 case IIO_CHAN_INFO_OFFSET:
409 switch (chan->type) {
411 *val = INV_MPU6050_TEMP_OFFSET;
417 case IIO_CHAN_INFO_CALIBBIAS:
418 switch (chan->type) {
420 mutex_lock(&st->lock);
421 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
422 chan->channel2, val);
423 mutex_unlock(&st->lock);
426 mutex_lock(&st->lock);
427 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
428 chan->channel2, val);
429 mutex_unlock(&st->lock);
440 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)
445 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
446 if (gyro_scale_6050[i] == val) {
447 d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
448 result = regmap_write(st->map, st->reg->gyro_config, d);
452 st->chip_config.fsr = i;
460 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
461 struct iio_chan_spec const *chan, long mask)
464 case IIO_CHAN_INFO_SCALE:
465 switch (chan->type) {
467 return IIO_VAL_INT_PLUS_NANO;
469 return IIO_VAL_INT_PLUS_MICRO;
472 return IIO_VAL_INT_PLUS_MICRO;
478 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)
483 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
484 if (accel_scale[i] == val) {
485 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
486 result = regmap_write(st->map, st->reg->accl_config, d);
490 st->chip_config.accl_fs = i;
498 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
499 struct iio_chan_spec const *chan,
500 int val, int val2, long mask)
502 struct inv_mpu6050_state *st = iio_priv(indio_dev);
505 mutex_lock(&st->lock);
507 * we should only update scale when the chip is disabled, i.e.
510 result = iio_device_claim_direct_mode(indio_dev);
512 goto error_write_raw_unlock;
513 result = inv_mpu6050_set_power_itg(st, true);
515 goto error_write_raw_release;
518 case IIO_CHAN_INFO_SCALE:
519 switch (chan->type) {
521 result = inv_mpu6050_write_gyro_scale(st, val2);
524 result = inv_mpu6050_write_accel_scale(st, val2);
531 case IIO_CHAN_INFO_CALIBBIAS:
532 switch (chan->type) {
534 result = inv_mpu6050_sensor_set(st,
535 st->reg->gyro_offset,
536 chan->channel2, val);
539 result = inv_mpu6050_sensor_set(st,
540 st->reg->accl_offset,
541 chan->channel2, val);
551 result |= inv_mpu6050_set_power_itg(st, false);
552 error_write_raw_release:
553 iio_device_release_direct_mode(indio_dev);
554 error_write_raw_unlock:
555 mutex_unlock(&st->lock);
561 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
563 * Based on the Nyquist principle, the sampling rate must
564 * exceed twice of the bandwidth of the signal, or there
565 * would be alising. This function basically search for the
566 * correct low pass parameters based on the fifo rate, e.g,
567 * sampling frequency.
569 * lpf is set automatically when setting sampling rate to avoid any aliases.
571 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
573 const int hz[] = {188, 98, 42, 20, 10, 5};
574 const int d[] = {INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ,
575 INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ,
576 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ};
582 while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
585 result = inv_mpu6050_set_lpf_regs(st, data);
588 st->chip_config.lpf = data;
594 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
597 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
598 const char *buf, size_t count)
603 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
604 struct inv_mpu6050_state *st = iio_priv(indio_dev);
606 if (kstrtoint(buf, 10, &fifo_rate))
608 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
609 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
612 mutex_lock(&st->lock);
613 if (fifo_rate == st->chip_config.fifo_rate) {
615 goto fifo_rate_fail_unlock;
617 result = iio_device_claim_direct_mode(indio_dev);
619 goto fifo_rate_fail_unlock;
620 result = inv_mpu6050_set_power_itg(st, true);
622 goto fifo_rate_fail_release;
624 d = INV_MPU6050_ONE_K_HZ / fifo_rate - 1;
625 result = regmap_write(st->map, st->reg->sample_rate_div, d);
627 goto fifo_rate_fail_power_off;
628 st->chip_config.fifo_rate = fifo_rate;
630 result = inv_mpu6050_set_lpf(st, fifo_rate);
632 goto fifo_rate_fail_power_off;
634 fifo_rate_fail_power_off:
635 result |= inv_mpu6050_set_power_itg(st, false);
636 fifo_rate_fail_release:
637 iio_device_release_direct_mode(indio_dev);
638 fifo_rate_fail_unlock:
639 mutex_unlock(&st->lock);
647 * inv_fifo_rate_show() - Get the current sampling rate.
650 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
653 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
656 mutex_lock(&st->lock);
657 fifo_rate = st->chip_config.fifo_rate;
658 mutex_unlock(&st->lock);
660 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
664 * inv_attr_show() - calling this function will show current
667 * Deprecated in favor of IIO mounting matrix API.
669 * See inv_get_mount_matrix()
671 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
674 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
675 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
678 switch (this_attr->address) {
680 * In MPU6050, the two matrix are the same because gyro and accel
681 * are integrated in one chip
683 case ATTR_GYRO_MATRIX:
684 case ATTR_ACCL_MATRIX:
685 m = st->plat_data.orientation;
687 return scnprintf(buf, PAGE_SIZE,
688 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
689 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
696 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
698 * @indio_dev: The IIO device
699 * @trig: The new trigger
701 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
702 * device, -EINVAL otherwise.
704 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
705 struct iio_trigger *trig)
707 struct inv_mpu6050_state *st = iio_priv(indio_dev);
709 if (st->trig != trig)
715 static const struct iio_mount_matrix *
716 inv_get_mount_matrix(const struct iio_dev *indio_dev,
717 const struct iio_chan_spec *chan)
719 return &((struct inv_mpu6050_state *)iio_priv(indio_dev))->orientation;
722 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
723 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
727 #define INV_MPU6050_CHAN(_type, _channel2, _index) \
731 .channel2 = _channel2, \
732 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
733 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
734 BIT(IIO_CHAN_INFO_CALIBBIAS), \
735 .scan_index = _index, \
741 .endianness = IIO_BE, \
743 .ext_info = inv_ext_info, \
746 static const struct iio_chan_spec inv_mpu_channels[] = {
747 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
749 * Note that temperature should only be via polled reading only,
750 * not the final scan elements output.
754 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
755 | BIT(IIO_CHAN_INFO_OFFSET)
756 | BIT(IIO_CHAN_INFO_SCALE),
759 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
760 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
761 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
763 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
764 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
765 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
768 /* constant IIO attribute */
769 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
770 static IIO_CONST_ATTR(in_anglvel_scale_available,
771 "0.000133090 0.000266181 0.000532362 0.001064724");
772 static IIO_CONST_ATTR(in_accel_scale_available,
773 "0.000598 0.001196 0.002392 0.004785");
774 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
775 inv_mpu6050_fifo_rate_store);
777 /* Deprecated: kept for userspace backward compatibility. */
778 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
780 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
783 static struct attribute *inv_attributes[] = {
784 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */
785 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
786 &iio_dev_attr_sampling_frequency.dev_attr.attr,
787 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
788 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
789 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
793 static const struct attribute_group inv_attribute_group = {
794 .attrs = inv_attributes
797 static const struct iio_info mpu_info = {
798 .driver_module = THIS_MODULE,
799 .read_raw = &inv_mpu6050_read_raw,
800 .write_raw = &inv_mpu6050_write_raw,
801 .write_raw_get_fmt = &inv_write_raw_get_fmt,
802 .attrs = &inv_attribute_group,
803 .validate_trigger = inv_mpu6050_validate_trigger,
807 * inv_check_and_setup_chip() - check and setup chip.
809 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
815 st->hw = &hw_info[st->chip_type];
816 st->reg = hw_info[st->chip_type].reg;
818 /* check chip self-identification */
819 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val);
822 if (regval != st->hw->whoami) {
823 /* check whoami against all possible values */
824 for (i = 0; i < INV_NUM_PARTS; ++i) {
825 if (regval == hw_info[i].whoami) {
826 dev_warn(regmap_get_device(st->map),
827 "whoami mismatch got %#02x (%s)"
828 "expected %#02hhx (%s)\n",
829 regval, hw_info[i].name,
830 st->hw->whoami, st->hw->name);
834 if (i >= INV_NUM_PARTS) {
835 dev_err(regmap_get_device(st->map),
836 "invalid whoami %#02x expected %#02hhx (%s)\n",
837 regval, st->hw->whoami, st->hw->name);
842 /* reset to make sure previous state are not there */
843 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
844 INV_MPU6050_BIT_H_RESET);
847 msleep(INV_MPU6050_POWER_UP_TIME);
850 * toggle power state. After reset, the sleep bit could be on
851 * or off depending on the OTP settings. Toggling power would
852 * make it in a definite state as well as making the hardware
853 * state align with the software state
855 result = inv_mpu6050_set_power_itg(st, false);
858 result = inv_mpu6050_set_power_itg(st, true);
862 result = inv_mpu6050_switch_engine(st, false,
863 INV_MPU6050_BIT_PWR_ACCL_STBY);
866 result = inv_mpu6050_switch_engine(st, false,
867 INV_MPU6050_BIT_PWR_GYRO_STBY);
874 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
875 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
877 struct inv_mpu6050_state *st;
878 struct iio_dev *indio_dev;
879 struct inv_mpu6050_platform_data *pdata;
880 struct device *dev = regmap_get_device(regmap);
883 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
887 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
888 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
889 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
893 st = iio_priv(indio_dev);
894 mutex_init(&st->lock);
895 st->chip_type = chip_type;
896 st->powerup_count = 0;
900 pdata = dev_get_platdata(dev);
902 result = of_iio_read_mount_matrix(dev, "mount-matrix",
905 dev_err(dev, "Failed to retrieve mounting matrix %d\n",
910 st->plat_data = *pdata;
913 /* power is turned on inside check chip type*/
914 result = inv_check_and_setup_chip(st);
918 if (inv_mpu_bus_setup)
919 inv_mpu_bus_setup(indio_dev);
921 result = inv_mpu6050_init_config(indio_dev);
923 dev_err(dev, "Could not initialize device.\n");
927 dev_set_drvdata(dev, indio_dev);
928 indio_dev->dev.parent = dev;
929 /* name will be NULL when enumerated via ACPI */
931 indio_dev->name = name;
933 indio_dev->name = dev_name(dev);
934 indio_dev->channels = inv_mpu_channels;
935 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
937 indio_dev->info = &mpu_info;
938 indio_dev->modes = INDIO_BUFFER_TRIGGERED;
940 result = iio_triggered_buffer_setup(indio_dev,
941 inv_mpu6050_irq_handler,
942 inv_mpu6050_read_fifo,
945 dev_err(dev, "configure buffer fail %d\n", result);
948 result = inv_mpu6050_probe_trigger(indio_dev);
950 dev_err(dev, "trigger probe fail %d\n", result);
954 INIT_KFIFO(st->timestamps);
955 spin_lock_init(&st->time_stamp_lock);
956 result = iio_device_register(indio_dev);
958 dev_err(dev, "IIO register fail %d\n", result);
959 goto out_remove_trigger;
965 inv_mpu6050_remove_trigger(st);
967 iio_triggered_buffer_cleanup(indio_dev);
970 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
972 int inv_mpu_core_remove(struct device *dev)
974 struct iio_dev *indio_dev = dev_get_drvdata(dev);
976 iio_device_unregister(indio_dev);
977 inv_mpu6050_remove_trigger(iio_priv(indio_dev));
978 iio_triggered_buffer_cleanup(indio_dev);
982 EXPORT_SYMBOL_GPL(inv_mpu_core_remove);
984 #ifdef CONFIG_PM_SLEEP
986 static int inv_mpu_resume(struct device *dev)
988 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
991 mutex_lock(&st->lock);
992 result = inv_mpu6050_set_power_itg(st, true);
993 mutex_unlock(&st->lock);
998 static int inv_mpu_suspend(struct device *dev)
1000 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1003 mutex_lock(&st->lock);
1004 result = inv_mpu6050_set_power_itg(st, false);
1005 mutex_unlock(&st->lock);
1009 #endif /* CONFIG_PM_SLEEP */
1011 SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume);
1012 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
1014 MODULE_AUTHOR("Invensense Corporation");
1015 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
1016 MODULE_LICENSE("GPL");