1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Invensense, Inc.
6 #include <linux/module.h>
7 #include <linux/slab.h>
10 #include <linux/delay.h>
11 #include <linux/sysfs.h>
12 #include <linux/jiffies.h>
13 #include <linux/irq.h>
14 #include <linux/interrupt.h>
15 #include <linux/iio/iio.h>
16 #include <linux/acpi.h>
17 #include <linux/platform_device.h>
18 #include <linux/regulator/consumer.h>
20 #include <linux/pm_runtime.h>
21 #include "inv_mpu_iio.h"
22 #include "inv_mpu_magn.h"
25 * this is the gyro scale translated from dynamic range plus/minus
26 * {250, 500, 1000, 2000} to rad/s
28 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
31 * this is the accel scale translated from dynamic range plus/minus
32 * {2, 4, 8, 16} to m/s^2
34 static const int accel_scale[] = {598, 1196, 2392, 4785};
36 static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
37 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
38 .lpf = INV_MPU6050_REG_CONFIG,
39 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
40 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
41 .fifo_en = INV_MPU6050_REG_FIFO_EN,
42 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
43 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
44 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
45 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
46 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
47 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
48 .temperature = INV_MPU6050_REG_TEMPERATURE,
49 .int_enable = INV_MPU6050_REG_INT_ENABLE,
50 .int_status = INV_MPU6050_REG_INT_STATUS,
51 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
52 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
53 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
54 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
55 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
56 .i2c_if = INV_ICM20602_REG_I2C_IF,
59 static const struct inv_mpu6050_reg_map reg_set_6500 = {
60 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
61 .lpf = INV_MPU6050_REG_CONFIG,
62 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
63 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
64 .fifo_en = INV_MPU6050_REG_FIFO_EN,
65 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
66 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
67 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
68 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
69 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
70 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
71 .temperature = INV_MPU6050_REG_TEMPERATURE,
72 .int_enable = INV_MPU6050_REG_INT_ENABLE,
73 .int_status = INV_MPU6050_REG_INT_STATUS,
74 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
75 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
76 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
77 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
78 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
82 static const struct inv_mpu6050_reg_map reg_set_6050 = {
83 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
84 .lpf = INV_MPU6050_REG_CONFIG,
85 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
86 .fifo_en = INV_MPU6050_REG_FIFO_EN,
87 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
88 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
89 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
90 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
91 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
92 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
93 .temperature = INV_MPU6050_REG_TEMPERATURE,
94 .int_enable = INV_MPU6050_REG_INT_ENABLE,
95 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
96 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
97 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
98 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET,
99 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
103 static const struct inv_mpu6050_chip_config chip_config_6050 = {
104 .clk = INV_CLK_INTERNAL,
105 .fsr = INV_MPU6050_FSR_2000DPS,
106 .lpf = INV_MPU6050_FILTER_20HZ,
107 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
112 .gyro_fifo_enable = false,
113 .accl_fifo_enable = false,
114 .temp_fifo_enable = false,
115 .magn_fifo_enable = false,
116 .accl_fs = INV_MPU6050_FS_02G,
120 static const struct inv_mpu6050_chip_config chip_config_6500 = {
122 .fsr = INV_MPU6050_FSR_2000DPS,
123 .lpf = INV_MPU6050_FILTER_20HZ,
124 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
129 .gyro_fifo_enable = false,
130 .accl_fifo_enable = false,
131 .temp_fifo_enable = false,
132 .magn_fifo_enable = false,
133 .accl_fs = INV_MPU6050_FS_02G,
137 /* Indexed by enum inv_devices */
138 static const struct inv_mpu6050_hw hw_info[] = {
140 .whoami = INV_MPU6050_WHOAMI_VALUE,
142 .reg = ®_set_6050,
143 .config = &chip_config_6050,
145 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
146 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
149 .whoami = INV_MPU6500_WHOAMI_VALUE,
151 .reg = ®_set_6500,
152 .config = &chip_config_6500,
154 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
155 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
158 .whoami = INV_MPU6515_WHOAMI_VALUE,
160 .reg = ®_set_6500,
161 .config = &chip_config_6500,
163 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
164 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
167 .whoami = INV_MPU6880_WHOAMI_VALUE,
169 .reg = ®_set_6500,
170 .config = &chip_config_6500,
172 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
173 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
176 .whoami = INV_MPU6000_WHOAMI_VALUE,
178 .reg = ®_set_6050,
179 .config = &chip_config_6050,
181 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
182 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
185 .whoami = INV_MPU9150_WHOAMI_VALUE,
187 .reg = ®_set_6050,
188 .config = &chip_config_6050,
190 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
191 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
194 .whoami = INV_MPU9250_WHOAMI_VALUE,
196 .reg = ®_set_6500,
197 .config = &chip_config_6500,
199 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
200 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
203 .whoami = INV_MPU9255_WHOAMI_VALUE,
205 .reg = ®_set_6500,
206 .config = &chip_config_6500,
208 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
209 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
212 .whoami = INV_ICM20608_WHOAMI_VALUE,
214 .reg = ®_set_6500,
215 .config = &chip_config_6500,
217 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
218 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
221 .whoami = INV_ICM20609_WHOAMI_VALUE,
223 .reg = ®_set_6500,
224 .config = &chip_config_6500,
225 .fifo_size = 4 * 1024,
226 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
227 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
230 .whoami = INV_ICM20689_WHOAMI_VALUE,
232 .reg = ®_set_6500,
233 .config = &chip_config_6500,
234 .fifo_size = 4 * 1024,
235 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
236 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
239 .whoami = INV_ICM20602_WHOAMI_VALUE,
241 .reg = ®_set_icm20602,
242 .config = &chip_config_6500,
244 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
245 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME},
248 .whoami = INV_ICM20690_WHOAMI_VALUE,
250 .reg = ®_set_6500,
251 .config = &chip_config_6500,
253 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
254 .startup_time = {INV_ICM20690_GYRO_STARTUP_TIME, INV_ICM20690_ACCEL_STARTUP_TIME},
257 .whoami = INV_IAM20680_WHOAMI_VALUE,
259 .reg = ®_set_6500,
260 .config = &chip_config_6500,
262 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
263 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
267 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep,
268 int clock, int temp_dis)
273 clock = st->chip_config.clk;
275 temp_dis = !st->chip_config.temp_en;
277 val = clock & INV_MPU6050_BIT_CLK_MASK;
279 val |= INV_MPU6050_BIT_TEMP_DIS;
281 val |= INV_MPU6050_BIT_SLEEP;
283 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val);
284 return regmap_write(st->map, st->reg->pwr_mgmt_1, val);
287 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st,
292 switch (st->chip_type) {
296 /* old chips: switch clock manually */
297 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1);
300 st->chip_config.clk = clock;
303 /* automatic clock switching, nothing to do */
310 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en,
314 u8 pwr_mgmt2, user_ctrl;
317 /* delete useless requests */
318 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en)
319 mask &= ~INV_MPU6050_SENSOR_ACCL;
320 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en)
321 mask &= ~INV_MPU6050_SENSOR_GYRO;
322 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en)
323 mask &= ~INV_MPU6050_SENSOR_TEMP;
324 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en)
325 mask &= ~INV_MPU6050_SENSOR_MAGN;
329 /* turn on/off temperature sensor */
330 if (mask & INV_MPU6050_SENSOR_TEMP) {
331 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, -1, !en);
334 st->chip_config.temp_en = en;
337 /* update user_crtl for driving magnetometer */
338 if (mask & INV_MPU6050_SENSOR_MAGN) {
339 user_ctrl = st->chip_config.user_ctrl;
341 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN;
343 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN;
344 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
347 st->chip_config.user_ctrl = user_ctrl;
348 st->chip_config.magn_en = en;
351 /* manage accel & gyro engines */
352 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) {
353 /* compute power management 2 current value */
355 if (!st->chip_config.accl_en)
356 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
357 if (!st->chip_config.gyro_en)
358 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
360 /* update to new requested value */
361 if (mask & INV_MPU6050_SENSOR_ACCL) {
363 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY;
365 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
367 if (mask & INV_MPU6050_SENSOR_GYRO) {
369 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY;
371 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
374 /* switch clock to internal when turning gyro off */
375 if (mask & INV_MPU6050_SENSOR_GYRO && !en) {
376 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL);
381 /* update sensors engine */
382 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n",
384 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2);
387 if (mask & INV_MPU6050_SENSOR_ACCL)
388 st->chip_config.accl_en = en;
389 if (mask & INV_MPU6050_SENSOR_GYRO)
390 st->chip_config.gyro_en = en;
392 /* compute required time to have sensors stabilized */
395 if (mask & INV_MPU6050_SENSOR_ACCL) {
396 if (sleep < st->hw->startup_time.accel)
397 sleep = st->hw->startup_time.accel;
399 if (mask & INV_MPU6050_SENSOR_GYRO) {
400 if (sleep < st->hw->startup_time.gyro)
401 sleep = st->hw->startup_time.gyro;
404 if (mask & INV_MPU6050_SENSOR_GYRO) {
405 if (sleep < INV_MPU6050_GYRO_DOWN_TIME)
406 sleep = INV_MPU6050_GYRO_DOWN_TIME;
412 /* switch clock to PLL when turning gyro on */
413 if (mask & INV_MPU6050_SENSOR_GYRO && en) {
414 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL);
423 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st,
428 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, -1, -1);
433 usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
434 INV_MPU6050_REG_UP_TIME_MAX);
439 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st,
440 enum inv_mpu6050_fsr_e val)
442 unsigned int gyro_shift;
445 switch (st->chip_type) {
447 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT;
450 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT;
454 data = val << gyro_shift;
455 return regmap_write(st->map, st->reg->gyro_config, data);
459 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
461 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
462 * MPU6500 and above have a dedicated register for accelerometer
464 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
465 enum inv_mpu6050_filter_e val)
469 result = regmap_write(st->map, st->reg->lpf, val);
474 switch (st->chip_type) {
478 /* old chips, nothing to do */
482 /* set FIFO size to maximum value */
483 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX;
489 return regmap_write(st->map, st->reg->accel_lpf, val);
493 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
495 * Initial configuration:
499 * Clock source: Gyro PLL
501 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
505 struct inv_mpu6050_state *st = iio_priv(indio_dev);
507 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr);
511 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf);
515 d = st->chip_config.divider;
516 result = regmap_write(st->map, st->reg->sample_rate_div, d);
520 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
521 result = regmap_write(st->map, st->reg->accl_config, d);
525 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
530 * Internal chip period is 1ms (1kHz).
531 * Let's use at the beginning the theorical value before measuring
532 * with interrupt timestamps.
534 st->chip_period = NSEC_PER_MSEC;
536 /* magn chip init, noop if not present in the chip */
537 result = inv_mpu_magn_probe(st);
544 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg,
548 __be16 d = cpu_to_be16(val);
550 ind = (axis - IIO_MOD_X) * 2;
551 result = regmap_bulk_write(st->map, reg + ind, &d, sizeof(d));
558 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
564 ind = (axis - IIO_MOD_X) * 2;
565 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d));
568 *val = (short)be16_to_cpup(&d);
573 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
574 struct iio_chan_spec const *chan,
577 struct inv_mpu6050_state *st = iio_priv(indio_dev);
578 struct device *pdev = regmap_get_device(st->map);
579 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us;
583 /* compute sample period */
584 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
585 period_us = 1000000 / freq_hz;
587 result = pm_runtime_resume_and_get(pdev);
591 switch (chan->type) {
593 if (!st->chip_config.gyro_en) {
594 result = inv_mpu6050_switch_engine(st, true,
595 INV_MPU6050_SENSOR_GYRO);
597 goto error_power_off;
598 /* need to wait 2 periods to have first valid sample */
599 min_sleep_us = 2 * period_us;
600 max_sleep_us = 2 * (period_us + period_us / 2);
601 usleep_range(min_sleep_us, max_sleep_us);
603 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
604 chan->channel2, val);
607 if (!st->chip_config.accl_en) {
608 result = inv_mpu6050_switch_engine(st, true,
609 INV_MPU6050_SENSOR_ACCL);
611 goto error_power_off;
612 /* wait 1 period for first sample availability */
613 min_sleep_us = period_us;
614 max_sleep_us = period_us + period_us / 2;
615 usleep_range(min_sleep_us, max_sleep_us);
617 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
618 chan->channel2, val);
621 /* temperature sensor work only with accel and/or gyro */
622 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) {
624 goto error_power_off;
626 if (!st->chip_config.temp_en) {
627 result = inv_mpu6050_switch_engine(st, true,
628 INV_MPU6050_SENSOR_TEMP);
630 goto error_power_off;
631 /* wait 1 period for first sample availability */
632 min_sleep_us = period_us;
633 max_sleep_us = period_us + period_us / 2;
634 usleep_range(min_sleep_us, max_sleep_us);
636 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
640 if (!st->chip_config.magn_en) {
641 result = inv_mpu6050_switch_engine(st, true,
642 INV_MPU6050_SENSOR_MAGN);
644 goto error_power_off;
645 /* frequency is limited for magnetometer */
646 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) {
647 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX;
648 period_us = 1000000 / freq_hz;
650 /* need to wait 2 periods to have first valid sample */
651 min_sleep_us = 2 * period_us;
652 max_sleep_us = 2 * (period_us + period_us / 2);
653 usleep_range(min_sleep_us, max_sleep_us);
655 ret = inv_mpu_magn_read(st, chan->channel2, val);
662 pm_runtime_mark_last_busy(pdev);
663 pm_runtime_put_autosuspend(pdev);
668 pm_runtime_put_autosuspend(pdev);
673 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
674 struct iio_chan_spec const *chan,
675 int *val, int *val2, long mask)
677 struct inv_mpu6050_state *st = iio_priv(indio_dev);
681 case IIO_CHAN_INFO_RAW:
682 ret = iio_device_claim_direct_mode(indio_dev);
685 mutex_lock(&st->lock);
686 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
687 mutex_unlock(&st->lock);
688 iio_device_release_direct_mode(indio_dev);
690 case IIO_CHAN_INFO_SCALE:
691 switch (chan->type) {
693 mutex_lock(&st->lock);
695 *val2 = gyro_scale_6050[st->chip_config.fsr];
696 mutex_unlock(&st->lock);
698 return IIO_VAL_INT_PLUS_NANO;
700 mutex_lock(&st->lock);
702 *val2 = accel_scale[st->chip_config.accl_fs];
703 mutex_unlock(&st->lock);
705 return IIO_VAL_INT_PLUS_MICRO;
707 *val = st->hw->temp.scale / 1000000;
708 *val2 = st->hw->temp.scale % 1000000;
709 return IIO_VAL_INT_PLUS_MICRO;
711 return inv_mpu_magn_get_scale(st, chan, val, val2);
715 case IIO_CHAN_INFO_OFFSET:
716 switch (chan->type) {
718 *val = st->hw->temp.offset;
723 case IIO_CHAN_INFO_CALIBBIAS:
724 switch (chan->type) {
726 mutex_lock(&st->lock);
727 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
728 chan->channel2, val);
729 mutex_unlock(&st->lock);
732 mutex_lock(&st->lock);
733 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
734 chan->channel2, val);
735 mutex_unlock(&st->lock);
746 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val,
754 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
755 if (gyro_scale_6050[i] == val2) {
756 result = inv_mpu6050_set_gyro_fsr(st, i);
760 st->chip_config.fsr = i;
768 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
769 struct iio_chan_spec const *chan, long mask)
772 case IIO_CHAN_INFO_SCALE:
773 switch (chan->type) {
775 return IIO_VAL_INT_PLUS_NANO;
777 return IIO_VAL_INT_PLUS_MICRO;
780 return IIO_VAL_INT_PLUS_MICRO;
786 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val,
795 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
796 if (accel_scale[i] == val2) {
797 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
798 result = regmap_write(st->map, st->reg->accl_config, d);
802 st->chip_config.accl_fs = i;
810 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
811 struct iio_chan_spec const *chan,
812 int val, int val2, long mask)
814 struct inv_mpu6050_state *st = iio_priv(indio_dev);
815 struct device *pdev = regmap_get_device(st->map);
819 * we should only update scale when the chip is disabled, i.e.
822 result = iio_device_claim_direct_mode(indio_dev);
826 mutex_lock(&st->lock);
827 result = pm_runtime_resume_and_get(pdev);
829 goto error_write_raw_unlock;
832 case IIO_CHAN_INFO_SCALE:
833 switch (chan->type) {
835 result = inv_mpu6050_write_gyro_scale(st, val, val2);
838 result = inv_mpu6050_write_accel_scale(st, val, val2);
845 case IIO_CHAN_INFO_CALIBBIAS:
846 switch (chan->type) {
848 result = inv_mpu6050_sensor_set(st,
849 st->reg->gyro_offset,
850 chan->channel2, val);
853 result = inv_mpu6050_sensor_set(st,
854 st->reg->accl_offset,
855 chan->channel2, val);
867 pm_runtime_mark_last_busy(pdev);
868 pm_runtime_put_autosuspend(pdev);
869 error_write_raw_unlock:
870 mutex_unlock(&st->lock);
871 iio_device_release_direct_mode(indio_dev);
877 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
879 * Based on the Nyquist principle, the bandwidth of the low
880 * pass filter must not exceed the signal sampling rate divided
881 * by 2, or there would be aliasing.
882 * This function basically search for the correct low pass
883 * parameters based on the fifo rate, e.g, sampling frequency.
885 * lpf is set automatically when setting sampling rate to avoid any aliases.
887 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
889 static const int hz[] = {400, 200, 90, 40, 20, 10};
890 static const int d[] = {
891 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ,
892 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ,
893 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
898 data = INV_MPU6050_FILTER_5HZ;
899 for (i = 0; i < ARRAY_SIZE(hz); ++i) {
905 result = inv_mpu6050_set_lpf_regs(st, data);
908 st->chip_config.lpf = data;
914 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
917 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
918 const char *buf, size_t count)
923 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
924 struct inv_mpu6050_state *st = iio_priv(indio_dev);
925 struct device *pdev = regmap_get_device(st->map);
927 if (kstrtoint(buf, 10, &fifo_rate))
929 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
930 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
933 /* compute the chip sample rate divider */
934 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
935 /* compute back the fifo rate to handle truncation cases */
936 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
938 mutex_lock(&st->lock);
939 if (d == st->chip_config.divider) {
941 goto fifo_rate_fail_unlock;
943 result = pm_runtime_resume_and_get(pdev);
945 goto fifo_rate_fail_unlock;
947 result = regmap_write(st->map, st->reg->sample_rate_div, d);
949 goto fifo_rate_fail_power_off;
950 st->chip_config.divider = d;
952 result = inv_mpu6050_set_lpf(st, fifo_rate);
954 goto fifo_rate_fail_power_off;
956 /* update rate for magn, noop if not present in chip */
957 result = inv_mpu_magn_set_rate(st, fifo_rate);
959 goto fifo_rate_fail_power_off;
961 pm_runtime_mark_last_busy(pdev);
962 fifo_rate_fail_power_off:
963 pm_runtime_put_autosuspend(pdev);
964 fifo_rate_fail_unlock:
965 mutex_unlock(&st->lock);
973 * inv_fifo_rate_show() - Get the current sampling rate.
976 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
979 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
982 mutex_lock(&st->lock);
983 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
984 mutex_unlock(&st->lock);
986 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
990 * inv_attr_show() - calling this function will show current
993 * Deprecated in favor of IIO mounting matrix API.
995 * See inv_get_mount_matrix()
997 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
1000 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
1001 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
1004 switch (this_attr->address) {
1006 * In MPU6050, the two matrix are the same because gyro and accel
1007 * are integrated in one chip
1009 case ATTR_GYRO_MATRIX:
1010 case ATTR_ACCL_MATRIX:
1011 m = st->plat_data.orientation;
1013 return scnprintf(buf, PAGE_SIZE,
1014 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
1015 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
1022 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
1024 * @indio_dev: The IIO device
1025 * @trig: The new trigger
1027 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
1028 * device, -EINVAL otherwise.
1030 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
1031 struct iio_trigger *trig)
1033 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1035 if (st->trig != trig)
1041 static const struct iio_mount_matrix *
1042 inv_get_mount_matrix(const struct iio_dev *indio_dev,
1043 const struct iio_chan_spec *chan)
1045 struct inv_mpu6050_state *data = iio_priv(indio_dev);
1046 const struct iio_mount_matrix *matrix;
1048 if (chan->type == IIO_MAGN)
1049 matrix = &data->magn_orient;
1051 matrix = &data->orientation;
1056 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
1057 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
1061 #define INV_MPU6050_CHAN(_type, _channel2, _index) \
1065 .channel2 = _channel2, \
1066 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
1067 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1068 BIT(IIO_CHAN_INFO_CALIBBIAS), \
1069 .scan_index = _index, \
1073 .storagebits = 16, \
1075 .endianness = IIO_BE, \
1077 .ext_info = inv_ext_info, \
1080 #define INV_MPU6050_TEMP_CHAN(_index) \
1083 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
1084 | BIT(IIO_CHAN_INFO_OFFSET) \
1085 | BIT(IIO_CHAN_INFO_SCALE), \
1086 .scan_index = _index, \
1090 .storagebits = 16, \
1092 .endianness = IIO_BE, \
1096 static const struct iio_chan_spec inv_mpu_channels[] = {
1097 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
1099 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1101 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1102 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1103 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1105 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1106 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1107 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1110 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \
1111 (BIT(INV_MPU6050_SCAN_ACCL_X) \
1112 | BIT(INV_MPU6050_SCAN_ACCL_Y) \
1113 | BIT(INV_MPU6050_SCAN_ACCL_Z))
1115 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \
1116 (BIT(INV_MPU6050_SCAN_GYRO_X) \
1117 | BIT(INV_MPU6050_SCAN_GYRO_Y) \
1118 | BIT(INV_MPU6050_SCAN_GYRO_Z))
1120 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP))
1122 static const unsigned long inv_mpu_scan_masks[] = {
1124 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1125 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1127 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1128 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1129 /* 6-axis accel + gyro */
1130 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1131 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1132 | INV_MPU6050_SCAN_MASK_TEMP,
1136 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \
1140 .channel2 = _chan2, \
1141 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \
1142 BIT(IIO_CHAN_INFO_RAW), \
1143 .scan_index = _index, \
1146 .realbits = _bits, \
1147 .storagebits = 16, \
1149 .endianness = IIO_BE, \
1151 .ext_info = inv_ext_info, \
1154 static const struct iio_chan_spec inv_mpu9150_channels[] = {
1155 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1157 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1159 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1160 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1161 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1163 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1164 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1165 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1167 /* Magnetometer resolution is 13 bits */
1168 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X),
1169 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y),
1170 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z),
1173 static const struct iio_chan_spec inv_mpu9250_channels[] = {
1174 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1176 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1178 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1179 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1180 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1182 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1183 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1184 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1186 /* Magnetometer resolution is 16 bits */
1187 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X),
1188 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y),
1189 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z),
1192 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \
1193 (BIT(INV_MPU9X50_SCAN_MAGN_X) \
1194 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \
1195 | BIT(INV_MPU9X50_SCAN_MAGN_Z))
1197 static const unsigned long inv_mpu9x50_scan_masks[] = {
1199 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1200 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1202 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1203 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1205 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1206 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP,
1207 /* 6-axis accel + gyro */
1208 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1209 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1210 | INV_MPU6050_SCAN_MASK_TEMP,
1211 /* 6-axis accel + magn */
1212 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1213 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1214 | INV_MPU6050_SCAN_MASK_TEMP,
1215 /* 6-axis gyro + magn */
1216 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1217 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1218 | INV_MPU6050_SCAN_MASK_TEMP,
1219 /* 9-axis accel + gyro + magn */
1220 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1221 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1222 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1223 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1224 | INV_MPU6050_SCAN_MASK_TEMP,
1228 static const unsigned long inv_icm20602_scan_masks[] = {
1229 /* 3-axis accel + temp (mandatory) */
1230 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1231 /* 3-axis gyro + temp (mandatory) */
1232 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1233 /* 6-axis accel + gyro + temp (mandatory) */
1234 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1235 | INV_MPU6050_SCAN_MASK_TEMP,
1240 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
1241 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
1242 * low-pass filter. Specifically, each of these sampling rates are about twice
1243 * the bandwidth of a corresponding low-pass filter, which should eliminate
1244 * aliasing following the Nyquist principle. By picking a frequency different
1245 * from these, the user risks aliasing effects.
1247 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
1248 static IIO_CONST_ATTR(in_anglvel_scale_available,
1249 "0.000133090 0.000266181 0.000532362 0.001064724");
1250 static IIO_CONST_ATTR(in_accel_scale_available,
1251 "0.000598 0.001196 0.002392 0.004785");
1252 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
1253 inv_mpu6050_fifo_rate_store);
1255 /* Deprecated: kept for userspace backward compatibility. */
1256 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
1258 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
1261 static struct attribute *inv_attributes[] = {
1262 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */
1263 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
1264 &iio_dev_attr_sampling_frequency.dev_attr.attr,
1265 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1266 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
1267 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
1271 static const struct attribute_group inv_attribute_group = {
1272 .attrs = inv_attributes
1275 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev,
1277 unsigned int writeval,
1278 unsigned int *readval)
1280 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1283 mutex_lock(&st->lock);
1285 ret = regmap_read(st->map, reg, readval);
1287 ret = regmap_write(st->map, reg, writeval);
1288 mutex_unlock(&st->lock);
1293 static const struct iio_info mpu_info = {
1294 .read_raw = &inv_mpu6050_read_raw,
1295 .write_raw = &inv_mpu6050_write_raw,
1296 .write_raw_get_fmt = &inv_write_raw_get_fmt,
1297 .attrs = &inv_attribute_group,
1298 .validate_trigger = inv_mpu6050_validate_trigger,
1299 .debugfs_reg_access = &inv_mpu6050_reg_access,
1303 * inv_check_and_setup_chip() - check and setup chip.
1305 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
1308 unsigned int regval, mask;
1311 st->hw = &hw_info[st->chip_type];
1312 st->reg = hw_info[st->chip_type].reg;
1313 memcpy(&st->chip_config, hw_info[st->chip_type].config,
1314 sizeof(st->chip_config));
1316 /* check chip self-identification */
1317 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val);
1320 if (regval != st->hw->whoami) {
1321 /* check whoami against all possible values */
1322 for (i = 0; i < INV_NUM_PARTS; ++i) {
1323 if (regval == hw_info[i].whoami) {
1324 dev_warn(regmap_get_device(st->map),
1325 "whoami mismatch got 0x%02x (%s) expected 0x%02x (%s)\n",
1326 regval, hw_info[i].name,
1327 st->hw->whoami, st->hw->name);
1331 if (i >= INV_NUM_PARTS) {
1332 dev_err(regmap_get_device(st->map),
1333 "invalid whoami 0x%02x expected 0x%02x (%s)\n",
1334 regval, st->hw->whoami, st->hw->name);
1339 /* reset to make sure previous state are not there */
1340 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
1341 INV_MPU6050_BIT_H_RESET);
1344 msleep(INV_MPU6050_POWER_UP_TIME);
1345 switch (st->chip_type) {
1352 /* reset signal path (required for spi connection) */
1353 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST |
1354 INV_MPU6050_BIT_GYRO_RST;
1355 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET,
1359 msleep(INV_MPU6050_POWER_UP_TIME);
1366 * Turn power on. After reset, the sleep bit could be on
1367 * or off depending on the OTP settings. Turning power on
1368 * make it in a definite state as well as making the hardware
1369 * state align with the software state
1371 result = inv_mpu6050_set_power_itg(st, true);
1374 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
1375 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
1376 result = inv_mpu6050_switch_engine(st, false, mask);
1378 goto error_power_off;
1383 inv_mpu6050_set_power_itg(st, false);
1387 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st)
1391 result = regulator_enable(st->vddio_supply);
1393 dev_err(regmap_get_device(st->map),
1394 "Failed to enable vddio regulator: %d\n", result);
1396 /* Give the device a little bit of time to start up. */
1397 usleep_range(3000, 5000);
1403 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st)
1407 result = regulator_disable(st->vddio_supply);
1409 dev_err(regmap_get_device(st->map),
1410 "Failed to disable vddio regulator: %d\n", result);
1415 static void inv_mpu_core_disable_regulator_action(void *_data)
1417 struct inv_mpu6050_state *st = _data;
1420 result = regulator_disable(st->vdd_supply);
1422 dev_err(regmap_get_device(st->map),
1423 "Failed to disable vdd regulator: %d\n", result);
1425 inv_mpu_core_disable_regulator_vddio(st);
1428 static void inv_mpu_pm_disable(void *data)
1430 struct device *dev = data;
1432 pm_runtime_disable(dev);
1435 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
1436 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
1438 struct inv_mpu6050_state *st;
1439 struct iio_dev *indio_dev;
1440 struct inv_mpu6050_platform_data *pdata;
1441 struct device *dev = regmap_get_device(regmap);
1443 struct irq_data *desc;
1446 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1450 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
1451 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
1452 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
1456 st = iio_priv(indio_dev);
1457 mutex_init(&st->lock);
1458 st->chip_type = chip_type;
1462 pdata = dev_get_platdata(dev);
1464 result = iio_read_mount_matrix(dev, &st->orientation);
1466 dev_err(dev, "Failed to retrieve mounting matrix %d\n",
1471 st->plat_data = *pdata;
1475 desc = irq_get_irq_data(irq);
1477 dev_err(dev, "Could not find IRQ %d\n", irq);
1481 irq_type = irqd_get_trigger_type(desc);
1483 irq_type = IRQF_TRIGGER_RISING;
1485 /* Doesn't really matter, use the default */
1486 irq_type = IRQF_TRIGGER_RISING;
1489 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge
1490 st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
1491 else if (irq_type == IRQF_TRIGGER_FALLING)
1492 st->irq_mask = INV_MPU6050_ACTIVE_LOW;
1493 else if (irq_type == IRQF_TRIGGER_HIGH)
1494 st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
1495 INV_MPU6050_LATCH_INT_EN;
1496 else if (irq_type == IRQF_TRIGGER_LOW)
1497 st->irq_mask = INV_MPU6050_ACTIVE_LOW |
1498 INV_MPU6050_LATCH_INT_EN;
1500 dev_err(dev, "Invalid interrupt type 0x%x specified\n",
1505 st->vdd_supply = devm_regulator_get(dev, "vdd");
1506 if (IS_ERR(st->vdd_supply))
1507 return dev_err_probe(dev, PTR_ERR(st->vdd_supply),
1508 "Failed to get vdd regulator\n");
1510 st->vddio_supply = devm_regulator_get(dev, "vddio");
1511 if (IS_ERR(st->vddio_supply))
1512 return dev_err_probe(dev, PTR_ERR(st->vddio_supply),
1513 "Failed to get vddio regulator\n");
1515 result = regulator_enable(st->vdd_supply);
1517 dev_err(dev, "Failed to enable vdd regulator: %d\n", result);
1520 msleep(INV_MPU6050_POWER_UP_TIME);
1522 result = inv_mpu_core_enable_regulator_vddio(st);
1524 regulator_disable(st->vdd_supply);
1528 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action,
1531 dev_err(dev, "Failed to setup regulator cleanup action %d\n",
1536 /* fill magnetometer orientation */
1537 result = inv_mpu_magn_set_orient(st);
1541 /* power is turned on inside check chip type*/
1542 result = inv_check_and_setup_chip(st);
1546 result = inv_mpu6050_init_config(indio_dev);
1548 dev_err(dev, "Could not initialize device.\n");
1549 goto error_power_off;
1552 dev_set_drvdata(dev, indio_dev);
1553 /* name will be NULL when enumerated via ACPI */
1555 indio_dev->name = name;
1557 indio_dev->name = dev_name(dev);
1559 /* requires parent device set in indio_dev */
1560 if (inv_mpu_bus_setup) {
1561 result = inv_mpu_bus_setup(indio_dev);
1563 goto error_power_off;
1566 /* chip init is done, turning on runtime power management */
1567 result = pm_runtime_set_active(dev);
1569 goto error_power_off;
1570 pm_runtime_get_noresume(dev);
1571 pm_runtime_enable(dev);
1572 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS);
1573 pm_runtime_use_autosuspend(dev);
1574 pm_runtime_put(dev);
1575 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev);
1579 switch (chip_type) {
1581 indio_dev->channels = inv_mpu9150_channels;
1582 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels);
1583 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
1587 indio_dev->channels = inv_mpu9250_channels;
1588 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels);
1589 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
1592 indio_dev->channels = inv_mpu_channels;
1593 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1594 indio_dev->available_scan_masks = inv_icm20602_scan_masks;
1597 indio_dev->channels = inv_mpu_channels;
1598 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1599 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1603 * Use magnetometer inside the chip only if there is no i2c
1604 * auxiliary device in use. Otherwise Going back to 6-axis only.
1606 if (st->magn_disabled) {
1607 indio_dev->channels = inv_mpu_channels;
1608 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1609 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1612 indio_dev->info = &mpu_info;
1616 * The driver currently only supports buffered capture with its
1617 * own trigger. So no IRQ, no trigger, no buffer
1619 result = devm_iio_triggered_buffer_setup(dev, indio_dev,
1620 iio_pollfunc_store_time,
1621 inv_mpu6050_read_fifo,
1624 dev_err(dev, "configure buffer fail %d\n", result);
1628 result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
1630 dev_err(dev, "trigger probe fail %d\n", result);
1635 result = devm_iio_device_register(dev, indio_dev);
1637 dev_err(dev, "IIO register fail %d\n", result);
1644 inv_mpu6050_set_power_itg(st, false);
1647 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
1649 static int __maybe_unused inv_mpu_resume(struct device *dev)
1651 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1652 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1655 mutex_lock(&st->lock);
1656 result = inv_mpu_core_enable_regulator_vddio(st);
1660 result = inv_mpu6050_set_power_itg(st, true);
1664 pm_runtime_disable(dev);
1665 pm_runtime_set_active(dev);
1666 pm_runtime_enable(dev);
1668 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors);
1672 if (iio_buffer_enabled(indio_dev))
1673 result = inv_mpu6050_prepare_fifo(st, true);
1676 mutex_unlock(&st->lock);
1681 static int __maybe_unused inv_mpu_suspend(struct device *dev)
1683 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1684 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1687 mutex_lock(&st->lock);
1689 st->suspended_sensors = 0;
1690 if (pm_runtime_suspended(dev)) {
1695 if (iio_buffer_enabled(indio_dev)) {
1696 result = inv_mpu6050_prepare_fifo(st, false);
1701 if (st->chip_config.accl_en)
1702 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL;
1703 if (st->chip_config.gyro_en)
1704 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO;
1705 if (st->chip_config.temp_en)
1706 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP;
1707 if (st->chip_config.magn_en)
1708 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN;
1709 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors);
1713 result = inv_mpu6050_set_power_itg(st, false);
1717 inv_mpu_core_disable_regulator_vddio(st);
1719 mutex_unlock(&st->lock);
1724 static int __maybe_unused inv_mpu_runtime_suspend(struct device *dev)
1726 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1727 unsigned int sensors;
1730 mutex_lock(&st->lock);
1732 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
1733 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
1734 ret = inv_mpu6050_switch_engine(st, false, sensors);
1738 ret = inv_mpu6050_set_power_itg(st, false);
1742 inv_mpu_core_disable_regulator_vddio(st);
1745 mutex_unlock(&st->lock);
1749 static int __maybe_unused inv_mpu_runtime_resume(struct device *dev)
1751 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1754 ret = inv_mpu_core_enable_regulator_vddio(st);
1758 return inv_mpu6050_set_power_itg(st, true);
1761 const struct dev_pm_ops inv_mpu_pmops = {
1762 SET_SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume)
1763 SET_RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL)
1765 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
1767 MODULE_AUTHOR("Invensense Corporation");
1768 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
1769 MODULE_LICENSE("GPL");