GNU Linux-libre 4.19.314-gnu1
[releases.git] / drivers / iio / gyro / bmg160_core.c
1 /*
2  * BMG160 Gyro Sensor driver
3  * Copyright (c) 2014, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  */
14
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/delay.h>
18 #include <linux/slab.h>
19 #include <linux/acpi.h>
20 #include <linux/pm.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/iio/iio.h>
23 #include <linux/iio/sysfs.h>
24 #include <linux/iio/buffer.h>
25 #include <linux/iio/trigger.h>
26 #include <linux/iio/events.h>
27 #include <linux/iio/trigger_consumer.h>
28 #include <linux/iio/triggered_buffer.h>
29 #include <linux/regmap.h>
30 #include "bmg160.h"
31
32 #define BMG160_IRQ_NAME         "bmg160_event"
33
34 #define BMG160_REG_CHIP_ID              0x00
35 #define BMG160_CHIP_ID_VAL              0x0F
36
37 #define BMG160_REG_PMU_LPW              0x11
38 #define BMG160_MODE_NORMAL              0x00
39 #define BMG160_MODE_DEEP_SUSPEND        0x20
40 #define BMG160_MODE_SUSPEND             0x80
41
42 #define BMG160_REG_RANGE                0x0F
43
44 #define BMG160_RANGE_2000DPS            0
45 #define BMG160_RANGE_1000DPS            1
46 #define BMG160_RANGE_500DPS             2
47 #define BMG160_RANGE_250DPS             3
48 #define BMG160_RANGE_125DPS             4
49
50 #define BMG160_REG_PMU_BW               0x10
51 #define BMG160_NO_FILTER                0
52 #define BMG160_DEF_BW                   100
53 #define BMG160_REG_PMU_BW_RES           BIT(7)
54
55 #define BMG160_GYRO_REG_RESET           0x14
56 #define BMG160_GYRO_RESET_VAL           0xb6
57
58 #define BMG160_REG_INT_MAP_0            0x17
59 #define BMG160_INT_MAP_0_BIT_ANY        BIT(1)
60
61 #define BMG160_REG_INT_MAP_1            0x18
62 #define BMG160_INT_MAP_1_BIT_NEW_DATA   BIT(0)
63
64 #define BMG160_REG_INT_RST_LATCH        0x21
65 #define BMG160_INT_MODE_LATCH_RESET     0x80
66 #define BMG160_INT_MODE_LATCH_INT       0x0F
67 #define BMG160_INT_MODE_NON_LATCH_INT   0x00
68
69 #define BMG160_REG_INT_EN_0             0x15
70 #define BMG160_DATA_ENABLE_INT          BIT(7)
71
72 #define BMG160_REG_INT_EN_1             0x16
73 #define BMG160_INT1_BIT_OD              BIT(1)
74
75 #define BMG160_REG_XOUT_L               0x02
76 #define BMG160_AXIS_TO_REG(axis)        (BMG160_REG_XOUT_L + (axis * 2))
77
78 #define BMG160_REG_SLOPE_THRES          0x1B
79 #define BMG160_SLOPE_THRES_MASK 0x0F
80
81 #define BMG160_REG_MOTION_INTR          0x1C
82 #define BMG160_INT_MOTION_X             BIT(0)
83 #define BMG160_INT_MOTION_Y             BIT(1)
84 #define BMG160_INT_MOTION_Z             BIT(2)
85 #define BMG160_ANY_DUR_MASK             0x30
86 #define BMG160_ANY_DUR_SHIFT            4
87
88 #define BMG160_REG_INT_STATUS_2 0x0B
89 #define BMG160_ANY_MOTION_MASK          0x07
90 #define BMG160_ANY_MOTION_BIT_X         BIT(0)
91 #define BMG160_ANY_MOTION_BIT_Y         BIT(1)
92 #define BMG160_ANY_MOTION_BIT_Z         BIT(2)
93
94 #define BMG160_REG_TEMP         0x08
95 #define BMG160_TEMP_CENTER_VAL          23
96
97 #define BMG160_MAX_STARTUP_TIME_MS      80
98
99 #define BMG160_AUTO_SUSPEND_DELAY_MS    2000
100
101 struct bmg160_data {
102         struct regmap *regmap;
103         struct iio_trigger *dready_trig;
104         struct iio_trigger *motion_trig;
105         struct mutex mutex;
106         /* Ensure naturally aligned timestamp */
107         struct {
108                 s16 chans[3];
109                 s64 timestamp __aligned(8);
110         } scan;
111         u32 dps_range;
112         int ev_enable_state;
113         int slope_thres;
114         bool dready_trigger_on;
115         bool motion_trigger_on;
116         int irq;
117 };
118
119 enum bmg160_axis {
120         AXIS_X,
121         AXIS_Y,
122         AXIS_Z,
123         AXIS_MAX,
124 };
125
126 static const struct {
127         int odr;
128         int filter;
129         int bw_bits;
130 } bmg160_samp_freq_table[] = { {100, 32, 0x07},
131                                {200, 64, 0x06},
132                                {100, 12, 0x05},
133                                {200, 23, 0x04},
134                                {400, 47, 0x03},
135                                {1000, 116, 0x02},
136                                {2000, 230, 0x01} };
137
138 static const struct {
139         int scale;
140         int dps_range;
141 } bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
142                            { 532, BMG160_RANGE_1000DPS},
143                            { 266, BMG160_RANGE_500DPS},
144                            { 133, BMG160_RANGE_250DPS},
145                            { 66, BMG160_RANGE_125DPS} };
146
147 static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
148 {
149         struct device *dev = regmap_get_device(data->regmap);
150         int ret;
151
152         ret = regmap_write(data->regmap, BMG160_REG_PMU_LPW, mode);
153         if (ret < 0) {
154                 dev_err(dev, "Error writing reg_pmu_lpw\n");
155                 return ret;
156         }
157
158         return 0;
159 }
160
161 static int bmg160_convert_freq_to_bit(int val)
162 {
163         int i;
164
165         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
166                 if (bmg160_samp_freq_table[i].odr == val)
167                         return bmg160_samp_freq_table[i].bw_bits;
168         }
169
170         return -EINVAL;
171 }
172
173 static int bmg160_set_bw(struct bmg160_data *data, int val)
174 {
175         struct device *dev = regmap_get_device(data->regmap);
176         int ret;
177         int bw_bits;
178
179         bw_bits = bmg160_convert_freq_to_bit(val);
180         if (bw_bits < 0)
181                 return bw_bits;
182
183         ret = regmap_write(data->regmap, BMG160_REG_PMU_BW, bw_bits);
184         if (ret < 0) {
185                 dev_err(dev, "Error writing reg_pmu_bw\n");
186                 return ret;
187         }
188
189         return 0;
190 }
191
192 static int bmg160_get_filter(struct bmg160_data *data, int *val)
193 {
194         struct device *dev = regmap_get_device(data->regmap);
195         int ret;
196         int i;
197         unsigned int bw_bits;
198
199         ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
200         if (ret < 0) {
201                 dev_err(dev, "Error reading reg_pmu_bw\n");
202                 return ret;
203         }
204
205         /* Ignore the readonly reserved bit. */
206         bw_bits &= ~BMG160_REG_PMU_BW_RES;
207
208         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
209                 if (bmg160_samp_freq_table[i].bw_bits == bw_bits)
210                         break;
211         }
212
213         *val = bmg160_samp_freq_table[i].filter;
214
215         return ret ? ret : IIO_VAL_INT;
216 }
217
218
219 static int bmg160_set_filter(struct bmg160_data *data, int val)
220 {
221         struct device *dev = regmap_get_device(data->regmap);
222         int ret;
223         int i;
224
225         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
226                 if (bmg160_samp_freq_table[i].filter == val)
227                         break;
228         }
229
230         ret = regmap_write(data->regmap, BMG160_REG_PMU_BW,
231                            bmg160_samp_freq_table[i].bw_bits);
232         if (ret < 0) {
233                 dev_err(dev, "Error writing reg_pmu_bw\n");
234                 return ret;
235         }
236
237         return 0;
238 }
239
240 static int bmg160_chip_init(struct bmg160_data *data)
241 {
242         struct device *dev = regmap_get_device(data->regmap);
243         int ret;
244         unsigned int val;
245
246         /*
247          * Reset chip to get it in a known good state. A delay of 30ms after
248          * reset is required according to the datasheet.
249          */
250         regmap_write(data->regmap, BMG160_GYRO_REG_RESET,
251                      BMG160_GYRO_RESET_VAL);
252         usleep_range(30000, 30700);
253
254         ret = regmap_read(data->regmap, BMG160_REG_CHIP_ID, &val);
255         if (ret < 0) {
256                 dev_err(dev, "Error reading reg_chip_id\n");
257                 return ret;
258         }
259
260         dev_dbg(dev, "Chip Id %x\n", val);
261         if (val != BMG160_CHIP_ID_VAL) {
262                 dev_err(dev, "invalid chip %x\n", val);
263                 return -ENODEV;
264         }
265
266         ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
267         if (ret < 0)
268                 return ret;
269
270         /* Wait upto 500 ms to be ready after changing mode */
271         usleep_range(500, 1000);
272
273         /* Set Bandwidth */
274         ret = bmg160_set_bw(data, BMG160_DEF_BW);
275         if (ret < 0)
276                 return ret;
277
278         /* Set Default Range */
279         ret = regmap_write(data->regmap, BMG160_REG_RANGE, BMG160_RANGE_500DPS);
280         if (ret < 0) {
281                 dev_err(dev, "Error writing reg_range\n");
282                 return ret;
283         }
284         data->dps_range = BMG160_RANGE_500DPS;
285
286         ret = regmap_read(data->regmap, BMG160_REG_SLOPE_THRES, &val);
287         if (ret < 0) {
288                 dev_err(dev, "Error reading reg_slope_thres\n");
289                 return ret;
290         }
291         data->slope_thres = val;
292
293         /* Set default interrupt mode */
294         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_EN_1,
295                                  BMG160_INT1_BIT_OD, 0);
296         if (ret < 0) {
297                 dev_err(dev, "Error updating bits in reg_int_en_1\n");
298                 return ret;
299         }
300
301         ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
302                            BMG160_INT_MODE_LATCH_INT |
303                            BMG160_INT_MODE_LATCH_RESET);
304         if (ret < 0) {
305                 dev_err(dev,
306                         "Error writing reg_motion_intr\n");
307                 return ret;
308         }
309
310         return 0;
311 }
312
313 static int bmg160_set_power_state(struct bmg160_data *data, bool on)
314 {
315 #ifdef CONFIG_PM
316         struct device *dev = regmap_get_device(data->regmap);
317         int ret;
318
319         if (on)
320                 ret = pm_runtime_get_sync(dev);
321         else {
322                 pm_runtime_mark_last_busy(dev);
323                 ret = pm_runtime_put_autosuspend(dev);
324         }
325
326         if (ret < 0) {
327                 dev_err(dev, "Failed: bmg160_set_power_state for %d\n", on);
328
329                 if (on)
330                         pm_runtime_put_noidle(dev);
331
332                 return ret;
333         }
334 #endif
335
336         return 0;
337 }
338
339 static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
340                                              bool status)
341 {
342         struct device *dev = regmap_get_device(data->regmap);
343         int ret;
344
345         /* Enable/Disable INT_MAP0 mapping */
346         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_0,
347                                  BMG160_INT_MAP_0_BIT_ANY,
348                                  (status ? BMG160_INT_MAP_0_BIT_ANY : 0));
349         if (ret < 0) {
350                 dev_err(dev, "Error updating bits reg_int_map0\n");
351                 return ret;
352         }
353
354         /* Enable/Disable slope interrupts */
355         if (status) {
356                 /* Update slope thres */
357                 ret = regmap_write(data->regmap, BMG160_REG_SLOPE_THRES,
358                                    data->slope_thres);
359                 if (ret < 0) {
360                         dev_err(dev, "Error writing reg_slope_thres\n");
361                         return ret;
362                 }
363
364                 ret = regmap_write(data->regmap, BMG160_REG_MOTION_INTR,
365                                    BMG160_INT_MOTION_X | BMG160_INT_MOTION_Y |
366                                    BMG160_INT_MOTION_Z);
367                 if (ret < 0) {
368                         dev_err(dev, "Error writing reg_motion_intr\n");
369                         return ret;
370                 }
371
372                 /*
373                  * New data interrupt is always non-latched,
374                  * which will have higher priority, so no need
375                  * to set latched mode, we will be flooded anyway with INTR
376                  */
377                 if (!data->dready_trigger_on) {
378                         ret = regmap_write(data->regmap,
379                                            BMG160_REG_INT_RST_LATCH,
380                                            BMG160_INT_MODE_LATCH_INT |
381                                            BMG160_INT_MODE_LATCH_RESET);
382                         if (ret < 0) {
383                                 dev_err(dev, "Error writing reg_rst_latch\n");
384                                 return ret;
385                         }
386                 }
387
388                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
389                                    BMG160_DATA_ENABLE_INT);
390
391         } else {
392                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
393         }
394
395         if (ret < 0) {
396                 dev_err(dev, "Error writing reg_int_en0\n");
397                 return ret;
398         }
399
400         return 0;
401 }
402
403 static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
404                                            bool status)
405 {
406         struct device *dev = regmap_get_device(data->regmap);
407         int ret;
408
409         /* Enable/Disable INT_MAP1 mapping */
410         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_1,
411                                  BMG160_INT_MAP_1_BIT_NEW_DATA,
412                                  (status ? BMG160_INT_MAP_1_BIT_NEW_DATA : 0));
413         if (ret < 0) {
414                 dev_err(dev, "Error updating bits in reg_int_map1\n");
415                 return ret;
416         }
417
418         if (status) {
419                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
420                                    BMG160_INT_MODE_NON_LATCH_INT |
421                                    BMG160_INT_MODE_LATCH_RESET);
422                 if (ret < 0) {
423                         dev_err(dev, "Error writing reg_rst_latch\n");
424                         return ret;
425                 }
426
427                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
428                                    BMG160_DATA_ENABLE_INT);
429
430         } else {
431                 /* Restore interrupt mode */
432                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
433                                    BMG160_INT_MODE_LATCH_INT |
434                                    BMG160_INT_MODE_LATCH_RESET);
435                 if (ret < 0) {
436                         dev_err(dev, "Error writing reg_rst_latch\n");
437                         return ret;
438                 }
439
440                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
441         }
442
443         if (ret < 0) {
444                 dev_err(dev, "Error writing reg_int_en0\n");
445                 return ret;
446         }
447
448         return 0;
449 }
450
451 static int bmg160_get_bw(struct bmg160_data *data, int *val)
452 {
453         struct device *dev = regmap_get_device(data->regmap);   
454         int i;
455         unsigned int bw_bits;
456         int ret;
457
458         ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
459         if (ret < 0) {
460                 dev_err(dev, "Error reading reg_pmu_bw\n");
461                 return ret;
462         }
463
464         /* Ignore the readonly reserved bit. */
465         bw_bits &= ~BMG160_REG_PMU_BW_RES;
466
467         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
468                 if (bmg160_samp_freq_table[i].bw_bits == bw_bits) {
469                         *val = bmg160_samp_freq_table[i].odr;
470                         return IIO_VAL_INT;
471                 }
472         }
473
474         return -EINVAL;
475 }
476
477 static int bmg160_set_scale(struct bmg160_data *data, int val)
478 {
479         struct device *dev = regmap_get_device(data->regmap);
480         int ret, i;
481
482         for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
483                 if (bmg160_scale_table[i].scale == val) {
484                         ret = regmap_write(data->regmap, BMG160_REG_RANGE,
485                                            bmg160_scale_table[i].dps_range);
486                         if (ret < 0) {
487                                 dev_err(dev, "Error writing reg_range\n");
488                                 return ret;
489                         }
490                         data->dps_range = bmg160_scale_table[i].dps_range;
491                         return 0;
492                 }
493         }
494
495         return -EINVAL;
496 }
497
498 static int bmg160_get_temp(struct bmg160_data *data, int *val)
499 {
500         struct device *dev = regmap_get_device(data->regmap);
501         int ret;
502         unsigned int raw_val;
503
504         mutex_lock(&data->mutex);
505         ret = bmg160_set_power_state(data, true);
506         if (ret < 0) {
507                 mutex_unlock(&data->mutex);
508                 return ret;
509         }
510
511         ret = regmap_read(data->regmap, BMG160_REG_TEMP, &raw_val);
512         if (ret < 0) {
513                 dev_err(dev, "Error reading reg_temp\n");
514                 bmg160_set_power_state(data, false);
515                 mutex_unlock(&data->mutex);
516                 return ret;
517         }
518
519         *val = sign_extend32(raw_val, 7);
520         ret = bmg160_set_power_state(data, false);
521         mutex_unlock(&data->mutex);
522         if (ret < 0)
523                 return ret;
524
525         return IIO_VAL_INT;
526 }
527
528 static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
529 {
530         struct device *dev = regmap_get_device(data->regmap);
531         int ret;
532         __le16 raw_val;
533
534         mutex_lock(&data->mutex);
535         ret = bmg160_set_power_state(data, true);
536         if (ret < 0) {
537                 mutex_unlock(&data->mutex);
538                 return ret;
539         }
540
541         ret = regmap_bulk_read(data->regmap, BMG160_AXIS_TO_REG(axis), &raw_val,
542                                sizeof(raw_val));
543         if (ret < 0) {
544                 dev_err(dev, "Error reading axis %d\n", axis);
545                 bmg160_set_power_state(data, false);
546                 mutex_unlock(&data->mutex);
547                 return ret;
548         }
549
550         *val = sign_extend32(le16_to_cpu(raw_val), 15);
551         ret = bmg160_set_power_state(data, false);
552         mutex_unlock(&data->mutex);
553         if (ret < 0)
554                 return ret;
555
556         return IIO_VAL_INT;
557 }
558
559 static int bmg160_read_raw(struct iio_dev *indio_dev,
560                            struct iio_chan_spec const *chan,
561                            int *val, int *val2, long mask)
562 {
563         struct bmg160_data *data = iio_priv(indio_dev);
564         int ret;
565
566         switch (mask) {
567         case IIO_CHAN_INFO_RAW:
568                 switch (chan->type) {
569                 case IIO_TEMP:
570                         return bmg160_get_temp(data, val);
571                 case IIO_ANGL_VEL:
572                         if (iio_buffer_enabled(indio_dev))
573                                 return -EBUSY;
574                         else
575                                 return bmg160_get_axis(data, chan->scan_index,
576                                                        val);
577                 default:
578                         return -EINVAL;
579                 }
580         case IIO_CHAN_INFO_OFFSET:
581                 if (chan->type == IIO_TEMP) {
582                         *val = BMG160_TEMP_CENTER_VAL;
583                         return IIO_VAL_INT;
584                 } else
585                         return -EINVAL;
586         case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
587                 return bmg160_get_filter(data, val);
588         case IIO_CHAN_INFO_SCALE:
589                 switch (chan->type) {
590                 case IIO_TEMP:
591                         *val = 500;
592                         return IIO_VAL_INT;
593                 case IIO_ANGL_VEL:
594                 {
595                         int i;
596
597                         for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
598                                 if (bmg160_scale_table[i].dps_range ==
599                                                         data->dps_range) {
600                                         *val = 0;
601                                         *val2 = bmg160_scale_table[i].scale;
602                                         return IIO_VAL_INT_PLUS_MICRO;
603                                 }
604                         }
605                         return -EINVAL;
606                 }
607                 default:
608                         return -EINVAL;
609                 }
610         case IIO_CHAN_INFO_SAMP_FREQ:
611                 *val2 = 0;
612                 mutex_lock(&data->mutex);
613                 ret = bmg160_get_bw(data, val);
614                 mutex_unlock(&data->mutex);
615                 return ret;
616         default:
617                 return -EINVAL;
618         }
619 }
620
621 static int bmg160_write_raw(struct iio_dev *indio_dev,
622                             struct iio_chan_spec const *chan,
623                             int val, int val2, long mask)
624 {
625         struct bmg160_data *data = iio_priv(indio_dev);
626         int ret;
627
628         switch (mask) {
629         case IIO_CHAN_INFO_SAMP_FREQ:
630                 mutex_lock(&data->mutex);
631                 /*
632                  * Section 4.2 of spec
633                  * In suspend mode, the only supported operations are reading
634                  * registers as well as writing to the (0x14) softreset
635                  * register. Since we will be in suspend mode by default, change
636                  * mode to power on for other writes.
637                  */
638                 ret = bmg160_set_power_state(data, true);
639                 if (ret < 0) {
640                         mutex_unlock(&data->mutex);
641                         return ret;
642                 }
643                 ret = bmg160_set_bw(data, val);
644                 if (ret < 0) {
645                         bmg160_set_power_state(data, false);
646                         mutex_unlock(&data->mutex);
647                         return ret;
648                 }
649                 ret = bmg160_set_power_state(data, false);
650                 mutex_unlock(&data->mutex);
651                 return ret;
652         case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
653                 if (val2)
654                         return -EINVAL;
655
656                 mutex_lock(&data->mutex);
657                 ret = bmg160_set_power_state(data, true);
658                 if (ret < 0) {
659                         bmg160_set_power_state(data, false);
660                         mutex_unlock(&data->mutex);
661                         return ret;
662                 }
663                 ret = bmg160_set_filter(data, val);
664                 if (ret < 0) {
665                         bmg160_set_power_state(data, false);
666                         mutex_unlock(&data->mutex);
667                         return ret;
668                 }
669                 ret = bmg160_set_power_state(data, false);
670                 mutex_unlock(&data->mutex);
671                 return ret;
672         case IIO_CHAN_INFO_SCALE:
673                 if (val)
674                         return -EINVAL;
675
676                 mutex_lock(&data->mutex);
677                 /* Refer to comments above for the suspend mode ops */
678                 ret = bmg160_set_power_state(data, true);
679                 if (ret < 0) {
680                         mutex_unlock(&data->mutex);
681                         return ret;
682                 }
683                 ret = bmg160_set_scale(data, val2);
684                 if (ret < 0) {
685                         bmg160_set_power_state(data, false);
686                         mutex_unlock(&data->mutex);
687                         return ret;
688                 }
689                 ret = bmg160_set_power_state(data, false);
690                 mutex_unlock(&data->mutex);
691                 return ret;
692         default:
693                 return -EINVAL;
694         }
695
696         return -EINVAL;
697 }
698
699 static int bmg160_read_event(struct iio_dev *indio_dev,
700                              const struct iio_chan_spec *chan,
701                              enum iio_event_type type,
702                              enum iio_event_direction dir,
703                              enum iio_event_info info,
704                              int *val, int *val2)
705 {
706         struct bmg160_data *data = iio_priv(indio_dev);
707
708         *val2 = 0;
709         switch (info) {
710         case IIO_EV_INFO_VALUE:
711                 *val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
712                 break;
713         default:
714                 return -EINVAL;
715         }
716
717         return IIO_VAL_INT;
718 }
719
720 static int bmg160_write_event(struct iio_dev *indio_dev,
721                               const struct iio_chan_spec *chan,
722                               enum iio_event_type type,
723                               enum iio_event_direction dir,
724                               enum iio_event_info info,
725                               int val, int val2)
726 {
727         struct bmg160_data *data = iio_priv(indio_dev);
728
729         switch (info) {
730         case IIO_EV_INFO_VALUE:
731                 if (data->ev_enable_state)
732                         return -EBUSY;
733                 data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
734                 data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
735                 break;
736         default:
737                 return -EINVAL;
738         }
739
740         return 0;
741 }
742
743 static int bmg160_read_event_config(struct iio_dev *indio_dev,
744                                     const struct iio_chan_spec *chan,
745                                     enum iio_event_type type,
746                                     enum iio_event_direction dir)
747 {
748
749         struct bmg160_data *data = iio_priv(indio_dev);
750
751         return data->ev_enable_state;
752 }
753
754 static int bmg160_write_event_config(struct iio_dev *indio_dev,
755                                      const struct iio_chan_spec *chan,
756                                      enum iio_event_type type,
757                                      enum iio_event_direction dir,
758                                      int state)
759 {
760         struct bmg160_data *data = iio_priv(indio_dev);
761         int ret;
762
763         if (state && data->ev_enable_state)
764                 return 0;
765
766         mutex_lock(&data->mutex);
767
768         if (!state && data->motion_trigger_on) {
769                 data->ev_enable_state = 0;
770                 mutex_unlock(&data->mutex);
771                 return 0;
772         }
773         /*
774          * We will expect the enable and disable to do operation in
775          * in reverse order. This will happen here anyway as our
776          * resume operation uses sync mode runtime pm calls, the
777          * suspend operation will be delayed by autosuspend delay
778          * So the disable operation will still happen in reverse of
779          * enable operation. When runtime pm is disabled the mode
780          * is always on so sequence doesn't matter
781          */
782         ret = bmg160_set_power_state(data, state);
783         if (ret < 0) {
784                 mutex_unlock(&data->mutex);
785                 return ret;
786         }
787
788         ret =  bmg160_setup_any_motion_interrupt(data, state);
789         if (ret < 0) {
790                 bmg160_set_power_state(data, false);
791                 mutex_unlock(&data->mutex);
792                 return ret;
793         }
794
795         data->ev_enable_state = state;
796         mutex_unlock(&data->mutex);
797
798         return 0;
799 }
800
801 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
802
803 static IIO_CONST_ATTR(in_anglvel_scale_available,
804                       "0.001065 0.000532 0.000266 0.000133 0.000066");
805
806 static struct attribute *bmg160_attributes[] = {
807         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
808         &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
809         NULL,
810 };
811
812 static const struct attribute_group bmg160_attrs_group = {
813         .attrs = bmg160_attributes,
814 };
815
816 static const struct iio_event_spec bmg160_event = {
817                 .type = IIO_EV_TYPE_ROC,
818                 .dir = IIO_EV_DIR_EITHER,
819                 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
820                                        BIT(IIO_EV_INFO_ENABLE)
821 };
822
823 #define BMG160_CHANNEL(_axis) {                                 \
824         .type = IIO_ANGL_VEL,                                           \
825         .modified = 1,                                                  \
826         .channel2 = IIO_MOD_##_axis,                                    \
827         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),                   \
828         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |          \
829                 BIT(IIO_CHAN_INFO_SAMP_FREQ) |                          \
830                 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),       \
831         .scan_index = AXIS_##_axis,                                     \
832         .scan_type = {                                                  \
833                 .sign = 's',                                            \
834                 .realbits = 16,                                 \
835                 .storagebits = 16,                                      \
836                 .endianness = IIO_LE,                                   \
837         },                                                              \
838         .event_spec = &bmg160_event,                                    \
839         .num_event_specs = 1                                            \
840 }
841
842 static const struct iio_chan_spec bmg160_channels[] = {
843         {
844                 .type = IIO_TEMP,
845                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
846                                       BIT(IIO_CHAN_INFO_SCALE) |
847                                       BIT(IIO_CHAN_INFO_OFFSET),
848                 .scan_index = -1,
849         },
850         BMG160_CHANNEL(X),
851         BMG160_CHANNEL(Y),
852         BMG160_CHANNEL(Z),
853         IIO_CHAN_SOFT_TIMESTAMP(3),
854 };
855
856 static const struct iio_info bmg160_info = {
857         .attrs                  = &bmg160_attrs_group,
858         .read_raw               = bmg160_read_raw,
859         .write_raw              = bmg160_write_raw,
860         .read_event_value       = bmg160_read_event,
861         .write_event_value      = bmg160_write_event,
862         .write_event_config     = bmg160_write_event_config,
863         .read_event_config      = bmg160_read_event_config,
864 };
865
866 static const unsigned long bmg160_accel_scan_masks[] = {
867                                         BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
868                                         0};
869
870 static irqreturn_t bmg160_trigger_handler(int irq, void *p)
871 {
872         struct iio_poll_func *pf = p;
873         struct iio_dev *indio_dev = pf->indio_dev;
874         struct bmg160_data *data = iio_priv(indio_dev);
875         int ret;
876
877         mutex_lock(&data->mutex);
878         ret = regmap_bulk_read(data->regmap, BMG160_REG_XOUT_L,
879                                data->scan.chans, AXIS_MAX * 2);
880         mutex_unlock(&data->mutex);
881         if (ret < 0)
882                 goto err;
883
884         iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
885                                            pf->timestamp);
886 err:
887         iio_trigger_notify_done(indio_dev->trig);
888
889         return IRQ_HANDLED;
890 }
891
892 static int bmg160_trig_try_reen(struct iio_trigger *trig)
893 {
894         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
895         struct bmg160_data *data = iio_priv(indio_dev);
896         struct device *dev = regmap_get_device(data->regmap);
897         int ret;
898
899         /* new data interrupts don't need ack */
900         if (data->dready_trigger_on)
901                 return 0;
902
903         /* Set latched mode interrupt and clear any latched interrupt */
904         ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
905                            BMG160_INT_MODE_LATCH_INT |
906                            BMG160_INT_MODE_LATCH_RESET);
907         if (ret < 0) {
908                 dev_err(dev, "Error writing reg_rst_latch\n");
909                 return ret;
910         }
911
912         return 0;
913 }
914
915 static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
916                                              bool state)
917 {
918         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
919         struct bmg160_data *data = iio_priv(indio_dev);
920         int ret;
921
922         mutex_lock(&data->mutex);
923
924         if (!state && data->ev_enable_state && data->motion_trigger_on) {
925                 data->motion_trigger_on = false;
926                 mutex_unlock(&data->mutex);
927                 return 0;
928         }
929
930         /*
931          * Refer to comment in bmg160_write_event_config for
932          * enable/disable operation order
933          */
934         ret = bmg160_set_power_state(data, state);
935         if (ret < 0) {
936                 mutex_unlock(&data->mutex);
937                 return ret;
938         }
939         if (data->motion_trig == trig)
940                 ret =  bmg160_setup_any_motion_interrupt(data, state);
941         else
942                 ret = bmg160_setup_new_data_interrupt(data, state);
943         if (ret < 0) {
944                 bmg160_set_power_state(data, false);
945                 mutex_unlock(&data->mutex);
946                 return ret;
947         }
948         if (data->motion_trig == trig)
949                 data->motion_trigger_on = state;
950         else
951                 data->dready_trigger_on = state;
952
953         mutex_unlock(&data->mutex);
954
955         return 0;
956 }
957
958 static const struct iio_trigger_ops bmg160_trigger_ops = {
959         .set_trigger_state = bmg160_data_rdy_trigger_set_state,
960         .try_reenable = bmg160_trig_try_reen,
961 };
962
963 static irqreturn_t bmg160_event_handler(int irq, void *private)
964 {
965         struct iio_dev *indio_dev = private;
966         struct bmg160_data *data = iio_priv(indio_dev);
967         struct device *dev = regmap_get_device(data->regmap);
968         int ret;
969         int dir;
970         unsigned int val;
971
972         ret = regmap_read(data->regmap, BMG160_REG_INT_STATUS_2, &val);
973         if (ret < 0) {
974                 dev_err(dev, "Error reading reg_int_status2\n");
975                 goto ack_intr_status;
976         }
977
978         if (val & 0x08)
979                 dir = IIO_EV_DIR_RISING;
980         else
981                 dir = IIO_EV_DIR_FALLING;
982
983         if (val & BMG160_ANY_MOTION_BIT_X)
984                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
985                                                              0,
986                                                              IIO_MOD_X,
987                                                              IIO_EV_TYPE_ROC,
988                                                              dir),
989                                iio_get_time_ns(indio_dev));
990         if (val & BMG160_ANY_MOTION_BIT_Y)
991                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
992                                                              0,
993                                                              IIO_MOD_Y,
994                                                              IIO_EV_TYPE_ROC,
995                                                              dir),
996                                iio_get_time_ns(indio_dev));
997         if (val & BMG160_ANY_MOTION_BIT_Z)
998                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
999                                                              0,
1000                                                              IIO_MOD_Z,
1001                                                              IIO_EV_TYPE_ROC,
1002                                                              dir),
1003                                iio_get_time_ns(indio_dev));
1004
1005 ack_intr_status:
1006         if (!data->dready_trigger_on) {
1007                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
1008                                    BMG160_INT_MODE_LATCH_INT |
1009                                    BMG160_INT_MODE_LATCH_RESET);
1010                 if (ret < 0)
1011                         dev_err(dev, "Error writing reg_rst_latch\n");
1012         }
1013
1014         return IRQ_HANDLED;
1015 }
1016
1017 static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
1018 {
1019         struct iio_dev *indio_dev = private;
1020         struct bmg160_data *data = iio_priv(indio_dev);
1021
1022         if (data->dready_trigger_on)
1023                 iio_trigger_poll(data->dready_trig);
1024         else if (data->motion_trigger_on)
1025                 iio_trigger_poll(data->motion_trig);
1026
1027         if (data->ev_enable_state)
1028                 return IRQ_WAKE_THREAD;
1029         else
1030                 return IRQ_HANDLED;
1031
1032 }
1033
1034 static int bmg160_buffer_preenable(struct iio_dev *indio_dev)
1035 {
1036         struct bmg160_data *data = iio_priv(indio_dev);
1037
1038         return bmg160_set_power_state(data, true);
1039 }
1040
1041 static int bmg160_buffer_postdisable(struct iio_dev *indio_dev)
1042 {
1043         struct bmg160_data *data = iio_priv(indio_dev);
1044
1045         return bmg160_set_power_state(data, false);
1046 }
1047
1048 static const struct iio_buffer_setup_ops bmg160_buffer_setup_ops = {
1049         .preenable = bmg160_buffer_preenable,
1050         .postenable = iio_triggered_buffer_postenable,
1051         .predisable = iio_triggered_buffer_predisable,
1052         .postdisable = bmg160_buffer_postdisable,
1053 };
1054
1055 static const char *bmg160_match_acpi_device(struct device *dev)
1056 {
1057         const struct acpi_device_id *id;
1058
1059         id = acpi_match_device(dev->driver->acpi_match_table, dev);
1060         if (!id)
1061                 return NULL;
1062
1063         return dev_name(dev);
1064 }
1065
1066 int bmg160_core_probe(struct device *dev, struct regmap *regmap, int irq,
1067                       const char *name)
1068 {
1069         struct bmg160_data *data;
1070         struct iio_dev *indio_dev;
1071         int ret;
1072
1073         indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1074         if (!indio_dev)
1075                 return -ENOMEM;
1076
1077         data = iio_priv(indio_dev);
1078         dev_set_drvdata(dev, indio_dev);
1079         data->irq = irq;
1080         data->regmap = regmap;
1081
1082         ret = bmg160_chip_init(data);
1083         if (ret < 0)
1084                 return ret;
1085
1086         mutex_init(&data->mutex);
1087
1088         if (ACPI_HANDLE(dev))
1089                 name = bmg160_match_acpi_device(dev);
1090
1091         indio_dev->dev.parent = dev;
1092         indio_dev->channels = bmg160_channels;
1093         indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
1094         indio_dev->name = name;
1095         indio_dev->available_scan_masks = bmg160_accel_scan_masks;
1096         indio_dev->modes = INDIO_DIRECT_MODE;
1097         indio_dev->info = &bmg160_info;
1098
1099         if (data->irq > 0) {
1100                 ret = devm_request_threaded_irq(dev,
1101                                                 data->irq,
1102                                                 bmg160_data_rdy_trig_poll,
1103                                                 bmg160_event_handler,
1104                                                 IRQF_TRIGGER_RISING,
1105                                                 BMG160_IRQ_NAME,
1106                                                 indio_dev);
1107                 if (ret)
1108                         return ret;
1109
1110                 data->dready_trig = devm_iio_trigger_alloc(dev,
1111                                                            "%s-dev%d",
1112                                                            indio_dev->name,
1113                                                            indio_dev->id);
1114                 if (!data->dready_trig)
1115                         return -ENOMEM;
1116
1117                 data->motion_trig = devm_iio_trigger_alloc(dev,
1118                                                           "%s-any-motion-dev%d",
1119                                                           indio_dev->name,
1120                                                           indio_dev->id);
1121                 if (!data->motion_trig)
1122                         return -ENOMEM;
1123
1124                 data->dready_trig->dev.parent = dev;
1125                 data->dready_trig->ops = &bmg160_trigger_ops;
1126                 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1127                 ret = iio_trigger_register(data->dready_trig);
1128                 if (ret)
1129                         return ret;
1130
1131                 data->motion_trig->dev.parent = dev;
1132                 data->motion_trig->ops = &bmg160_trigger_ops;
1133                 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1134                 ret = iio_trigger_register(data->motion_trig);
1135                 if (ret) {
1136                         data->motion_trig = NULL;
1137                         goto err_trigger_unregister;
1138                 }
1139         }
1140
1141         ret = iio_triggered_buffer_setup(indio_dev,
1142                                          iio_pollfunc_store_time,
1143                                          bmg160_trigger_handler,
1144                                          &bmg160_buffer_setup_ops);
1145         if (ret < 0) {
1146                 dev_err(dev,
1147                         "iio triggered buffer setup failed\n");
1148                 goto err_trigger_unregister;
1149         }
1150
1151         ret = pm_runtime_set_active(dev);
1152         if (ret)
1153                 goto err_buffer_cleanup;
1154
1155         pm_runtime_enable(dev);
1156         pm_runtime_set_autosuspend_delay(dev,
1157                                          BMG160_AUTO_SUSPEND_DELAY_MS);
1158         pm_runtime_use_autosuspend(dev);
1159
1160         ret = iio_device_register(indio_dev);
1161         if (ret < 0) {
1162                 dev_err(dev, "unable to register iio device\n");
1163                 goto err_buffer_cleanup;
1164         }
1165
1166         return 0;
1167
1168 err_buffer_cleanup:
1169         iio_triggered_buffer_cleanup(indio_dev);
1170 err_trigger_unregister:
1171         if (data->dready_trig)
1172                 iio_trigger_unregister(data->dready_trig);
1173         if (data->motion_trig)
1174                 iio_trigger_unregister(data->motion_trig);
1175
1176         return ret;
1177 }
1178 EXPORT_SYMBOL_GPL(bmg160_core_probe);
1179
1180 void bmg160_core_remove(struct device *dev)
1181 {
1182         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1183         struct bmg160_data *data = iio_priv(indio_dev);
1184
1185         iio_device_unregister(indio_dev);
1186
1187         pm_runtime_disable(dev);
1188         pm_runtime_set_suspended(dev);
1189         pm_runtime_put_noidle(dev);
1190
1191         iio_triggered_buffer_cleanup(indio_dev);
1192
1193         if (data->dready_trig) {
1194                 iio_trigger_unregister(data->dready_trig);
1195                 iio_trigger_unregister(data->motion_trig);
1196         }
1197
1198         mutex_lock(&data->mutex);
1199         bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
1200         mutex_unlock(&data->mutex);
1201 }
1202 EXPORT_SYMBOL_GPL(bmg160_core_remove);
1203
1204 #ifdef CONFIG_PM_SLEEP
1205 static int bmg160_suspend(struct device *dev)
1206 {
1207         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1208         struct bmg160_data *data = iio_priv(indio_dev);
1209
1210         mutex_lock(&data->mutex);
1211         bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1212         mutex_unlock(&data->mutex);
1213
1214         return 0;
1215 }
1216
1217 static int bmg160_resume(struct device *dev)
1218 {
1219         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1220         struct bmg160_data *data = iio_priv(indio_dev);
1221
1222         mutex_lock(&data->mutex);
1223         if (data->dready_trigger_on || data->motion_trigger_on ||
1224                                                         data->ev_enable_state)
1225                 bmg160_set_mode(data, BMG160_MODE_NORMAL);
1226         mutex_unlock(&data->mutex);
1227
1228         return 0;
1229 }
1230 #endif
1231
1232 #ifdef CONFIG_PM
1233 static int bmg160_runtime_suspend(struct device *dev)
1234 {
1235         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1236         struct bmg160_data *data = iio_priv(indio_dev);
1237         int ret;
1238
1239         ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1240         if (ret < 0) {
1241                 dev_err(dev, "set mode failed\n");
1242                 return -EAGAIN;
1243         }
1244
1245         return 0;
1246 }
1247
1248 static int bmg160_runtime_resume(struct device *dev)
1249 {
1250         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1251         struct bmg160_data *data = iio_priv(indio_dev);
1252         int ret;
1253
1254         ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
1255         if (ret < 0)
1256                 return ret;
1257
1258         msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
1259
1260         return 0;
1261 }
1262 #endif
1263
1264 const struct dev_pm_ops bmg160_pm_ops = {
1265         SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
1266         SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
1267                            bmg160_runtime_resume, NULL)
1268 };
1269 EXPORT_SYMBOL_GPL(bmg160_pm_ops);
1270
1271 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1272 MODULE_LICENSE("GPL v2");
1273 MODULE_DESCRIPTION("BMG160 Gyro driver");