GNU Linux-libre 4.9.282-gnu1
[releases.git] / drivers / iio / gyro / bmg160_core.c
1 /*
2  * BMG160 Gyro Sensor driver
3  * Copyright (c) 2014, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  */
14
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/delay.h>
18 #include <linux/slab.h>
19 #include <linux/acpi.h>
20 #include <linux/pm.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/iio/iio.h>
23 #include <linux/iio/sysfs.h>
24 #include <linux/iio/buffer.h>
25 #include <linux/iio/trigger.h>
26 #include <linux/iio/events.h>
27 #include <linux/iio/trigger_consumer.h>
28 #include <linux/iio/triggered_buffer.h>
29 #include <linux/regmap.h>
30 #include <linux/delay.h>
31 #include "bmg160.h"
32
33 #define BMG160_IRQ_NAME         "bmg160_event"
34
35 #define BMG160_REG_CHIP_ID              0x00
36 #define BMG160_CHIP_ID_VAL              0x0F
37
38 #define BMG160_REG_PMU_LPW              0x11
39 #define BMG160_MODE_NORMAL              0x00
40 #define BMG160_MODE_DEEP_SUSPEND        0x20
41 #define BMG160_MODE_SUSPEND             0x80
42
43 #define BMG160_REG_RANGE                0x0F
44
45 #define BMG160_RANGE_2000DPS            0
46 #define BMG160_RANGE_1000DPS            1
47 #define BMG160_RANGE_500DPS             2
48 #define BMG160_RANGE_250DPS             3
49 #define BMG160_RANGE_125DPS             4
50
51 #define BMG160_REG_PMU_BW               0x10
52 #define BMG160_NO_FILTER                0
53 #define BMG160_DEF_BW                   100
54 #define BMG160_REG_PMU_BW_RES           BIT(7)
55
56 #define BMG160_GYRO_REG_RESET           0x14
57 #define BMG160_GYRO_RESET_VAL           0xb6
58
59 #define BMG160_REG_INT_MAP_0            0x17
60 #define BMG160_INT_MAP_0_BIT_ANY        BIT(1)
61
62 #define BMG160_REG_INT_MAP_1            0x18
63 #define BMG160_INT_MAP_1_BIT_NEW_DATA   BIT(0)
64
65 #define BMG160_REG_INT_RST_LATCH        0x21
66 #define BMG160_INT_MODE_LATCH_RESET     0x80
67 #define BMG160_INT_MODE_LATCH_INT       0x0F
68 #define BMG160_INT_MODE_NON_LATCH_INT   0x00
69
70 #define BMG160_REG_INT_EN_0             0x15
71 #define BMG160_DATA_ENABLE_INT          BIT(7)
72
73 #define BMG160_REG_INT_EN_1             0x16
74 #define BMG160_INT1_BIT_OD              BIT(1)
75
76 #define BMG160_REG_XOUT_L               0x02
77 #define BMG160_AXIS_TO_REG(axis)        (BMG160_REG_XOUT_L + (axis * 2))
78
79 #define BMG160_REG_SLOPE_THRES          0x1B
80 #define BMG160_SLOPE_THRES_MASK 0x0F
81
82 #define BMG160_REG_MOTION_INTR          0x1C
83 #define BMG160_INT_MOTION_X             BIT(0)
84 #define BMG160_INT_MOTION_Y             BIT(1)
85 #define BMG160_INT_MOTION_Z             BIT(2)
86 #define BMG160_ANY_DUR_MASK             0x30
87 #define BMG160_ANY_DUR_SHIFT            4
88
89 #define BMG160_REG_INT_STATUS_2 0x0B
90 #define BMG160_ANY_MOTION_MASK          0x07
91 #define BMG160_ANY_MOTION_BIT_X         BIT(0)
92 #define BMG160_ANY_MOTION_BIT_Y         BIT(1)
93 #define BMG160_ANY_MOTION_BIT_Z         BIT(2)
94
95 #define BMG160_REG_TEMP         0x08
96 #define BMG160_TEMP_CENTER_VAL          23
97
98 #define BMG160_MAX_STARTUP_TIME_MS      80
99
100 #define BMG160_AUTO_SUSPEND_DELAY_MS    2000
101
102 struct bmg160_data {
103         struct regmap *regmap;
104         struct iio_trigger *dready_trig;
105         struct iio_trigger *motion_trig;
106         struct mutex mutex;
107         /* Ensure naturally aligned timestamp */
108         struct {
109                 s16 chans[3];
110                 s64 timestamp __aligned(8);
111         } scan;
112         u32 dps_range;
113         int ev_enable_state;
114         int slope_thres;
115         bool dready_trigger_on;
116         bool motion_trigger_on;
117         int irq;
118 };
119
120 enum bmg160_axis {
121         AXIS_X,
122         AXIS_Y,
123         AXIS_Z,
124         AXIS_MAX,
125 };
126
127 static const struct {
128         int odr;
129         int filter;
130         int bw_bits;
131 } bmg160_samp_freq_table[] = { {100, 32, 0x07},
132                                {200, 64, 0x06},
133                                {100, 12, 0x05},
134                                {200, 23, 0x04},
135                                {400, 47, 0x03},
136                                {1000, 116, 0x02},
137                                {2000, 230, 0x01} };
138
139 static const struct {
140         int scale;
141         int dps_range;
142 } bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
143                            { 532, BMG160_RANGE_1000DPS},
144                            { 266, BMG160_RANGE_500DPS},
145                            { 133, BMG160_RANGE_250DPS},
146                            { 66, BMG160_RANGE_125DPS} };
147
148 static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
149 {
150         struct device *dev = regmap_get_device(data->regmap);
151         int ret;
152
153         ret = regmap_write(data->regmap, BMG160_REG_PMU_LPW, mode);
154         if (ret < 0) {
155                 dev_err(dev, "Error writing reg_pmu_lpw\n");
156                 return ret;
157         }
158
159         return 0;
160 }
161
162 static int bmg160_convert_freq_to_bit(int val)
163 {
164         int i;
165
166         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
167                 if (bmg160_samp_freq_table[i].odr == val)
168                         return bmg160_samp_freq_table[i].bw_bits;
169         }
170
171         return -EINVAL;
172 }
173
174 static int bmg160_set_bw(struct bmg160_data *data, int val)
175 {
176         struct device *dev = regmap_get_device(data->regmap);
177         int ret;
178         int bw_bits;
179
180         bw_bits = bmg160_convert_freq_to_bit(val);
181         if (bw_bits < 0)
182                 return bw_bits;
183
184         ret = regmap_write(data->regmap, BMG160_REG_PMU_BW, bw_bits);
185         if (ret < 0) {
186                 dev_err(dev, "Error writing reg_pmu_bw\n");
187                 return ret;
188         }
189
190         return 0;
191 }
192
193 static int bmg160_get_filter(struct bmg160_data *data, int *val)
194 {
195         struct device *dev = regmap_get_device(data->regmap);
196         int ret;
197         int i;
198         unsigned int bw_bits;
199
200         ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
201         if (ret < 0) {
202                 dev_err(dev, "Error reading reg_pmu_bw\n");
203                 return ret;
204         }
205
206         /* Ignore the readonly reserved bit. */
207         bw_bits &= ~BMG160_REG_PMU_BW_RES;
208
209         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
210                 if (bmg160_samp_freq_table[i].bw_bits == bw_bits)
211                         break;
212         }
213
214         *val = bmg160_samp_freq_table[i].filter;
215
216         return ret ? ret : IIO_VAL_INT;
217 }
218
219
220 static int bmg160_set_filter(struct bmg160_data *data, int val)
221 {
222         struct device *dev = regmap_get_device(data->regmap);
223         int ret;
224         int i;
225
226         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
227                 if (bmg160_samp_freq_table[i].filter == val)
228                         break;
229         }
230
231         ret = regmap_write(data->regmap, BMG160_REG_PMU_BW,
232                            bmg160_samp_freq_table[i].bw_bits);
233         if (ret < 0) {
234                 dev_err(dev, "Error writing reg_pmu_bw\n");
235                 return ret;
236         }
237
238         return 0;
239 }
240
241 static int bmg160_chip_init(struct bmg160_data *data)
242 {
243         struct device *dev = regmap_get_device(data->regmap);
244         int ret;
245         unsigned int val;
246
247         /*
248          * Reset chip to get it in a known good state. A delay of 30ms after
249          * reset is required according to the datasheet.
250          */
251         regmap_write(data->regmap, BMG160_GYRO_REG_RESET,
252                      BMG160_GYRO_RESET_VAL);
253         usleep_range(30000, 30700);
254
255         ret = regmap_read(data->regmap, BMG160_REG_CHIP_ID, &val);
256         if (ret < 0) {
257                 dev_err(dev, "Error reading reg_chip_id\n");
258                 return ret;
259         }
260
261         dev_dbg(dev, "Chip Id %x\n", val);
262         if (val != BMG160_CHIP_ID_VAL) {
263                 dev_err(dev, "invalid chip %x\n", val);
264                 return -ENODEV;
265         }
266
267         ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
268         if (ret < 0)
269                 return ret;
270
271         /* Wait upto 500 ms to be ready after changing mode */
272         usleep_range(500, 1000);
273
274         /* Set Bandwidth */
275         ret = bmg160_set_bw(data, BMG160_DEF_BW);
276         if (ret < 0)
277                 return ret;
278
279         /* Set Default Range */
280         ret = regmap_write(data->regmap, BMG160_REG_RANGE, BMG160_RANGE_500DPS);
281         if (ret < 0) {
282                 dev_err(dev, "Error writing reg_range\n");
283                 return ret;
284         }
285         data->dps_range = BMG160_RANGE_500DPS;
286
287         ret = regmap_read(data->regmap, BMG160_REG_SLOPE_THRES, &val);
288         if (ret < 0) {
289                 dev_err(dev, "Error reading reg_slope_thres\n");
290                 return ret;
291         }
292         data->slope_thres = val;
293
294         /* Set default interrupt mode */
295         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_EN_1,
296                                  BMG160_INT1_BIT_OD, 0);
297         if (ret < 0) {
298                 dev_err(dev, "Error updating bits in reg_int_en_1\n");
299                 return ret;
300         }
301
302         ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
303                            BMG160_INT_MODE_LATCH_INT |
304                            BMG160_INT_MODE_LATCH_RESET);
305         if (ret < 0) {
306                 dev_err(dev,
307                         "Error writing reg_motion_intr\n");
308                 return ret;
309         }
310
311         return 0;
312 }
313
314 static int bmg160_set_power_state(struct bmg160_data *data, bool on)
315 {
316 #ifdef CONFIG_PM
317         struct device *dev = regmap_get_device(data->regmap);
318         int ret;
319
320         if (on)
321                 ret = pm_runtime_get_sync(dev);
322         else {
323                 pm_runtime_mark_last_busy(dev);
324                 ret = pm_runtime_put_autosuspend(dev);
325         }
326
327         if (ret < 0) {
328                 dev_err(dev, "Failed: bmg160_set_power_state for %d\n", on);
329
330                 if (on)
331                         pm_runtime_put_noidle(dev);
332
333                 return ret;
334         }
335 #endif
336
337         return 0;
338 }
339
340 static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
341                                              bool status)
342 {
343         struct device *dev = regmap_get_device(data->regmap);
344         int ret;
345
346         /* Enable/Disable INT_MAP0 mapping */
347         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_0,
348                                  BMG160_INT_MAP_0_BIT_ANY,
349                                  (status ? BMG160_INT_MAP_0_BIT_ANY : 0));
350         if (ret < 0) {
351                 dev_err(dev, "Error updating bits reg_int_map0\n");
352                 return ret;
353         }
354
355         /* Enable/Disable slope interrupts */
356         if (status) {
357                 /* Update slope thres */
358                 ret = regmap_write(data->regmap, BMG160_REG_SLOPE_THRES,
359                                    data->slope_thres);
360                 if (ret < 0) {
361                         dev_err(dev, "Error writing reg_slope_thres\n");
362                         return ret;
363                 }
364
365                 ret = regmap_write(data->regmap, BMG160_REG_MOTION_INTR,
366                                    BMG160_INT_MOTION_X | BMG160_INT_MOTION_Y |
367                                    BMG160_INT_MOTION_Z);
368                 if (ret < 0) {
369                         dev_err(dev, "Error writing reg_motion_intr\n");
370                         return ret;
371                 }
372
373                 /*
374                  * New data interrupt is always non-latched,
375                  * which will have higher priority, so no need
376                  * to set latched mode, we will be flooded anyway with INTR
377                  */
378                 if (!data->dready_trigger_on) {
379                         ret = regmap_write(data->regmap,
380                                            BMG160_REG_INT_RST_LATCH,
381                                            BMG160_INT_MODE_LATCH_INT |
382                                            BMG160_INT_MODE_LATCH_RESET);
383                         if (ret < 0) {
384                                 dev_err(dev, "Error writing reg_rst_latch\n");
385                                 return ret;
386                         }
387                 }
388
389                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
390                                    BMG160_DATA_ENABLE_INT);
391
392         } else {
393                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
394         }
395
396         if (ret < 0) {
397                 dev_err(dev, "Error writing reg_int_en0\n");
398                 return ret;
399         }
400
401         return 0;
402 }
403
404 static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
405                                            bool status)
406 {
407         struct device *dev = regmap_get_device(data->regmap);
408         int ret;
409
410         /* Enable/Disable INT_MAP1 mapping */
411         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_1,
412                                  BMG160_INT_MAP_1_BIT_NEW_DATA,
413                                  (status ? BMG160_INT_MAP_1_BIT_NEW_DATA : 0));
414         if (ret < 0) {
415                 dev_err(dev, "Error updating bits in reg_int_map1\n");
416                 return ret;
417         }
418
419         if (status) {
420                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
421                                    BMG160_INT_MODE_NON_LATCH_INT |
422                                    BMG160_INT_MODE_LATCH_RESET);
423                 if (ret < 0) {
424                         dev_err(dev, "Error writing reg_rst_latch\n");
425                         return ret;
426                 }
427
428                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
429                                    BMG160_DATA_ENABLE_INT);
430
431         } else {
432                 /* Restore interrupt mode */
433                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
434                                    BMG160_INT_MODE_LATCH_INT |
435                                    BMG160_INT_MODE_LATCH_RESET);
436                 if (ret < 0) {
437                         dev_err(dev, "Error writing reg_rst_latch\n");
438                         return ret;
439                 }
440
441                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
442         }
443
444         if (ret < 0) {
445                 dev_err(dev, "Error writing reg_int_en0\n");
446                 return ret;
447         }
448
449         return 0;
450 }
451
452 static int bmg160_get_bw(struct bmg160_data *data, int *val)
453 {
454         struct device *dev = regmap_get_device(data->regmap);   
455         int i;
456         unsigned int bw_bits;
457         int ret;
458
459         ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
460         if (ret < 0) {
461                 dev_err(dev, "Error reading reg_pmu_bw\n");
462                 return ret;
463         }
464
465         /* Ignore the readonly reserved bit. */
466         bw_bits &= ~BMG160_REG_PMU_BW_RES;
467
468         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
469                 if (bmg160_samp_freq_table[i].bw_bits == bw_bits) {
470                         *val = bmg160_samp_freq_table[i].odr;
471                         return IIO_VAL_INT;
472                 }
473         }
474
475         return -EINVAL;
476 }
477
478 static int bmg160_set_scale(struct bmg160_data *data, int val)
479 {
480         struct device *dev = regmap_get_device(data->regmap);
481         int ret, i;
482
483         for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
484                 if (bmg160_scale_table[i].scale == val) {
485                         ret = regmap_write(data->regmap, BMG160_REG_RANGE,
486                                            bmg160_scale_table[i].dps_range);
487                         if (ret < 0) {
488                                 dev_err(dev, "Error writing reg_range\n");
489                                 return ret;
490                         }
491                         data->dps_range = bmg160_scale_table[i].dps_range;
492                         return 0;
493                 }
494         }
495
496         return -EINVAL;
497 }
498
499 static int bmg160_get_temp(struct bmg160_data *data, int *val)
500 {
501         struct device *dev = regmap_get_device(data->regmap);
502         int ret;
503         unsigned int raw_val;
504
505         mutex_lock(&data->mutex);
506         ret = bmg160_set_power_state(data, true);
507         if (ret < 0) {
508                 mutex_unlock(&data->mutex);
509                 return ret;
510         }
511
512         ret = regmap_read(data->regmap, BMG160_REG_TEMP, &raw_val);
513         if (ret < 0) {
514                 dev_err(dev, "Error reading reg_temp\n");
515                 bmg160_set_power_state(data, false);
516                 mutex_unlock(&data->mutex);
517                 return ret;
518         }
519
520         *val = sign_extend32(raw_val, 7);
521         ret = bmg160_set_power_state(data, false);
522         mutex_unlock(&data->mutex);
523         if (ret < 0)
524                 return ret;
525
526         return IIO_VAL_INT;
527 }
528
529 static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
530 {
531         struct device *dev = regmap_get_device(data->regmap);
532         int ret;
533         __le16 raw_val;
534
535         mutex_lock(&data->mutex);
536         ret = bmg160_set_power_state(data, true);
537         if (ret < 0) {
538                 mutex_unlock(&data->mutex);
539                 return ret;
540         }
541
542         ret = regmap_bulk_read(data->regmap, BMG160_AXIS_TO_REG(axis), &raw_val,
543                                sizeof(raw_val));
544         if (ret < 0) {
545                 dev_err(dev, "Error reading axis %d\n", axis);
546                 bmg160_set_power_state(data, false);
547                 mutex_unlock(&data->mutex);
548                 return ret;
549         }
550
551         *val = sign_extend32(le16_to_cpu(raw_val), 15);
552         ret = bmg160_set_power_state(data, false);
553         mutex_unlock(&data->mutex);
554         if (ret < 0)
555                 return ret;
556
557         return IIO_VAL_INT;
558 }
559
560 static int bmg160_read_raw(struct iio_dev *indio_dev,
561                            struct iio_chan_spec const *chan,
562                            int *val, int *val2, long mask)
563 {
564         struct bmg160_data *data = iio_priv(indio_dev);
565         int ret;
566
567         switch (mask) {
568         case IIO_CHAN_INFO_RAW:
569                 switch (chan->type) {
570                 case IIO_TEMP:
571                         return bmg160_get_temp(data, val);
572                 case IIO_ANGL_VEL:
573                         if (iio_buffer_enabled(indio_dev))
574                                 return -EBUSY;
575                         else
576                                 return bmg160_get_axis(data, chan->scan_index,
577                                                        val);
578                 default:
579                         return -EINVAL;
580                 }
581         case IIO_CHAN_INFO_OFFSET:
582                 if (chan->type == IIO_TEMP) {
583                         *val = BMG160_TEMP_CENTER_VAL;
584                         return IIO_VAL_INT;
585                 } else
586                         return -EINVAL;
587         case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
588                 return bmg160_get_filter(data, val);
589         case IIO_CHAN_INFO_SCALE:
590                 switch (chan->type) {
591                 case IIO_TEMP:
592                         *val = 500;
593                         return IIO_VAL_INT;
594                 case IIO_ANGL_VEL:
595                 {
596                         int i;
597
598                         for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
599                                 if (bmg160_scale_table[i].dps_range ==
600                                                         data->dps_range) {
601                                         *val = 0;
602                                         *val2 = bmg160_scale_table[i].scale;
603                                         return IIO_VAL_INT_PLUS_MICRO;
604                                 }
605                         }
606                         return -EINVAL;
607                 }
608                 default:
609                         return -EINVAL;
610                 }
611         case IIO_CHAN_INFO_SAMP_FREQ:
612                 *val2 = 0;
613                 mutex_lock(&data->mutex);
614                 ret = bmg160_get_bw(data, val);
615                 mutex_unlock(&data->mutex);
616                 return ret;
617         default:
618                 return -EINVAL;
619         }
620 }
621
622 static int bmg160_write_raw(struct iio_dev *indio_dev,
623                             struct iio_chan_spec const *chan,
624                             int val, int val2, long mask)
625 {
626         struct bmg160_data *data = iio_priv(indio_dev);
627         int ret;
628
629         switch (mask) {
630         case IIO_CHAN_INFO_SAMP_FREQ:
631                 mutex_lock(&data->mutex);
632                 /*
633                  * Section 4.2 of spec
634                  * In suspend mode, the only supported operations are reading
635                  * registers as well as writing to the (0x14) softreset
636                  * register. Since we will be in suspend mode by default, change
637                  * mode to power on for other writes.
638                  */
639                 ret = bmg160_set_power_state(data, true);
640                 if (ret < 0) {
641                         mutex_unlock(&data->mutex);
642                         return ret;
643                 }
644                 ret = bmg160_set_bw(data, val);
645                 if (ret < 0) {
646                         bmg160_set_power_state(data, false);
647                         mutex_unlock(&data->mutex);
648                         return ret;
649                 }
650                 ret = bmg160_set_power_state(data, false);
651                 mutex_unlock(&data->mutex);
652                 return ret;
653         case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
654                 if (val2)
655                         return -EINVAL;
656
657                 mutex_lock(&data->mutex);
658                 ret = bmg160_set_power_state(data, true);
659                 if (ret < 0) {
660                         bmg160_set_power_state(data, false);
661                         mutex_unlock(&data->mutex);
662                         return ret;
663                 }
664                 ret = bmg160_set_filter(data, val);
665                 if (ret < 0) {
666                         bmg160_set_power_state(data, false);
667                         mutex_unlock(&data->mutex);
668                         return ret;
669                 }
670                 ret = bmg160_set_power_state(data, false);
671                 mutex_unlock(&data->mutex);
672                 return ret;
673         case IIO_CHAN_INFO_SCALE:
674                 if (val)
675                         return -EINVAL;
676
677                 mutex_lock(&data->mutex);
678                 /* Refer to comments above for the suspend mode ops */
679                 ret = bmg160_set_power_state(data, true);
680                 if (ret < 0) {
681                         mutex_unlock(&data->mutex);
682                         return ret;
683                 }
684                 ret = bmg160_set_scale(data, val2);
685                 if (ret < 0) {
686                         bmg160_set_power_state(data, false);
687                         mutex_unlock(&data->mutex);
688                         return ret;
689                 }
690                 ret = bmg160_set_power_state(data, false);
691                 mutex_unlock(&data->mutex);
692                 return ret;
693         default:
694                 return -EINVAL;
695         }
696
697         return -EINVAL;
698 }
699
700 static int bmg160_read_event(struct iio_dev *indio_dev,
701                              const struct iio_chan_spec *chan,
702                              enum iio_event_type type,
703                              enum iio_event_direction dir,
704                              enum iio_event_info info,
705                              int *val, int *val2)
706 {
707         struct bmg160_data *data = iio_priv(indio_dev);
708
709         *val2 = 0;
710         switch (info) {
711         case IIO_EV_INFO_VALUE:
712                 *val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
713                 break;
714         default:
715                 return -EINVAL;
716         }
717
718         return IIO_VAL_INT;
719 }
720
721 static int bmg160_write_event(struct iio_dev *indio_dev,
722                               const struct iio_chan_spec *chan,
723                               enum iio_event_type type,
724                               enum iio_event_direction dir,
725                               enum iio_event_info info,
726                               int val, int val2)
727 {
728         struct bmg160_data *data = iio_priv(indio_dev);
729
730         switch (info) {
731         case IIO_EV_INFO_VALUE:
732                 if (data->ev_enable_state)
733                         return -EBUSY;
734                 data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
735                 data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
736                 break;
737         default:
738                 return -EINVAL;
739         }
740
741         return 0;
742 }
743
744 static int bmg160_read_event_config(struct iio_dev *indio_dev,
745                                     const struct iio_chan_spec *chan,
746                                     enum iio_event_type type,
747                                     enum iio_event_direction dir)
748 {
749
750         struct bmg160_data *data = iio_priv(indio_dev);
751
752         return data->ev_enable_state;
753 }
754
755 static int bmg160_write_event_config(struct iio_dev *indio_dev,
756                                      const struct iio_chan_spec *chan,
757                                      enum iio_event_type type,
758                                      enum iio_event_direction dir,
759                                      int state)
760 {
761         struct bmg160_data *data = iio_priv(indio_dev);
762         int ret;
763
764         if (state && data->ev_enable_state)
765                 return 0;
766
767         mutex_lock(&data->mutex);
768
769         if (!state && data->motion_trigger_on) {
770                 data->ev_enable_state = 0;
771                 mutex_unlock(&data->mutex);
772                 return 0;
773         }
774         /*
775          * We will expect the enable and disable to do operation in
776          * in reverse order. This will happen here anyway as our
777          * resume operation uses sync mode runtime pm calls, the
778          * suspend operation will be delayed by autosuspend delay
779          * So the disable operation will still happen in reverse of
780          * enable operation. When runtime pm is disabled the mode
781          * is always on so sequence doesn't matter
782          */
783         ret = bmg160_set_power_state(data, state);
784         if (ret < 0) {
785                 mutex_unlock(&data->mutex);
786                 return ret;
787         }
788
789         ret =  bmg160_setup_any_motion_interrupt(data, state);
790         if (ret < 0) {
791                 bmg160_set_power_state(data, false);
792                 mutex_unlock(&data->mutex);
793                 return ret;
794         }
795
796         data->ev_enable_state = state;
797         mutex_unlock(&data->mutex);
798
799         return 0;
800 }
801
802 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
803
804 static IIO_CONST_ATTR(in_anglvel_scale_available,
805                       "0.001065 0.000532 0.000266 0.000133 0.000066");
806
807 static struct attribute *bmg160_attributes[] = {
808         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
809         &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
810         NULL,
811 };
812
813 static const struct attribute_group bmg160_attrs_group = {
814         .attrs = bmg160_attributes,
815 };
816
817 static const struct iio_event_spec bmg160_event = {
818                 .type = IIO_EV_TYPE_ROC,
819                 .dir = IIO_EV_DIR_EITHER,
820                 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
821                                        BIT(IIO_EV_INFO_ENABLE)
822 };
823
824 #define BMG160_CHANNEL(_axis) {                                 \
825         .type = IIO_ANGL_VEL,                                           \
826         .modified = 1,                                                  \
827         .channel2 = IIO_MOD_##_axis,                                    \
828         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),                   \
829         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |          \
830                 BIT(IIO_CHAN_INFO_SAMP_FREQ) |                          \
831                 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),       \
832         .scan_index = AXIS_##_axis,                                     \
833         .scan_type = {                                                  \
834                 .sign = 's',                                            \
835                 .realbits = 16,                                 \
836                 .storagebits = 16,                                      \
837                 .endianness = IIO_LE,                                   \
838         },                                                              \
839         .event_spec = &bmg160_event,                                    \
840         .num_event_specs = 1                                            \
841 }
842
843 static const struct iio_chan_spec bmg160_channels[] = {
844         {
845                 .type = IIO_TEMP,
846                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
847                                       BIT(IIO_CHAN_INFO_SCALE) |
848                                       BIT(IIO_CHAN_INFO_OFFSET),
849                 .scan_index = -1,
850         },
851         BMG160_CHANNEL(X),
852         BMG160_CHANNEL(Y),
853         BMG160_CHANNEL(Z),
854         IIO_CHAN_SOFT_TIMESTAMP(3),
855 };
856
857 static const struct iio_info bmg160_info = {
858         .attrs                  = &bmg160_attrs_group,
859         .read_raw               = bmg160_read_raw,
860         .write_raw              = bmg160_write_raw,
861         .read_event_value       = bmg160_read_event,
862         .write_event_value      = bmg160_write_event,
863         .write_event_config     = bmg160_write_event_config,
864         .read_event_config      = bmg160_read_event_config,
865         .driver_module          = THIS_MODULE,
866 };
867
868 static const unsigned long bmg160_accel_scan_masks[] = {
869                                         BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
870                                         0};
871
872 static irqreturn_t bmg160_trigger_handler(int irq, void *p)
873 {
874         struct iio_poll_func *pf = p;
875         struct iio_dev *indio_dev = pf->indio_dev;
876         struct bmg160_data *data = iio_priv(indio_dev);
877         int ret;
878
879         mutex_lock(&data->mutex);
880         ret = regmap_bulk_read(data->regmap, BMG160_REG_XOUT_L,
881                                data->scan.chans, AXIS_MAX * 2);
882         mutex_unlock(&data->mutex);
883         if (ret < 0)
884                 goto err;
885
886         iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
887                                            pf->timestamp);
888 err:
889         iio_trigger_notify_done(indio_dev->trig);
890
891         return IRQ_HANDLED;
892 }
893
894 static int bmg160_trig_try_reen(struct iio_trigger *trig)
895 {
896         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
897         struct bmg160_data *data = iio_priv(indio_dev);
898         struct device *dev = regmap_get_device(data->regmap);
899         int ret;
900
901         /* new data interrupts don't need ack */
902         if (data->dready_trigger_on)
903                 return 0;
904
905         /* Set latched mode interrupt and clear any latched interrupt */
906         ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
907                            BMG160_INT_MODE_LATCH_INT |
908                            BMG160_INT_MODE_LATCH_RESET);
909         if (ret < 0) {
910                 dev_err(dev, "Error writing reg_rst_latch\n");
911                 return ret;
912         }
913
914         return 0;
915 }
916
917 static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
918                                              bool state)
919 {
920         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
921         struct bmg160_data *data = iio_priv(indio_dev);
922         int ret;
923
924         mutex_lock(&data->mutex);
925
926         if (!state && data->ev_enable_state && data->motion_trigger_on) {
927                 data->motion_trigger_on = false;
928                 mutex_unlock(&data->mutex);
929                 return 0;
930         }
931
932         /*
933          * Refer to comment in bmg160_write_event_config for
934          * enable/disable operation order
935          */
936         ret = bmg160_set_power_state(data, state);
937         if (ret < 0) {
938                 mutex_unlock(&data->mutex);
939                 return ret;
940         }
941         if (data->motion_trig == trig)
942                 ret =  bmg160_setup_any_motion_interrupt(data, state);
943         else
944                 ret = bmg160_setup_new_data_interrupt(data, state);
945         if (ret < 0) {
946                 bmg160_set_power_state(data, false);
947                 mutex_unlock(&data->mutex);
948                 return ret;
949         }
950         if (data->motion_trig == trig)
951                 data->motion_trigger_on = state;
952         else
953                 data->dready_trigger_on = state;
954
955         mutex_unlock(&data->mutex);
956
957         return 0;
958 }
959
960 static const struct iio_trigger_ops bmg160_trigger_ops = {
961         .set_trigger_state = bmg160_data_rdy_trigger_set_state,
962         .try_reenable = bmg160_trig_try_reen,
963         .owner = THIS_MODULE,
964 };
965
966 static irqreturn_t bmg160_event_handler(int irq, void *private)
967 {
968         struct iio_dev *indio_dev = private;
969         struct bmg160_data *data = iio_priv(indio_dev);
970         struct device *dev = regmap_get_device(data->regmap);
971         int ret;
972         int dir;
973         unsigned int val;
974
975         ret = regmap_read(data->regmap, BMG160_REG_INT_STATUS_2, &val);
976         if (ret < 0) {
977                 dev_err(dev, "Error reading reg_int_status2\n");
978                 goto ack_intr_status;
979         }
980
981         if (val & 0x08)
982                 dir = IIO_EV_DIR_RISING;
983         else
984                 dir = IIO_EV_DIR_FALLING;
985
986         if (val & BMG160_ANY_MOTION_BIT_X)
987                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
988                                                              0,
989                                                              IIO_MOD_X,
990                                                              IIO_EV_TYPE_ROC,
991                                                              dir),
992                                iio_get_time_ns(indio_dev));
993         if (val & BMG160_ANY_MOTION_BIT_Y)
994                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
995                                                              0,
996                                                              IIO_MOD_Y,
997                                                              IIO_EV_TYPE_ROC,
998                                                              dir),
999                                iio_get_time_ns(indio_dev));
1000         if (val & BMG160_ANY_MOTION_BIT_Z)
1001                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
1002                                                              0,
1003                                                              IIO_MOD_Z,
1004                                                              IIO_EV_TYPE_ROC,
1005                                                              dir),
1006                                iio_get_time_ns(indio_dev));
1007
1008 ack_intr_status:
1009         if (!data->dready_trigger_on) {
1010                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
1011                                    BMG160_INT_MODE_LATCH_INT |
1012                                    BMG160_INT_MODE_LATCH_RESET);
1013                 if (ret < 0)
1014                         dev_err(dev, "Error writing reg_rst_latch\n");
1015         }
1016
1017         return IRQ_HANDLED;
1018 }
1019
1020 static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
1021 {
1022         struct iio_dev *indio_dev = private;
1023         struct bmg160_data *data = iio_priv(indio_dev);
1024
1025         if (data->dready_trigger_on)
1026                 iio_trigger_poll(data->dready_trig);
1027         else if (data->motion_trigger_on)
1028                 iio_trigger_poll(data->motion_trig);
1029
1030         if (data->ev_enable_state)
1031                 return IRQ_WAKE_THREAD;
1032         else
1033                 return IRQ_HANDLED;
1034
1035 }
1036
1037 static int bmg160_buffer_preenable(struct iio_dev *indio_dev)
1038 {
1039         struct bmg160_data *data = iio_priv(indio_dev);
1040
1041         return bmg160_set_power_state(data, true);
1042 }
1043
1044 static int bmg160_buffer_postdisable(struct iio_dev *indio_dev)
1045 {
1046         struct bmg160_data *data = iio_priv(indio_dev);
1047
1048         return bmg160_set_power_state(data, false);
1049 }
1050
1051 static const struct iio_buffer_setup_ops bmg160_buffer_setup_ops = {
1052         .preenable = bmg160_buffer_preenable,
1053         .postenable = iio_triggered_buffer_postenable,
1054         .predisable = iio_triggered_buffer_predisable,
1055         .postdisable = bmg160_buffer_postdisable,
1056 };
1057
1058 static const char *bmg160_match_acpi_device(struct device *dev)
1059 {
1060         const struct acpi_device_id *id;
1061
1062         id = acpi_match_device(dev->driver->acpi_match_table, dev);
1063         if (!id)
1064                 return NULL;
1065
1066         return dev_name(dev);
1067 }
1068
1069 int bmg160_core_probe(struct device *dev, struct regmap *regmap, int irq,
1070                       const char *name)
1071 {
1072         struct bmg160_data *data;
1073         struct iio_dev *indio_dev;
1074         int ret;
1075
1076         indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1077         if (!indio_dev)
1078                 return -ENOMEM;
1079
1080         data = iio_priv(indio_dev);
1081         dev_set_drvdata(dev, indio_dev);
1082         data->irq = irq;
1083         data->regmap = regmap;
1084
1085         ret = bmg160_chip_init(data);
1086         if (ret < 0)
1087                 return ret;
1088
1089         mutex_init(&data->mutex);
1090
1091         if (ACPI_HANDLE(dev))
1092                 name = bmg160_match_acpi_device(dev);
1093
1094         indio_dev->dev.parent = dev;
1095         indio_dev->channels = bmg160_channels;
1096         indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
1097         indio_dev->name = name;
1098         indio_dev->available_scan_masks = bmg160_accel_scan_masks;
1099         indio_dev->modes = INDIO_DIRECT_MODE;
1100         indio_dev->info = &bmg160_info;
1101
1102         if (data->irq > 0) {
1103                 ret = devm_request_threaded_irq(dev,
1104                                                 data->irq,
1105                                                 bmg160_data_rdy_trig_poll,
1106                                                 bmg160_event_handler,
1107                                                 IRQF_TRIGGER_RISING,
1108                                                 BMG160_IRQ_NAME,
1109                                                 indio_dev);
1110                 if (ret)
1111                         return ret;
1112
1113                 data->dready_trig = devm_iio_trigger_alloc(dev,
1114                                                            "%s-dev%d",
1115                                                            indio_dev->name,
1116                                                            indio_dev->id);
1117                 if (!data->dready_trig)
1118                         return -ENOMEM;
1119
1120                 data->motion_trig = devm_iio_trigger_alloc(dev,
1121                                                           "%s-any-motion-dev%d",
1122                                                           indio_dev->name,
1123                                                           indio_dev->id);
1124                 if (!data->motion_trig)
1125                         return -ENOMEM;
1126
1127                 data->dready_trig->dev.parent = dev;
1128                 data->dready_trig->ops = &bmg160_trigger_ops;
1129                 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1130                 ret = iio_trigger_register(data->dready_trig);
1131                 if (ret)
1132                         return ret;
1133
1134                 data->motion_trig->dev.parent = dev;
1135                 data->motion_trig->ops = &bmg160_trigger_ops;
1136                 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1137                 ret = iio_trigger_register(data->motion_trig);
1138                 if (ret) {
1139                         data->motion_trig = NULL;
1140                         goto err_trigger_unregister;
1141                 }
1142         }
1143
1144         ret = iio_triggered_buffer_setup(indio_dev,
1145                                          iio_pollfunc_store_time,
1146                                          bmg160_trigger_handler,
1147                                          &bmg160_buffer_setup_ops);
1148         if (ret < 0) {
1149                 dev_err(dev,
1150                         "iio triggered buffer setup failed\n");
1151                 goto err_trigger_unregister;
1152         }
1153
1154         ret = pm_runtime_set_active(dev);
1155         if (ret)
1156                 goto err_buffer_cleanup;
1157
1158         pm_runtime_enable(dev);
1159         pm_runtime_set_autosuspend_delay(dev,
1160                                          BMG160_AUTO_SUSPEND_DELAY_MS);
1161         pm_runtime_use_autosuspend(dev);
1162
1163         ret = iio_device_register(indio_dev);
1164         if (ret < 0) {
1165                 dev_err(dev, "unable to register iio device\n");
1166                 goto err_buffer_cleanup;
1167         }
1168
1169         return 0;
1170
1171 err_buffer_cleanup:
1172         iio_triggered_buffer_cleanup(indio_dev);
1173 err_trigger_unregister:
1174         if (data->dready_trig)
1175                 iio_trigger_unregister(data->dready_trig);
1176         if (data->motion_trig)
1177                 iio_trigger_unregister(data->motion_trig);
1178
1179         return ret;
1180 }
1181 EXPORT_SYMBOL_GPL(bmg160_core_probe);
1182
1183 void bmg160_core_remove(struct device *dev)
1184 {
1185         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1186         struct bmg160_data *data = iio_priv(indio_dev);
1187
1188         iio_device_unregister(indio_dev);
1189
1190         pm_runtime_disable(dev);
1191         pm_runtime_set_suspended(dev);
1192         pm_runtime_put_noidle(dev);
1193
1194         iio_triggered_buffer_cleanup(indio_dev);
1195
1196         if (data->dready_trig) {
1197                 iio_trigger_unregister(data->dready_trig);
1198                 iio_trigger_unregister(data->motion_trig);
1199         }
1200
1201         mutex_lock(&data->mutex);
1202         bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
1203         mutex_unlock(&data->mutex);
1204 }
1205 EXPORT_SYMBOL_GPL(bmg160_core_remove);
1206
1207 #ifdef CONFIG_PM_SLEEP
1208 static int bmg160_suspend(struct device *dev)
1209 {
1210         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1211         struct bmg160_data *data = iio_priv(indio_dev);
1212
1213         mutex_lock(&data->mutex);
1214         bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1215         mutex_unlock(&data->mutex);
1216
1217         return 0;
1218 }
1219
1220 static int bmg160_resume(struct device *dev)
1221 {
1222         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1223         struct bmg160_data *data = iio_priv(indio_dev);
1224
1225         mutex_lock(&data->mutex);
1226         if (data->dready_trigger_on || data->motion_trigger_on ||
1227                                                         data->ev_enable_state)
1228                 bmg160_set_mode(data, BMG160_MODE_NORMAL);
1229         mutex_unlock(&data->mutex);
1230
1231         return 0;
1232 }
1233 #endif
1234
1235 #ifdef CONFIG_PM
1236 static int bmg160_runtime_suspend(struct device *dev)
1237 {
1238         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1239         struct bmg160_data *data = iio_priv(indio_dev);
1240         int ret;
1241
1242         ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1243         if (ret < 0) {
1244                 dev_err(dev, "set mode failed\n");
1245                 return -EAGAIN;
1246         }
1247
1248         return 0;
1249 }
1250
1251 static int bmg160_runtime_resume(struct device *dev)
1252 {
1253         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1254         struct bmg160_data *data = iio_priv(indio_dev);
1255         int ret;
1256
1257         ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
1258         if (ret < 0)
1259                 return ret;
1260
1261         msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
1262
1263         return 0;
1264 }
1265 #endif
1266
1267 const struct dev_pm_ops bmg160_pm_ops = {
1268         SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
1269         SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
1270                            bmg160_runtime_resume, NULL)
1271 };
1272 EXPORT_SYMBOL_GPL(bmg160_pm_ops);
1273
1274 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1275 MODULE_LICENSE("GPL v2");
1276 MODULE_DESCRIPTION("BMG160 Gyro driver");