2 * ADS1015 - Texas Instruments Analog-to-Digital Converter
4 * Copyright (c) 2016, Intel Corporation.
6 * This file is subject to the terms and conditions of version 2 of
7 * the GNU General Public License. See the file COPYING in the main
8 * directory of this archive for more details.
10 * IIO driver for ADS1015 ADC 7-bit I2C slave address:
11 * * 0x48 - ADDR connected to Ground
12 * * 0x49 - ADDR connected to Vdd
13 * * 0x4A - ADDR connected to SDA
14 * * 0x4B - ADDR connected to SCL
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/i2c.h>
20 #include <linux/regmap.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/mutex.h>
23 #include <linux/delay.h>
25 #include <linux/i2c/ads1015.h>
27 #include <linux/iio/iio.h>
28 #include <linux/iio/types.h>
29 #include <linux/iio/sysfs.h>
30 #include <linux/iio/buffer.h>
31 #include <linux/iio/triggered_buffer.h>
32 #include <linux/iio/trigger_consumer.h>
34 #define ADS1015_DRV_NAME "ads1015"
36 #define ADS1015_CONV_REG 0x00
37 #define ADS1015_CFG_REG 0x01
39 #define ADS1015_CFG_DR_SHIFT 5
40 #define ADS1015_CFG_MOD_SHIFT 8
41 #define ADS1015_CFG_PGA_SHIFT 9
42 #define ADS1015_CFG_MUX_SHIFT 12
44 #define ADS1015_CFG_DR_MASK GENMASK(7, 5)
45 #define ADS1015_CFG_MOD_MASK BIT(8)
46 #define ADS1015_CFG_PGA_MASK GENMASK(11, 9)
47 #define ADS1015_CFG_MUX_MASK GENMASK(14, 12)
49 /* device operating modes */
50 #define ADS1015_CONTINUOUS 0
51 #define ADS1015_SINGLESHOT 1
53 #define ADS1015_SLEEP_DELAY_MS 2000
54 #define ADS1015_DEFAULT_PGA 2
55 #define ADS1015_DEFAULT_DATA_RATE 4
56 #define ADS1015_DEFAULT_CHAN 0
63 enum ads1015_channels {
64 ADS1015_AIN0_AIN1 = 0,
75 static const unsigned int ads1015_data_rate[] = {
76 128, 250, 490, 920, 1600, 2400, 3300, 3300
79 static const unsigned int ads1115_data_rate[] = {
80 8, 16, 32, 64, 128, 250, 475, 860
84 * Translation from PGA bits to full-scale positive and negative input voltage
87 static int ads1015_fullscale_range[] = {
88 6144, 4096, 2048, 1024, 512, 256, 256, 256
91 #define ADS1015_V_CHAN(_chan, _addr) { \
92 .type = IIO_VOLTAGE, \
96 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
97 BIT(IIO_CHAN_INFO_SCALE) | \
98 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
99 .scan_index = _addr, \
105 .endianness = IIO_CPU, \
107 .datasheet_name = "AIN"#_chan, \
110 #define ADS1015_V_DIFF_CHAN(_chan, _chan2, _addr) { \
111 .type = IIO_VOLTAGE, \
116 .channel2 = _chan2, \
117 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
118 BIT(IIO_CHAN_INFO_SCALE) | \
119 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
120 .scan_index = _addr, \
126 .endianness = IIO_CPU, \
128 .datasheet_name = "AIN"#_chan"-AIN"#_chan2, \
131 #define ADS1115_V_CHAN(_chan, _addr) { \
132 .type = IIO_VOLTAGE, \
136 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
137 BIT(IIO_CHAN_INFO_SCALE) | \
138 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
139 .scan_index = _addr, \
144 .endianness = IIO_CPU, \
146 .datasheet_name = "AIN"#_chan, \
149 #define ADS1115_V_DIFF_CHAN(_chan, _chan2, _addr) { \
150 .type = IIO_VOLTAGE, \
155 .channel2 = _chan2, \
156 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
157 BIT(IIO_CHAN_INFO_SCALE) | \
158 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
159 .scan_index = _addr, \
164 .endianness = IIO_CPU, \
166 .datasheet_name = "AIN"#_chan"-AIN"#_chan2, \
169 struct ads1015_data {
170 struct regmap *regmap;
172 * Protects ADC ops, e.g: concurrent sysfs/buffered
173 * data reads, configuration updates
176 struct ads1015_channel_data channel_data[ADS1015_CHANNELS];
178 unsigned int *data_rate;
180 * Set to true when the ADC is switched to the continuous-conversion
181 * mode and exits from a power-down state. This flag is used to avoid
182 * getting the stale result from the conversion register.
187 static bool ads1015_is_writeable_reg(struct device *dev, unsigned int reg)
189 return (reg == ADS1015_CFG_REG);
192 static const struct regmap_config ads1015_regmap_config = {
195 .max_register = ADS1015_CFG_REG,
196 .writeable_reg = ads1015_is_writeable_reg,
199 static const struct iio_chan_spec ads1015_channels[] = {
200 ADS1015_V_DIFF_CHAN(0, 1, ADS1015_AIN0_AIN1),
201 ADS1015_V_DIFF_CHAN(0, 3, ADS1015_AIN0_AIN3),
202 ADS1015_V_DIFF_CHAN(1, 3, ADS1015_AIN1_AIN3),
203 ADS1015_V_DIFF_CHAN(2, 3, ADS1015_AIN2_AIN3),
204 ADS1015_V_CHAN(0, ADS1015_AIN0),
205 ADS1015_V_CHAN(1, ADS1015_AIN1),
206 ADS1015_V_CHAN(2, ADS1015_AIN2),
207 ADS1015_V_CHAN(3, ADS1015_AIN3),
208 IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
211 static const struct iio_chan_spec ads1115_channels[] = {
212 ADS1115_V_DIFF_CHAN(0, 1, ADS1015_AIN0_AIN1),
213 ADS1115_V_DIFF_CHAN(0, 3, ADS1015_AIN0_AIN3),
214 ADS1115_V_DIFF_CHAN(1, 3, ADS1015_AIN1_AIN3),
215 ADS1115_V_DIFF_CHAN(2, 3, ADS1015_AIN2_AIN3),
216 ADS1115_V_CHAN(0, ADS1015_AIN0),
217 ADS1115_V_CHAN(1, ADS1015_AIN1),
218 ADS1115_V_CHAN(2, ADS1015_AIN2),
219 ADS1115_V_CHAN(3, ADS1015_AIN3),
220 IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
224 static int ads1015_set_power_state(struct ads1015_data *data, bool on)
227 struct device *dev = regmap_get_device(data->regmap);
230 ret = pm_runtime_get_sync(dev);
232 pm_runtime_put_noidle(dev);
234 pm_runtime_mark_last_busy(dev);
235 ret = pm_runtime_put_autosuspend(dev);
238 return ret < 0 ? ret : 0;
241 #else /* !CONFIG_PM */
243 static int ads1015_set_power_state(struct ads1015_data *data, bool on)
248 #endif /* !CONFIG_PM */
251 int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
253 int ret, pga, dr, conv_time;
254 unsigned int old, mask, cfg;
256 if (chan < 0 || chan >= ADS1015_CHANNELS)
259 ret = regmap_read(data->regmap, ADS1015_CFG_REG, &old);
263 pga = data->channel_data[chan].pga;
264 dr = data->channel_data[chan].data_rate;
265 mask = ADS1015_CFG_MUX_MASK | ADS1015_CFG_PGA_MASK |
267 cfg = chan << ADS1015_CFG_MUX_SHIFT | pga << ADS1015_CFG_PGA_SHIFT |
268 dr << ADS1015_CFG_DR_SHIFT;
270 cfg = (old & ~mask) | (cfg & mask);
272 ret = regmap_write(data->regmap, ADS1015_CFG_REG, cfg);
276 if (old != cfg || data->conv_invalid) {
277 int dr_old = (old & ADS1015_CFG_DR_MASK) >>
278 ADS1015_CFG_DR_SHIFT;
280 conv_time = DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr_old]);
281 conv_time += DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr]);
282 conv_time += conv_time / 10; /* 10% internal clock inaccuracy */
283 usleep_range(conv_time, conv_time + 1);
284 data->conv_invalid = false;
287 return regmap_read(data->regmap, ADS1015_CONV_REG, val);
290 static irqreturn_t ads1015_trigger_handler(int irq, void *p)
292 struct iio_poll_func *pf = p;
293 struct iio_dev *indio_dev = pf->indio_dev;
294 struct ads1015_data *data = iio_priv(indio_dev);
295 /* Ensure natural alignment of timestamp */
298 s64 timestamp __aligned(8);
302 memset(&scan, 0, sizeof(scan));
304 mutex_lock(&data->lock);
305 chan = find_first_bit(indio_dev->active_scan_mask,
306 indio_dev->masklength);
307 ret = ads1015_get_adc_result(data, chan, &res);
309 mutex_unlock(&data->lock);
314 mutex_unlock(&data->lock);
316 iio_push_to_buffers_with_timestamp(indio_dev, &scan,
317 iio_get_time_ns(indio_dev));
320 iio_trigger_notify_done(indio_dev->trig);
325 static int ads1015_set_scale(struct ads1015_data *data,
326 struct iio_chan_spec const *chan,
327 int scale, int uscale)
329 int i, ret, rindex = -1;
330 int fullscale = div_s64((scale * 1000000LL + uscale) <<
331 (chan->scan_type.realbits - 1), 1000000);
333 for (i = 0; i < ARRAY_SIZE(ads1015_fullscale_range); i++) {
334 if (ads1015_fullscale_range[i] == fullscale) {
342 ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
343 ADS1015_CFG_PGA_MASK,
344 rindex << ADS1015_CFG_PGA_SHIFT);
348 data->channel_data[chan->address].pga = rindex;
353 static int ads1015_set_data_rate(struct ads1015_data *data, int chan, int rate)
357 for (i = 0; i < ARRAY_SIZE(ads1015_data_rate); i++) {
358 if (data->data_rate[i] == rate) {
359 data->channel_data[chan].data_rate = i;
367 static int ads1015_read_raw(struct iio_dev *indio_dev,
368 struct iio_chan_spec const *chan, int *val,
369 int *val2, long mask)
372 struct ads1015_data *data = iio_priv(indio_dev);
374 mutex_lock(&indio_dev->mlock);
375 mutex_lock(&data->lock);
377 case IIO_CHAN_INFO_RAW: {
378 int shift = chan->scan_type.shift;
380 if (iio_buffer_enabled(indio_dev)) {
385 ret = ads1015_set_power_state(data, true);
389 ret = ads1015_get_adc_result(data, chan->address, val);
391 ads1015_set_power_state(data, false);
395 *val = sign_extend32(*val >> shift, 15 - shift);
397 ret = ads1015_set_power_state(data, false);
404 case IIO_CHAN_INFO_SCALE:
405 idx = data->channel_data[chan->address].pga;
406 *val = ads1015_fullscale_range[idx];
407 *val2 = chan->scan_type.realbits - 1;
408 ret = IIO_VAL_FRACTIONAL_LOG2;
410 case IIO_CHAN_INFO_SAMP_FREQ:
411 idx = data->channel_data[chan->address].data_rate;
412 *val = data->data_rate[idx];
419 mutex_unlock(&data->lock);
420 mutex_unlock(&indio_dev->mlock);
425 static int ads1015_write_raw(struct iio_dev *indio_dev,
426 struct iio_chan_spec const *chan, int val,
429 struct ads1015_data *data = iio_priv(indio_dev);
432 mutex_lock(&data->lock);
434 case IIO_CHAN_INFO_SCALE:
435 ret = ads1015_set_scale(data, chan, val, val2);
437 case IIO_CHAN_INFO_SAMP_FREQ:
438 ret = ads1015_set_data_rate(data, chan->address, val);
444 mutex_unlock(&data->lock);
449 static int ads1015_buffer_preenable(struct iio_dev *indio_dev)
451 return ads1015_set_power_state(iio_priv(indio_dev), true);
454 static int ads1015_buffer_postdisable(struct iio_dev *indio_dev)
456 return ads1015_set_power_state(iio_priv(indio_dev), false);
459 static const struct iio_buffer_setup_ops ads1015_buffer_setup_ops = {
460 .preenable = ads1015_buffer_preenable,
461 .postenable = iio_triggered_buffer_postenable,
462 .predisable = iio_triggered_buffer_predisable,
463 .postdisable = ads1015_buffer_postdisable,
464 .validate_scan_mask = &iio_validate_scan_mask_onehot,
467 static IIO_CONST_ATTR_NAMED(ads1015_scale_available, scale_available,
468 "3 2 1 0.5 0.25 0.125");
469 static IIO_CONST_ATTR_NAMED(ads1115_scale_available, scale_available,
470 "0.1875 0.125 0.0625 0.03125 0.015625 0.007813");
472 static IIO_CONST_ATTR_NAMED(ads1015_sampling_frequency_available,
473 sampling_frequency_available, "128 250 490 920 1600 2400 3300");
474 static IIO_CONST_ATTR_NAMED(ads1115_sampling_frequency_available,
475 sampling_frequency_available, "8 16 32 64 128 250 475 860");
477 static struct attribute *ads1015_attributes[] = {
478 &iio_const_attr_ads1015_scale_available.dev_attr.attr,
479 &iio_const_attr_ads1015_sampling_frequency_available.dev_attr.attr,
483 static const struct attribute_group ads1015_attribute_group = {
484 .attrs = ads1015_attributes,
487 static struct attribute *ads1115_attributes[] = {
488 &iio_const_attr_ads1115_scale_available.dev_attr.attr,
489 &iio_const_attr_ads1115_sampling_frequency_available.dev_attr.attr,
493 static const struct attribute_group ads1115_attribute_group = {
494 .attrs = ads1115_attributes,
497 static struct iio_info ads1015_info = {
498 .driver_module = THIS_MODULE,
499 .read_raw = ads1015_read_raw,
500 .write_raw = ads1015_write_raw,
501 .attrs = &ads1015_attribute_group,
504 static struct iio_info ads1115_info = {
505 .driver_module = THIS_MODULE,
506 .read_raw = ads1015_read_raw,
507 .write_raw = ads1015_write_raw,
508 .attrs = &ads1115_attribute_group,
512 static int ads1015_get_channels_config_of(struct i2c_client *client)
514 struct iio_dev *indio_dev = i2c_get_clientdata(client);
515 struct ads1015_data *data = iio_priv(indio_dev);
516 struct device_node *node;
518 if (!client->dev.of_node ||
519 !of_get_next_child(client->dev.of_node, NULL))
522 for_each_child_of_node(client->dev.of_node, node) {
524 unsigned int channel;
525 unsigned int pga = ADS1015_DEFAULT_PGA;
526 unsigned int data_rate = ADS1015_DEFAULT_DATA_RATE;
528 if (of_property_read_u32(node, "reg", &pval)) {
529 dev_err(&client->dev, "invalid reg on %s\n",
535 if (channel >= ADS1015_CHANNELS) {
536 dev_err(&client->dev,
537 "invalid channel index %d on %s\n",
538 channel, node->full_name);
542 if (!of_property_read_u32(node, "ti,gain", &pval)) {
545 dev_err(&client->dev, "invalid gain on %s\n",
552 if (!of_property_read_u32(node, "ti,datarate", &pval)) {
555 dev_err(&client->dev,
556 "invalid data_rate on %s\n",
563 data->channel_data[channel].pga = pga;
564 data->channel_data[channel].data_rate = data_rate;
571 static void ads1015_get_channels_config(struct i2c_client *client)
575 struct iio_dev *indio_dev = i2c_get_clientdata(client);
576 struct ads1015_data *data = iio_priv(indio_dev);
577 struct ads1015_platform_data *pdata = dev_get_platdata(&client->dev);
579 /* prefer platform data */
581 memcpy(data->channel_data, pdata->channel_data,
582 sizeof(data->channel_data));
587 if (!ads1015_get_channels_config_of(client))
590 /* fallback on default configuration */
591 for (k = 0; k < ADS1015_CHANNELS; ++k) {
592 data->channel_data[k].pga = ADS1015_DEFAULT_PGA;
593 data->channel_data[k].data_rate = ADS1015_DEFAULT_DATA_RATE;
597 static int ads1015_probe(struct i2c_client *client,
598 const struct i2c_device_id *id)
600 struct iio_dev *indio_dev;
601 struct ads1015_data *data;
604 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
608 data = iio_priv(indio_dev);
609 i2c_set_clientdata(client, indio_dev);
611 mutex_init(&data->lock);
613 indio_dev->dev.parent = &client->dev;
614 indio_dev->dev.of_node = client->dev.of_node;
615 indio_dev->name = ADS1015_DRV_NAME;
616 indio_dev->modes = INDIO_DIRECT_MODE;
618 switch (id->driver_data) {
620 indio_dev->channels = ads1015_channels;
621 indio_dev->num_channels = ARRAY_SIZE(ads1015_channels);
622 indio_dev->info = &ads1015_info;
623 data->data_rate = (unsigned int *) &ads1015_data_rate;
626 indio_dev->channels = ads1115_channels;
627 indio_dev->num_channels = ARRAY_SIZE(ads1115_channels);
628 indio_dev->info = &ads1115_info;
629 data->data_rate = (unsigned int *) &ads1115_data_rate;
633 /* we need to keep this ABI the same as used by hwmon ADS1015 driver */
634 ads1015_get_channels_config(client);
636 data->regmap = devm_regmap_init_i2c(client, &ads1015_regmap_config);
637 if (IS_ERR(data->regmap)) {
638 dev_err(&client->dev, "Failed to allocate register map\n");
639 return PTR_ERR(data->regmap);
642 ret = iio_triggered_buffer_setup(indio_dev, NULL,
643 ads1015_trigger_handler,
644 &ads1015_buffer_setup_ops);
646 dev_err(&client->dev, "iio triggered buffer setup failed\n");
650 ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
651 ADS1015_CFG_MOD_MASK,
652 ADS1015_CONTINUOUS << ADS1015_CFG_MOD_SHIFT);
656 data->conv_invalid = true;
658 ret = pm_runtime_set_active(&client->dev);
660 goto err_buffer_cleanup;
661 pm_runtime_set_autosuspend_delay(&client->dev, ADS1015_SLEEP_DELAY_MS);
662 pm_runtime_use_autosuspend(&client->dev);
663 pm_runtime_enable(&client->dev);
665 ret = iio_device_register(indio_dev);
667 dev_err(&client->dev, "Failed to register IIO device\n");
668 goto err_buffer_cleanup;
674 iio_triggered_buffer_cleanup(indio_dev);
679 static int ads1015_remove(struct i2c_client *client)
681 struct iio_dev *indio_dev = i2c_get_clientdata(client);
682 struct ads1015_data *data = iio_priv(indio_dev);
684 iio_device_unregister(indio_dev);
686 pm_runtime_disable(&client->dev);
687 pm_runtime_set_suspended(&client->dev);
688 pm_runtime_put_noidle(&client->dev);
690 iio_triggered_buffer_cleanup(indio_dev);
692 /* power down single shot mode */
693 return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
694 ADS1015_CFG_MOD_MASK,
695 ADS1015_SINGLESHOT << ADS1015_CFG_MOD_SHIFT);
699 static int ads1015_runtime_suspend(struct device *dev)
701 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
702 struct ads1015_data *data = iio_priv(indio_dev);
704 return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
705 ADS1015_CFG_MOD_MASK,
706 ADS1015_SINGLESHOT << ADS1015_CFG_MOD_SHIFT);
709 static int ads1015_runtime_resume(struct device *dev)
711 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
712 struct ads1015_data *data = iio_priv(indio_dev);
715 ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
716 ADS1015_CFG_MOD_MASK,
717 ADS1015_CONTINUOUS << ADS1015_CFG_MOD_SHIFT);
719 data->conv_invalid = true;
725 static const struct dev_pm_ops ads1015_pm_ops = {
726 SET_RUNTIME_PM_OPS(ads1015_runtime_suspend,
727 ads1015_runtime_resume, NULL)
730 static const struct i2c_device_id ads1015_id[] = {
731 {"ads1015", ADS1015},
732 {"ads1115", ADS1115},
735 MODULE_DEVICE_TABLE(i2c, ads1015_id);
737 static struct i2c_driver ads1015_driver = {
739 .name = ADS1015_DRV_NAME,
740 .pm = &ads1015_pm_ops,
742 .probe = ads1015_probe,
743 .remove = ads1015_remove,
744 .id_table = ads1015_id,
747 module_i2c_driver(ads1015_driver);
749 MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
750 MODULE_DESCRIPTION("Texas Instruments ADS1015 ADC driver");
751 MODULE_LICENSE("GPL v2");