drivers/iio/adc/ti-ads1015.c

   1 /*
   2  * ADS1015 - Texas Instruments Analog-to-Digital Converter
   3  *
   4  * Copyright (c) 2016, Intel Corporation.
   5  *
   6  * This file is subject to the terms and conditions of version 2 of
   7  * the GNU General Public License.  See the file COPYING in the main
   8  * directory of this archive for more details.
   9  *
  10  * IIO driver for ADS1015 ADC 7-bit I2C slave address:
  11  *      * 0x48 - ADDR connected to Ground
  12  *      * 0x49 - ADDR connected to Vdd
  13  *      * 0x4A - ADDR connected to SDA
  14  *      * 0x4B - ADDR connected to SCL
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/of_device.h>
  19 #include <linux/init.h>
  20 #include <linux/irq.h>
  21 #include <linux/i2c.h>
  22 #include <linux/regmap.h>
  23 #include <linux/pm_runtime.h>
  24 #include <linux/mutex.h>
  25 #include <linux/delay.h>
  26
  27 #include <linux/platform_data/ads1015.h>
  28
  29 #include <linux/iio/iio.h>
  30 #include <linux/iio/types.h>
  31 #include <linux/iio/sysfs.h>
  32 #include <linux/iio/events.h>
  33 #include <linux/iio/buffer.h>
  34 #include <linux/iio/triggered_buffer.h>
  35 #include <linux/iio/trigger_consumer.h>
  36
  37 #define ADS1015_DRV_NAME "ads1015"
  38
  39 #define ADS1015_CONV_REG        0x00
  40 #define ADS1015_CFG_REG         0x01
  41 #define ADS1015_LO_THRESH_REG   0x02
  42 #define ADS1015_HI_THRESH_REG   0x03
  43
  44 #define ADS1015_CFG_COMP_QUE_SHIFT      0
  45 #define ADS1015_CFG_COMP_LAT_SHIFT      2
  46 #define ADS1015_CFG_COMP_POL_SHIFT      3
  47 #define ADS1015_CFG_COMP_MODE_SHIFT     4
  48 #define ADS1015_CFG_DR_SHIFT    5
  49 #define ADS1015_CFG_MOD_SHIFT   8
  50 #define ADS1015_CFG_PGA_SHIFT   9
  51 #define ADS1015_CFG_MUX_SHIFT   12
  52
  53 #define ADS1015_CFG_COMP_QUE_MASK       GENMASK(1, 0)
  54 #define ADS1015_CFG_COMP_LAT_MASK       BIT(2)
  55 #define ADS1015_CFG_COMP_POL_MASK       BIT(3)
  56 #define ADS1015_CFG_COMP_MODE_MASK      BIT(4)
  57 #define ADS1015_CFG_DR_MASK     GENMASK(7, 5)
  58 #define ADS1015_CFG_MOD_MASK    BIT(8)
  59 #define ADS1015_CFG_PGA_MASK    GENMASK(11, 9)
  60 #define ADS1015_CFG_MUX_MASK    GENMASK(14, 12)
  61
  62 /* Comparator queue and disable field */
  63 #define ADS1015_CFG_COMP_DISABLE        3
  64
  65 /* Comparator polarity field */
  66 #define ADS1015_CFG_COMP_POL_LOW        0
  67 #define ADS1015_CFG_COMP_POL_HIGH       1
  68
  69 /* Comparator mode field */
  70 #define ADS1015_CFG_COMP_MODE_TRAD      0
  71 #define ADS1015_CFG_COMP_MODE_WINDOW    1
  72
  73 /* device operating modes */
  74 #define ADS1015_CONTINUOUS      0
  75 #define ADS1015_SINGLESHOT      1
  76
  77 #define ADS1015_SLEEP_DELAY_MS          2000
  78 #define ADS1015_DEFAULT_PGA             2
  79 #define ADS1015_DEFAULT_DATA_RATE       4
  80 #define ADS1015_DEFAULT_CHAN            0
  81
  82 enum chip_ids {
  83         ADS1015,
  84         ADS1115,
  85 };
  86
  87 enum ads1015_channels {
  88         ADS1015_AIN0_AIN1 = 0,
  89         ADS1015_AIN0_AIN3,
  90         ADS1015_AIN1_AIN3,
  91         ADS1015_AIN2_AIN3,
  92         ADS1015_AIN0,
  93         ADS1015_AIN1,
  94         ADS1015_AIN2,
  95         ADS1015_AIN3,
  96         ADS1015_TIMESTAMP,
  97 };
  98
  99 static const unsigned int ads1015_data_rate[] = {
 100         128, 250, 490, 920, 1600, 2400, 3300, 3300
 101 };
 102
 103 static const unsigned int ads1115_data_rate[] = {
 104         8, 16, 32, 64, 128, 250, 475, 860
 105 };
 106
 107 /*
 108  * Translation from PGA bits to full-scale positive and negative input voltage
 109  * range in mV
 110  */
 111 static int ads1015_fullscale_range[] = {
 112         6144, 4096, 2048, 1024, 512, 256, 256, 256
 113 };
 114
 115 /*
 116  * Translation from COMP_QUE field value to the number of successive readings
 117  * exceed the threshold values before an interrupt is generated
 118  */
 119 static const int ads1015_comp_queue[] = { 1, 2, 4 };
 120
 121 static const struct iio_event_spec ads1015_events[] = {
 122         {
 123                 .type = IIO_EV_TYPE_THRESH,
 124                 .dir = IIO_EV_DIR_RISING,
 125                 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
 126                                 BIT(IIO_EV_INFO_ENABLE),
 127         }, {
 128                 .type = IIO_EV_TYPE_THRESH,
 129                 .dir = IIO_EV_DIR_FALLING,
 130                 .mask_separate = BIT(IIO_EV_INFO_VALUE),
 131         }, {
 132                 .type = IIO_EV_TYPE_THRESH,
 133                 .dir = IIO_EV_DIR_EITHER,
 134                 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
 135                                 BIT(IIO_EV_INFO_PERIOD),
 136         },
 137 };
 138
 139 #define ADS1015_V_CHAN(_chan, _addr) {                          \
 140         .type = IIO_VOLTAGE,                                    \
 141         .indexed = 1,                                           \
 142         .address = _addr,                                       \
 143         .channel = _chan,                                       \
 144         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 145                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 146                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 147         .scan_index = _addr,                                    \
 148         .scan_type = {                                          \
 149                 .sign = 's',                                    \
 150                 .realbits = 12,                                 \
 151                 .storagebits = 16,                              \
 152                 .shift = 4,                                     \
 153                 .endianness = IIO_CPU,                          \
 154         },                                                      \
 155         .event_spec = ads1015_events,                           \
 156         .num_event_specs = ARRAY_SIZE(ads1015_events),          \
 157         .datasheet_name = "AIN"#_chan,                          \
 158 }
 159
 160 #define ADS1015_V_DIFF_CHAN(_chan, _chan2, _addr) {             \
 161         .type = IIO_VOLTAGE,                                    \
 162         .differential = 1,                                      \
 163         .indexed = 1,                                           \
 164         .address = _addr,                                       \
 165         .channel = _chan,                                       \
 166         .channel2 = _chan2,                                     \
 167         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 168                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 169                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 170         .scan_index = _addr,                                    \
 171         .scan_type = {                                          \
 172                 .sign = 's',                                    \
 173                 .realbits = 12,                                 \
 174                 .storagebits = 16,                              \
 175                 .shift = 4,                                     \
 176                 .endianness = IIO_CPU,                          \
 177         },                                                      \
 178         .event_spec = ads1015_events,                           \
 179         .num_event_specs = ARRAY_SIZE(ads1015_events),          \
 180         .datasheet_name = "AIN"#_chan"-AIN"#_chan2,             \
 181 }
 182
 183 #define ADS1115_V_CHAN(_chan, _addr) {                          \
 184         .type = IIO_VOLTAGE,                                    \
 185         .indexed = 1,                                           \
 186         .address = _addr,                                       \
 187         .channel = _chan,                                       \
 188         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 189                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 190                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 191         .scan_index = _addr,                                    \
 192         .scan_type = {                                          \
 193                 .sign = 's',                                    \
 194                 .realbits = 16,                                 \
 195                 .storagebits = 16,                              \
 196                 .endianness = IIO_CPU,                          \
 197         },                                                      \
 198         .event_spec = ads1015_events,                           \
 199         .num_event_specs = ARRAY_SIZE(ads1015_events),          \
 200         .datasheet_name = "AIN"#_chan,                          \
 201 }
 202
 203 #define ADS1115_V_DIFF_CHAN(_chan, _chan2, _addr) {             \
 204         .type = IIO_VOLTAGE,                                    \
 205         .differential = 1,                                      \
 206         .indexed = 1,                                           \
 207         .address = _addr,                                       \
 208         .channel = _chan,                                       \
 209         .channel2 = _chan2,                                     \
 210         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 211                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 212                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 213         .scan_index = _addr,                                    \
 214         .scan_type = {                                          \
 215                 .sign = 's',                                    \
 216                 .realbits = 16,                                 \
 217                 .storagebits = 16,                              \
 218                 .endianness = IIO_CPU,                          \
 219         },                                                      \
 220         .event_spec = ads1015_events,                           \
 221         .num_event_specs = ARRAY_SIZE(ads1015_events),          \
 222         .datasheet_name = "AIN"#_chan"-AIN"#_chan2,             \
 223 }
 224
 225 struct ads1015_thresh_data {
 226         unsigned int comp_queue;
 227         int high_thresh;
 228         int low_thresh;
 229 };
 230
 231 struct ads1015_data {
 232         struct regmap *regmap;
 233         /*
 234          * Protects ADC ops, e.g: concurrent sysfs/buffered
 235          * data reads, configuration updates
 236          */
 237         struct mutex lock;
 238         struct ads1015_channel_data channel_data[ADS1015_CHANNELS];
 239
 240         unsigned int event_channel;
 241         unsigned int comp_mode;
 242         struct ads1015_thresh_data thresh_data[ADS1015_CHANNELS];
 243
 244         unsigned int *data_rate;
 245         /*
 246          * Set to true when the ADC is switched to the continuous-conversion
 247          * mode and exits from a power-down state.  This flag is used to avoid
 248          * getting the stale result from the conversion register.
 249          */
 250         bool conv_invalid;
 251 };
 252
 253 static bool ads1015_event_channel_enabled(struct ads1015_data *data)
 254 {
 255         return (data->event_channel != ADS1015_CHANNELS);
 256 }
 257
 258 static void ads1015_event_channel_enable(struct ads1015_data *data, int chan,
 259                                          int comp_mode)
 260 {
 261         WARN_ON(ads1015_event_channel_enabled(data));
 262
 263         data->event_channel = chan;
 264         data->comp_mode = comp_mode;
 265 }
 266
 267 static void ads1015_event_channel_disable(struct ads1015_data *data, int chan)
 268 {
 269         data->event_channel = ADS1015_CHANNELS;
 270 }
 271
 272 static bool ads1015_is_writeable_reg(struct device *dev, unsigned int reg)
 273 {
 274         switch (reg) {
 275         case ADS1015_CFG_REG:
 276         case ADS1015_LO_THRESH_REG:
 277         case ADS1015_HI_THRESH_REG:
 278                 return true;
 279         default:
 280                 return false;
 281         }
 282 }
 283
 284 static const struct regmap_config ads1015_regmap_config = {
 285         .reg_bits = 8,
 286         .val_bits = 16,
 287         .max_register = ADS1015_HI_THRESH_REG,
 288         .writeable_reg = ads1015_is_writeable_reg,
 289 };
 290
 291 static const struct iio_chan_spec ads1015_channels[] = {
 292         ADS1015_V_DIFF_CHAN(0, 1, ADS1015_AIN0_AIN1),
 293         ADS1015_V_DIFF_CHAN(0, 3, ADS1015_AIN0_AIN3),
 294         ADS1015_V_DIFF_CHAN(1, 3, ADS1015_AIN1_AIN3),
 295         ADS1015_V_DIFF_CHAN(2, 3, ADS1015_AIN2_AIN3),
 296         ADS1015_V_CHAN(0, ADS1015_AIN0),
 297         ADS1015_V_CHAN(1, ADS1015_AIN1),
 298         ADS1015_V_CHAN(2, ADS1015_AIN2),
 299         ADS1015_V_CHAN(3, ADS1015_AIN3),
 300         IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
 301 };
 302
 303 static const struct iio_chan_spec ads1115_channels[] = {
 304         ADS1115_V_DIFF_CHAN(0, 1, ADS1015_AIN0_AIN1),
 305         ADS1115_V_DIFF_CHAN(0, 3, ADS1015_AIN0_AIN3),
 306         ADS1115_V_DIFF_CHAN(1, 3, ADS1015_AIN1_AIN3),
 307         ADS1115_V_DIFF_CHAN(2, 3, ADS1015_AIN2_AIN3),
 308         ADS1115_V_CHAN(0, ADS1015_AIN0),
 309         ADS1115_V_CHAN(1, ADS1015_AIN1),
 310         ADS1115_V_CHAN(2, ADS1015_AIN2),
 311         ADS1115_V_CHAN(3, ADS1015_AIN3),
 312         IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
 313 };
 314
 315 #ifdef CONFIG_PM
 316 static int ads1015_set_power_state(struct ads1015_data *data, bool on)
 317 {
 318         int ret;
 319         struct device *dev = regmap_get_device(data->regmap);
 320
 321         if (on) {
 322                 ret = pm_runtime_get_sync(dev);
 323                 if (ret < 0)
 324                         pm_runtime_put_noidle(dev);
 325         } else {
 326                 pm_runtime_mark_last_busy(dev);
 327                 ret = pm_runtime_put_autosuspend(dev);
 328         }
 329
 330         return ret < 0 ? ret : 0;
 331 }
 332
 333 #else /* !CONFIG_PM */
 334
 335 static int ads1015_set_power_state(struct ads1015_data *data, bool on)
 336 {
 337         return 0;
 338 }
 339
 340 #endif /* !CONFIG_PM */
 341
 342 static
 343 int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
 344 {
 345         int ret, pga, dr, dr_old, conv_time;
 346         unsigned int old, mask, cfg;
 347
 348         if (chan < 0 || chan >= ADS1015_CHANNELS)
 349                 return -EINVAL;
 350
 351         ret = regmap_read(data->regmap, ADS1015_CFG_REG, &old);
 352         if (ret)
 353                 return ret;
 354
 355         pga = data->channel_data[chan].pga;
 356         dr = data->channel_data[chan].data_rate;
 357         mask = ADS1015_CFG_MUX_MASK | ADS1015_CFG_PGA_MASK |
 358                 ADS1015_CFG_DR_MASK;
 359         cfg = chan << ADS1015_CFG_MUX_SHIFT | pga << ADS1015_CFG_PGA_SHIFT |
 360                 dr << ADS1015_CFG_DR_SHIFT;
 361
 362         if (ads1015_event_channel_enabled(data)) {
 363                 mask |= ADS1015_CFG_COMP_QUE_MASK | ADS1015_CFG_COMP_MODE_MASK;
 364                 cfg |= data->thresh_data[chan].comp_queue <<
 365                                 ADS1015_CFG_COMP_QUE_SHIFT |
 366                         data->comp_mode <<
 367                                 ADS1015_CFG_COMP_MODE_SHIFT;
 368         }
 369
 370         cfg = (old & ~mask) | (cfg & mask);
 371         if (old != cfg) {
 372                 ret = regmap_write(data->regmap, ADS1015_CFG_REG, cfg);
 373                 if (ret)
 374                         return ret;
 375                 data->conv_invalid = true;
 376         }
 377         if (data->conv_invalid) {
 378                 dr_old = (old & ADS1015_CFG_DR_MASK) >> ADS1015_CFG_DR_SHIFT;
 379                 conv_time = DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr_old]);
 380                 conv_time += DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr]);
 381                 conv_time += conv_time / 10; /* 10% internal clock inaccuracy */
 382                 usleep_range(conv_time, conv_time + 1);
 383                 data->conv_invalid = false;
 384         }
 385
 386         return regmap_read(data->regmap, ADS1015_CONV_REG, val);
 387 }
 388
 389 static irqreturn_t ads1015_trigger_handler(int irq, void *p)
 390 {
 391         struct iio_poll_func *pf = p;
 392         struct iio_dev *indio_dev = pf->indio_dev;
 393         struct ads1015_data *data = iio_priv(indio_dev);
 394         /* Ensure natural alignment of timestamp */
 395         struct {
 396                 s16 chan;
 397                 s64 timestamp __aligned(8);
 398         } scan;
 399         int chan, ret, res;
 400
 401         memset(&scan, 0, sizeof(scan));
 402
 403         mutex_lock(&data->lock);
 404         chan = find_first_bit(indio_dev->active_scan_mask,
 405                               indio_dev->masklength);
 406         ret = ads1015_get_adc_result(data, chan, &res);
 407         if (ret < 0) {
 408                 mutex_unlock(&data->lock);
 409                 goto err;
 410         }
 411
 412         scan.chan = res;
 413         mutex_unlock(&data->lock);
 414
 415         iio_push_to_buffers_with_timestamp(indio_dev, &scan,
 416                                            iio_get_time_ns(indio_dev));
 417
 418 err:
 419         iio_trigger_notify_done(indio_dev->trig);
 420
 421         return IRQ_HANDLED;
 422 }
 423
 424 static int ads1015_set_scale(struct ads1015_data *data,
 425                              struct iio_chan_spec const *chan,
 426                              int scale, int uscale)
 427 {
 428         int i;
 429         int fullscale = div_s64((scale * 1000000LL + uscale) <<
 430                                 (chan->scan_type.realbits - 1), 1000000);
 431
 432         for (i = 0; i < ARRAY_SIZE(ads1015_fullscale_range); i++) {
 433                 if (ads1015_fullscale_range[i] == fullscale) {
 434                         data->channel_data[chan->address].pga = i;
 435                         return 0;
 436                 }
 437         }
 438
 439         return -EINVAL;
 440 }
 441
 442 static int ads1015_set_data_rate(struct ads1015_data *data, int chan, int rate)
 443 {
 444         int i;
 445
 446         for (i = 0; i < ARRAY_SIZE(ads1015_data_rate); i++) {
 447                 if (data->data_rate[i] == rate) {
 448                         data->channel_data[chan].data_rate = i;
 449                         return 0;
 450                 }
 451         }
 452
 453         return -EINVAL;
 454 }
 455
 456 static int ads1015_read_raw(struct iio_dev *indio_dev,
 457                             struct iio_chan_spec const *chan, int *val,
 458                             int *val2, long mask)
 459 {
 460         int ret, idx;
 461         struct ads1015_data *data = iio_priv(indio_dev);
 462
 463         mutex_lock(&data->lock);
 464         switch (mask) {
 465         case IIO_CHAN_INFO_RAW: {
 466                 int shift = chan->scan_type.shift;
 467
 468                 ret = iio_device_claim_direct_mode(indio_dev);
 469                 if (ret)
 470                         break;
 471
 472                 if (ads1015_event_channel_enabled(data) &&
 473                                 data->event_channel != chan->address) {
 474                         ret = -EBUSY;
 475                         goto release_direct;
 476                 }
 477
 478                 ret = ads1015_set_power_state(data, true);
 479                 if (ret < 0)
 480                         goto release_direct;
 481
 482                 ret = ads1015_get_adc_result(data, chan->address, val);
 483                 if (ret < 0) {
 484                         ads1015_set_power_state(data, false);
 485                         goto release_direct;
 486                 }
 487
 488                 *val = sign_extend32(*val >> shift, 15 - shift);
 489
 490                 ret = ads1015_set_power_state(data, false);
 491                 if (ret < 0)
 492                         goto release_direct;
 493
 494                 ret = IIO_VAL_INT;
 495 release_direct:
 496                 iio_device_release_direct_mode(indio_dev);
 497                 break;
 498         }
 499         case IIO_CHAN_INFO_SCALE:
 500                 idx = data->channel_data[chan->address].pga;
 501                 *val = ads1015_fullscale_range[idx];
 502                 *val2 = chan->scan_type.realbits - 1;
 503                 ret = IIO_VAL_FRACTIONAL_LOG2;
 504                 break;
 505         case IIO_CHAN_INFO_SAMP_FREQ:
 506                 idx = data->channel_data[chan->address].data_rate;
 507                 *val = data->data_rate[idx];
 508                 ret = IIO_VAL_INT;
 509                 break;
 510         default:
 511                 ret = -EINVAL;
 512                 break;
 513         }
 514         mutex_unlock(&data->lock);
 515
 516         return ret;
 517 }
 518
 519 static int ads1015_write_raw(struct iio_dev *indio_dev,
 520                              struct iio_chan_spec const *chan, int val,
 521                              int val2, long mask)
 522 {
 523         struct ads1015_data *data = iio_priv(indio_dev);
 524         int ret;
 525
 526         mutex_lock(&data->lock);
 527         switch (mask) {
 528         case IIO_CHAN_INFO_SCALE:
 529                 ret = ads1015_set_scale(data, chan, val, val2);
 530                 break;
 531         case IIO_CHAN_INFO_SAMP_FREQ:
 532                 ret = ads1015_set_data_rate(data, chan->address, val);
 533                 break;
 534         default:
 535                 ret = -EINVAL;
 536                 break;
 537         }
 538         mutex_unlock(&data->lock);
 539
 540         return ret;
 541 }
 542
 543 static int ads1015_read_event(struct iio_dev *indio_dev,
 544         const struct iio_chan_spec *chan, enum iio_event_type type,
 545         enum iio_event_direction dir, enum iio_event_info info, int *val,
 546         int *val2)
 547 {
 548         struct ads1015_data *data = iio_priv(indio_dev);
 549         int ret;
 550         unsigned int comp_queue;
 551         int period;
 552         int dr;
 553
 554         mutex_lock(&data->lock);
 555
 556         switch (info) {
 557         case IIO_EV_INFO_VALUE:
 558                 *val = (dir == IIO_EV_DIR_RISING) ?
 559                         data->thresh_data[chan->address].high_thresh :
 560                         data->thresh_data[chan->address].low_thresh;
 561                 ret = IIO_VAL_INT;
 562                 break;
 563         case IIO_EV_INFO_PERIOD:
 564                 dr = data->channel_data[chan->address].data_rate;
 565                 comp_queue = data->thresh_data[chan->address].comp_queue;
 566                 period = ads1015_comp_queue[comp_queue] *
 567                         USEC_PER_SEC / data->data_rate[dr];
 568
 569                 *val = period / USEC_PER_SEC;
 570                 *val2 = period % USEC_PER_SEC;
 571                 ret = IIO_VAL_INT_PLUS_MICRO;
 572                 break;
 573         default:
 574                 ret = -EINVAL;
 575                 break;
 576         }
 577
 578         mutex_unlock(&data->lock);
 579
 580         return ret;
 581 }
 582
 583 static int ads1015_write_event(struct iio_dev *indio_dev,
 584         const struct iio_chan_spec *chan, enum iio_event_type type,
 585         enum iio_event_direction dir, enum iio_event_info info, int val,
 586         int val2)
 587 {
 588         struct ads1015_data *data = iio_priv(indio_dev);
 589         int realbits = chan->scan_type.realbits;
 590         int ret = 0;
 591         long long period;
 592         int i;
 593         int dr;
 594
 595         mutex_lock(&data->lock);
 596
 597         switch (info) {
 598         case IIO_EV_INFO_VALUE:
 599                 if (val >= 1 << (realbits - 1) || val < -1 << (realbits - 1)) {
 600                         ret = -EINVAL;
 601                         break;
 602                 }
 603                 if (dir == IIO_EV_DIR_RISING)
 604                         data->thresh_data[chan->address].high_thresh = val;
 605                 else
 606                         data->thresh_data[chan->address].low_thresh = val;
 607                 break;
 608         case IIO_EV_INFO_PERIOD:
 609                 dr = data->channel_data[chan->address].data_rate;
 610                 period = val * USEC_PER_SEC + val2;
 611
 612                 for (i = 0; i < ARRAY_SIZE(ads1015_comp_queue) - 1; i++) {
 613                         if (period <= ads1015_comp_queue[i] *
 614                                         USEC_PER_SEC / data->data_rate[dr])
 615                                 break;
 616                 }
 617                 data->thresh_data[chan->address].comp_queue = i;
 618                 break;
 619         default:
 620                 ret = -EINVAL;
 621                 break;
 622         }
 623
 624         mutex_unlock(&data->lock);
 625
 626         return ret;
 627 }
 628
 629 static int ads1015_read_event_config(struct iio_dev *indio_dev,
 630         const struct iio_chan_spec *chan, enum iio_event_type type,
 631         enum iio_event_direction dir)
 632 {
 633         struct ads1015_data *data = iio_priv(indio_dev);
 634         int ret = 0;
 635
 636         mutex_lock(&data->lock);
 637         if (data->event_channel == chan->address) {
 638                 switch (dir) {
 639                 case IIO_EV_DIR_RISING:
 640                         ret = 1;
 641                         break;
 642                 case IIO_EV_DIR_EITHER:
 643                         ret = (data->comp_mode == ADS1015_CFG_COMP_MODE_WINDOW);
 644                         break;
 645                 default:
 646                         ret = -EINVAL;
 647                         break;
 648                 }
 649         }
 650         mutex_unlock(&data->lock);
 651
 652         return ret;
 653 }
 654
 655 static int ads1015_enable_event_config(struct ads1015_data *data,
 656         const struct iio_chan_spec *chan, int comp_mode)
 657 {
 658         int low_thresh = data->thresh_data[chan->address].low_thresh;
 659         int high_thresh = data->thresh_data[chan->address].high_thresh;
 660         int ret;
 661         unsigned int val;
 662
 663         if (ads1015_event_channel_enabled(data)) {
 664                 if (data->event_channel != chan->address ||
 665                         (data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD &&
 666                                 comp_mode == ADS1015_CFG_COMP_MODE_WINDOW))
 667                         return -EBUSY;
 668
 669                 return 0;
 670         }
 671
 672         if (comp_mode == ADS1015_CFG_COMP_MODE_TRAD) {
 673                 low_thresh = max(-1 << (chan->scan_type.realbits - 1),
 674                                 high_thresh - 1);
 675         }
 676         ret = regmap_write(data->regmap, ADS1015_LO_THRESH_REG,
 677                         low_thresh << chan->scan_type.shift);
 678         if (ret)
 679                 return ret;
 680
 681         ret = regmap_write(data->regmap, ADS1015_HI_THRESH_REG,
 682                         high_thresh << chan->scan_type.shift);
 683         if (ret)
 684                 return ret;
 685
 686         ret = ads1015_set_power_state(data, true);
 687         if (ret < 0)
 688                 return ret;
 689
 690         ads1015_event_channel_enable(data, chan->address, comp_mode);
 691
 692         ret = ads1015_get_adc_result(data, chan->address, &val);
 693         if (ret) {
 694                 ads1015_event_channel_disable(data, chan->address);
 695                 ads1015_set_power_state(data, false);
 696         }
 697
 698         return ret;
 699 }
 700
 701 static int ads1015_disable_event_config(struct ads1015_data *data,
 702         const struct iio_chan_spec *chan, int comp_mode)
 703 {
 704         int ret;
 705
 706         if (!ads1015_event_channel_enabled(data))
 707                 return 0;
 708
 709         if (data->event_channel != chan->address)
 710                 return 0;
 711
 712         if (data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD &&
 713                         comp_mode == ADS1015_CFG_COMP_MODE_WINDOW)
 714                 return 0;
 715
 716         ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 717                                 ADS1015_CFG_COMP_QUE_MASK,
 718                                 ADS1015_CFG_COMP_DISABLE <<
 719                                         ADS1015_CFG_COMP_QUE_SHIFT);
 720         if (ret)
 721                 return ret;
 722
 723         ads1015_event_channel_disable(data, chan->address);
 724
 725         return ads1015_set_power_state(data, false);
 726 }
 727
 728 static int ads1015_write_event_config(struct iio_dev *indio_dev,
 729         const struct iio_chan_spec *chan, enum iio_event_type type,
 730         enum iio_event_direction dir, int state)
 731 {
 732         struct ads1015_data *data = iio_priv(indio_dev);
 733         int ret;
 734         int comp_mode = (dir == IIO_EV_DIR_EITHER) ?
 735                 ADS1015_CFG_COMP_MODE_WINDOW : ADS1015_CFG_COMP_MODE_TRAD;
 736
 737         mutex_lock(&data->lock);
 738
 739         /* Prevent from enabling both buffer and event at a time */
 740         ret = iio_device_claim_direct_mode(indio_dev);
 741         if (ret) {
 742                 mutex_unlock(&data->lock);
 743                 return ret;
 744         }
 745
 746         if (state)
 747                 ret = ads1015_enable_event_config(data, chan, comp_mode);
 748         else
 749                 ret = ads1015_disable_event_config(data, chan, comp_mode);
 750
 751         iio_device_release_direct_mode(indio_dev);
 752         mutex_unlock(&data->lock);
 753
 754         return ret;
 755 }
 756
 757 static irqreturn_t ads1015_event_handler(int irq, void *priv)
 758 {
 759         struct iio_dev *indio_dev = priv;
 760         struct ads1015_data *data = iio_priv(indio_dev);
 761         int val;
 762         int ret;
 763
 764         /* Clear the latched ALERT/RDY pin */
 765         ret = regmap_read(data->regmap, ADS1015_CONV_REG, &val);
 766         if (ret)
 767                 return IRQ_HANDLED;
 768
 769         if (ads1015_event_channel_enabled(data)) {
 770                 enum iio_event_direction dir;
 771                 u64 code;
 772
 773                 dir = data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD ?
 774                                         IIO_EV_DIR_RISING : IIO_EV_DIR_EITHER;
 775                 code = IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, data->event_channel,
 776                                         IIO_EV_TYPE_THRESH, dir);
 777                 iio_push_event(indio_dev, code, iio_get_time_ns(indio_dev));
 778         }
 779
 780         return IRQ_HANDLED;
 781 }
 782
 783 static int ads1015_buffer_preenable(struct iio_dev *indio_dev)
 784 {
 785         struct ads1015_data *data = iio_priv(indio_dev);
 786
 787         /* Prevent from enabling both buffer and event at a time */
 788         if (ads1015_event_channel_enabled(data))
 789                 return -EBUSY;
 790
 791         return ads1015_set_power_state(iio_priv(indio_dev), true);
 792 }
 793
 794 static int ads1015_buffer_postdisable(struct iio_dev *indio_dev)
 795 {
 796         return ads1015_set_power_state(iio_priv(indio_dev), false);
 797 }
 798
 799 static const struct iio_buffer_setup_ops ads1015_buffer_setup_ops = {
 800         .preenable      = ads1015_buffer_preenable,
 801         .postenable     = iio_triggered_buffer_postenable,
 802         .predisable     = iio_triggered_buffer_predisable,
 803         .postdisable    = ads1015_buffer_postdisable,
 804         .validate_scan_mask = &iio_validate_scan_mask_onehot,
 805 };
 806
 807 static IIO_CONST_ATTR_NAMED(ads1015_scale_available, scale_available,
 808         "3 2 1 0.5 0.25 0.125");
 809 static IIO_CONST_ATTR_NAMED(ads1115_scale_available, scale_available,
 810         "0.1875 0.125 0.0625 0.03125 0.015625 0.007813");
 811
 812 static IIO_CONST_ATTR_NAMED(ads1015_sampling_frequency_available,
 813         sampling_frequency_available, "128 250 490 920 1600 2400 3300");
 814 static IIO_CONST_ATTR_NAMED(ads1115_sampling_frequency_available,
 815         sampling_frequency_available, "8 16 32 64 128 250 475 860");
 816
 817 static struct attribute *ads1015_attributes[] = {
 818         &iio_const_attr_ads1015_scale_available.dev_attr.attr,
 819         &iio_const_attr_ads1015_sampling_frequency_available.dev_attr.attr,
 820         NULL,
 821 };
 822
 823 static const struct attribute_group ads1015_attribute_group = {
 824         .attrs = ads1015_attributes,
 825 };
 826
 827 static struct attribute *ads1115_attributes[] = {
 828         &iio_const_attr_ads1115_scale_available.dev_attr.attr,
 829         &iio_const_attr_ads1115_sampling_frequency_available.dev_attr.attr,
 830         NULL,
 831 };
 832
 833 static const struct attribute_group ads1115_attribute_group = {
 834         .attrs = ads1115_attributes,
 835 };
 836
 837 static const struct iio_info ads1015_info = {
 838         .read_raw       = ads1015_read_raw,
 839         .write_raw      = ads1015_write_raw,
 840         .read_event_value = ads1015_read_event,
 841         .write_event_value = ads1015_write_event,
 842         .read_event_config = ads1015_read_event_config,
 843         .write_event_config = ads1015_write_event_config,
 844         .attrs          = &ads1015_attribute_group,
 845 };
 846
 847 static const struct iio_info ads1115_info = {
 848         .read_raw       = ads1015_read_raw,
 849         .write_raw      = ads1015_write_raw,
 850         .read_event_value = ads1015_read_event,
 851         .write_event_value = ads1015_write_event,
 852         .read_event_config = ads1015_read_event_config,
 853         .write_event_config = ads1015_write_event_config,
 854         .attrs          = &ads1115_attribute_group,
 855 };
 856
 857 #ifdef CONFIG_OF
 858 static int ads1015_get_channels_config_of(struct i2c_client *client)
 859 {
 860         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 861         struct ads1015_data *data = iio_priv(indio_dev);
 862         struct device_node *node;
 863
 864         if (!client->dev.of_node ||
 865             !of_get_next_child(client->dev.of_node, NULL))
 866                 return -EINVAL;
 867
 868         for_each_child_of_node(client->dev.of_node, node) {
 869                 u32 pval;
 870                 unsigned int channel;
 871                 unsigned int pga = ADS1015_DEFAULT_PGA;
 872                 unsigned int data_rate = ADS1015_DEFAULT_DATA_RATE;
 873
 874                 if (of_property_read_u32(node, "reg", &pval)) {
 875                         dev_err(&client->dev, "invalid reg on %pOF\n",
 876                                 node);
 877                         continue;
 878                 }
 879
 880                 channel = pval;
 881                 if (channel >= ADS1015_CHANNELS) {
 882                         dev_err(&client->dev,
 883                                 "invalid channel index %d on %pOF\n",
 884                                 channel, node);
 885                         continue;
 886                 }
 887
 888                 if (!of_property_read_u32(node, "ti,gain", &pval)) {
 889                         pga = pval;
 890                         if (pga > 6) {
 891                                 dev_err(&client->dev, "invalid gain on %pOF\n",
 892                                         node);
 893                                 of_node_put(node);
 894                                 return -EINVAL;
 895                         }
 896                 }
 897
 898                 if (!of_property_read_u32(node, "ti,datarate", &pval)) {
 899                         data_rate = pval;
 900                         if (data_rate > 7) {
 901                                 dev_err(&client->dev,
 902                                         "invalid data_rate on %pOF\n",
 903                                         node);
 904                                 of_node_put(node);
 905                                 return -EINVAL;
 906                         }
 907                 }
 908
 909                 data->channel_data[channel].pga = pga;
 910                 data->channel_data[channel].data_rate = data_rate;
 911         }
 912
 913         return 0;
 914 }
 915 #endif
 916
 917 static void ads1015_get_channels_config(struct i2c_client *client)
 918 {
 919         unsigned int k;
 920
 921         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 922         struct ads1015_data *data = iio_priv(indio_dev);
 923         struct ads1015_platform_data *pdata = dev_get_platdata(&client->dev);
 924
 925         /* prefer platform data */
 926         if (pdata) {
 927                 memcpy(data->channel_data, pdata->channel_data,
 928                        sizeof(data->channel_data));
 929                 return;
 930         }
 931
 932 #ifdef CONFIG_OF
 933         if (!ads1015_get_channels_config_of(client))
 934                 return;
 935 #endif
 936         /* fallback on default configuration */
 937         for (k = 0; k < ADS1015_CHANNELS; ++k) {
 938                 data->channel_data[k].pga = ADS1015_DEFAULT_PGA;
 939                 data->channel_data[k].data_rate = ADS1015_DEFAULT_DATA_RATE;
 940         }
 941 }
 942
 943 static int ads1015_set_conv_mode(struct ads1015_data *data, int mode)
 944 {
 945         return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 946                                   ADS1015_CFG_MOD_MASK,
 947                                   mode << ADS1015_CFG_MOD_SHIFT);
 948 }
 949
 950 static int ads1015_probe(struct i2c_client *client,
 951                          const struct i2c_device_id *id)
 952 {
 953         struct iio_dev *indio_dev;
 954         struct ads1015_data *data;
 955         int ret;
 956         enum chip_ids chip;
 957         int i;
 958
 959         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
 960         if (!indio_dev)
 961                 return -ENOMEM;
 962
 963         data = iio_priv(indio_dev);
 964         i2c_set_clientdata(client, indio_dev);
 965
 966         mutex_init(&data->lock);
 967
 968         indio_dev->dev.parent = &client->dev;
 969         indio_dev->dev.of_node = client->dev.of_node;
 970         indio_dev->name = ADS1015_DRV_NAME;
 971         indio_dev->modes = INDIO_DIRECT_MODE;
 972
 973         if (client->dev.of_node)
 974                 chip = (enum chip_ids)of_device_get_match_data(&client->dev);
 975         else
 976                 chip = id->driver_data;
 977         switch (chip) {
 978         case ADS1015:
 979                 indio_dev->channels = ads1015_channels;
 980                 indio_dev->num_channels = ARRAY_SIZE(ads1015_channels);
 981                 indio_dev->info = &ads1015_info;
 982                 data->data_rate = (unsigned int *) &ads1015_data_rate;
 983                 break;
 984         case ADS1115:
 985                 indio_dev->channels = ads1115_channels;
 986                 indio_dev->num_channels = ARRAY_SIZE(ads1115_channels);
 987                 indio_dev->info = &ads1115_info;
 988                 data->data_rate = (unsigned int *) &ads1115_data_rate;
 989                 break;
 990         }
 991
 992         data->event_channel = ADS1015_CHANNELS;
 993         /*
 994          * Set default lower and upper threshold to min and max value
 995          * respectively.
 996          */
 997         for (i = 0; i < ADS1015_CHANNELS; i++) {
 998                 int realbits = indio_dev->channels[i].scan_type.realbits;
 999
1000                 data->thresh_data[i].low_thresh = -1 << (realbits - 1);
1001                 data->thresh_data[i].high_thresh = (1 << (realbits - 1)) - 1;
1002         }
1003
1004         /* we need to keep this ABI the same as used by hwmon ADS1015 driver */
1005         ads1015_get_channels_config(client);
1006
1007         data->regmap = devm_regmap_init_i2c(client, &ads1015_regmap_config);
1008         if (IS_ERR(data->regmap)) {
1009                 dev_err(&client->dev, "Failed to allocate register map\n");
1010                 return PTR_ERR(data->regmap);
1011         }
1012
1013         ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev, NULL,
1014                                               ads1015_trigger_handler,
1015                                               &ads1015_buffer_setup_ops);
1016         if (ret < 0) {
1017                 dev_err(&client->dev, "iio triggered buffer setup failed\n");
1018                 return ret;
1019         }
1020
1021         if (client->irq) {
1022                 unsigned long irq_trig =
1023                         irqd_get_trigger_type(irq_get_irq_data(client->irq));
1024                 unsigned int cfg_comp_mask = ADS1015_CFG_COMP_QUE_MASK |
1025                         ADS1015_CFG_COMP_LAT_MASK | ADS1015_CFG_COMP_POL_MASK;
1026                 unsigned int cfg_comp =
1027                         ADS1015_CFG_COMP_DISABLE << ADS1015_CFG_COMP_QUE_SHIFT |
1028                         1 << ADS1015_CFG_COMP_LAT_SHIFT;
1029
1030                 switch (irq_trig) {
1031                 case IRQF_TRIGGER_LOW:
1032                         cfg_comp |= ADS1015_CFG_COMP_POL_LOW <<
1033                                         ADS1015_CFG_COMP_POL_SHIFT;
1034                         break;
1035                 case IRQF_TRIGGER_HIGH:
1036                         cfg_comp |= ADS1015_CFG_COMP_POL_HIGH <<
1037                                         ADS1015_CFG_COMP_POL_SHIFT;
1038                         break;
1039                 default:
1040                         return -EINVAL;
1041                 }
1042
1043                 ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
1044                                         cfg_comp_mask, cfg_comp);
1045                 if (ret)
1046                         return ret;
1047
1048                 ret = devm_request_threaded_irq(&client->dev, client->irq,
1049                                                 NULL, ads1015_event_handler,
1050                                                 irq_trig | IRQF_ONESHOT,
1051                                                 client->name, indio_dev);
1052                 if (ret)
1053                         return ret;
1054         }
1055
1056         ret = ads1015_set_conv_mode(data, ADS1015_CONTINUOUS);
1057         if (ret)
1058                 return ret;
1059
1060         data->conv_invalid = true;
1061
1062         ret = pm_runtime_set_active(&client->dev);
1063         if (ret)
1064                 return ret;
1065         pm_runtime_set_autosuspend_delay(&client->dev, ADS1015_SLEEP_DELAY_MS);
1066         pm_runtime_use_autosuspend(&client->dev);
1067         pm_runtime_enable(&client->dev);
1068
1069         ret = iio_device_register(indio_dev);
1070         if (ret < 0) {
1071                 dev_err(&client->dev, "Failed to register IIO device\n");
1072                 return ret;
1073         }
1074
1075         return 0;
1076 }
1077
1078 static int ads1015_remove(struct i2c_client *client)
1079 {
1080         struct iio_dev *indio_dev = i2c_get_clientdata(client);
1081         struct ads1015_data *data = iio_priv(indio_dev);
1082
1083         iio_device_unregister(indio_dev);
1084
1085         pm_runtime_disable(&client->dev);
1086         pm_runtime_set_suspended(&client->dev);
1087         pm_runtime_put_noidle(&client->dev);
1088
1089         /* power down single shot mode */
1090         return ads1015_set_conv_mode(data, ADS1015_SINGLESHOT);
1091 }
1092
1093 #ifdef CONFIG_PM
1094 static int ads1015_runtime_suspend(struct device *dev)
1095 {
1096         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1097         struct ads1015_data *data = iio_priv(indio_dev);
1098
1099         return ads1015_set_conv_mode(data, ADS1015_SINGLESHOT);
1100 }
1101
1102 static int ads1015_runtime_resume(struct device *dev)
1103 {
1104         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1105         struct ads1015_data *data = iio_priv(indio_dev);
1106         int ret;
1107
1108         ret = ads1015_set_conv_mode(data, ADS1015_CONTINUOUS);
1109         if (!ret)
1110                 data->conv_invalid = true;
1111
1112         return ret;
1113 }
1114 #endif
1115
1116 static const struct dev_pm_ops ads1015_pm_ops = {
1117         SET_RUNTIME_PM_OPS(ads1015_runtime_suspend,
1118                            ads1015_runtime_resume, NULL)
1119 };
1120
1121 static const struct i2c_device_id ads1015_id[] = {
1122         {"ads1015", ADS1015},
1123         {"ads1115", ADS1115},
1124         {}
1125 };
1126 MODULE_DEVICE_TABLE(i2c, ads1015_id);
1127
1128 static const struct of_device_id ads1015_of_match[] = {
1129         {
1130                 .compatible = "ti,ads1015",
1131                 .data = (void *)ADS1015
1132         },
1133         {
1134                 .compatible = "ti,ads1115",
1135                 .data = (void *)ADS1115
1136         },
1137         {}
1138 };
1139 MODULE_DEVICE_TABLE(of, ads1015_of_match);
1140
1141 static struct i2c_driver ads1015_driver = {
1142         .driver = {
1143                 .name = ADS1015_DRV_NAME,
1144                 .of_match_table = ads1015_of_match,
1145                 .pm = &ads1015_pm_ops,
1146         },
1147         .probe          = ads1015_probe,
1148         .remove         = ads1015_remove,
1149         .id_table       = ads1015_id,
1150 };
1151
1152 module_i2c_driver(ads1015_driver);
1153
1154 MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
1155 MODULE_DESCRIPTION("Texas Instruments ADS1015 ADC driver");
1156 MODULE_LICENSE("GPL v2");