2 * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver
4 * Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com>
6 * This file is subject to the terms and conditions of version 2 of
7 * the GNU General Public License. See the file COPYING in the main
8 * directory of this archive for more details.
10 * Datasheet: http://www.ti.com/lit/ds/symlink/adc12138.pdf
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
15 #include <linux/completion.h>
16 #include <linux/clk.h>
17 #include <linux/spi/spi.h>
18 #include <linux/iio/iio.h>
19 #include <linux/iio/buffer.h>
20 #include <linux/iio/trigger.h>
21 #include <linux/iio/triggered_buffer.h>
22 #include <linux/iio/trigger_consumer.h>
23 #include <linux/regulator/consumer.h>
25 #define ADC12138_MODE_AUTO_CAL 0x08
26 #define ADC12138_MODE_READ_STATUS 0x0c
27 #define ADC12138_MODE_ACQUISITION_TIME_6 0x0e
28 #define ADC12138_MODE_ACQUISITION_TIME_10 0x4e
29 #define ADC12138_MODE_ACQUISITION_TIME_18 0x8e
30 #define ADC12138_MODE_ACQUISITION_TIME_34 0xce
32 #define ADC12138_STATUS_CAL BIT(6)
41 struct spi_device *spi;
43 /* conversion clock */
45 /* positive analog voltage reference */
46 struct regulator *vref_p;
47 /* negative analog voltage reference */
48 struct regulator *vref_n;
50 struct completion complete;
51 /* The number of cclk periods for the S/H's acquisition time */
52 unsigned int acquisition_time;
54 * Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp.
55 * Less may be need if not all channels are enabled, as long as
56 * the 8 byte alignment of the timestamp is maintained.
58 __be16 data[20] __aligned(8);
60 u8 tx_buf[2] ____cacheline_aligned;
64 #define ADC12138_VOLTAGE_CHANNEL(chan) \
66 .type = IIO_VOLTAGE, \
69 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
70 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
71 | BIT(IIO_CHAN_INFO_OFFSET), \
78 .endianness = IIO_BE, \
82 #define ADC12138_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si) \
84 .type = IIO_VOLTAGE, \
87 .channel2 = (chan2), \
89 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
90 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
91 | BIT(IIO_CHAN_INFO_OFFSET), \
98 .endianness = IIO_BE, \
102 static const struct iio_chan_spec adc12132_channels[] = {
103 ADC12138_VOLTAGE_CHANNEL(0),
104 ADC12138_VOLTAGE_CHANNEL(1),
105 ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 2),
106 ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 3),
107 IIO_CHAN_SOFT_TIMESTAMP(4),
110 static const struct iio_chan_spec adc12138_channels[] = {
111 ADC12138_VOLTAGE_CHANNEL(0),
112 ADC12138_VOLTAGE_CHANNEL(1),
113 ADC12138_VOLTAGE_CHANNEL(2),
114 ADC12138_VOLTAGE_CHANNEL(3),
115 ADC12138_VOLTAGE_CHANNEL(4),
116 ADC12138_VOLTAGE_CHANNEL(5),
117 ADC12138_VOLTAGE_CHANNEL(6),
118 ADC12138_VOLTAGE_CHANNEL(7),
119 ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
120 ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 9),
121 ADC12138_VOLTAGE_CHANNEL_DIFF(2, 3, 10),
122 ADC12138_VOLTAGE_CHANNEL_DIFF(3, 2, 11),
123 ADC12138_VOLTAGE_CHANNEL_DIFF(4, 5, 12),
124 ADC12138_VOLTAGE_CHANNEL_DIFF(5, 4, 13),
125 ADC12138_VOLTAGE_CHANNEL_DIFF(6, 7, 14),
126 ADC12138_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
127 IIO_CHAN_SOFT_TIMESTAMP(16),
130 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode,
131 void *rx_buf, int len)
133 struct spi_transfer xfer = {
134 .tx_buf = adc->tx_buf,
135 .rx_buf = adc->rx_buf,
140 /* Skip unused bits for ADC12130 and ADC12132 */
141 if (adc->id != adc12138)
142 mode = (mode & 0xc0) | ((mode & 0x0f) << 2);
144 adc->tx_buf[0] = mode;
146 ret = spi_sync_transfer(adc->spi, &xfer, 1);
150 memcpy(rx_buf, adc->rx_buf, len);
155 static int adc12138_read_status(struct adc12138 *adc)
160 ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
165 return (rx_buf[0] << 1) | (rx_buf[1] >> 7);
168 static int __adc12138_start_conv(struct adc12138 *adc,
169 struct iio_chan_spec const *channel,
173 const u8 ch_to_mux[] = { 0, 4, 1, 5, 2, 6, 3, 7 };
174 u8 mode = (ch_to_mux[channel->channel] << 4) |
175 (channel->differential ? 0 : 0x80);
177 return adc12138_mode_programming(adc, mode, data, len);
180 static int adc12138_start_conv(struct adc12138 *adc,
181 struct iio_chan_spec const *channel)
185 return __adc12138_start_conv(adc, channel, &trash, 1);
188 static int adc12138_start_and_read_conv(struct adc12138 *adc,
189 struct iio_chan_spec const *channel,
192 return __adc12138_start_conv(adc, channel, data, 2);
195 static int adc12138_read_conv_data(struct adc12138 *adc, __be16 *value)
197 /* Issue a read status instruction and read previous conversion data */
198 return adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
199 value, sizeof(*value));
202 static int adc12138_wait_eoc(struct adc12138 *adc, unsigned long timeout)
204 if (!wait_for_completion_timeout(&adc->complete, timeout))
210 static int adc12138_adc_conversion(struct adc12138 *adc,
211 struct iio_chan_spec const *channel,
216 reinit_completion(&adc->complete);
218 ret = adc12138_start_conv(adc, channel);
222 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
226 return adc12138_read_conv_data(adc, value);
229 static int adc12138_read_raw(struct iio_dev *iio,
230 struct iio_chan_spec const *channel, int *value,
231 int *shift, long mask)
233 struct adc12138 *adc = iio_priv(iio);
238 case IIO_CHAN_INFO_RAW:
239 mutex_lock(&adc->lock);
240 ret = adc12138_adc_conversion(adc, channel, &data);
241 mutex_unlock(&adc->lock);
245 *value = sign_extend32(be16_to_cpu(data) >> 3, 12);
248 case IIO_CHAN_INFO_SCALE:
249 ret = regulator_get_voltage(adc->vref_p);
254 if (!IS_ERR(adc->vref_n)) {
255 ret = regulator_get_voltage(adc->vref_n);
261 /* convert regulator output voltage to mV */
263 *shift = channel->scan_type.realbits - 1;
265 return IIO_VAL_FRACTIONAL_LOG2;
266 case IIO_CHAN_INFO_OFFSET:
267 if (!IS_ERR(adc->vref_n)) {
268 *value = regulator_get_voltage(adc->vref_n);
275 /* convert regulator output voltage to mV */
284 static const struct iio_info adc12138_info = {
285 .read_raw = adc12138_read_raw,
286 .driver_module = THIS_MODULE,
289 static int adc12138_init(struct adc12138 *adc)
296 reinit_completion(&adc->complete);
298 ret = adc12138_mode_programming(adc, ADC12138_MODE_AUTO_CAL, &trash, 1);
302 /* data output at this time has no significance */
303 status = adc12138_read_status(adc);
307 adc12138_wait_eoc(adc, msecs_to_jiffies(100));
309 status = adc12138_read_status(adc);
310 if (status & ADC12138_STATUS_CAL) {
311 dev_warn(&adc->spi->dev,
312 "Auto Cal sequence is still in progress: %#x\n",
317 switch (adc->acquisition_time) {
319 mode = ADC12138_MODE_ACQUISITION_TIME_6;
322 mode = ADC12138_MODE_ACQUISITION_TIME_10;
325 mode = ADC12138_MODE_ACQUISITION_TIME_18;
328 mode = ADC12138_MODE_ACQUISITION_TIME_34;
334 return adc12138_mode_programming(adc, mode, &trash, 1);
337 static irqreturn_t adc12138_trigger_handler(int irq, void *p)
339 struct iio_poll_func *pf = p;
340 struct iio_dev *indio_dev = pf->indio_dev;
341 struct adc12138 *adc = iio_priv(indio_dev);
347 mutex_lock(&adc->lock);
349 for_each_set_bit(scan_index, indio_dev->active_scan_mask,
350 indio_dev->masklength) {
351 const struct iio_chan_spec *scan_chan =
352 &indio_dev->channels[scan_index];
354 reinit_completion(&adc->complete);
356 ret = adc12138_start_and_read_conv(adc, scan_chan,
357 i ? &adc->data[i - 1] : &trash);
359 dev_warn(&adc->spi->dev,
360 "failed to start conversion\n");
364 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
366 dev_warn(&adc->spi->dev, "wait eoc timeout\n");
374 ret = adc12138_read_conv_data(adc, &adc->data[i - 1]);
376 dev_warn(&adc->spi->dev,
377 "failed to get conversion data\n");
382 iio_push_to_buffers_with_timestamp(indio_dev, adc->data,
383 iio_get_time_ns(indio_dev));
385 mutex_unlock(&adc->lock);
387 iio_trigger_notify_done(indio_dev->trig);
392 static irqreturn_t adc12138_eoc_handler(int irq, void *p)
394 struct iio_dev *indio_dev = p;
395 struct adc12138 *adc = iio_priv(indio_dev);
397 complete(&adc->complete);
402 static int adc12138_probe(struct spi_device *spi)
404 struct iio_dev *indio_dev;
405 struct adc12138 *adc;
408 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
412 adc = iio_priv(indio_dev);
414 adc->id = spi_get_device_id(spi)->driver_data;
415 mutex_init(&adc->lock);
416 init_completion(&adc->complete);
418 indio_dev->name = spi_get_device_id(spi)->name;
419 indio_dev->dev.parent = &spi->dev;
420 indio_dev->info = &adc12138_info;
421 indio_dev->modes = INDIO_DIRECT_MODE;
426 indio_dev->channels = adc12132_channels;
427 indio_dev->num_channels = ARRAY_SIZE(adc12132_channels);
430 indio_dev->channels = adc12138_channels;
431 indio_dev->num_channels = ARRAY_SIZE(adc12138_channels);
437 ret = of_property_read_u32(spi->dev.of_node, "ti,acquisition-time",
438 &adc->acquisition_time);
440 adc->acquisition_time = 10;
442 adc->cclk = devm_clk_get(&spi->dev, NULL);
443 if (IS_ERR(adc->cclk))
444 return PTR_ERR(adc->cclk);
446 adc->vref_p = devm_regulator_get(&spi->dev, "vref-p");
447 if (IS_ERR(adc->vref_p))
448 return PTR_ERR(adc->vref_p);
450 adc->vref_n = devm_regulator_get_optional(&spi->dev, "vref-n");
451 if (IS_ERR(adc->vref_n)) {
453 * Assume vref_n is 0V if an optional regulator is not
454 * specified, otherwise return the error code.
456 ret = PTR_ERR(adc->vref_n);
461 ret = devm_request_irq(&spi->dev, spi->irq, adc12138_eoc_handler,
462 IRQF_TRIGGER_RISING, indio_dev->name, indio_dev);
466 ret = clk_prepare_enable(adc->cclk);
470 ret = regulator_enable(adc->vref_p);
472 goto err_clk_disable;
474 if (!IS_ERR(adc->vref_n)) {
475 ret = regulator_enable(adc->vref_n);
477 goto err_vref_p_disable;
480 ret = adc12138_init(adc);
482 goto err_vref_n_disable;
484 spi_set_drvdata(spi, indio_dev);
486 ret = iio_triggered_buffer_setup(indio_dev, NULL,
487 adc12138_trigger_handler, NULL);
489 goto err_vref_n_disable;
491 ret = iio_device_register(indio_dev);
493 goto err_buffer_cleanup;
497 iio_triggered_buffer_cleanup(indio_dev);
499 if (!IS_ERR(adc->vref_n))
500 regulator_disable(adc->vref_n);
502 regulator_disable(adc->vref_p);
504 clk_disable_unprepare(adc->cclk);
509 static int adc12138_remove(struct spi_device *spi)
511 struct iio_dev *indio_dev = spi_get_drvdata(spi);
512 struct adc12138 *adc = iio_priv(indio_dev);
514 iio_device_unregister(indio_dev);
515 iio_triggered_buffer_cleanup(indio_dev);
516 if (!IS_ERR(adc->vref_n))
517 regulator_disable(adc->vref_n);
518 regulator_disable(adc->vref_p);
519 clk_disable_unprepare(adc->cclk);
526 static const struct of_device_id adc12138_dt_ids[] = {
527 { .compatible = "ti,adc12130", },
528 { .compatible = "ti,adc12132", },
529 { .compatible = "ti,adc12138", },
532 MODULE_DEVICE_TABLE(of, adc12138_dt_ids);
536 static const struct spi_device_id adc12138_id[] = {
537 { "adc12130", adc12130 },
538 { "adc12132", adc12132 },
539 { "adc12138", adc12138 },
542 MODULE_DEVICE_TABLE(spi, adc12138_id);
544 static struct spi_driver adc12138_driver = {
547 .of_match_table = of_match_ptr(adc12138_dt_ids),
549 .probe = adc12138_probe,
550 .remove = adc12138_remove,
551 .id_table = adc12138_id,
553 module_spi_driver(adc12138_driver);
555 MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
556 MODULE_DESCRIPTION("ADC12130/ADC12132/ADC12138 driver");
557 MODULE_LICENSE("GPL v2");