2 * IIO driver for the Apex Embedded Systems STX104
3 * Copyright (C) 2016 William Breathitt Gray
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 #include <linux/bitops.h>
15 #include <linux/device.h>
16 #include <linux/errno.h>
17 #include <linux/gpio/driver.h>
18 #include <linux/iio/iio.h>
19 #include <linux/iio/types.h>
21 #include <linux/ioport.h>
22 #include <linux/isa.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
26 #include <linux/mutex.h>
27 #include <linux/spinlock.h>
28 #include <linux/types.h>
30 #define STX104_OUT_CHAN(chan) { \
31 .type = IIO_VOLTAGE, \
33 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
37 #define STX104_IN_CHAN(chan, diff) { \
38 .type = IIO_VOLTAGE, \
41 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_HARDWAREGAIN) | \
42 BIT(IIO_CHAN_INFO_OFFSET) | BIT(IIO_CHAN_INFO_SCALE), \
43 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
45 .differential = diff \
48 #define STX104_NUM_OUT_CHAN 2
50 #define STX104_EXTENT 16
52 static unsigned int base[max_num_isa_dev(STX104_EXTENT)];
53 static unsigned int num_stx104;
54 module_param_hw_array(base, uint, ioport, &num_stx104, 0);
55 MODULE_PARM_DESC(base, "Apex Embedded Systems STX104 base addresses");
58 * struct stx104_reg - device register structure
59 * @ssr_ad: Software Strobe Register and ADC Data
63 * @cir_asr: Clear Interrupts and ADC Status
65 * @pccr_fsh: Pacer Clock Control and FIFO Status MSB
66 * @acfg: ADC Configuration
80 * struct stx104_iio - IIO device private data structure
81 * @lock: synchronization lock to prevent I/O race conditions
82 * @chan_out_states: channels' output states
83 * @reg: I/O address offset for the device registers
87 unsigned int chan_out_states[STX104_NUM_OUT_CHAN];
88 struct stx104_reg __iomem *reg;
92 * struct stx104_gpio - GPIO device private data structure
93 * @chip: instance of the gpio_chip
94 * @lock: synchronization lock to prevent I/O race conditions
95 * @base: base port address of the GPIO device
96 * @out_state: output bits state
99 struct gpio_chip chip;
102 unsigned int out_state;
105 static int stx104_read_raw(struct iio_dev *indio_dev,
106 struct iio_chan_spec const *chan, int *val, int *val2, long mask)
108 struct stx104_iio *const priv = iio_priv(indio_dev);
109 struct stx104_reg __iomem *const reg = priv->reg;
110 unsigned int adc_config;
115 case IIO_CHAN_INFO_HARDWAREGAIN:
116 /* get gain configuration */
117 adc_config = ioread8(®->acfg);
118 gain = adc_config & 0x3;
122 case IIO_CHAN_INFO_RAW:
124 *val = priv->chan_out_states[chan->channel];
128 mutex_lock(&priv->lock);
130 /* select ADC channel */
131 iowrite8(chan->channel | (chan->channel << 4), ®->achan);
133 /* trigger ADC sample capture by writing to the 8-bit
134 * Software Strobe Register and wait for completion
136 iowrite8(0, ®->ssr_ad);
137 while (ioread8(®->cir_asr) & BIT(7));
139 *val = ioread16(®->ssr_ad);
141 mutex_unlock(&priv->lock);
143 case IIO_CHAN_INFO_OFFSET:
144 /* get ADC bipolar/unipolar configuration */
145 adc_config = ioread8(®->acfg);
146 adbu = !(adc_config & BIT(2));
148 *val = -32768 * adbu;
150 case IIO_CHAN_INFO_SCALE:
151 /* get ADC bipolar/unipolar and gain configuration */
152 adc_config = ioread8(®->acfg);
153 adbu = !(adc_config & BIT(2));
154 gain = adc_config & 0x3;
157 *val2 = 15 - adbu + gain;
158 return IIO_VAL_FRACTIONAL_LOG2;
164 static int stx104_write_raw(struct iio_dev *indio_dev,
165 struct iio_chan_spec const *chan, int val, int val2, long mask)
167 struct stx104_iio *const priv = iio_priv(indio_dev);
170 case IIO_CHAN_INFO_HARDWAREGAIN:
171 /* Only four gain states (x1, x2, x4, x8) */
174 iowrite8(0, &priv->reg->acfg);
177 iowrite8(1, &priv->reg->acfg);
180 iowrite8(2, &priv->reg->acfg);
183 iowrite8(3, &priv->reg->acfg);
190 case IIO_CHAN_INFO_RAW:
192 /* DAC can only accept up to a 16-bit value */
193 if ((unsigned int)val > 65535)
196 mutex_lock(&priv->lock);
198 priv->chan_out_states[chan->channel] = val;
199 iowrite16(val, &priv->reg->dac[chan->channel]);
201 mutex_unlock(&priv->lock);
210 static const struct iio_info stx104_info = {
211 .read_raw = stx104_read_raw,
212 .write_raw = stx104_write_raw
215 /* single-ended input channels configuration */
216 static const struct iio_chan_spec stx104_channels_sing[] = {
217 STX104_OUT_CHAN(0), STX104_OUT_CHAN(1),
218 STX104_IN_CHAN(0, 0), STX104_IN_CHAN(1, 0), STX104_IN_CHAN(2, 0),
219 STX104_IN_CHAN(3, 0), STX104_IN_CHAN(4, 0), STX104_IN_CHAN(5, 0),
220 STX104_IN_CHAN(6, 0), STX104_IN_CHAN(7, 0), STX104_IN_CHAN(8, 0),
221 STX104_IN_CHAN(9, 0), STX104_IN_CHAN(10, 0), STX104_IN_CHAN(11, 0),
222 STX104_IN_CHAN(12, 0), STX104_IN_CHAN(13, 0), STX104_IN_CHAN(14, 0),
223 STX104_IN_CHAN(15, 0)
225 /* differential input channels configuration */
226 static const struct iio_chan_spec stx104_channels_diff[] = {
227 STX104_OUT_CHAN(0), STX104_OUT_CHAN(1),
228 STX104_IN_CHAN(0, 1), STX104_IN_CHAN(1, 1), STX104_IN_CHAN(2, 1),
229 STX104_IN_CHAN(3, 1), STX104_IN_CHAN(4, 1), STX104_IN_CHAN(5, 1),
230 STX104_IN_CHAN(6, 1), STX104_IN_CHAN(7, 1)
233 static int stx104_gpio_get_direction(struct gpio_chip *chip,
236 /* GPIO 0-3 are input only, while the rest are output only */
243 static int stx104_gpio_direction_input(struct gpio_chip *chip,
252 static int stx104_gpio_direction_output(struct gpio_chip *chip,
253 unsigned int offset, int value)
258 chip->set(chip, offset, value);
262 static int stx104_gpio_get(struct gpio_chip *chip, unsigned int offset)
264 struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip);
269 return !!(ioread8(stx104gpio->base) & BIT(offset));
272 static int stx104_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
275 struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip);
277 *bits = ioread8(stx104gpio->base);
282 static void stx104_gpio_set(struct gpio_chip *chip, unsigned int offset,
285 struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip);
286 const unsigned int mask = BIT(offset) >> 4;
292 spin_lock_irqsave(&stx104gpio->lock, flags);
295 stx104gpio->out_state |= mask;
297 stx104gpio->out_state &= ~mask;
299 iowrite8(stx104gpio->out_state, stx104gpio->base);
301 spin_unlock_irqrestore(&stx104gpio->lock, flags);
304 #define STX104_NGPIO 8
305 static const char *stx104_names[STX104_NGPIO] = {
306 "DIN0", "DIN1", "DIN2", "DIN3", "DOUT0", "DOUT1", "DOUT2", "DOUT3"
309 static void stx104_gpio_set_multiple(struct gpio_chip *chip,
310 unsigned long *mask, unsigned long *bits)
312 struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip);
315 /* verify masked GPIO are output */
322 spin_lock_irqsave(&stx104gpio->lock, flags);
324 stx104gpio->out_state &= ~*mask;
325 stx104gpio->out_state |= *mask & *bits;
326 iowrite8(stx104gpio->out_state, stx104gpio->base);
328 spin_unlock_irqrestore(&stx104gpio->lock, flags);
331 static int stx104_probe(struct device *dev, unsigned int id)
333 struct iio_dev *indio_dev;
334 struct stx104_iio *priv;
335 struct stx104_gpio *stx104gpio;
338 indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
342 stx104gpio = devm_kzalloc(dev, sizeof(*stx104gpio), GFP_KERNEL);
346 if (!devm_request_region(dev, base[id], STX104_EXTENT,
348 dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
349 base[id], base[id] + STX104_EXTENT);
353 priv = iio_priv(indio_dev);
354 priv->reg = devm_ioport_map(dev, base[id], STX104_EXTENT);
358 indio_dev->info = &stx104_info;
359 indio_dev->modes = INDIO_DIRECT_MODE;
361 /* determine if differential inputs */
362 if (ioread8(&priv->reg->cir_asr) & BIT(5)) {
363 indio_dev->num_channels = ARRAY_SIZE(stx104_channels_diff);
364 indio_dev->channels = stx104_channels_diff;
366 indio_dev->num_channels = ARRAY_SIZE(stx104_channels_sing);
367 indio_dev->channels = stx104_channels_sing;
370 indio_dev->name = dev_name(dev);
371 indio_dev->dev.parent = dev;
373 mutex_init(&priv->lock);
375 /* configure device for software trigger operation */
376 iowrite8(0, &priv->reg->acr);
378 /* initialize gain setting to x1 */
379 iowrite8(0, &priv->reg->acfg);
381 /* initialize DAC output to 0V */
382 iowrite16(0, &priv->reg->dac[0]);
383 iowrite16(0, &priv->reg->dac[1]);
385 stx104gpio->chip.label = dev_name(dev);
386 stx104gpio->chip.parent = dev;
387 stx104gpio->chip.owner = THIS_MODULE;
388 stx104gpio->chip.base = -1;
389 stx104gpio->chip.ngpio = STX104_NGPIO;
390 stx104gpio->chip.names = stx104_names;
391 stx104gpio->chip.get_direction = stx104_gpio_get_direction;
392 stx104gpio->chip.direction_input = stx104_gpio_direction_input;
393 stx104gpio->chip.direction_output = stx104_gpio_direction_output;
394 stx104gpio->chip.get = stx104_gpio_get;
395 stx104gpio->chip.get_multiple = stx104_gpio_get_multiple;
396 stx104gpio->chip.set = stx104_gpio_set;
397 stx104gpio->chip.set_multiple = stx104_gpio_set_multiple;
398 stx104gpio->base = &priv->reg->dio;
399 stx104gpio->out_state = 0x0;
401 spin_lock_init(&stx104gpio->lock);
403 err = devm_gpiochip_add_data(dev, &stx104gpio->chip, stx104gpio);
405 dev_err(dev, "GPIO registering failed (%d)\n", err);
409 return devm_iio_device_register(dev, indio_dev);
412 static struct isa_driver stx104_driver = {
413 .probe = stx104_probe,
419 module_isa_driver(stx104_driver, num_stx104);
421 MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
422 MODULE_DESCRIPTION("Apex Embedded Systems STX104 IIO driver");
423 MODULE_LICENSE("GPL v2");