2 * mcp3422.c - driver for the Microchip mcp3422/3/4/6/7/8 chip family
4 * Copyright (C) 2013, Angelo Compagnucci
5 * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
7 * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
8 * http://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
10 * This driver exports the value of analog input voltage to sysfs, the
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
19 #include <linux/err.h>
20 #include <linux/i2c.h>
21 #include <linux/module.h>
22 #include <linux/delay.h>
23 #include <linux/sysfs.h>
26 #include <linux/iio/iio.h>
27 #include <linux/iio/sysfs.h>
30 #define MCP3422_CHANNEL_MASK 0x60
31 #define MCP3422_PGA_MASK 0x03
32 #define MCP3422_SRATE_MASK 0x0C
33 #define MCP3422_SRATE_240 0x0
34 #define MCP3422_SRATE_60 0x1
35 #define MCP3422_SRATE_15 0x2
36 #define MCP3422_SRATE_3 0x3
37 #define MCP3422_PGA_1 0
38 #define MCP3422_PGA_2 1
39 #define MCP3422_PGA_4 2
40 #define MCP3422_PGA_8 3
41 #define MCP3422_CONT_SAMPLING 0x10
43 #define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
44 #define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK)
45 #define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2)
47 #define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
48 #define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
49 #define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
51 #define MCP3422_CHAN(_index) \
53 .type = IIO_VOLTAGE, \
56 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
57 | BIT(IIO_CHAN_INFO_SCALE), \
58 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
61 static const int mcp3422_scales[4][4] = {
62 { 1000000, 500000, 250000, 125000 },
63 { 250000 , 125000, 62500 , 31250 },
64 { 62500 , 31250 , 15625 , 7812 },
65 { 15625 , 7812 , 3906 , 1953 } };
67 /* Constant msleep times for data acquisitions */
68 static const int mcp3422_read_times[4] = {
69 [MCP3422_SRATE_240] = 1000 / 240,
70 [MCP3422_SRATE_60] = 1000 / 60,
71 [MCP3422_SRATE_15] = 1000 / 15,
72 [MCP3422_SRATE_3] = 1000 / 3 };
74 /* sample rates to integer conversion table */
75 static const int mcp3422_sample_rates[4] = {
76 [MCP3422_SRATE_240] = 240,
77 [MCP3422_SRATE_60] = 60,
78 [MCP3422_SRATE_15] = 15,
79 [MCP3422_SRATE_3] = 3 };
81 /* sample rates to sign extension table */
82 static const int mcp3422_sign_extend[4] = {
83 [MCP3422_SRATE_240] = 11,
84 [MCP3422_SRATE_60] = 13,
85 [MCP3422_SRATE_15] = 15,
86 [MCP3422_SRATE_3] = 17 };
88 /* Client data (each client gets its own) */
90 struct i2c_client *i2c;
97 static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
101 ret = i2c_master_send(adc->i2c, &newconfig, 1);
103 adc->config = newconfig;
110 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
113 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
114 u8 buf[4] = {0, 0, 0, 0};
117 if (sample_rate == MCP3422_SRATE_3) {
118 ret = i2c_master_recv(adc->i2c, buf, 4);
119 temp = buf[0] << 16 | buf[1] << 8 | buf[2];
122 ret = i2c_master_recv(adc->i2c, buf, 3);
123 temp = buf[0] << 8 | buf[1];
127 *value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
132 static int mcp3422_read_channel(struct mcp3422 *adc,
133 struct iio_chan_spec const *channel, int *value)
137 u8 req_channel = channel->channel;
139 mutex_lock(&adc->lock);
141 if (req_channel != MCP3422_CHANNEL(adc->config)) {
142 config = adc->config;
143 config &= ~MCP3422_CHANNEL_MASK;
144 config |= MCP3422_CHANNEL_VALUE(req_channel);
145 config &= ~MCP3422_PGA_MASK;
146 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
147 ret = mcp3422_update_config(adc, config);
149 mutex_unlock(&adc->lock);
152 msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
155 ret = mcp3422_read(adc, value, &config);
157 mutex_unlock(&adc->lock);
162 static int mcp3422_read_raw(struct iio_dev *iio,
163 struct iio_chan_spec const *channel, int *val1,
164 int *val2, long mask)
166 struct mcp3422 *adc = iio_priv(iio);
169 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
170 u8 pga = MCP3422_PGA(adc->config);
173 case IIO_CHAN_INFO_RAW:
174 err = mcp3422_read_channel(adc, channel, val1);
179 case IIO_CHAN_INFO_SCALE:
182 *val2 = mcp3422_scales[sample_rate][pga];
183 return IIO_VAL_INT_PLUS_NANO;
185 case IIO_CHAN_INFO_SAMP_FREQ:
186 *val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
196 static int mcp3422_write_raw(struct iio_dev *iio,
197 struct iio_chan_spec const *channel, int val1,
200 struct mcp3422 *adc = iio_priv(iio);
202 u8 config = adc->config;
203 u8 req_channel = channel->channel;
204 u8 sample_rate = MCP3422_SAMPLE_RATE(config);
208 case IIO_CHAN_INFO_SCALE:
212 for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
213 if (val2 == mcp3422_scales[sample_rate][i]) {
214 adc->pga[req_channel] = i;
216 config &= ~MCP3422_CHANNEL_MASK;
217 config |= MCP3422_CHANNEL_VALUE(req_channel);
218 config &= ~MCP3422_PGA_MASK;
219 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
221 return mcp3422_update_config(adc, config);
226 case IIO_CHAN_INFO_SAMP_FREQ:
229 temp = MCP3422_SRATE_240;
232 temp = MCP3422_SRATE_60;
235 temp = MCP3422_SRATE_15;
240 temp = MCP3422_SRATE_3;
246 config &= ~MCP3422_CHANNEL_MASK;
247 config |= MCP3422_CHANNEL_VALUE(req_channel);
248 config &= ~MCP3422_SRATE_MASK;
249 config |= MCP3422_SAMPLE_RATE_VALUE(temp);
251 return mcp3422_update_config(adc, config);
260 static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
261 struct iio_chan_spec const *chan, long mask)
264 case IIO_CHAN_INFO_SCALE:
265 return IIO_VAL_INT_PLUS_NANO;
266 case IIO_CHAN_INFO_SAMP_FREQ:
267 return IIO_VAL_INT_PLUS_MICRO;
273 static ssize_t mcp3422_show_samp_freqs(struct device *dev,
274 struct device_attribute *attr, char *buf)
276 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
279 return sprintf(buf, "240 60 15\n");
281 return sprintf(buf, "240 60 15 3\n");
284 static ssize_t mcp3422_show_scales(struct device *dev,
285 struct device_attribute *attr, char *buf)
287 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
288 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
290 return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
291 mcp3422_scales[sample_rate][0],
292 mcp3422_scales[sample_rate][1],
293 mcp3422_scales[sample_rate][2],
294 mcp3422_scales[sample_rate][3]);
297 static IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO,
298 mcp3422_show_samp_freqs, NULL, 0);
299 static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
300 mcp3422_show_scales, NULL, 0);
302 static struct attribute *mcp3422_attributes[] = {
303 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
304 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
308 static const struct attribute_group mcp3422_attribute_group = {
309 .attrs = mcp3422_attributes,
312 static const struct iio_chan_spec mcp3422_channels[] = {
317 static const struct iio_chan_spec mcp3424_channels[] = {
324 static const struct iio_info mcp3422_info = {
325 .read_raw = mcp3422_read_raw,
326 .write_raw = mcp3422_write_raw,
327 .write_raw_get_fmt = mcp3422_write_raw_get_fmt,
328 .attrs = &mcp3422_attribute_group,
329 .driver_module = THIS_MODULE,
332 static int mcp3422_probe(struct i2c_client *client,
333 const struct i2c_device_id *id)
335 struct iio_dev *indio_dev;
340 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
343 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
347 adc = iio_priv(indio_dev);
349 adc->id = (u8)(id->driver_data);
351 mutex_init(&adc->lock);
353 indio_dev->dev.parent = &client->dev;
354 indio_dev->name = dev_name(&client->dev);
355 indio_dev->modes = INDIO_DIRECT_MODE;
356 indio_dev->info = &mcp3422_info;
363 indio_dev->channels = mcp3422_channels;
364 indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
368 indio_dev->channels = mcp3424_channels;
369 indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
373 /* meaningful default configuration */
374 config = (MCP3422_CONT_SAMPLING
375 | MCP3422_CHANNEL_VALUE(1)
376 | MCP3422_PGA_VALUE(MCP3422_PGA_1)
377 | MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
378 mcp3422_update_config(adc, config);
380 err = devm_iio_device_register(&client->dev, indio_dev);
384 i2c_set_clientdata(client, indio_dev);
389 static const struct i2c_device_id mcp3422_id[] = {
398 MODULE_DEVICE_TABLE(i2c, mcp3422_id);
401 static const struct of_device_id mcp3422_of_match[] = {
402 { .compatible = "mcp3422" },
405 MODULE_DEVICE_TABLE(of, mcp3422_of_match);
408 static struct i2c_driver mcp3422_driver = {
411 .of_match_table = of_match_ptr(mcp3422_of_match),
413 .probe = mcp3422_probe,
414 .id_table = mcp3422_id,
416 module_i2c_driver(mcp3422_driver);
418 MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
419 MODULE_DESCRIPTION("Microchip mcp3422/3/4/6/7/8 driver");
420 MODULE_LICENSE("GPL v2");