1 // SPDX-License-Identifier: GPL-2.0-only
2 /* ADC driver for AXP20X and AXP22X PMICs
4 * Copyright (c) 2016 Free Electrons NextThing Co.
5 * Quentin Schulz <quentin.schulz@free-electrons.com>
8 #include <linux/bitfield.h>
9 #include <linux/completion.h>
10 #include <linux/interrupt.h>
12 #include <linux/module.h>
13 #include <linux/mod_devicetable.h>
14 #include <linux/platform_device.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/property.h>
17 #include <linux/regmap.h>
18 #include <linux/thermal.h>
20 #include <linux/iio/iio.h>
21 #include <linux/iio/driver.h>
22 #include <linux/iio/machine.h>
23 #include <linux/mfd/axp20x.h>
25 #define AXP20X_ADC_EN1_MASK GENMASK(7, 0)
26 #define AXP20X_ADC_EN2_MASK (GENMASK(3, 2) | BIT(7))
28 #define AXP22X_ADC_EN1_MASK (GENMASK(7, 5) | BIT(0))
30 #define AXP20X_GPIO10_IN_RANGE_GPIO0 BIT(0)
31 #define AXP20X_GPIO10_IN_RANGE_GPIO1 BIT(1)
33 #define AXP20X_ADC_RATE_MASK GENMASK(7, 6)
34 #define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK)
36 #define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK)
38 #define AXP813_V_I_ADC_RATE_MASK GENMASK(5, 4)
39 #define AXP813_ADC_RATE_MASK (AXP20X_ADC_RATE_MASK | AXP813_V_I_ADC_RATE_MASK)
40 #define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x)
41 #define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK)
42 #define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x))
44 #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \
48 .channel = _channel, \
50 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
51 BIT(IIO_CHAN_INFO_SCALE), \
52 .datasheet_name = _name, \
55 #define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \
59 .channel = _channel, \
61 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
62 BIT(IIO_CHAN_INFO_SCALE) |\
63 BIT(IIO_CHAN_INFO_OFFSET),\
64 .datasheet_name = _name, \
69 struct axp20x_adc_iio {
70 struct regmap *regmap;
71 const struct axp_data *data;
74 enum axp20x_adc_channel_v {
84 enum axp20x_adc_channel_i {
88 AXP20X_BATT_DISCHRG_I,
91 enum axp22x_adc_channel_v {
96 enum axp22x_adc_channel_i {
97 AXP22X_BATT_CHRG_I = 1,
98 AXP22X_BATT_DISCHRG_I,
101 enum axp813_adc_channel_v {
107 static struct iio_map axp20x_maps[] = {
109 .consumer_dev_name = "axp20x-usb-power-supply",
110 .consumer_channel = "vbus_v",
111 .adc_channel_label = "vbus_v",
113 .consumer_dev_name = "axp20x-usb-power-supply",
114 .consumer_channel = "vbus_i",
115 .adc_channel_label = "vbus_i",
117 .consumer_dev_name = "axp20x-ac-power-supply",
118 .consumer_channel = "acin_v",
119 .adc_channel_label = "acin_v",
121 .consumer_dev_name = "axp20x-ac-power-supply",
122 .consumer_channel = "acin_i",
123 .adc_channel_label = "acin_i",
125 .consumer_dev_name = "axp20x-battery-power-supply",
126 .consumer_channel = "batt_v",
127 .adc_channel_label = "batt_v",
129 .consumer_dev_name = "axp20x-battery-power-supply",
130 .consumer_channel = "batt_chrg_i",
131 .adc_channel_label = "batt_chrg_i",
133 .consumer_dev_name = "axp20x-battery-power-supply",
134 .consumer_channel = "batt_dischrg_i",
135 .adc_channel_label = "batt_dischrg_i",
136 }, { /* sentinel */ }
139 static struct iio_map axp22x_maps[] = {
141 .consumer_dev_name = "axp20x-battery-power-supply",
142 .consumer_channel = "batt_v",
143 .adc_channel_label = "batt_v",
145 .consumer_dev_name = "axp20x-battery-power-supply",
146 .consumer_channel = "batt_chrg_i",
147 .adc_channel_label = "batt_chrg_i",
149 .consumer_dev_name = "axp20x-battery-power-supply",
150 .consumer_channel = "batt_dischrg_i",
151 .adc_channel_label = "batt_dischrg_i",
152 }, { /* sentinel */ }
156 * Channels are mapped by physical system. Their channels share the same index.
157 * i.e. acin_i is in_current0_raw and acin_v is in_voltage0_raw.
158 * The only exception is for the battery. batt_v will be in_voltage6_raw and
159 * charge current in_current6_raw and discharge current will be in_current7_raw.
161 static const struct iio_chan_spec axp20x_adc_channels[] = {
162 AXP20X_ADC_CHANNEL(AXP20X_ACIN_V, "acin_v", IIO_VOLTAGE,
163 AXP20X_ACIN_V_ADC_H),
164 AXP20X_ADC_CHANNEL(AXP20X_ACIN_I, "acin_i", IIO_CURRENT,
165 AXP20X_ACIN_I_ADC_H),
166 AXP20X_ADC_CHANNEL(AXP20X_VBUS_V, "vbus_v", IIO_VOLTAGE,
167 AXP20X_VBUS_V_ADC_H),
168 AXP20X_ADC_CHANNEL(AXP20X_VBUS_I, "vbus_i", IIO_CURRENT,
169 AXP20X_VBUS_I_ADC_H),
172 .address = AXP20X_TEMP_ADC_H,
173 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
174 BIT(IIO_CHAN_INFO_SCALE) |
175 BIT(IIO_CHAN_INFO_OFFSET),
176 .datasheet_name = "pmic_temp",
178 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
179 AXP20X_GPIO0_V_ADC_H),
180 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO1_V, "gpio1_v", IIO_VOLTAGE,
181 AXP20X_GPIO1_V_ADC_H),
182 AXP20X_ADC_CHANNEL(AXP20X_IPSOUT_V, "ipsout_v", IIO_VOLTAGE,
183 AXP20X_IPSOUT_V_HIGH_H),
184 AXP20X_ADC_CHANNEL(AXP20X_BATT_V, "batt_v", IIO_VOLTAGE,
186 AXP20X_ADC_CHANNEL(AXP20X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
187 AXP20X_BATT_CHRG_I_H),
188 AXP20X_ADC_CHANNEL(AXP20X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
189 AXP20X_BATT_DISCHRG_I_H),
190 AXP20X_ADC_CHANNEL(AXP20X_TS_IN, "ts_v", IIO_VOLTAGE,
194 static const struct iio_chan_spec axp22x_adc_channels[] = {
197 .address = AXP22X_PMIC_TEMP_H,
198 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
199 BIT(IIO_CHAN_INFO_SCALE) |
200 BIT(IIO_CHAN_INFO_OFFSET),
201 .datasheet_name = "pmic_temp",
203 AXP20X_ADC_CHANNEL(AXP22X_BATT_V, "batt_v", IIO_VOLTAGE,
205 AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
206 AXP20X_BATT_CHRG_I_H),
207 AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
208 AXP20X_BATT_DISCHRG_I_H),
209 AXP20X_ADC_CHANNEL(AXP22X_TS_IN, "ts_v", IIO_VOLTAGE,
213 static const struct iio_chan_spec axp813_adc_channels[] = {
216 .address = AXP22X_PMIC_TEMP_H,
217 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
218 BIT(IIO_CHAN_INFO_SCALE) |
219 BIT(IIO_CHAN_INFO_OFFSET),
220 .datasheet_name = "pmic_temp",
222 AXP20X_ADC_CHANNEL(AXP813_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
224 AXP20X_ADC_CHANNEL(AXP813_BATT_V, "batt_v", IIO_VOLTAGE,
226 AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
227 AXP20X_BATT_CHRG_I_H),
228 AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
229 AXP20X_BATT_DISCHRG_I_H),
230 AXP20X_ADC_CHANNEL(AXP813_TS_IN, "ts_v", IIO_VOLTAGE,
234 static int axp20x_adc_raw(struct iio_dev *indio_dev,
235 struct iio_chan_spec const *chan, int *val)
237 struct axp20x_adc_iio *info = iio_priv(indio_dev);
241 * N.B.: Unlike the Chinese datasheets tell, the charging current is
242 * stored on 12 bits, not 13 bits. Only discharging current is on 13
245 if (chan->type == IIO_CURRENT && chan->channel == AXP20X_BATT_DISCHRG_I)
250 ret = axp20x_read_variable_width(info->regmap, chan->address, size);
258 static int axp22x_adc_raw(struct iio_dev *indio_dev,
259 struct iio_chan_spec const *chan, int *val)
261 struct axp20x_adc_iio *info = iio_priv(indio_dev);
264 ret = axp20x_read_variable_width(info->regmap, chan->address, 12);
272 static int axp813_adc_raw(struct iio_dev *indio_dev,
273 struct iio_chan_spec const *chan, int *val)
275 struct axp20x_adc_iio *info = iio_priv(indio_dev);
278 ret = axp20x_read_variable_width(info->regmap, chan->address, 12);
286 static int axp20x_adc_scale_voltage(int channel, int *val, int *val2)
293 return IIO_VAL_INT_PLUS_MICRO;
299 return IIO_VAL_INT_PLUS_MICRO;
304 return IIO_VAL_INT_PLUS_MICRO;
306 case AXP20X_IPSOUT_V:
309 return IIO_VAL_INT_PLUS_MICRO;
315 return IIO_VAL_INT_PLUS_MICRO;
322 static int axp22x_adc_scale_voltage(int channel, int *val, int *val2)
329 return IIO_VAL_INT_PLUS_MICRO;
335 return IIO_VAL_INT_PLUS_MICRO;
341 static int axp813_adc_scale_voltage(int channel, int *val, int *val2)
347 return IIO_VAL_INT_PLUS_MICRO;
352 return IIO_VAL_INT_PLUS_MICRO;
358 return IIO_VAL_INT_PLUS_MICRO;
365 static int axp20x_adc_scale_current(int channel, int *val, int *val2)
371 return IIO_VAL_INT_PLUS_MICRO;
376 return IIO_VAL_INT_PLUS_MICRO;
378 case AXP20X_BATT_DISCHRG_I:
379 case AXP20X_BATT_CHRG_I:
382 return IIO_VAL_INT_PLUS_MICRO;
389 static int axp20x_adc_scale(struct iio_chan_spec const *chan, int *val,
392 switch (chan->type) {
394 return axp20x_adc_scale_voltage(chan->channel, val, val2);
397 return axp20x_adc_scale_current(chan->channel, val, val2);
408 static int axp22x_adc_scale(struct iio_chan_spec const *chan, int *val,
411 switch (chan->type) {
413 return axp22x_adc_scale_voltage(chan->channel, val, val2);
428 static int axp813_adc_scale(struct iio_chan_spec const *chan, int *val,
431 switch (chan->type) {
433 return axp813_adc_scale_voltage(chan->channel, val, val2);
448 static int axp20x_adc_offset_voltage(struct iio_dev *indio_dev, int channel,
451 struct axp20x_adc_iio *info = iio_priv(indio_dev);
455 ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, ®val);
461 regval = FIELD_GET(AXP20X_GPIO10_IN_RANGE_GPIO0, regval);
465 regval = FIELD_GET(AXP20X_GPIO10_IN_RANGE_GPIO1, regval);
472 *val = regval ? 700000 : 0;
476 static int axp20x_adc_offset(struct iio_dev *indio_dev,
477 struct iio_chan_spec const *chan, int *val)
479 switch (chan->type) {
481 return axp20x_adc_offset_voltage(indio_dev, chan->channel, val);
492 static int axp20x_read_raw(struct iio_dev *indio_dev,
493 struct iio_chan_spec const *chan, int *val,
494 int *val2, long mask)
497 case IIO_CHAN_INFO_OFFSET:
498 return axp20x_adc_offset(indio_dev, chan, val);
500 case IIO_CHAN_INFO_SCALE:
501 return axp20x_adc_scale(chan, val, val2);
503 case IIO_CHAN_INFO_RAW:
504 return axp20x_adc_raw(indio_dev, chan, val);
511 static int axp22x_read_raw(struct iio_dev *indio_dev,
512 struct iio_chan_spec const *chan, int *val,
513 int *val2, long mask)
516 case IIO_CHAN_INFO_OFFSET:
517 /* For PMIC temp only */
521 case IIO_CHAN_INFO_SCALE:
522 return axp22x_adc_scale(chan, val, val2);
524 case IIO_CHAN_INFO_RAW:
525 return axp22x_adc_raw(indio_dev, chan, val);
532 static int axp813_read_raw(struct iio_dev *indio_dev,
533 struct iio_chan_spec const *chan, int *val,
534 int *val2, long mask)
537 case IIO_CHAN_INFO_OFFSET:
541 case IIO_CHAN_INFO_SCALE:
542 return axp813_adc_scale(chan, val, val2);
544 case IIO_CHAN_INFO_RAW:
545 return axp813_adc_raw(indio_dev, chan, val);
552 static int axp20x_write_raw(struct iio_dev *indio_dev,
553 struct iio_chan_spec const *chan, int val, int val2,
556 struct axp20x_adc_iio *info = iio_priv(indio_dev);
557 unsigned int regmask, regval;
560 * The AXP20X PMIC allows the user to choose between 0V and 0.7V offsets
561 * for (independently) GPIO0 and GPIO1 when in ADC mode.
563 if (mask != IIO_CHAN_INFO_OFFSET)
566 if (val != 0 && val != 700000)
569 switch (chan->channel) {
571 regmask = AXP20X_GPIO10_IN_RANGE_GPIO0;
572 regval = FIELD_PREP(AXP20X_GPIO10_IN_RANGE_GPIO0, !!val);
576 regmask = AXP20X_GPIO10_IN_RANGE_GPIO1;
577 regval = FIELD_PREP(AXP20X_GPIO10_IN_RANGE_GPIO1, !!val);
584 return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, regmask, regval);
587 static const struct iio_info axp20x_adc_iio_info = {
588 .read_raw = axp20x_read_raw,
589 .write_raw = axp20x_write_raw,
592 static const struct iio_info axp22x_adc_iio_info = {
593 .read_raw = axp22x_read_raw,
596 static const struct iio_info axp813_adc_iio_info = {
597 .read_raw = axp813_read_raw,
600 static int axp20x_adc_rate(struct axp20x_adc_iio *info, int rate)
602 return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
603 AXP20X_ADC_RATE_MASK,
604 AXP20X_ADC_RATE_HZ(rate));
607 static int axp22x_adc_rate(struct axp20x_adc_iio *info, int rate)
609 return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
610 AXP20X_ADC_RATE_MASK,
611 AXP22X_ADC_RATE_HZ(rate));
614 static int axp813_adc_rate(struct axp20x_adc_iio *info, int rate)
616 return regmap_update_bits(info->regmap, AXP813_ADC_RATE,
617 AXP813_ADC_RATE_MASK,
618 AXP813_ADC_RATE_HZ(rate));
622 const struct iio_info *iio_info;
624 struct iio_chan_spec const *channels;
625 unsigned long adc_en1_mask;
626 unsigned long adc_en2_mask;
627 int (*adc_rate)(struct axp20x_adc_iio *info,
629 struct iio_map *maps;
632 static const struct axp_data axp20x_data = {
633 .iio_info = &axp20x_adc_iio_info,
634 .num_channels = ARRAY_SIZE(axp20x_adc_channels),
635 .channels = axp20x_adc_channels,
636 .adc_en1_mask = AXP20X_ADC_EN1_MASK,
637 .adc_en2_mask = AXP20X_ADC_EN2_MASK,
638 .adc_rate = axp20x_adc_rate,
642 static const struct axp_data axp22x_data = {
643 .iio_info = &axp22x_adc_iio_info,
644 .num_channels = ARRAY_SIZE(axp22x_adc_channels),
645 .channels = axp22x_adc_channels,
646 .adc_en1_mask = AXP22X_ADC_EN1_MASK,
647 .adc_rate = axp22x_adc_rate,
651 static const struct axp_data axp813_data = {
652 .iio_info = &axp813_adc_iio_info,
653 .num_channels = ARRAY_SIZE(axp813_adc_channels),
654 .channels = axp813_adc_channels,
655 .adc_en1_mask = AXP22X_ADC_EN1_MASK,
656 .adc_rate = axp813_adc_rate,
660 static const struct of_device_id axp20x_adc_of_match[] = {
661 { .compatible = "x-powers,axp209-adc", .data = (void *)&axp20x_data, },
662 { .compatible = "x-powers,axp221-adc", .data = (void *)&axp22x_data, },
663 { .compatible = "x-powers,axp813-adc", .data = (void *)&axp813_data, },
666 MODULE_DEVICE_TABLE(of, axp20x_adc_of_match);
668 static const struct platform_device_id axp20x_adc_id_match[] = {
669 { .name = "axp20x-adc", .driver_data = (kernel_ulong_t)&axp20x_data, },
670 { .name = "axp22x-adc", .driver_data = (kernel_ulong_t)&axp22x_data, },
671 { .name = "axp813-adc", .driver_data = (kernel_ulong_t)&axp813_data, },
674 MODULE_DEVICE_TABLE(platform, axp20x_adc_id_match);
676 static int axp20x_probe(struct platform_device *pdev)
678 struct axp20x_adc_iio *info;
679 struct iio_dev *indio_dev;
680 struct axp20x_dev *axp20x_dev;
683 axp20x_dev = dev_get_drvdata(pdev->dev.parent);
685 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
689 info = iio_priv(indio_dev);
690 platform_set_drvdata(pdev, indio_dev);
692 info->regmap = axp20x_dev->regmap;
693 indio_dev->modes = INDIO_DIRECT_MODE;
695 if (!dev_fwnode(&pdev->dev)) {
696 const struct platform_device_id *id;
698 id = platform_get_device_id(pdev);
699 info->data = (const struct axp_data *)id->driver_data;
701 struct device *dev = &pdev->dev;
703 info->data = device_get_match_data(dev);
706 indio_dev->name = platform_get_device_id(pdev)->name;
707 indio_dev->info = info->data->iio_info;
708 indio_dev->num_channels = info->data->num_channels;
709 indio_dev->channels = info->data->channels;
711 /* Enable the ADCs on IP */
712 regmap_write(info->regmap, AXP20X_ADC_EN1, info->data->adc_en1_mask);
714 if (info->data->adc_en2_mask)
715 regmap_update_bits(info->regmap, AXP20X_ADC_EN2,
716 info->data->adc_en2_mask,
717 info->data->adc_en2_mask);
719 /* Configure ADCs rate */
720 info->data->adc_rate(info, 100);
722 ret = iio_map_array_register(indio_dev, info->data->maps);
724 dev_err(&pdev->dev, "failed to register IIO maps: %d\n", ret);
728 ret = iio_device_register(indio_dev);
730 dev_err(&pdev->dev, "could not register the device\n");
737 iio_map_array_unregister(indio_dev);
740 regmap_write(info->regmap, AXP20X_ADC_EN1, 0);
742 if (info->data->adc_en2_mask)
743 regmap_write(info->regmap, AXP20X_ADC_EN2, 0);
748 static void axp20x_remove(struct platform_device *pdev)
750 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
751 struct axp20x_adc_iio *info = iio_priv(indio_dev);
753 iio_device_unregister(indio_dev);
754 iio_map_array_unregister(indio_dev);
756 regmap_write(info->regmap, AXP20X_ADC_EN1, 0);
758 if (info->data->adc_en2_mask)
759 regmap_write(info->regmap, AXP20X_ADC_EN2, 0);
762 static struct platform_driver axp20x_adc_driver = {
764 .name = "axp20x-adc",
765 .of_match_table = axp20x_adc_of_match,
767 .id_table = axp20x_adc_id_match,
768 .probe = axp20x_probe,
769 .remove_new = axp20x_remove,
772 module_platform_driver(axp20x_adc_driver);
774 MODULE_DESCRIPTION("ADC driver for AXP20X and AXP22X PMICs");
775 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
776 MODULE_LICENSE("GPL");