drivers/iio/adc/ad7923.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * AD7904/AD7914/AD7923/AD7924/AD7908/AD7918/AD7928 SPI ADC driver
   4  *
   5  * Copyright 2011 Analog Devices Inc (from AD7923 Driver)
   6  * Copyright 2012 CS Systemes d'Information
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/kernel.h>
  11 #include <linux/slab.h>
  12 #include <linux/sysfs.h>
  13 #include <linux/spi/spi.h>
  14 #include <linux/regulator/consumer.h>
  15 #include <linux/err.h>
  16 #include <linux/delay.h>
  17 #include <linux/module.h>
  18 #include <linux/interrupt.h>
  19
  20 #include <linux/iio/iio.h>
  21 #include <linux/iio/sysfs.h>
  22 #include <linux/iio/buffer.h>
  23 #include <linux/iio/trigger_consumer.h>
  24 #include <linux/iio/triggered_buffer.h>
  25
  26 #define AD7923_WRITE_CR         BIT(11)         /* write control register */
  27 #define AD7923_RANGE            BIT(1)          /* range to REFin */
  28 #define AD7923_CODING           BIT(0)          /* coding is straight binary */
  29 #define AD7923_PM_MODE_AS       (1)             /* auto shutdown */
  30 #define AD7923_PM_MODE_FS       (2)             /* full shutdown */
  31 #define AD7923_PM_MODE_OPS      (3)             /* normal operation */
  32 #define AD7923_SEQUENCE_OFF     (0)             /* no sequence fonction */
  33 #define AD7923_SEQUENCE_PROTECT (2)             /* no interrupt write cycle */
  34 #define AD7923_SEQUENCE_ON      (3)             /* continuous sequence */
  35
  36
  37 #define AD7923_PM_MODE_WRITE(mode)      ((mode) << 4)    /* write mode */
  38 #define AD7923_CHANNEL_WRITE(channel)   ((channel) << 6) /* write channel */
  39 #define AD7923_SEQUENCE_WRITE(sequence) ((((sequence) & 1) << 3) \
  40                                         + (((sequence) & 2) << 9))
  41                                                 /* write sequence fonction */
  42 /* left shift for CR : bit 11 transmit in first */
  43 #define AD7923_SHIFT_REGISTER   4
  44
  45 /* val = value, dec = left shift, bits = number of bits of the mask */
  46 #define EXTRACT(val, dec, bits)         (((val) >> (dec)) & ((1 << (bits)) - 1))
  47
  48 struct ad7923_state {
  49         struct spi_device               *spi;
  50         struct spi_transfer             ring_xfer[5];
  51         struct spi_transfer             scan_single_xfer[2];
  52         struct spi_message              ring_msg;
  53         struct spi_message              scan_single_msg;
  54
  55         struct regulator                *reg;
  56
  57         unsigned int                    settings;
  58
  59         /*
  60          * DMA (thus cache coherency maintenance) requires the
  61          * transfer buffers to live in their own cache lines.
  62          * Ensure rx_buf can be directly used in iio_push_to_buffers_with_timetamp
  63          * Length = 8 channels + 4 extra for 8 byte timestamp
  64          */
  65         __be16                          rx_buf[12] ____cacheline_aligned;
  66         __be16                          tx_buf[4];
  67 };
  68
  69 struct ad7923_chip_info {
  70         const struct iio_chan_spec *channels;
  71         unsigned int num_channels;
  72 };
  73
  74 enum ad7923_id {
  75         AD7904,
  76         AD7914,
  77         AD7924,
  78         AD7908,
  79         AD7918,
  80         AD7928
  81 };
  82
  83 #define AD7923_V_CHAN(index, bits)                                      \
  84         {                                                               \
  85                 .type = IIO_VOLTAGE,                                    \
  86                 .indexed = 1,                                           \
  87                 .channel = index,                                       \
  88                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),           \
  89                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),   \
  90                 .address = index,                                       \
  91                 .scan_index = index,                                    \
  92                 .scan_type = {                                          \
  93                         .sign = 'u',                                    \
  94                         .realbits = (bits),                             \
  95                         .storagebits = 16,                              \
  96                         .shift = 12 - (bits),                           \
  97                         .endianness = IIO_BE,                           \
  98                 },                                                      \
  99         }
 100
 101 #define DECLARE_AD7923_CHANNELS(name, bits) \
 102 const struct iio_chan_spec name ## _channels[] = { \
 103         AD7923_V_CHAN(0, bits), \
 104         AD7923_V_CHAN(1, bits), \
 105         AD7923_V_CHAN(2, bits), \
 106         AD7923_V_CHAN(3, bits), \
 107         IIO_CHAN_SOFT_TIMESTAMP(4), \
 108 }
 109
 110 #define DECLARE_AD7908_CHANNELS(name, bits) \
 111 const struct iio_chan_spec name ## _channels[] = { \
 112         AD7923_V_CHAN(0, bits), \
 113         AD7923_V_CHAN(1, bits), \
 114         AD7923_V_CHAN(2, bits), \
 115         AD7923_V_CHAN(3, bits), \
 116         AD7923_V_CHAN(4, bits), \
 117         AD7923_V_CHAN(5, bits), \
 118         AD7923_V_CHAN(6, bits), \
 119         AD7923_V_CHAN(7, bits), \
 120         IIO_CHAN_SOFT_TIMESTAMP(8), \
 121 }
 122
 123 static DECLARE_AD7923_CHANNELS(ad7904, 8);
 124 static DECLARE_AD7923_CHANNELS(ad7914, 10);
 125 static DECLARE_AD7923_CHANNELS(ad7924, 12);
 126 static DECLARE_AD7908_CHANNELS(ad7908, 8);
 127 static DECLARE_AD7908_CHANNELS(ad7918, 10);
 128 static DECLARE_AD7908_CHANNELS(ad7928, 12);
 129
 130 static const struct ad7923_chip_info ad7923_chip_info[] = {
 131         [AD7904] = {
 132                 .channels = ad7904_channels,
 133                 .num_channels = ARRAY_SIZE(ad7904_channels),
 134         },
 135         [AD7914] = {
 136                 .channels = ad7914_channels,
 137                 .num_channels = ARRAY_SIZE(ad7914_channels),
 138         },
 139         [AD7924] = {
 140                 .channels = ad7924_channels,
 141                 .num_channels = ARRAY_SIZE(ad7924_channels),
 142         },
 143         [AD7908] = {
 144                 .channels = ad7908_channels,
 145                 .num_channels = ARRAY_SIZE(ad7908_channels),
 146         },
 147         [AD7918] = {
 148                 .channels = ad7918_channels,
 149                 .num_channels = ARRAY_SIZE(ad7918_channels),
 150         },
 151         [AD7928] = {
 152                 .channels = ad7928_channels,
 153                 .num_channels = ARRAY_SIZE(ad7928_channels),
 154         },
 155 };
 156
 157 /*
 158  * ad7923_update_scan_mode() setup the spi transfer buffer for the new scan mask
 159  */
 160 static int ad7923_update_scan_mode(struct iio_dev *indio_dev,
 161                                    const unsigned long *active_scan_mask)
 162 {
 163         struct ad7923_state *st = iio_priv(indio_dev);
 164         int i, cmd, len;
 165
 166         len = 0;
 167         /*
 168          * For this driver the last channel is always the software timestamp so
 169          * skip that one.
 170          */
 171         for_each_set_bit(i, active_scan_mask, indio_dev->num_channels - 1) {
 172                 cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(i) |
 173                         AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
 174                         st->settings;
 175                 cmd <<= AD7923_SHIFT_REGISTER;
 176                 st->tx_buf[len++] = cpu_to_be16(cmd);
 177         }
 178         /* build spi ring message */
 179         st->ring_xfer[0].tx_buf = &st->tx_buf[0];
 180         st->ring_xfer[0].len = len;
 181         st->ring_xfer[0].cs_change = 1;
 182
 183         spi_message_init(&st->ring_msg);
 184         spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
 185
 186         for (i = 0; i < len; i++) {
 187                 st->ring_xfer[i + 1].rx_buf = &st->rx_buf[i];
 188                 st->ring_xfer[i + 1].len = 2;
 189                 st->ring_xfer[i + 1].cs_change = 1;
 190                 spi_message_add_tail(&st->ring_xfer[i + 1], &st->ring_msg);
 191         }
 192         /* make sure last transfer cs_change is not set */
 193         st->ring_xfer[i + 1].cs_change = 0;
 194
 195         return 0;
 196 }
 197
 198 /*
 199  * ad7923_trigger_handler() bh of trigger launched polling to ring buffer
 200  *
 201  * Currently there is no option in this driver to disable the saving of
 202  * timestamps within the ring.
 203  */
 204 static irqreturn_t ad7923_trigger_handler(int irq, void *p)
 205 {
 206         struct iio_poll_func *pf = p;
 207         struct iio_dev *indio_dev = pf->indio_dev;
 208         struct ad7923_state *st = iio_priv(indio_dev);
 209         int b_sent;
 210
 211         b_sent = spi_sync(st->spi, &st->ring_msg);
 212         if (b_sent)
 213                 goto done;
 214
 215         iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
 216                                            iio_get_time_ns(indio_dev));
 217
 218 done:
 219         iio_trigger_notify_done(indio_dev->trig);
 220
 221         return IRQ_HANDLED;
 222 }
 223
 224 static int ad7923_scan_direct(struct ad7923_state *st, unsigned int ch)
 225 {
 226         int ret, cmd;
 227
 228         cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(ch) |
 229                 AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
 230                 st->settings;
 231         cmd <<= AD7923_SHIFT_REGISTER;
 232         st->tx_buf[0] = cpu_to_be16(cmd);
 233
 234         ret = spi_sync(st->spi, &st->scan_single_msg);
 235         if (ret)
 236                 return ret;
 237
 238         return be16_to_cpu(st->rx_buf[0]);
 239 }
 240
 241 static int ad7923_get_range(struct ad7923_state *st)
 242 {
 243         int vref;
 244
 245         vref = regulator_get_voltage(st->reg);
 246         if (vref < 0)
 247                 return vref;
 248
 249         vref /= 1000;
 250
 251         if (!(st->settings & AD7923_RANGE))
 252                 vref *= 2;
 253
 254         return vref;
 255 }
 256
 257 static int ad7923_read_raw(struct iio_dev *indio_dev,
 258                            struct iio_chan_spec const *chan,
 259                            int *val,
 260                            int *val2,
 261                            long m)
 262 {
 263         int ret;
 264         struct ad7923_state *st = iio_priv(indio_dev);
 265
 266         switch (m) {
 267         case IIO_CHAN_INFO_RAW:
 268                 ret = iio_device_claim_direct_mode(indio_dev);
 269                 if (ret)
 270                         return ret;
 271                 ret = ad7923_scan_direct(st, chan->address);
 272                 iio_device_release_direct_mode(indio_dev);
 273
 274                 if (ret < 0)
 275                         return ret;
 276
 277                 if (chan->address == EXTRACT(ret, 12, 4))
 278                         *val = EXTRACT(ret, chan->scan_type.shift,
 279                                        chan->scan_type.realbits);
 280                 else
 281                         return -EIO;
 282
 283                 return IIO_VAL_INT;
 284         case IIO_CHAN_INFO_SCALE:
 285                 ret = ad7923_get_range(st);
 286                 if (ret < 0)
 287                         return ret;
 288                 *val = ret;
 289                 *val2 = chan->scan_type.realbits;
 290                 return IIO_VAL_FRACTIONAL_LOG2;
 291         }
 292         return -EINVAL;
 293 }
 294
 295 static const struct iio_info ad7923_info = {
 296         .read_raw = &ad7923_read_raw,
 297         .update_scan_mode = ad7923_update_scan_mode,
 298 };
 299
 300 static int ad7923_probe(struct spi_device *spi)
 301 {
 302         struct ad7923_state *st;
 303         struct iio_dev *indio_dev;
 304         const struct ad7923_chip_info *info;
 305         int ret;
 306
 307         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 308         if (!indio_dev)
 309                 return -ENOMEM;
 310
 311         st = iio_priv(indio_dev);
 312
 313         spi_set_drvdata(spi, indio_dev);
 314
 315         st->spi = spi;
 316         st->settings = AD7923_CODING | AD7923_RANGE |
 317                         AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS);
 318
 319         info = &ad7923_chip_info[spi_get_device_id(spi)->driver_data];
 320
 321         indio_dev->name = spi_get_device_id(spi)->name;
 322         indio_dev->modes = INDIO_DIRECT_MODE;
 323         indio_dev->channels = info->channels;
 324         indio_dev->num_channels = info->num_channels;
 325         indio_dev->info = &ad7923_info;
 326
 327         /* Setup default message */
 328
 329         st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
 330         st->scan_single_xfer[0].len = 2;
 331         st->scan_single_xfer[0].cs_change = 1;
 332         st->scan_single_xfer[1].rx_buf = &st->rx_buf[0];
 333         st->scan_single_xfer[1].len = 2;
 334
 335         spi_message_init(&st->scan_single_msg);
 336         spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
 337         spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
 338
 339         st->reg = devm_regulator_get(&spi->dev, "refin");
 340         if (IS_ERR(st->reg))
 341                 return PTR_ERR(st->reg);
 342
 343         ret = regulator_enable(st->reg);
 344         if (ret)
 345                 return ret;
 346
 347         ret = iio_triggered_buffer_setup(indio_dev, NULL,
 348                                          &ad7923_trigger_handler, NULL);
 349         if (ret)
 350                 goto error_disable_reg;
 351
 352         ret = iio_device_register(indio_dev);
 353         if (ret)
 354                 goto error_cleanup_ring;
 355
 356         return 0;
 357
 358 error_cleanup_ring:
 359         iio_triggered_buffer_cleanup(indio_dev);
 360 error_disable_reg:
 361         regulator_disable(st->reg);
 362
 363         return ret;
 364 }
 365
 366 static int ad7923_remove(struct spi_device *spi)
 367 {
 368         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 369         struct ad7923_state *st = iio_priv(indio_dev);
 370
 371         iio_device_unregister(indio_dev);
 372         iio_triggered_buffer_cleanup(indio_dev);
 373         regulator_disable(st->reg);
 374
 375         return 0;
 376 }
 377
 378 static const struct spi_device_id ad7923_id[] = {
 379         {"ad7904", AD7904},
 380         {"ad7914", AD7914},
 381         {"ad7923", AD7924},
 382         {"ad7924", AD7924},
 383         {"ad7908", AD7908},
 384         {"ad7918", AD7918},
 385         {"ad7928", AD7928},
 386         {}
 387 };
 388 MODULE_DEVICE_TABLE(spi, ad7923_id);
 389
 390 static const struct of_device_id ad7923_of_match[] = {
 391         { .compatible = "adi,ad7904", },
 392         { .compatible = "adi,ad7914", },
 393         { .compatible = "adi,ad7923", },
 394         { .compatible = "adi,ad7924", },
 395         { .compatible = "adi,ad7908", },
 396         { .compatible = "adi,ad7918", },
 397         { .compatible = "adi,ad7928", },
 398         { },
 399 };
 400 MODULE_DEVICE_TABLE(of, ad7923_of_match);
 401
 402 static struct spi_driver ad7923_driver = {
 403         .driver = {
 404                 .name   = "ad7923",
 405                 .of_match_table = ad7923_of_match,
 406         },
 407         .probe          = ad7923_probe,
 408         .remove         = ad7923_remove,
 409         .id_table       = ad7923_id,
 410 };
 411 module_spi_driver(ad7923_driver);
 412
 413 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
 414 MODULE_AUTHOR("Patrick Vasseur <patrick.vasseur@c-s.fr>");
 415 MODULE_DESCRIPTION("Analog Devices AD7923 and similar ADC");
 416 MODULE_LICENSE("GPL v2");