1 // SPDX-License-Identifier: GPL-2.0-only
3 * sca3000_core.c -- support VTI sca3000 series accelerometers via SPI
5 * Copyright (c) 2009 Jonathan Cameron <jic23@kernel.org>
7 * See industrialio/accels/sca3000.h for comments.
10 #include <linux/interrupt.h>
12 #include <linux/device.h>
13 #include <linux/slab.h>
14 #include <linux/kernel.h>
15 #include <linux/spi/spi.h>
16 #include <linux/sysfs.h>
17 #include <linux/module.h>
18 #include <linux/uaccess.h>
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/events.h>
22 #include <linux/iio/buffer.h>
23 #include <linux/iio/kfifo_buf.h>
25 #define SCA3000_WRITE_REG(a) (((a) << 2) | 0x02)
26 #define SCA3000_READ_REG(a) ((a) << 2)
28 #define SCA3000_REG_REVID_ADDR 0x00
29 #define SCA3000_REG_REVID_MAJOR_MASK GENMASK(8, 4)
30 #define SCA3000_REG_REVID_MINOR_MASK GENMASK(3, 0)
32 #define SCA3000_REG_STATUS_ADDR 0x02
33 #define SCA3000_LOCKED BIT(5)
34 #define SCA3000_EEPROM_CS_ERROR BIT(1)
35 #define SCA3000_SPI_FRAME_ERROR BIT(0)
37 /* All reads done using register decrement so no need to directly access LSBs */
38 #define SCA3000_REG_X_MSB_ADDR 0x05
39 #define SCA3000_REG_Y_MSB_ADDR 0x07
40 #define SCA3000_REG_Z_MSB_ADDR 0x09
42 #define SCA3000_REG_RING_OUT_ADDR 0x0f
44 /* Temp read untested - the e05 doesn't have the sensor */
45 #define SCA3000_REG_TEMP_MSB_ADDR 0x13
47 #define SCA3000_REG_MODE_ADDR 0x14
48 #define SCA3000_MODE_PROT_MASK 0x28
49 #define SCA3000_REG_MODE_RING_BUF_ENABLE BIT(7)
50 #define SCA3000_REG_MODE_RING_BUF_8BIT BIT(6)
53 * Free fall detection triggers an interrupt if the acceleration
54 * is below a threshold for equivalent of 25cm drop
56 #define SCA3000_REG_MODE_FREE_FALL_DETECT BIT(4)
57 #define SCA3000_REG_MODE_MEAS_MODE_NORMAL 0x00
58 #define SCA3000_REG_MODE_MEAS_MODE_OP_1 0x01
59 #define SCA3000_REG_MODE_MEAS_MODE_OP_2 0x02
62 * In motion detection mode the accelerations are band pass filtered
63 * (approx 1 - 25Hz) and then a programmable threshold used to trigger
66 #define SCA3000_REG_MODE_MEAS_MODE_MOT_DET 0x03
67 #define SCA3000_REG_MODE_MODE_MASK 0x03
69 #define SCA3000_REG_BUF_COUNT_ADDR 0x15
71 #define SCA3000_REG_INT_STATUS_ADDR 0x16
72 #define SCA3000_REG_INT_STATUS_THREE_QUARTERS BIT(7)
73 #define SCA3000_REG_INT_STATUS_HALF BIT(6)
75 #define SCA3000_INT_STATUS_FREE_FALL BIT(3)
76 #define SCA3000_INT_STATUS_Y_TRIGGER BIT(2)
77 #define SCA3000_INT_STATUS_X_TRIGGER BIT(1)
78 #define SCA3000_INT_STATUS_Z_TRIGGER BIT(0)
80 /* Used to allow access to multiplexed registers */
81 #define SCA3000_REG_CTRL_SEL_ADDR 0x18
82 /* Only available for SCA3000-D03 and SCA3000-D01 */
83 #define SCA3000_REG_CTRL_SEL_I2C_DISABLE 0x01
84 #define SCA3000_REG_CTRL_SEL_MD_CTRL 0x02
85 #define SCA3000_REG_CTRL_SEL_MD_Y_TH 0x03
86 #define SCA3000_REG_CTRL_SEL_MD_X_TH 0x04
87 #define SCA3000_REG_CTRL_SEL_MD_Z_TH 0x05
89 * BE VERY CAREFUL WITH THIS, IF 3 BITS ARE NOT SET the device
92 #define SCA3000_REG_CTRL_SEL_OUT_CTRL 0x0B
94 #define SCA3000_REG_OUT_CTRL_PROT_MASK 0xE0
95 #define SCA3000_REG_OUT_CTRL_BUF_X_EN 0x10
96 #define SCA3000_REG_OUT_CTRL_BUF_Y_EN 0x08
97 #define SCA3000_REG_OUT_CTRL_BUF_Z_EN 0x04
98 #define SCA3000_REG_OUT_CTRL_BUF_DIV_MASK 0x03
99 #define SCA3000_REG_OUT_CTRL_BUF_DIV_4 0x02
100 #define SCA3000_REG_OUT_CTRL_BUF_DIV_2 0x01
104 * Control which motion detector interrupts are on.
105 * For now only OR combinations are supported.
107 #define SCA3000_MD_CTRL_PROT_MASK 0xC0
108 #define SCA3000_MD_CTRL_OR_Y BIT(0)
109 #define SCA3000_MD_CTRL_OR_X BIT(1)
110 #define SCA3000_MD_CTRL_OR_Z BIT(2)
111 /* Currently unsupported */
112 #define SCA3000_MD_CTRL_AND_Y BIT(3)
113 #define SCA3000_MD_CTRL_AND_X BIT(4)
114 #define SCA3000_MD_CTRL_AND_Z BIT(5)
117 * Some control registers of complex access methods requiring this register to
118 * be used to remove a lock.
120 #define SCA3000_REG_UNLOCK_ADDR 0x1e
122 #define SCA3000_REG_INT_MASK_ADDR 0x21
123 #define SCA3000_REG_INT_MASK_PROT_MASK 0x1C
125 #define SCA3000_REG_INT_MASK_RING_THREE_QUARTER BIT(7)
126 #define SCA3000_REG_INT_MASK_RING_HALF BIT(6)
128 #define SCA3000_REG_INT_MASK_ALL_INTS 0x02
129 #define SCA3000_REG_INT_MASK_ACTIVE_HIGH 0x01
130 #define SCA3000_REG_INT_MASK_ACTIVE_LOW 0x00
131 /* Values of multiplexed registers (write to ctrl_data after select) */
132 #define SCA3000_REG_CTRL_DATA_ADDR 0x22
135 * Measurement modes available on some sca3000 series chips. Code assumes others
136 * may become available in the future.
138 * Bypass - Bypass the low-pass filter in the signal channel so as to increase
141 * Narrow - Narrow low-pass filtering of the signal channel and half output
142 * data rate by decimation.
144 * Wide - Widen low-pass filtering of signal channel to increase bandwidth
146 #define SCA3000_OP_MODE_BYPASS 0x01
147 #define SCA3000_OP_MODE_NARROW 0x02
148 #define SCA3000_OP_MODE_WIDE 0x04
149 #define SCA3000_MAX_TX 6
150 #define SCA3000_MAX_RX 2
153 * struct sca3000_state - device instance state information
154 * @us: the associated spi device
155 * @info: chip variant information
156 * @last_timestamp: the timestamp of the last event
157 * @mo_det_use_count: reference counter for the motion detection unit
158 * @lock: lock used to protect elements of sca3000_state
159 * and the underlying device state.
160 * @tx: dma-able transmit buffer
161 * @rx: dma-able receive buffer
163 struct sca3000_state {
164 struct spi_device *us;
165 const struct sca3000_chip_info *info;
167 int mo_det_use_count;
169 /* Can these share a cacheline ? */
170 u8 rx[384] __aligned(IIO_DMA_MINALIGN);
171 u8 tx[6] __aligned(IIO_DMA_MINALIGN);
175 * struct sca3000_chip_info - model dependent parameters
176 * @scale: scale * 10^-6
177 * @temp_output: some devices have temperature sensors.
178 * @measurement_mode_freq: normal mode sampling frequency
179 * @measurement_mode_3db_freq: 3db cutoff frequency of the low pass filter for
180 * the normal measurement mode.
181 * @option_mode_1: first optional mode. Not all models have one
182 * @option_mode_1_freq: option mode 1 sampling frequency
183 * @option_mode_1_3db_freq: 3db cutoff frequency of the low pass filter for
184 * the first option mode.
185 * @option_mode_2: second optional mode. Not all chips have one
186 * @option_mode_2_freq: option mode 2 sampling frequency
187 * @option_mode_2_3db_freq: 3db cutoff frequency of the low pass filter for
188 * the second option mode.
189 * @mot_det_mult_xz: Bit wise multipliers to calculate the threshold
190 * for motion detection in the x and z axis.
191 * @mot_det_mult_y: Bit wise multipliers to calculate the threshold
192 * for motion detection in the y axis.
194 * This structure is used to hold information about the functionality of a given
197 struct sca3000_chip_info {
200 int measurement_mode_freq;
201 int measurement_mode_3db_freq;
203 int option_mode_1_freq;
204 int option_mode_1_3db_freq;
206 int option_mode_2_freq;
207 int option_mode_2_3db_freq;
208 int mot_det_mult_xz[6];
209 int mot_det_mult_y[7];
212 enum sca3000_variant {
220 * Note where option modes are not defined, the chip simply does not
222 * Other chips in the sca3000 series use i2c and are not included here.
224 * Some of these devices are only listed in the family data sheet and
225 * do not actually appear to be available.
227 static const struct sca3000_chip_info sca3000_spi_chip_info_tbl[] = {
231 .measurement_mode_freq = 250,
232 .measurement_mode_3db_freq = 45,
233 .option_mode_1 = SCA3000_OP_MODE_BYPASS,
234 .option_mode_1_freq = 250,
235 .option_mode_1_3db_freq = 70,
236 .mot_det_mult_xz = {50, 100, 200, 350, 650, 1300},
237 .mot_det_mult_y = {50, 100, 150, 250, 450, 850, 1750},
241 .measurement_mode_freq = 125,
242 .measurement_mode_3db_freq = 40,
243 .option_mode_1 = SCA3000_OP_MODE_NARROW,
244 .option_mode_1_freq = 63,
245 .option_mode_1_3db_freq = 11,
246 .mot_det_mult_xz = {100, 150, 300, 550, 1050, 2050},
247 .mot_det_mult_y = {50, 100, 200, 350, 700, 1350, 2700},
251 .measurement_mode_freq = 100,
252 .measurement_mode_3db_freq = 38,
253 .option_mode_1 = SCA3000_OP_MODE_NARROW,
254 .option_mode_1_freq = 50,
255 .option_mode_1_3db_freq = 9,
256 .option_mode_2 = SCA3000_OP_MODE_WIDE,
257 .option_mode_2_freq = 400,
258 .option_mode_2_3db_freq = 70,
259 .mot_det_mult_xz = {200, 300, 600, 1100, 2100, 4100},
260 .mot_det_mult_y = {100, 200, 400, 7000, 1400, 2700, 54000},
264 .measurement_mode_freq = 200,
265 .measurement_mode_3db_freq = 60,
266 .option_mode_1 = SCA3000_OP_MODE_NARROW,
267 .option_mode_1_freq = 50,
268 .option_mode_1_3db_freq = 9,
269 .option_mode_2 = SCA3000_OP_MODE_WIDE,
270 .option_mode_2_freq = 400,
271 .option_mode_2_3db_freq = 75,
272 .mot_det_mult_xz = {600, 900, 1700, 3200, 6100, 11900},
273 .mot_det_mult_y = {300, 600, 1200, 2000, 4100, 7800, 15600},
277 static int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val)
279 st->tx[0] = SCA3000_WRITE_REG(address);
281 return spi_write(st->us, st->tx, 2);
284 static int sca3000_read_data_short(struct sca3000_state *st,
288 struct spi_transfer xfer[2] = {
297 st->tx[0] = SCA3000_READ_REG(reg_address_high);
299 return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
303 * sca3000_reg_lock_on() - test if the ctrl register lock is on
304 * @st: Driver specific device instance data.
308 static int sca3000_reg_lock_on(struct sca3000_state *st)
312 ret = sca3000_read_data_short(st, SCA3000_REG_STATUS_ADDR, 1);
316 return !(st->rx[0] & SCA3000_LOCKED);
320 * __sca3000_unlock_reg_lock() - unlock the control registers
321 * @st: Driver specific device instance data.
323 * Note the device does not appear to support doing this in a single transfer.
324 * This should only ever be used as part of ctrl reg read.
325 * Lock must be held before calling this
327 static int __sca3000_unlock_reg_lock(struct sca3000_state *st)
329 struct spi_transfer xfer[3] = {
337 .tx_buf = st->tx + 2,
340 .tx_buf = st->tx + 4,
343 st->tx[0] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
345 st->tx[2] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
347 st->tx[4] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
350 return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
354 * sca3000_write_ctrl_reg() - write to a lock protect ctrl register
355 * @st: Driver specific device instance data.
356 * @sel: selects which registers we wish to write to
357 * @val: the value to be written
359 * Certain control registers are protected against overwriting by the lock
360 * register and use a shared write address. This function allows writing of
364 static int sca3000_write_ctrl_reg(struct sca3000_state *st,
370 ret = sca3000_reg_lock_on(st);
374 ret = __sca3000_unlock_reg_lock(st);
379 /* Set the control select register */
380 ret = sca3000_write_reg(st, SCA3000_REG_CTRL_SEL_ADDR, sel);
384 /* Write the actual value into the register */
385 ret = sca3000_write_reg(st, SCA3000_REG_CTRL_DATA_ADDR, val);
392 * sca3000_read_ctrl_reg() - read from lock protected control register.
393 * @st: Driver specific device instance data.
394 * @ctrl_reg: Which ctrl register do we want to read.
398 static int sca3000_read_ctrl_reg(struct sca3000_state *st,
403 ret = sca3000_reg_lock_on(st);
407 ret = __sca3000_unlock_reg_lock(st);
411 /* Set the control select register */
412 ret = sca3000_write_reg(st, SCA3000_REG_CTRL_SEL_ADDR, ctrl_reg);
415 ret = sca3000_read_data_short(st, SCA3000_REG_CTRL_DATA_ADDR, 1);
424 * sca3000_print_rev() - sysfs interface to read the chip revision number
425 * @indio_dev: Device instance specific generic IIO data.
426 * Driver specific device instance data can be obtained via
427 * iio_priv(indio_dev)
429 static int sca3000_print_rev(struct iio_dev *indio_dev)
432 struct sca3000_state *st = iio_priv(indio_dev);
434 mutex_lock(&st->lock);
435 ret = sca3000_read_data_short(st, SCA3000_REG_REVID_ADDR, 1);
438 dev_info(&indio_dev->dev,
439 "sca3000 revision major=%lu, minor=%lu\n",
440 st->rx[0] & SCA3000_REG_REVID_MAJOR_MASK,
441 st->rx[0] & SCA3000_REG_REVID_MINOR_MASK);
443 mutex_unlock(&st->lock);
449 sca3000_show_available_3db_freqs(struct device *dev,
450 struct device_attribute *attr,
453 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
454 struct sca3000_state *st = iio_priv(indio_dev);
457 len = sprintf(buf, "%d", st->info->measurement_mode_3db_freq);
458 if (st->info->option_mode_1)
459 len += sprintf(buf + len, " %d",
460 st->info->option_mode_1_3db_freq);
461 if (st->info->option_mode_2)
462 len += sprintf(buf + len, " %d",
463 st->info->option_mode_2_3db_freq);
464 len += sprintf(buf + len, "\n");
469 static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
470 S_IRUGO, sca3000_show_available_3db_freqs,
473 static const struct iio_event_spec sca3000_event = {
474 .type = IIO_EV_TYPE_MAG,
475 .dir = IIO_EV_DIR_RISING,
476 .mask_separate = BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_ENABLE),
480 * Note the hack in the number of bits to pretend we have 2 more than
483 #define SCA3000_CHAN(index, mod) \
488 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
489 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |\
490 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),\
491 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\
493 .scan_index = index, \
499 .endianness = IIO_BE, \
501 .event_spec = &sca3000_event, \
502 .num_event_specs = 1, \
505 static const struct iio_event_spec sca3000_freefall_event_spec = {
506 .type = IIO_EV_TYPE_MAG,
507 .dir = IIO_EV_DIR_FALLING,
508 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
509 BIT(IIO_EV_INFO_PERIOD),
512 static const struct iio_chan_spec sca3000_channels[] = {
513 SCA3000_CHAN(0, IIO_MOD_X),
514 SCA3000_CHAN(1, IIO_MOD_Y),
515 SCA3000_CHAN(2, IIO_MOD_Z),
519 .channel2 = IIO_MOD_X_AND_Y_AND_Z,
520 .scan_index = -1, /* Fake channel */
521 .event_spec = &sca3000_freefall_event_spec,
522 .num_event_specs = 1,
526 static const struct iio_chan_spec sca3000_channels_with_temp[] = {
527 SCA3000_CHAN(0, IIO_MOD_X),
528 SCA3000_CHAN(1, IIO_MOD_Y),
529 SCA3000_CHAN(2, IIO_MOD_Z),
532 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
533 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
534 BIT(IIO_CHAN_INFO_OFFSET),
535 /* No buffer support */
542 .endianness = IIO_BE,
548 .channel2 = IIO_MOD_X_AND_Y_AND_Z,
549 .scan_index = -1, /* Fake channel */
550 .event_spec = &sca3000_freefall_event_spec,
551 .num_event_specs = 1,
555 static u8 sca3000_addresses[3][3] = {
556 [0] = {SCA3000_REG_X_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_X_TH,
557 SCA3000_MD_CTRL_OR_X},
558 [1] = {SCA3000_REG_Y_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_Y_TH,
559 SCA3000_MD_CTRL_OR_Y},
560 [2] = {SCA3000_REG_Z_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_Z_TH,
561 SCA3000_MD_CTRL_OR_Z},
565 * __sca3000_get_base_freq() - obtain mode specific base frequency
566 * @st: Private driver specific device instance specific state.
567 * @info: chip type specific information.
568 * @base_freq: Base frequency for the current measurement mode.
572 static inline int __sca3000_get_base_freq(struct sca3000_state *st,
573 const struct sca3000_chip_info *info,
578 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
581 switch (SCA3000_REG_MODE_MODE_MASK & st->rx[0]) {
582 case SCA3000_REG_MODE_MEAS_MODE_NORMAL:
583 *base_freq = info->measurement_mode_freq;
585 case SCA3000_REG_MODE_MEAS_MODE_OP_1:
586 *base_freq = info->option_mode_1_freq;
588 case SCA3000_REG_MODE_MEAS_MODE_OP_2:
589 *base_freq = info->option_mode_2_freq;
599 * sca3000_read_raw_samp_freq() - read_raw handler for IIO_CHAN_INFO_SAMP_FREQ
600 * @st: Private driver specific device instance specific state.
601 * @val: The frequency read back.
605 static int sca3000_read_raw_samp_freq(struct sca3000_state *st, int *val)
609 ret = __sca3000_get_base_freq(st, st->info, val);
613 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
618 ret &= SCA3000_REG_OUT_CTRL_BUF_DIV_MASK;
620 case SCA3000_REG_OUT_CTRL_BUF_DIV_2:
623 case SCA3000_REG_OUT_CTRL_BUF_DIV_4:
633 * sca3000_write_raw_samp_freq() - write_raw handler for IIO_CHAN_INFO_SAMP_FREQ
634 * @st: Private driver specific device instance specific state.
635 * @val: The frequency desired.
639 static int sca3000_write_raw_samp_freq(struct sca3000_state *st, int val)
641 int ret, base_freq, ctrlval;
643 ret = __sca3000_get_base_freq(st, st->info, &base_freq);
647 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
651 ctrlval = ret & ~SCA3000_REG_OUT_CTRL_BUF_DIV_MASK;
653 if (val == base_freq / 2)
654 ctrlval |= SCA3000_REG_OUT_CTRL_BUF_DIV_2;
655 if (val == base_freq / 4)
656 ctrlval |= SCA3000_REG_OUT_CTRL_BUF_DIV_4;
657 else if (val != base_freq)
660 return sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL,
664 static int sca3000_read_3db_freq(struct sca3000_state *st, int *val)
668 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
672 /* mask bottom 2 bits - only ones that are relevant */
673 st->rx[0] &= SCA3000_REG_MODE_MODE_MASK;
675 case SCA3000_REG_MODE_MEAS_MODE_NORMAL:
676 *val = st->info->measurement_mode_3db_freq;
678 case SCA3000_REG_MODE_MEAS_MODE_MOT_DET:
680 case SCA3000_REG_MODE_MEAS_MODE_OP_1:
681 *val = st->info->option_mode_1_3db_freq;
683 case SCA3000_REG_MODE_MEAS_MODE_OP_2:
684 *val = st->info->option_mode_2_3db_freq;
691 static int sca3000_write_3db_freq(struct sca3000_state *st, int val)
696 if (val == st->info->measurement_mode_3db_freq)
697 mode = SCA3000_REG_MODE_MEAS_MODE_NORMAL;
698 else if (st->info->option_mode_1 &&
699 (val == st->info->option_mode_1_3db_freq))
700 mode = SCA3000_REG_MODE_MEAS_MODE_OP_1;
701 else if (st->info->option_mode_2 &&
702 (val == st->info->option_mode_2_3db_freq))
703 mode = SCA3000_REG_MODE_MEAS_MODE_OP_2;
706 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
710 st->rx[0] &= ~SCA3000_REG_MODE_MODE_MASK;
711 st->rx[0] |= (mode & SCA3000_REG_MODE_MODE_MASK);
713 return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR, st->rx[0]);
716 static int sca3000_read_raw(struct iio_dev *indio_dev,
717 struct iio_chan_spec const *chan,
722 struct sca3000_state *st = iio_priv(indio_dev);
727 case IIO_CHAN_INFO_RAW:
728 mutex_lock(&st->lock);
729 if (chan->type == IIO_ACCEL) {
730 if (st->mo_det_use_count) {
731 mutex_unlock(&st->lock);
734 address = sca3000_addresses[chan->address][0];
735 ret = sca3000_read_data_short(st, address, 2);
737 mutex_unlock(&st->lock);
740 *val = sign_extend32(be16_to_cpup((__be16 *)st->rx) >>
741 chan->scan_type.shift,
742 chan->scan_type.realbits - 1);
744 /* get the temperature when available */
745 ret = sca3000_read_data_short(st,
746 SCA3000_REG_TEMP_MSB_ADDR,
749 mutex_unlock(&st->lock);
752 *val = (be16_to_cpup((__be16 *)st->rx) >>
753 chan->scan_type.shift) &
754 GENMASK(chan->scan_type.realbits - 1, 0);
756 mutex_unlock(&st->lock);
758 case IIO_CHAN_INFO_SCALE:
760 if (chan->type == IIO_ACCEL)
761 *val2 = st->info->scale;
762 else /* temperature */
764 return IIO_VAL_INT_PLUS_MICRO;
765 case IIO_CHAN_INFO_OFFSET:
768 return IIO_VAL_INT_PLUS_MICRO;
769 case IIO_CHAN_INFO_SAMP_FREQ:
770 mutex_lock(&st->lock);
771 ret = sca3000_read_raw_samp_freq(st, val);
772 mutex_unlock(&st->lock);
773 return ret ? ret : IIO_VAL_INT;
774 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
775 mutex_lock(&st->lock);
776 ret = sca3000_read_3db_freq(st, val);
777 mutex_unlock(&st->lock);
784 static int sca3000_write_raw(struct iio_dev *indio_dev,
785 struct iio_chan_spec const *chan,
786 int val, int val2, long mask)
788 struct sca3000_state *st = iio_priv(indio_dev);
792 case IIO_CHAN_INFO_SAMP_FREQ:
795 mutex_lock(&st->lock);
796 ret = sca3000_write_raw_samp_freq(st, val);
797 mutex_unlock(&st->lock);
799 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
802 mutex_lock(&st->lock);
803 ret = sca3000_write_3db_freq(st, val);
804 mutex_unlock(&st->lock);
814 * sca3000_read_av_freq() - sysfs function to get available frequencies
815 * @dev: Device structure for this device.
816 * @attr: Description of the attribute.
817 * @buf: Incoming string
819 * The later modes are only relevant to the ring buffer - and depend on current
820 * mode. Note that data sheet gives rather wide tolerances for these so integer
821 * division will give good enough answer and not all chips have them specified
824 static ssize_t sca3000_read_av_freq(struct device *dev,
825 struct device_attribute *attr,
828 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
829 struct sca3000_state *st = iio_priv(indio_dev);
830 int len = 0, ret, val;
832 mutex_lock(&st->lock);
833 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
835 mutex_unlock(&st->lock);
839 switch (val & SCA3000_REG_MODE_MODE_MASK) {
840 case SCA3000_REG_MODE_MEAS_MODE_NORMAL:
841 len += sprintf(buf + len, "%d %d %d\n",
842 st->info->measurement_mode_freq,
843 st->info->measurement_mode_freq / 2,
844 st->info->measurement_mode_freq / 4);
846 case SCA3000_REG_MODE_MEAS_MODE_OP_1:
847 len += sprintf(buf + len, "%d %d %d\n",
848 st->info->option_mode_1_freq,
849 st->info->option_mode_1_freq / 2,
850 st->info->option_mode_1_freq / 4);
852 case SCA3000_REG_MODE_MEAS_MODE_OP_2:
853 len += sprintf(buf + len, "%d %d %d\n",
854 st->info->option_mode_2_freq,
855 st->info->option_mode_2_freq / 2,
856 st->info->option_mode_2_freq / 4);
865 * Should only really be registered if ring buffer support is compiled in.
866 * Does no harm however and doing it right would add a fair bit of complexity
868 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sca3000_read_av_freq);
871 * sca3000_read_event_value() - query of a threshold or period
873 static int sca3000_read_event_value(struct iio_dev *indio_dev,
874 const struct iio_chan_spec *chan,
875 enum iio_event_type type,
876 enum iio_event_direction dir,
877 enum iio_event_info info,
880 struct sca3000_state *st = iio_priv(indio_dev);
885 case IIO_EV_INFO_VALUE:
886 mutex_lock(&st->lock);
887 ret = sca3000_read_ctrl_reg(st,
888 sca3000_addresses[chan->address][1]);
889 mutex_unlock(&st->lock);
893 if (chan->channel2 == IIO_MOD_Y)
894 for_each_set_bit(i, &ret,
895 ARRAY_SIZE(st->info->mot_det_mult_y))
896 *val += st->info->mot_det_mult_y[i];
898 for_each_set_bit(i, &ret,
899 ARRAY_SIZE(st->info->mot_det_mult_xz))
900 *val += st->info->mot_det_mult_xz[i];
903 case IIO_EV_INFO_PERIOD:
906 return IIO_VAL_INT_PLUS_MICRO;
913 * sca3000_write_event_value() - control of threshold and period
914 * @indio_dev: Device instance specific IIO information.
915 * @chan: Description of the channel for which the event is being
917 * @type: The type of event being configured, here magnitude rising
918 * as everything else is read only.
919 * @dir: Direction of the event (here rising)
920 * @info: What information about the event are we configuring.
921 * Here the threshold only.
922 * @val: Integer part of the value being written..
923 * @val2: Non integer part of the value being written. Here always 0.
925 static int sca3000_write_event_value(struct iio_dev *indio_dev,
926 const struct iio_chan_spec *chan,
927 enum iio_event_type type,
928 enum iio_event_direction dir,
929 enum iio_event_info info,
932 struct sca3000_state *st = iio_priv(indio_dev);
937 if (chan->channel2 == IIO_MOD_Y) {
938 i = ARRAY_SIZE(st->info->mot_det_mult_y);
940 if (val >= st->info->mot_det_mult_y[--i]) {
941 nonlinear |= (1 << i);
942 val -= st->info->mot_det_mult_y[i];
945 i = ARRAY_SIZE(st->info->mot_det_mult_xz);
947 if (val >= st->info->mot_det_mult_xz[--i]) {
948 nonlinear |= (1 << i);
949 val -= st->info->mot_det_mult_xz[i];
953 mutex_lock(&st->lock);
954 ret = sca3000_write_ctrl_reg(st,
955 sca3000_addresses[chan->address][1],
957 mutex_unlock(&st->lock);
962 static struct attribute *sca3000_attributes[] = {
963 &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.dev_attr.attr,
964 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
968 static const struct attribute_group sca3000_attribute_group = {
969 .attrs = sca3000_attributes,
972 static int sca3000_read_data(struct sca3000_state *st,
978 struct spi_transfer xfer[2] = {
988 st->tx[0] = SCA3000_READ_REG(reg_address_high);
989 ret = spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
991 dev_err(&st->us->dev, "problem reading register\n");
999 * sca3000_ring_int_process() - ring specific interrupt handling.
1000 * @val: Value of the interrupt status register.
1001 * @indio_dev: Device instance specific IIO device structure.
1003 static void sca3000_ring_int_process(u8 val, struct iio_dev *indio_dev)
1005 struct sca3000_state *st = iio_priv(indio_dev);
1006 int ret, i, num_available;
1008 mutex_lock(&st->lock);
1010 if (val & SCA3000_REG_INT_STATUS_HALF) {
1011 ret = sca3000_read_data_short(st, SCA3000_REG_BUF_COUNT_ADDR,
1015 num_available = st->rx[0];
1017 * num_available is the total number of samples available
1018 * i.e. number of time points * number of channels.
1020 ret = sca3000_read_data(st, SCA3000_REG_RING_OUT_ADDR, st->rx,
1024 for (i = 0; i < num_available / 3; i++) {
1026 * Dirty hack to cover for 11 bit in fifo, 13 bit
1029 * In theory the bottom two bits are undefined.
1030 * In reality they appear to always be 0.
1032 iio_push_to_buffers(indio_dev, st->rx + i * 3 * 2);
1036 mutex_unlock(&st->lock);
1040 * sca3000_event_handler() - handling ring and non ring events
1041 * @irq: The irq being handled.
1042 * @private: struct iio_device pointer for the device.
1044 * Ring related interrupt handler. Depending on event, push to
1045 * the ring buffer event chrdev or the event one.
1047 * This function is complicated by the fact that the devices can signify ring
1048 * and non ring events via the same interrupt line and they can only
1049 * be distinguished via a read of the relevant status register.
1051 static irqreturn_t sca3000_event_handler(int irq, void *private)
1053 struct iio_dev *indio_dev = private;
1054 struct sca3000_state *st = iio_priv(indio_dev);
1056 s64 last_timestamp = iio_get_time_ns(indio_dev);
1059 * Could lead if badly timed to an extra read of status reg,
1060 * but ensures no interrupt is missed.
1062 mutex_lock(&st->lock);
1063 ret = sca3000_read_data_short(st, SCA3000_REG_INT_STATUS_ADDR, 1);
1065 mutex_unlock(&st->lock);
1069 sca3000_ring_int_process(val, indio_dev);
1071 if (val & SCA3000_INT_STATUS_FREE_FALL)
1072 iio_push_event(indio_dev,
1073 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1075 IIO_MOD_X_AND_Y_AND_Z,
1077 IIO_EV_DIR_FALLING),
1080 if (val & SCA3000_INT_STATUS_Y_TRIGGER)
1081 iio_push_event(indio_dev,
1082 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1089 if (val & SCA3000_INT_STATUS_X_TRIGGER)
1090 iio_push_event(indio_dev,
1091 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1098 if (val & SCA3000_INT_STATUS_Z_TRIGGER)
1099 iio_push_event(indio_dev,
1100 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1112 * sca3000_read_event_config() what events are enabled
1114 static int sca3000_read_event_config(struct iio_dev *indio_dev,
1115 const struct iio_chan_spec *chan,
1116 enum iio_event_type type,
1117 enum iio_event_direction dir)
1119 struct sca3000_state *st = iio_priv(indio_dev);
1121 /* read current value of mode register */
1122 mutex_lock(&st->lock);
1124 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1128 switch (chan->channel2) {
1129 case IIO_MOD_X_AND_Y_AND_Z:
1130 ret = !!(st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT);
1136 * Motion detection mode cannot run at the same time as
1137 * acceleration data being read.
1139 if ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
1140 != SCA3000_REG_MODE_MEAS_MODE_MOT_DET) {
1143 ret = sca3000_read_ctrl_reg(st,
1144 SCA3000_REG_CTRL_SEL_MD_CTRL);
1147 /* only supporting logical or's for now */
1148 ret = !!(ret & sca3000_addresses[chan->address][2]);
1156 mutex_unlock(&st->lock);
1161 static int sca3000_freefall_set_state(struct iio_dev *indio_dev, int state)
1163 struct sca3000_state *st = iio_priv(indio_dev);
1166 /* read current value of mode register */
1167 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1171 /* if off and should be on */
1172 if (state && !(st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT))
1173 return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1174 st->rx[0] | SCA3000_REG_MODE_FREE_FALL_DETECT);
1175 /* if on and should be off */
1176 else if (!state && (st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT))
1177 return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1178 st->rx[0] & ~SCA3000_REG_MODE_FREE_FALL_DETECT);
1183 static int sca3000_motion_detect_set_state(struct iio_dev *indio_dev, int axis,
1186 struct sca3000_state *st = iio_priv(indio_dev);
1190 * First read the motion detector config to find out if
1193 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL);
1197 /* if off and should be on */
1198 if (state && !(ctrlval & sca3000_addresses[axis][2])) {
1199 ret = sca3000_write_ctrl_reg(st,
1200 SCA3000_REG_CTRL_SEL_MD_CTRL,
1202 sca3000_addresses[axis][2]);
1205 st->mo_det_use_count++;
1206 } else if (!state && (ctrlval & sca3000_addresses[axis][2])) {
1207 ret = sca3000_write_ctrl_reg(st,
1208 SCA3000_REG_CTRL_SEL_MD_CTRL,
1210 ~(sca3000_addresses[axis][2]));
1213 st->mo_det_use_count--;
1216 /* read current value of mode register */
1217 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1220 /* if off and should be on */
1221 if ((st->mo_det_use_count) &&
1222 ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
1223 != SCA3000_REG_MODE_MEAS_MODE_MOT_DET))
1224 return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1225 (st->rx[0] & ~SCA3000_REG_MODE_MODE_MASK)
1226 | SCA3000_REG_MODE_MEAS_MODE_MOT_DET);
1227 /* if on and should be off */
1228 else if (!(st->mo_det_use_count) &&
1229 ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
1230 == SCA3000_REG_MODE_MEAS_MODE_MOT_DET))
1231 return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1232 st->rx[0] & SCA3000_REG_MODE_MODE_MASK);
1238 * sca3000_write_event_config() - simple on off control for motion detector
1239 * @indio_dev: IIO device instance specific structure. Data specific to this
1240 * particular driver may be accessed via iio_priv(indio_dev).
1241 * @chan: Description of the channel whose event we are configuring.
1242 * @type: The type of event.
1243 * @dir: The direction of the event.
1244 * @state: Desired state of event being configured.
1246 * This is a per axis control, but enabling any will result in the
1247 * motion detector unit being enabled.
1248 * N.B. enabling motion detector stops normal data acquisition.
1249 * There is a complexity in knowing which mode to return to when
1250 * this mode is disabled. Currently normal mode is assumed.
1252 static int sca3000_write_event_config(struct iio_dev *indio_dev,
1253 const struct iio_chan_spec *chan,
1254 enum iio_event_type type,
1255 enum iio_event_direction dir,
1258 struct sca3000_state *st = iio_priv(indio_dev);
1261 mutex_lock(&st->lock);
1262 switch (chan->channel2) {
1263 case IIO_MOD_X_AND_Y_AND_Z:
1264 ret = sca3000_freefall_set_state(indio_dev, state);
1270 ret = sca3000_motion_detect_set_state(indio_dev,
1278 mutex_unlock(&st->lock);
1284 int __sca3000_hw_ring_state_set(struct iio_dev *indio_dev, bool state)
1286 struct sca3000_state *st = iio_priv(indio_dev);
1289 mutex_lock(&st->lock);
1290 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1294 dev_info(&indio_dev->dev, "supposedly enabling ring buffer\n");
1295 ret = sca3000_write_reg(st,
1296 SCA3000_REG_MODE_ADDR,
1297 (st->rx[0] | SCA3000_REG_MODE_RING_BUF_ENABLE));
1299 ret = sca3000_write_reg(st,
1300 SCA3000_REG_MODE_ADDR,
1301 (st->rx[0] & ~SCA3000_REG_MODE_RING_BUF_ENABLE));
1303 mutex_unlock(&st->lock);
1309 * sca3000_hw_ring_preenable() - hw ring buffer preenable function
1310 * @indio_dev: structure representing the IIO device. Device instance
1311 * specific state can be accessed via iio_priv(indio_dev).
1313 * Very simple enable function as the chip will allows normal reads
1314 * during ring buffer operation so as long as it is indeed running
1315 * before we notify the core, the precise ordering does not matter.
1317 static int sca3000_hw_ring_preenable(struct iio_dev *indio_dev)
1320 struct sca3000_state *st = iio_priv(indio_dev);
1322 mutex_lock(&st->lock);
1324 /* Enable the 50% full interrupt */
1325 ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1328 ret = sca3000_write_reg(st,
1329 SCA3000_REG_INT_MASK_ADDR,
1330 st->rx[0] | SCA3000_REG_INT_MASK_RING_HALF);
1334 mutex_unlock(&st->lock);
1336 return __sca3000_hw_ring_state_set(indio_dev, 1);
1339 mutex_unlock(&st->lock);
1344 static int sca3000_hw_ring_postdisable(struct iio_dev *indio_dev)
1347 struct sca3000_state *st = iio_priv(indio_dev);
1349 ret = __sca3000_hw_ring_state_set(indio_dev, 0);
1353 /* Disable the 50% full interrupt */
1354 mutex_lock(&st->lock);
1356 ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1359 ret = sca3000_write_reg(st,
1360 SCA3000_REG_INT_MASK_ADDR,
1361 st->rx[0] & ~SCA3000_REG_INT_MASK_RING_HALF);
1363 mutex_unlock(&st->lock);
1367 static const struct iio_buffer_setup_ops sca3000_ring_setup_ops = {
1368 .preenable = &sca3000_hw_ring_preenable,
1369 .postdisable = &sca3000_hw_ring_postdisable,
1373 * sca3000_clean_setup() - get the device into a predictable state
1374 * @st: Device instance specific private data structure
1376 * Devices use flash memory to store many of the register values
1377 * and hence can come up in somewhat unpredictable states.
1378 * Hence reset everything on driver load.
1380 static int sca3000_clean_setup(struct sca3000_state *st)
1384 mutex_lock(&st->lock);
1385 /* Ensure all interrupts have been acknowledged */
1386 ret = sca3000_read_data_short(st, SCA3000_REG_INT_STATUS_ADDR, 1);
1390 /* Turn off all motion detection channels */
1391 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL);
1394 ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL,
1395 ret & SCA3000_MD_CTRL_PROT_MASK);
1399 /* Disable ring buffer */
1400 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
1403 ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL,
1404 (ret & SCA3000_REG_OUT_CTRL_PROT_MASK)
1405 | SCA3000_REG_OUT_CTRL_BUF_X_EN
1406 | SCA3000_REG_OUT_CTRL_BUF_Y_EN
1407 | SCA3000_REG_OUT_CTRL_BUF_Z_EN
1408 | SCA3000_REG_OUT_CTRL_BUF_DIV_4);
1411 /* Enable interrupts, relevant to mode and set up as active low */
1412 ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1415 ret = sca3000_write_reg(st,
1416 SCA3000_REG_INT_MASK_ADDR,
1417 (ret & SCA3000_REG_INT_MASK_PROT_MASK)
1418 | SCA3000_REG_INT_MASK_ACTIVE_LOW);
1422 * Select normal measurement mode, free fall off, ring off
1423 * Ring in 12 bit mode - it is fine to overwrite reserved bits 3,5
1424 * as that occurs in one of the example on the datasheet
1426 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1429 ret = sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1430 (st->rx[0] & SCA3000_MODE_PROT_MASK));
1433 mutex_unlock(&st->lock);
1437 static const struct iio_info sca3000_info = {
1438 .attrs = &sca3000_attribute_group,
1439 .read_raw = &sca3000_read_raw,
1440 .write_raw = &sca3000_write_raw,
1441 .read_event_value = &sca3000_read_event_value,
1442 .write_event_value = &sca3000_write_event_value,
1443 .read_event_config = &sca3000_read_event_config,
1444 .write_event_config = &sca3000_write_event_config,
1447 static int sca3000_probe(struct spi_device *spi)
1450 struct sca3000_state *st;
1451 struct iio_dev *indio_dev;
1453 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
1457 st = iio_priv(indio_dev);
1458 spi_set_drvdata(spi, indio_dev);
1460 mutex_init(&st->lock);
1461 st->info = &sca3000_spi_chip_info_tbl[spi_get_device_id(spi)
1464 indio_dev->name = spi_get_device_id(spi)->name;
1465 indio_dev->info = &sca3000_info;
1466 if (st->info->temp_output) {
1467 indio_dev->channels = sca3000_channels_with_temp;
1468 indio_dev->num_channels =
1469 ARRAY_SIZE(sca3000_channels_with_temp);
1471 indio_dev->channels = sca3000_channels;
1472 indio_dev->num_channels = ARRAY_SIZE(sca3000_channels);
1474 indio_dev->modes = INDIO_DIRECT_MODE;
1476 ret = devm_iio_kfifo_buffer_setup(&spi->dev, indio_dev,
1477 &sca3000_ring_setup_ops);
1482 ret = request_threaded_irq(spi->irq,
1484 &sca3000_event_handler,
1485 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
1491 ret = sca3000_clean_setup(st);
1493 goto error_free_irq;
1495 ret = sca3000_print_rev(indio_dev);
1497 goto error_free_irq;
1499 return iio_device_register(indio_dev);
1503 free_irq(spi->irq, indio_dev);
1508 static int sca3000_stop_all_interrupts(struct sca3000_state *st)
1512 mutex_lock(&st->lock);
1513 ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1516 ret = sca3000_write_reg(st, SCA3000_REG_INT_MASK_ADDR,
1518 ~(SCA3000_REG_INT_MASK_RING_THREE_QUARTER |
1519 SCA3000_REG_INT_MASK_RING_HALF |
1520 SCA3000_REG_INT_MASK_ALL_INTS)));
1522 mutex_unlock(&st->lock);
1526 static void sca3000_remove(struct spi_device *spi)
1528 struct iio_dev *indio_dev = spi_get_drvdata(spi);
1529 struct sca3000_state *st = iio_priv(indio_dev);
1531 iio_device_unregister(indio_dev);
1533 /* Must ensure no interrupts can be generated after this! */
1534 sca3000_stop_all_interrupts(st);
1536 free_irq(spi->irq, indio_dev);
1539 static const struct spi_device_id sca3000_id[] = {
1540 {"sca3000_d01", d01},
1541 {"sca3000_e02", e02},
1542 {"sca3000_e04", e04},
1543 {"sca3000_e05", e05},
1546 MODULE_DEVICE_TABLE(spi, sca3000_id);
1548 static struct spi_driver sca3000_driver = {
1552 .probe = sca3000_probe,
1553 .remove = sca3000_remove,
1554 .id_table = sca3000_id,
1556 module_spi_driver(sca3000_driver);
1558 MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>");
1559 MODULE_DESCRIPTION("VTI SCA3000 Series Accelerometers SPI driver");
1560 MODULE_LICENSE("GPL v2");