1 // SPDX-License-Identifier: GPL-2.0
3 * NXP FXLS8962AF/FXLS8964AF Accelerometer Core Driver
5 * Copyright 2021 Connected Cars A/S
8 * https://www.nxp.com/docs/en/data-sheet/FXLS8962AF.pdf
9 * https://www.nxp.com/docs/en/data-sheet/FXLS8964AF.pdf
12 * https://www.nxp.com/docs/en/errata/ES_FXLS8962AF.pdf
15 #include <linux/bits.h>
16 #include <linux/bitfield.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/of_irq.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/regmap.h>
24 #include <linux/iio/buffer.h>
25 #include <linux/iio/events.h>
26 #include <linux/iio/iio.h>
27 #include <linux/iio/kfifo_buf.h>
28 #include <linux/iio/sysfs.h>
30 #include "fxls8962af.h"
32 #define FXLS8962AF_INT_STATUS 0x00
33 #define FXLS8962AF_INT_STATUS_SRC_BOOT BIT(0)
34 #define FXLS8962AF_INT_STATUS_SRC_SDCD_OT BIT(4)
35 #define FXLS8962AF_INT_STATUS_SRC_BUF BIT(5)
36 #define FXLS8962AF_INT_STATUS_SRC_DRDY BIT(7)
37 #define FXLS8962AF_TEMP_OUT 0x01
38 #define FXLS8962AF_VECM_LSB 0x02
39 #define FXLS8962AF_OUT_X_LSB 0x04
40 #define FXLS8962AF_OUT_Y_LSB 0x06
41 #define FXLS8962AF_OUT_Z_LSB 0x08
42 #define FXLS8962AF_BUF_STATUS 0x0b
43 #define FXLS8962AF_BUF_STATUS_BUF_CNT GENMASK(5, 0)
44 #define FXLS8962AF_BUF_STATUS_BUF_OVF BIT(6)
45 #define FXLS8962AF_BUF_STATUS_BUF_WMRK BIT(7)
46 #define FXLS8962AF_BUF_X_LSB 0x0c
47 #define FXLS8962AF_BUF_Y_LSB 0x0e
48 #define FXLS8962AF_BUF_Z_LSB 0x10
50 #define FXLS8962AF_PROD_REV 0x12
51 #define FXLS8962AF_WHO_AM_I 0x13
53 #define FXLS8962AF_SYS_MODE 0x14
54 #define FXLS8962AF_SENS_CONFIG1 0x15
55 #define FXLS8962AF_SENS_CONFIG1_ACTIVE BIT(0)
56 #define FXLS8962AF_SENS_CONFIG1_RST BIT(7)
57 #define FXLS8962AF_SC1_FSR_MASK GENMASK(2, 1)
58 #define FXLS8962AF_SC1_FSR_PREP(x) FIELD_PREP(FXLS8962AF_SC1_FSR_MASK, (x))
59 #define FXLS8962AF_SC1_FSR_GET(x) FIELD_GET(FXLS8962AF_SC1_FSR_MASK, (x))
61 #define FXLS8962AF_SENS_CONFIG2 0x16
62 #define FXLS8962AF_SENS_CONFIG3 0x17
63 #define FXLS8962AF_SC3_WAKE_ODR_MASK GENMASK(7, 4)
64 #define FXLS8962AF_SC3_WAKE_ODR_PREP(x) FIELD_PREP(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
65 #define FXLS8962AF_SC3_WAKE_ODR_GET(x) FIELD_GET(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
66 #define FXLS8962AF_SENS_CONFIG4 0x18
67 #define FXLS8962AF_SC4_INT_PP_OD_MASK BIT(1)
68 #define FXLS8962AF_SC4_INT_PP_OD_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_PP_OD_MASK, (x))
69 #define FXLS8962AF_SC4_INT_POL_MASK BIT(0)
70 #define FXLS8962AF_SC4_INT_POL_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_POL_MASK, (x))
71 #define FXLS8962AF_SENS_CONFIG5 0x19
73 #define FXLS8962AF_WAKE_IDLE_LSB 0x1b
74 #define FXLS8962AF_SLEEP_IDLE_LSB 0x1c
75 #define FXLS8962AF_ASLP_COUNT_LSB 0x1e
77 #define FXLS8962AF_INT_EN 0x20
78 #define FXLS8962AF_INT_EN_SDCD_OT_EN BIT(5)
79 #define FXLS8962AF_INT_EN_BUF_EN BIT(6)
80 #define FXLS8962AF_INT_PIN_SEL 0x21
81 #define FXLS8962AF_INT_PIN_SEL_MASK GENMASK(7, 0)
82 #define FXLS8962AF_INT_PIN_SEL_INT1 0x00
83 #define FXLS8962AF_INT_PIN_SEL_INT2 GENMASK(7, 0)
85 #define FXLS8962AF_OFF_X 0x22
86 #define FXLS8962AF_OFF_Y 0x23
87 #define FXLS8962AF_OFF_Z 0x24
89 #define FXLS8962AF_BUF_CONFIG1 0x26
90 #define FXLS8962AF_BC1_BUF_MODE_MASK GENMASK(6, 5)
91 #define FXLS8962AF_BC1_BUF_MODE_PREP(x) FIELD_PREP(FXLS8962AF_BC1_BUF_MODE_MASK, (x))
92 #define FXLS8962AF_BUF_CONFIG2 0x27
93 #define FXLS8962AF_BUF_CONFIG2_BUF_WMRK GENMASK(5, 0)
95 #define FXLS8962AF_ORIENT_STATUS 0x28
96 #define FXLS8962AF_ORIENT_CONFIG 0x29
97 #define FXLS8962AF_ORIENT_DBCOUNT 0x2a
98 #define FXLS8962AF_ORIENT_BF_ZCOMP 0x2b
99 #define FXLS8962AF_ORIENT_THS_REG 0x2c
101 #define FXLS8962AF_SDCD_INT_SRC1 0x2d
102 #define FXLS8962AF_SDCD_INT_SRC1_X_OT BIT(5)
103 #define FXLS8962AF_SDCD_INT_SRC1_X_POL BIT(4)
104 #define FXLS8962AF_SDCD_INT_SRC1_Y_OT BIT(3)
105 #define FXLS8962AF_SDCD_INT_SRC1_Y_POL BIT(2)
106 #define FXLS8962AF_SDCD_INT_SRC1_Z_OT BIT(1)
107 #define FXLS8962AF_SDCD_INT_SRC1_Z_POL BIT(0)
108 #define FXLS8962AF_SDCD_INT_SRC2 0x2e
109 #define FXLS8962AF_SDCD_CONFIG1 0x2f
110 #define FXLS8962AF_SDCD_CONFIG1_Z_OT_EN BIT(3)
111 #define FXLS8962AF_SDCD_CONFIG1_Y_OT_EN BIT(4)
112 #define FXLS8962AF_SDCD_CONFIG1_X_OT_EN BIT(5)
113 #define FXLS8962AF_SDCD_CONFIG1_OT_ELE BIT(7)
114 #define FXLS8962AF_SDCD_CONFIG2 0x30
115 #define FXLS8962AF_SDCD_CONFIG2_SDCD_EN BIT(7)
116 #define FXLS8962AF_SC2_REF_UPDM_AC GENMASK(6, 5)
117 #define FXLS8962AF_SDCD_OT_DBCNT 0x31
118 #define FXLS8962AF_SDCD_WT_DBCNT 0x32
119 #define FXLS8962AF_SDCD_LTHS_LSB 0x33
120 #define FXLS8962AF_SDCD_UTHS_LSB 0x35
122 #define FXLS8962AF_SELF_TEST_CONFIG1 0x37
123 #define FXLS8962AF_SELF_TEST_CONFIG2 0x38
125 #define FXLS8962AF_MAX_REG 0x38
127 #define FXLS8962AF_DEVICE_ID 0x62
128 #define FXLS8964AF_DEVICE_ID 0x84
130 /* Raw temp channel offset */
131 #define FXLS8962AF_TEMP_CENTER_VAL 25
133 #define FXLS8962AF_AUTO_SUSPEND_DELAY_MS 2000
135 #define FXLS8962AF_FIFO_LENGTH 32
136 #define FXLS8962AF_SCALE_TABLE_LEN 4
137 #define FXLS8962AF_SAMP_FREQ_TABLE_LEN 13
139 static const int fxls8962af_scale_table[FXLS8962AF_SCALE_TABLE_LEN][2] = {
140 {0, IIO_G_TO_M_S_2(980000)},
141 {0, IIO_G_TO_M_S_2(1950000)},
142 {0, IIO_G_TO_M_S_2(3910000)},
143 {0, IIO_G_TO_M_S_2(7810000)},
146 static const int fxls8962af_samp_freq_table[FXLS8962AF_SAMP_FREQ_TABLE_LEN][2] = {
147 {3200, 0}, {1600, 0}, {800, 0}, {400, 0}, {200, 0}, {100, 0},
148 {50, 0}, {25, 0}, {12, 500000}, {6, 250000}, {3, 125000},
149 {1, 563000}, {0, 781000},
152 struct fxls8962af_chip_info {
154 const struct iio_chan_spec *channels;
159 struct fxls8962af_data {
160 struct regmap *regmap;
161 const struct fxls8962af_chip_info *chip_info;
162 struct regulator *vdd_reg;
167 int64_t timestamp, old_timestamp; /* Only used in hw fifo mode. */
168 struct iio_mount_matrix orientation;
176 const struct regmap_config fxls8962af_i2c_regmap_conf = {
179 .max_register = FXLS8962AF_MAX_REG,
181 EXPORT_SYMBOL_NS_GPL(fxls8962af_i2c_regmap_conf, IIO_FXLS8962AF);
183 const struct regmap_config fxls8962af_spi_regmap_conf = {
187 .max_register = FXLS8962AF_MAX_REG,
189 EXPORT_SYMBOL_NS_GPL(fxls8962af_spi_regmap_conf, IIO_FXLS8962AF);
198 enum fxls8962af_int_pin {
203 static int fxls8962af_power_on(struct fxls8962af_data *data)
205 struct device *dev = regmap_get_device(data->regmap);
208 ret = pm_runtime_resume_and_get(dev);
210 dev_err(dev, "failed to power on\n");
215 static int fxls8962af_power_off(struct fxls8962af_data *data)
217 struct device *dev = regmap_get_device(data->regmap);
220 pm_runtime_mark_last_busy(dev);
221 ret = pm_runtime_put_autosuspend(dev);
223 dev_err(dev, "failed to power off\n");
228 static int fxls8962af_standby(struct fxls8962af_data *data)
230 return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
231 FXLS8962AF_SENS_CONFIG1_ACTIVE, 0);
234 static int fxls8962af_active(struct fxls8962af_data *data)
236 return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
237 FXLS8962AF_SENS_CONFIG1_ACTIVE, 1);
240 static int fxls8962af_is_active(struct fxls8962af_data *data)
245 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, ®);
249 return reg & FXLS8962AF_SENS_CONFIG1_ACTIVE;
252 static int fxls8962af_get_out(struct fxls8962af_data *data,
253 struct iio_chan_spec const *chan, int *val)
255 struct device *dev = regmap_get_device(data->regmap);
260 is_active = fxls8962af_is_active(data);
262 ret = fxls8962af_power_on(data);
267 ret = regmap_bulk_read(data->regmap, chan->address,
268 &raw_val, sizeof(data->lower_thres));
271 fxls8962af_power_off(data);
274 dev_err(dev, "failed to get out reg 0x%lx\n", chan->address);
278 *val = sign_extend32(le16_to_cpu(raw_val),
279 chan->scan_type.realbits - 1);
284 static int fxls8962af_read_avail(struct iio_dev *indio_dev,
285 struct iio_chan_spec const *chan,
286 const int **vals, int *type, int *length,
290 case IIO_CHAN_INFO_SCALE:
291 *type = IIO_VAL_INT_PLUS_NANO;
292 *vals = (int *)fxls8962af_scale_table;
293 *length = ARRAY_SIZE(fxls8962af_scale_table) * 2;
294 return IIO_AVAIL_LIST;
295 case IIO_CHAN_INFO_SAMP_FREQ:
296 *type = IIO_VAL_INT_PLUS_MICRO;
297 *vals = (int *)fxls8962af_samp_freq_table;
298 *length = ARRAY_SIZE(fxls8962af_samp_freq_table) * 2;
299 return IIO_AVAIL_LIST;
305 static int fxls8962af_write_raw_get_fmt(struct iio_dev *indio_dev,
306 struct iio_chan_spec const *chan,
310 case IIO_CHAN_INFO_SCALE:
311 return IIO_VAL_INT_PLUS_NANO;
312 case IIO_CHAN_INFO_SAMP_FREQ:
313 return IIO_VAL_INT_PLUS_MICRO;
315 return IIO_VAL_INT_PLUS_NANO;
319 static int fxls8962af_update_config(struct fxls8962af_data *data, u8 reg,
325 is_active = fxls8962af_is_active(data);
327 ret = fxls8962af_standby(data);
332 ret = regmap_update_bits(data->regmap, reg, mask, val);
337 ret = fxls8962af_active(data);
345 static int fxls8962af_set_full_scale(struct fxls8962af_data *data, u32 scale)
349 for (i = 0; i < ARRAY_SIZE(fxls8962af_scale_table); i++)
350 if (scale == fxls8962af_scale_table[i][1])
353 if (i == ARRAY_SIZE(fxls8962af_scale_table))
356 return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG1,
357 FXLS8962AF_SC1_FSR_MASK,
358 FXLS8962AF_SC1_FSR_PREP(i));
361 static unsigned int fxls8962af_read_full_scale(struct fxls8962af_data *data,
368 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, ®);
372 range_idx = FXLS8962AF_SC1_FSR_GET(reg);
374 *val = fxls8962af_scale_table[range_idx][1];
376 return IIO_VAL_INT_PLUS_NANO;
379 static int fxls8962af_set_samp_freq(struct fxls8962af_data *data, u32 val,
384 for (i = 0; i < ARRAY_SIZE(fxls8962af_samp_freq_table); i++)
385 if (val == fxls8962af_samp_freq_table[i][0] &&
386 val2 == fxls8962af_samp_freq_table[i][1])
389 if (i == ARRAY_SIZE(fxls8962af_samp_freq_table))
392 return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG3,
393 FXLS8962AF_SC3_WAKE_ODR_MASK,
394 FXLS8962AF_SC3_WAKE_ODR_PREP(i));
397 static unsigned int fxls8962af_read_samp_freq(struct fxls8962af_data *data,
404 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG3, ®);
408 range_idx = FXLS8962AF_SC3_WAKE_ODR_GET(reg);
410 *val = fxls8962af_samp_freq_table[range_idx][0];
411 *val2 = fxls8962af_samp_freq_table[range_idx][1];
413 return IIO_VAL_INT_PLUS_MICRO;
416 static int fxls8962af_read_raw(struct iio_dev *indio_dev,
417 struct iio_chan_spec const *chan,
418 int *val, int *val2, long mask)
420 struct fxls8962af_data *data = iio_priv(indio_dev);
423 case IIO_CHAN_INFO_RAW:
424 switch (chan->type) {
427 return fxls8962af_get_out(data, chan, val);
431 case IIO_CHAN_INFO_OFFSET:
432 if (chan->type != IIO_TEMP)
435 *val = FXLS8962AF_TEMP_CENTER_VAL;
437 case IIO_CHAN_INFO_SCALE:
439 return fxls8962af_read_full_scale(data, val2);
440 case IIO_CHAN_INFO_SAMP_FREQ:
441 return fxls8962af_read_samp_freq(data, val, val2);
447 static int fxls8962af_write_raw(struct iio_dev *indio_dev,
448 struct iio_chan_spec const *chan,
449 int val, int val2, long mask)
451 struct fxls8962af_data *data = iio_priv(indio_dev);
455 case IIO_CHAN_INFO_SCALE:
459 ret = iio_device_claim_direct_mode(indio_dev);
463 ret = fxls8962af_set_full_scale(data, val2);
465 iio_device_release_direct_mode(indio_dev);
467 case IIO_CHAN_INFO_SAMP_FREQ:
468 ret = iio_device_claim_direct_mode(indio_dev);
472 ret = fxls8962af_set_samp_freq(data, val, val2);
474 iio_device_release_direct_mode(indio_dev);
481 static int fxls8962af_event_setup(struct fxls8962af_data *data, int state)
483 /* Enable wakeup interrupt */
484 int mask = FXLS8962AF_INT_EN_SDCD_OT_EN;
485 int value = state ? mask : 0;
487 return regmap_update_bits(data->regmap, FXLS8962AF_INT_EN, mask, value);
490 static int fxls8962af_set_watermark(struct iio_dev *indio_dev, unsigned val)
492 struct fxls8962af_data *data = iio_priv(indio_dev);
494 if (val > FXLS8962AF_FIFO_LENGTH)
495 val = FXLS8962AF_FIFO_LENGTH;
497 data->watermark = val;
502 static int __fxls8962af_set_thresholds(struct fxls8962af_data *data,
503 const struct iio_chan_spec *chan,
504 enum iio_event_direction dir,
508 case IIO_EV_DIR_FALLING:
509 data->lower_thres = val;
510 return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
511 &data->lower_thres, sizeof(data->lower_thres));
512 case IIO_EV_DIR_RISING:
513 data->upper_thres = val;
514 return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
515 &data->upper_thres, sizeof(data->upper_thres));
521 static int fxls8962af_read_event(struct iio_dev *indio_dev,
522 const struct iio_chan_spec *chan,
523 enum iio_event_type type,
524 enum iio_event_direction dir,
525 enum iio_event_info info,
528 struct fxls8962af_data *data = iio_priv(indio_dev);
531 if (type != IIO_EV_TYPE_THRESH)
535 case IIO_EV_DIR_FALLING:
536 ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
537 &data->lower_thres, sizeof(data->lower_thres));
541 *val = sign_extend32(data->lower_thres, chan->scan_type.realbits - 1);
543 case IIO_EV_DIR_RISING:
544 ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
545 &data->upper_thres, sizeof(data->upper_thres));
549 *val = sign_extend32(data->upper_thres, chan->scan_type.realbits - 1);
556 static int fxls8962af_write_event(struct iio_dev *indio_dev,
557 const struct iio_chan_spec *chan,
558 enum iio_event_type type,
559 enum iio_event_direction dir,
560 enum iio_event_info info,
563 struct fxls8962af_data *data = iio_priv(indio_dev);
566 if (type != IIO_EV_TYPE_THRESH)
569 if (val < -2048 || val > 2047)
572 if (data->enable_event)
575 val_masked = val & GENMASK(11, 0);
576 if (fxls8962af_is_active(data)) {
577 ret = fxls8962af_standby(data);
581 ret = __fxls8962af_set_thresholds(data, chan, dir, val_masked);
585 return fxls8962af_active(data);
587 return __fxls8962af_set_thresholds(data, chan, dir, val_masked);
592 fxls8962af_read_event_config(struct iio_dev *indio_dev,
593 const struct iio_chan_spec *chan,
594 enum iio_event_type type,
595 enum iio_event_direction dir)
597 struct fxls8962af_data *data = iio_priv(indio_dev);
599 if (type != IIO_EV_TYPE_THRESH)
602 switch (chan->channel2) {
604 return !!(FXLS8962AF_SDCD_CONFIG1_X_OT_EN & data->enable_event);
606 return !!(FXLS8962AF_SDCD_CONFIG1_Y_OT_EN & data->enable_event);
608 return !!(FXLS8962AF_SDCD_CONFIG1_Z_OT_EN & data->enable_event);
615 fxls8962af_write_event_config(struct iio_dev *indio_dev,
616 const struct iio_chan_spec *chan,
617 enum iio_event_type type,
618 enum iio_event_direction dir, int state)
620 struct fxls8962af_data *data = iio_priv(indio_dev);
621 u8 enable_event, enable_bits;
624 if (type != IIO_EV_TYPE_THRESH)
627 switch (chan->channel2) {
629 enable_bits = FXLS8962AF_SDCD_CONFIG1_X_OT_EN;
632 enable_bits = FXLS8962AF_SDCD_CONFIG1_Y_OT_EN;
635 enable_bits = FXLS8962AF_SDCD_CONFIG1_Z_OT_EN;
642 enable_event = data->enable_event | enable_bits;
644 enable_event = data->enable_event & ~enable_bits;
646 if (data->enable_event == enable_event)
649 ret = fxls8962af_standby(data);
654 value = enable_event | FXLS8962AF_SDCD_CONFIG1_OT_ELE;
655 ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG1, value);
660 * Enable update of SDCD_REF_X/Y/Z values with the current decimated and
661 * trimmed X/Y/Z acceleration input data. This allows for acceleration
662 * slope detection with Data(n) to Data(n–1) always used as the input
663 * to the window comparator.
665 value = enable_event ?
666 FXLS8962AF_SDCD_CONFIG2_SDCD_EN | FXLS8962AF_SC2_REF_UPDM_AC :
668 ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG2, value);
672 ret = fxls8962af_event_setup(data, state);
676 data->enable_event = enable_event;
678 if (data->enable_event) {
679 fxls8962af_active(data);
680 ret = fxls8962af_power_on(data);
682 ret = iio_device_claim_direct_mode(indio_dev);
686 /* Not in buffered mode so disable power */
687 ret = fxls8962af_power_off(data);
689 iio_device_release_direct_mode(indio_dev);
695 static const struct iio_event_spec fxls8962af_event[] = {
697 .type = IIO_EV_TYPE_THRESH,
698 .dir = IIO_EV_DIR_EITHER,
699 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
702 .type = IIO_EV_TYPE_THRESH,
703 .dir = IIO_EV_DIR_FALLING,
704 .mask_separate = BIT(IIO_EV_INFO_VALUE),
707 .type = IIO_EV_TYPE_THRESH,
708 .dir = IIO_EV_DIR_RISING,
709 .mask_separate = BIT(IIO_EV_INFO_VALUE),
713 #define FXLS8962AF_CHANNEL(axis, reg, idx) { \
717 .channel2 = IIO_MOD_##axis, \
718 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
719 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
720 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
721 .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \
722 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
729 .endianness = IIO_BE, \
731 .event_spec = fxls8962af_event, \
732 .num_event_specs = ARRAY_SIZE(fxls8962af_event), \
735 #define FXLS8962AF_TEMP_CHANNEL { \
737 .address = FXLS8962AF_TEMP_OUT, \
738 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
739 BIT(IIO_CHAN_INFO_OFFSET),\
747 static const struct iio_chan_spec fxls8962af_channels[] = {
748 FXLS8962AF_CHANNEL(X, FXLS8962AF_OUT_X_LSB, fxls8962af_idx_x),
749 FXLS8962AF_CHANNEL(Y, FXLS8962AF_OUT_Y_LSB, fxls8962af_idx_y),
750 FXLS8962AF_CHANNEL(Z, FXLS8962AF_OUT_Z_LSB, fxls8962af_idx_z),
751 IIO_CHAN_SOFT_TIMESTAMP(fxls8962af_idx_ts),
752 FXLS8962AF_TEMP_CHANNEL,
755 static const struct fxls8962af_chip_info fxls_chip_info_table[] = {
757 .chip_id = FXLS8962AF_DEVICE_ID,
758 .name = "fxls8962af",
759 .channels = fxls8962af_channels,
760 .num_channels = ARRAY_SIZE(fxls8962af_channels),
763 .chip_id = FXLS8964AF_DEVICE_ID,
764 .name = "fxls8964af",
765 .channels = fxls8962af_channels,
766 .num_channels = ARRAY_SIZE(fxls8962af_channels),
770 static const struct iio_info fxls8962af_info = {
771 .read_raw = &fxls8962af_read_raw,
772 .write_raw = &fxls8962af_write_raw,
773 .write_raw_get_fmt = fxls8962af_write_raw_get_fmt,
774 .read_event_value = fxls8962af_read_event,
775 .write_event_value = fxls8962af_write_event,
776 .read_event_config = fxls8962af_read_event_config,
777 .write_event_config = fxls8962af_write_event_config,
778 .read_avail = fxls8962af_read_avail,
779 .hwfifo_set_watermark = fxls8962af_set_watermark,
782 static int fxls8962af_reset(struct fxls8962af_data *data)
784 struct device *dev = regmap_get_device(data->regmap);
788 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
789 FXLS8962AF_SENS_CONFIG1_RST,
790 FXLS8962AF_SENS_CONFIG1_RST);
794 /* TBOOT1, TBOOT2, specifies we have to wait between 1 - 17.7ms */
795 ret = regmap_read_poll_timeout(data->regmap, FXLS8962AF_INT_STATUS, reg,
796 (reg & FXLS8962AF_INT_STATUS_SRC_BOOT),
798 if (ret == -ETIMEDOUT)
799 dev_err(dev, "reset timeout, int_status = 0x%x\n", reg);
804 static int __fxls8962af_fifo_set_mode(struct fxls8962af_data *data, bool onoff)
808 /* Enable watermark at max fifo size */
809 ret = regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG2,
810 FXLS8962AF_BUF_CONFIG2_BUF_WMRK,
815 return regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG1,
816 FXLS8962AF_BC1_BUF_MODE_MASK,
817 FXLS8962AF_BC1_BUF_MODE_PREP(onoff));
820 static int fxls8962af_buffer_preenable(struct iio_dev *indio_dev)
822 return fxls8962af_power_on(iio_priv(indio_dev));
825 static int fxls8962af_buffer_postenable(struct iio_dev *indio_dev)
827 struct fxls8962af_data *data = iio_priv(indio_dev);
830 fxls8962af_standby(data);
832 /* Enable buffer interrupt */
833 ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
834 FXLS8962AF_INT_EN_BUF_EN,
835 FXLS8962AF_INT_EN_BUF_EN);
839 ret = __fxls8962af_fifo_set_mode(data, true);
841 fxls8962af_active(data);
846 static int fxls8962af_buffer_predisable(struct iio_dev *indio_dev)
848 struct fxls8962af_data *data = iio_priv(indio_dev);
851 fxls8962af_standby(data);
853 /* Disable buffer interrupt */
854 ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
855 FXLS8962AF_INT_EN_BUF_EN, 0);
859 ret = __fxls8962af_fifo_set_mode(data, false);
861 if (data->enable_event)
862 fxls8962af_active(data);
867 static int fxls8962af_buffer_postdisable(struct iio_dev *indio_dev)
869 struct fxls8962af_data *data = iio_priv(indio_dev);
871 if (!data->enable_event)
872 fxls8962af_power_off(data);
877 static const struct iio_buffer_setup_ops fxls8962af_buffer_ops = {
878 .preenable = fxls8962af_buffer_preenable,
879 .postenable = fxls8962af_buffer_postenable,
880 .predisable = fxls8962af_buffer_predisable,
881 .postdisable = fxls8962af_buffer_postdisable,
884 static int fxls8962af_i2c_raw_read_errata3(struct fxls8962af_data *data,
885 u16 *buffer, int samples,
890 for (i = 0; i < samples; i++) {
891 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB,
892 &buffer[i * 3], sample_length);
900 static int fxls8962af_fifo_transfer(struct fxls8962af_data *data,
901 u16 *buffer, int samples)
903 struct device *dev = regmap_get_device(data->regmap);
904 int sample_length = 3 * sizeof(*buffer);
905 int total_length = samples * sample_length;
908 if (i2c_verify_client(dev))
911 * E3: FIFO burst read operation error using I2C interface
912 * We have to avoid burst reads on I2C..
914 ret = fxls8962af_i2c_raw_read_errata3(data, buffer, samples,
917 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB, buffer,
921 dev_err(dev, "Error transferring data from fifo: %d\n", ret);
926 static int fxls8962af_fifo_flush(struct iio_dev *indio_dev)
928 struct fxls8962af_data *data = iio_priv(indio_dev);
929 struct device *dev = regmap_get_device(data->regmap);
930 u16 buffer[FXLS8962AF_FIFO_LENGTH * 3];
931 uint64_t sample_period;
937 ret = regmap_read(data->regmap, FXLS8962AF_BUF_STATUS, ®);
941 if (reg & FXLS8962AF_BUF_STATUS_BUF_OVF) {
942 dev_err(dev, "Buffer overflow");
946 count = reg & FXLS8962AF_BUF_STATUS_BUF_CNT;
950 data->old_timestamp = data->timestamp;
951 data->timestamp = iio_get_time_ns(indio_dev);
954 * Approximate timestamps for each of the sample based on the sampling,
955 * frequency, timestamp for last sample and number of samples.
957 sample_period = (data->timestamp - data->old_timestamp);
958 do_div(sample_period, count);
959 tstamp = data->timestamp - (count - 1) * sample_period;
961 ret = fxls8962af_fifo_transfer(data, buffer, count);
965 /* Demux hw FIFO into kfifo. */
966 for (i = 0; i < count; i++) {
970 for_each_set_bit(bit, indio_dev->active_scan_mask,
971 indio_dev->masklength) {
972 memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],
973 sizeof(data->scan.channels[0]));
976 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
979 tstamp += sample_period;
985 static int fxls8962af_event_interrupt(struct iio_dev *indio_dev)
987 struct fxls8962af_data *data = iio_priv(indio_dev);
988 s64 ts = iio_get_time_ns(indio_dev);
993 ret = regmap_read(data->regmap, FXLS8962AF_SDCD_INT_SRC1, ®);
997 if (reg & FXLS8962AF_SDCD_INT_SRC1_X_OT) {
998 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_X_POL ?
999 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1000 iio_push_event(indio_dev,
1001 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1002 IIO_EV_TYPE_THRESH, ev_code), ts);
1005 if (reg & FXLS8962AF_SDCD_INT_SRC1_Y_OT) {
1006 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Y_POL ?
1007 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1008 iio_push_event(indio_dev,
1009 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1010 IIO_EV_TYPE_THRESH, ev_code), ts);
1013 if (reg & FXLS8962AF_SDCD_INT_SRC1_Z_OT) {
1014 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Z_POL ?
1015 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1016 iio_push_event(indio_dev,
1017 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1018 IIO_EV_TYPE_THRESH, ev_code), ts);
1024 static irqreturn_t fxls8962af_interrupt(int irq, void *p)
1026 struct iio_dev *indio_dev = p;
1027 struct fxls8962af_data *data = iio_priv(indio_dev);
1031 ret = regmap_read(data->regmap, FXLS8962AF_INT_STATUS, ®);
1035 if (reg & FXLS8962AF_INT_STATUS_SRC_BUF) {
1036 ret = fxls8962af_fifo_flush(indio_dev);
1043 if (reg & FXLS8962AF_INT_STATUS_SRC_SDCD_OT) {
1044 ret = fxls8962af_event_interrupt(indio_dev);
1054 static void fxls8962af_regulator_disable(void *data_ptr)
1056 struct fxls8962af_data *data = data_ptr;
1058 regulator_disable(data->vdd_reg);
1061 static void fxls8962af_pm_disable(void *dev_ptr)
1063 struct device *dev = dev_ptr;
1064 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1066 pm_runtime_disable(dev);
1067 pm_runtime_set_suspended(dev);
1068 pm_runtime_put_noidle(dev);
1070 fxls8962af_standby(iio_priv(indio_dev));
1073 static void fxls8962af_get_irq(struct device_node *of_node,
1074 enum fxls8962af_int_pin *pin)
1078 irq = of_irq_get_byname(of_node, "INT2");
1080 *pin = FXLS8962AF_PIN_INT2;
1084 *pin = FXLS8962AF_PIN_INT1;
1087 static int fxls8962af_irq_setup(struct iio_dev *indio_dev, int irq)
1089 struct fxls8962af_data *data = iio_priv(indio_dev);
1090 struct device *dev = regmap_get_device(data->regmap);
1091 unsigned long irq_type;
1092 bool irq_active_high;
1093 enum fxls8962af_int_pin int_pin;
1097 fxls8962af_get_irq(dev->of_node, &int_pin);
1099 case FXLS8962AF_PIN_INT1:
1100 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT1;
1102 case FXLS8962AF_PIN_INT2:
1103 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT2;
1106 dev_err(dev, "unsupported int pin selected\n");
1110 ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_PIN_SEL,
1111 FXLS8962AF_INT_PIN_SEL_MASK, int_pin_sel);
1115 irq_type = irqd_get_trigger_type(irq_get_irq_data(irq));
1118 case IRQF_TRIGGER_HIGH:
1119 case IRQF_TRIGGER_RISING:
1120 irq_active_high = true;
1122 case IRQF_TRIGGER_LOW:
1123 case IRQF_TRIGGER_FALLING:
1124 irq_active_high = false;
1127 dev_info(dev, "mode %lx unsupported\n", irq_type);
1131 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
1132 FXLS8962AF_SC4_INT_POL_MASK,
1133 FXLS8962AF_SC4_INT_POL_PREP(irq_active_high));
1137 if (device_property_read_bool(dev, "drive-open-drain")) {
1138 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
1139 FXLS8962AF_SC4_INT_PP_OD_MASK,
1140 FXLS8962AF_SC4_INT_PP_OD_PREP(1));
1144 irq_type |= IRQF_SHARED;
1147 return devm_request_threaded_irq(dev,
1149 NULL, fxls8962af_interrupt,
1150 irq_type | IRQF_ONESHOT,
1151 indio_dev->name, indio_dev);
1154 int fxls8962af_core_probe(struct device *dev, struct regmap *regmap, int irq)
1156 struct fxls8962af_data *data;
1157 struct iio_dev *indio_dev;
1161 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1165 data = iio_priv(indio_dev);
1166 dev_set_drvdata(dev, indio_dev);
1167 data->regmap = regmap;
1170 ret = iio_read_mount_matrix(dev, &data->orientation);
1174 data->vdd_reg = devm_regulator_get(dev, "vdd");
1175 if (IS_ERR(data->vdd_reg))
1176 return dev_err_probe(dev, PTR_ERR(data->vdd_reg),
1177 "Failed to get vdd regulator\n");
1179 ret = regulator_enable(data->vdd_reg);
1181 dev_err(dev, "Failed to enable vdd regulator: %d\n", ret);
1185 ret = devm_add_action_or_reset(dev, fxls8962af_regulator_disable, data);
1189 ret = regmap_read(data->regmap, FXLS8962AF_WHO_AM_I, ®);
1193 for (i = 0; i < ARRAY_SIZE(fxls_chip_info_table); i++) {
1194 if (fxls_chip_info_table[i].chip_id == reg) {
1195 data->chip_info = &fxls_chip_info_table[i];
1199 if (i == ARRAY_SIZE(fxls_chip_info_table)) {
1200 dev_err(dev, "failed to match device in table\n");
1204 indio_dev->channels = data->chip_info->channels;
1205 indio_dev->num_channels = data->chip_info->num_channels;
1206 indio_dev->name = data->chip_info->name;
1207 indio_dev->info = &fxls8962af_info;
1208 indio_dev->modes = INDIO_DIRECT_MODE;
1210 ret = fxls8962af_reset(data);
1215 ret = fxls8962af_irq_setup(indio_dev, irq);
1219 ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
1220 &fxls8962af_buffer_ops);
1225 ret = pm_runtime_set_active(dev);
1229 pm_runtime_enable(dev);
1230 pm_runtime_set_autosuspend_delay(dev, FXLS8962AF_AUTO_SUSPEND_DELAY_MS);
1231 pm_runtime_use_autosuspend(dev);
1233 ret = devm_add_action_or_reset(dev, fxls8962af_pm_disable, dev);
1237 if (device_property_read_bool(dev, "wakeup-source"))
1238 device_init_wakeup(dev, true);
1240 return devm_iio_device_register(dev, indio_dev);
1242 EXPORT_SYMBOL_NS_GPL(fxls8962af_core_probe, IIO_FXLS8962AF);
1244 static int __maybe_unused fxls8962af_runtime_suspend(struct device *dev)
1246 struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
1249 ret = fxls8962af_standby(data);
1251 dev_err(dev, "powering off device failed\n");
1258 static int __maybe_unused fxls8962af_runtime_resume(struct device *dev)
1260 struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
1262 return fxls8962af_active(data);
1265 static int __maybe_unused fxls8962af_suspend(struct device *dev)
1267 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1268 struct fxls8962af_data *data = iio_priv(indio_dev);
1270 if (device_may_wakeup(dev) && data->enable_event) {
1271 enable_irq_wake(data->irq);
1274 * Disable buffer, as the buffer is so small the device will wake
1275 * almost immediately.
1277 if (iio_buffer_enabled(indio_dev))
1278 fxls8962af_buffer_predisable(indio_dev);
1280 fxls8962af_runtime_suspend(dev);
1286 static int __maybe_unused fxls8962af_resume(struct device *dev)
1288 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1289 struct fxls8962af_data *data = iio_priv(indio_dev);
1291 if (device_may_wakeup(dev) && data->enable_event) {
1292 disable_irq_wake(data->irq);
1294 if (iio_buffer_enabled(indio_dev))
1295 fxls8962af_buffer_postenable(indio_dev);
1297 fxls8962af_runtime_resume(dev);
1303 const struct dev_pm_ops fxls8962af_pm_ops = {
1304 SET_SYSTEM_SLEEP_PM_OPS(fxls8962af_suspend, fxls8962af_resume)
1305 SET_RUNTIME_PM_OPS(fxls8962af_runtime_suspend,
1306 fxls8962af_runtime_resume, NULL)
1308 EXPORT_SYMBOL_NS_GPL(fxls8962af_pm_ops, IIO_FXLS8962AF);
1310 MODULE_AUTHOR("Sean Nyekjaer <sean@geanix.com>");
1311 MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer driver");
1312 MODULE_LICENSE("GPL v2");