drivers/iio/accel/fxls8962af-core.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * NXP FXLS8962AF/FXLS8964AF Accelerometer Core Driver
   4  *
   5  * Copyright 2021 Connected Cars A/S
   6  *
   7  * Datasheet:
   8  * https://www.nxp.com/docs/en/data-sheet/FXLS8962AF.pdf
   9  * https://www.nxp.com/docs/en/data-sheet/FXLS8964AF.pdf
  10  *
  11  * Errata:
  12  * https://www.nxp.com/docs/en/errata/ES_FXLS8962AF.pdf
  13  */
  14
  15 #include <linux/bits.h>
  16 #include <linux/bitfield.h>
  17 #include <linux/i2c.h>
  18 #include <linux/module.h>
  19 #include <linux/of_irq.h>
  20 #include <linux/pm_runtime.h>
  21 #include <linux/regulator/consumer.h>
  22 #include <linux/regmap.h>
  23
  24 #include <linux/iio/buffer.h>
  25 #include <linux/iio/iio.h>
  26 #include <linux/iio/kfifo_buf.h>
  27 #include <linux/iio/sysfs.h>
  28
  29 #include "fxls8962af.h"
  30
  31 #define FXLS8962AF_INT_STATUS                   0x00
  32 #define FXLS8962AF_INT_STATUS_SRC_BOOT          BIT(0)
  33 #define FXLS8962AF_INT_STATUS_SRC_BUF           BIT(5)
  34 #define FXLS8962AF_INT_STATUS_SRC_DRDY          BIT(7)
  35 #define FXLS8962AF_TEMP_OUT                     0x01
  36 #define FXLS8962AF_VECM_LSB                     0x02
  37 #define FXLS8962AF_OUT_X_LSB                    0x04
  38 #define FXLS8962AF_OUT_Y_LSB                    0x06
  39 #define FXLS8962AF_OUT_Z_LSB                    0x08
  40 #define FXLS8962AF_BUF_STATUS                   0x0b
  41 #define FXLS8962AF_BUF_STATUS_BUF_CNT           GENMASK(5, 0)
  42 #define FXLS8962AF_BUF_STATUS_BUF_OVF           BIT(6)
  43 #define FXLS8962AF_BUF_STATUS_BUF_WMRK          BIT(7)
  44 #define FXLS8962AF_BUF_X_LSB                    0x0c
  45 #define FXLS8962AF_BUF_Y_LSB                    0x0e
  46 #define FXLS8962AF_BUF_Z_LSB                    0x10
  47
  48 #define FXLS8962AF_PROD_REV                     0x12
  49 #define FXLS8962AF_WHO_AM_I                     0x13
  50
  51 #define FXLS8962AF_SYS_MODE                     0x14
  52 #define FXLS8962AF_SENS_CONFIG1                 0x15
  53 #define FXLS8962AF_SENS_CONFIG1_ACTIVE          BIT(0)
  54 #define FXLS8962AF_SENS_CONFIG1_RST             BIT(7)
  55 #define FXLS8962AF_SC1_FSR_MASK                 GENMASK(2, 1)
  56 #define FXLS8962AF_SC1_FSR_PREP(x)              FIELD_PREP(FXLS8962AF_SC1_FSR_MASK, (x))
  57 #define FXLS8962AF_SC1_FSR_GET(x)               FIELD_GET(FXLS8962AF_SC1_FSR_MASK, (x))
  58
  59 #define FXLS8962AF_SENS_CONFIG2                 0x16
  60 #define FXLS8962AF_SENS_CONFIG3                 0x17
  61 #define FXLS8962AF_SC3_WAKE_ODR_MASK            GENMASK(7, 4)
  62 #define FXLS8962AF_SC3_WAKE_ODR_PREP(x)         FIELD_PREP(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
  63 #define FXLS8962AF_SC3_WAKE_ODR_GET(x)          FIELD_GET(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
  64 #define FXLS8962AF_SENS_CONFIG4                 0x18
  65 #define FXLS8962AF_SC4_INT_PP_OD_MASK           BIT(1)
  66 #define FXLS8962AF_SC4_INT_PP_OD_PREP(x)        FIELD_PREP(FXLS8962AF_SC4_INT_PP_OD_MASK, (x))
  67 #define FXLS8962AF_SC4_INT_POL_MASK             BIT(0)
  68 #define FXLS8962AF_SC4_INT_POL_PREP(x)          FIELD_PREP(FXLS8962AF_SC4_INT_POL_MASK, (x))
  69 #define FXLS8962AF_SENS_CONFIG5                 0x19
  70
  71 #define FXLS8962AF_WAKE_IDLE_LSB                0x1b
  72 #define FXLS8962AF_SLEEP_IDLE_LSB               0x1c
  73 #define FXLS8962AF_ASLP_COUNT_LSB               0x1e
  74
  75 #define FXLS8962AF_INT_EN                       0x20
  76 #define FXLS8962AF_INT_EN_BUF_EN                BIT(6)
  77 #define FXLS8962AF_INT_PIN_SEL                  0x21
  78 #define FXLS8962AF_INT_PIN_SEL_MASK             GENMASK(7, 0)
  79 #define FXLS8962AF_INT_PIN_SEL_INT1             0x00
  80 #define FXLS8962AF_INT_PIN_SEL_INT2             GENMASK(7, 0)
  81
  82 #define FXLS8962AF_OFF_X                        0x22
  83 #define FXLS8962AF_OFF_Y                        0x23
  84 #define FXLS8962AF_OFF_Z                        0x24
  85
  86 #define FXLS8962AF_BUF_CONFIG1                  0x26
  87 #define FXLS8962AF_BC1_BUF_MODE_MASK            GENMASK(6, 5)
  88 #define FXLS8962AF_BC1_BUF_MODE_PREP(x)         FIELD_PREP(FXLS8962AF_BC1_BUF_MODE_MASK, (x))
  89 #define FXLS8962AF_BUF_CONFIG2                  0x27
  90 #define FXLS8962AF_BUF_CONFIG2_BUF_WMRK         GENMASK(5, 0)
  91
  92 #define FXLS8962AF_ORIENT_STATUS                0x28
  93 #define FXLS8962AF_ORIENT_CONFIG                0x29
  94 #define FXLS8962AF_ORIENT_DBCOUNT               0x2a
  95 #define FXLS8962AF_ORIENT_BF_ZCOMP              0x2b
  96 #define FXLS8962AF_ORIENT_THS_REG               0x2c
  97
  98 #define FXLS8962AF_SDCD_INT_SRC1                0x2d
  99 #define FXLS8962AF_SDCD_INT_SRC2                0x2e
 100 #define FXLS8962AF_SDCD_CONFIG1                 0x2f
 101 #define FXLS8962AF_SDCD_CONFIG2                 0x30
 102 #define FXLS8962AF_SDCD_OT_DBCNT                0x31
 103 #define FXLS8962AF_SDCD_WT_DBCNT                0x32
 104 #define FXLS8962AF_SDCD_LTHS_LSB                0x33
 105 #define FXLS8962AF_SDCD_UTHS_LSB                0x35
 106
 107 #define FXLS8962AF_SELF_TEST_CONFIG1            0x37
 108 #define FXLS8962AF_SELF_TEST_CONFIG2            0x38
 109
 110 #define FXLS8962AF_MAX_REG                      0x38
 111
 112 #define FXLS8962AF_DEVICE_ID                    0x62
 113 #define FXLS8964AF_DEVICE_ID                    0x84
 114
 115 /* Raw temp channel offset */
 116 #define FXLS8962AF_TEMP_CENTER_VAL              25
 117
 118 #define FXLS8962AF_AUTO_SUSPEND_DELAY_MS        2000
 119
 120 #define FXLS8962AF_FIFO_LENGTH                  32
 121 #define FXLS8962AF_SCALE_TABLE_LEN              4
 122 #define FXLS8962AF_SAMP_FREQ_TABLE_LEN          13
 123
 124 static const int fxls8962af_scale_table[FXLS8962AF_SCALE_TABLE_LEN][2] = {
 125         {0, IIO_G_TO_M_S_2(980000)},
 126         {0, IIO_G_TO_M_S_2(1950000)},
 127         {0, IIO_G_TO_M_S_2(3910000)},
 128         {0, IIO_G_TO_M_S_2(7810000)},
 129 };
 130
 131 static const int fxls8962af_samp_freq_table[FXLS8962AF_SAMP_FREQ_TABLE_LEN][2] = {
 132         {3200, 0}, {1600, 0}, {800, 0}, {400, 0}, {200, 0}, {100, 0},
 133         {50, 0}, {25, 0}, {12, 500000}, {6, 250000}, {3, 125000},
 134         {1, 563000}, {0, 781000},
 135 };
 136
 137 struct fxls8962af_chip_info {
 138         const char *name;
 139         const struct iio_chan_spec *channels;
 140         int num_channels;
 141         u8 chip_id;
 142 };
 143
 144 struct fxls8962af_data {
 145         struct regmap *regmap;
 146         const struct fxls8962af_chip_info *chip_info;
 147         struct regulator *vdd_reg;
 148         struct {
 149                 __le16 channels[3];
 150                 s64 ts __aligned(8);
 151         } scan;
 152         int64_t timestamp, old_timestamp;       /* Only used in hw fifo mode. */
 153         struct iio_mount_matrix orientation;
 154         u8 watermark;
 155 };
 156
 157 const struct regmap_config fxls8962af_i2c_regmap_conf = {
 158         .reg_bits = 8,
 159         .val_bits = 8,
 160         .max_register = FXLS8962AF_MAX_REG,
 161 };
 162 EXPORT_SYMBOL_GPL(fxls8962af_i2c_regmap_conf);
 163
 164 const struct regmap_config fxls8962af_spi_regmap_conf = {
 165         .reg_bits = 8,
 166         .pad_bits = 8,
 167         .val_bits = 8,
 168         .max_register = FXLS8962AF_MAX_REG,
 169 };
 170 EXPORT_SYMBOL_GPL(fxls8962af_spi_regmap_conf);
 171
 172 enum {
 173         fxls8962af_idx_x,
 174         fxls8962af_idx_y,
 175         fxls8962af_idx_z,
 176         fxls8962af_idx_ts,
 177 };
 178
 179 enum fxls8962af_int_pin {
 180         FXLS8962AF_PIN_INT1,
 181         FXLS8962AF_PIN_INT2,
 182 };
 183
 184 static int fxls8962af_power_on(struct fxls8962af_data *data)
 185 {
 186         struct device *dev = regmap_get_device(data->regmap);
 187         int ret;
 188
 189         ret = pm_runtime_resume_and_get(dev);
 190         if (ret)
 191                 dev_err(dev, "failed to power on\n");
 192
 193         return ret;
 194 }
 195
 196 static int fxls8962af_power_off(struct fxls8962af_data *data)
 197 {
 198         struct device *dev = regmap_get_device(data->regmap);
 199         int ret;
 200
 201         pm_runtime_mark_last_busy(dev);
 202         ret = pm_runtime_put_autosuspend(dev);
 203         if (ret)
 204                 dev_err(dev, "failed to power off\n");
 205
 206         return ret;
 207 }
 208
 209 static int fxls8962af_standby(struct fxls8962af_data *data)
 210 {
 211         return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
 212                                   FXLS8962AF_SENS_CONFIG1_ACTIVE, 0);
 213 }
 214
 215 static int fxls8962af_active(struct fxls8962af_data *data)
 216 {
 217         return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
 218                                   FXLS8962AF_SENS_CONFIG1_ACTIVE, 1);
 219 }
 220
 221 static int fxls8962af_is_active(struct fxls8962af_data *data)
 222 {
 223         unsigned int reg;
 224         int ret;
 225
 226         ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, &reg);
 227         if (ret)
 228                 return ret;
 229
 230         return reg & FXLS8962AF_SENS_CONFIG1_ACTIVE;
 231 }
 232
 233 static int fxls8962af_get_out(struct fxls8962af_data *data,
 234                               struct iio_chan_spec const *chan, int *val)
 235 {
 236         struct device *dev = regmap_get_device(data->regmap);
 237         __le16 raw_val;
 238         int is_active;
 239         int ret;
 240
 241         is_active = fxls8962af_is_active(data);
 242         if (!is_active) {
 243                 ret = fxls8962af_power_on(data);
 244                 if (ret)
 245                         return ret;
 246         }
 247
 248         ret = regmap_bulk_read(data->regmap, chan->address,
 249                                &raw_val, (chan->scan_type.storagebits / 8));
 250
 251         if (!is_active)
 252                 fxls8962af_power_off(data);
 253
 254         if (ret) {
 255                 dev_err(dev, "failed to get out reg 0x%lx\n", chan->address);
 256                 return ret;
 257         }
 258
 259         *val = sign_extend32(le16_to_cpu(raw_val),
 260                              chan->scan_type.realbits - 1);
 261
 262         return IIO_VAL_INT;
 263 }
 264
 265 static int fxls8962af_read_avail(struct iio_dev *indio_dev,
 266                                  struct iio_chan_spec const *chan,
 267                                  const int **vals, int *type, int *length,
 268                                  long mask)
 269 {
 270         switch (mask) {
 271         case IIO_CHAN_INFO_SCALE:
 272                 *type = IIO_VAL_INT_PLUS_NANO;
 273                 *vals = (int *)fxls8962af_scale_table;
 274                 *length = ARRAY_SIZE(fxls8962af_scale_table) * 2;
 275                 return IIO_AVAIL_LIST;
 276         case IIO_CHAN_INFO_SAMP_FREQ:
 277                 *type = IIO_VAL_INT_PLUS_MICRO;
 278                 *vals = (int *)fxls8962af_samp_freq_table;
 279                 *length = ARRAY_SIZE(fxls8962af_samp_freq_table) * 2;
 280                 return IIO_AVAIL_LIST;
 281         default:
 282                 return -EINVAL;
 283         }
 284 }
 285
 286 static int fxls8962af_write_raw_get_fmt(struct iio_dev *indio_dev,
 287                                         struct iio_chan_spec const *chan,
 288                                         long mask)
 289 {
 290         switch (mask) {
 291         case IIO_CHAN_INFO_SCALE:
 292                 return IIO_VAL_INT_PLUS_NANO;
 293         case IIO_CHAN_INFO_SAMP_FREQ:
 294                 return IIO_VAL_INT_PLUS_MICRO;
 295         default:
 296                 return IIO_VAL_INT_PLUS_NANO;
 297         }
 298 }
 299
 300 static int fxls8962af_update_config(struct fxls8962af_data *data, u8 reg,
 301                                     u8 mask, u8 val)
 302 {
 303         int ret;
 304         int is_active;
 305
 306         is_active = fxls8962af_is_active(data);
 307         if (is_active) {
 308                 ret = fxls8962af_standby(data);
 309                 if (ret)
 310                         return ret;
 311         }
 312
 313         ret = regmap_update_bits(data->regmap, reg, mask, val);
 314         if (ret)
 315                 return ret;
 316
 317         if (is_active) {
 318                 ret = fxls8962af_active(data);
 319                 if (ret)
 320                         return ret;
 321         }
 322
 323         return 0;
 324 }
 325
 326 static int fxls8962af_set_full_scale(struct fxls8962af_data *data, u32 scale)
 327 {
 328         int i;
 329
 330         for (i = 0; i < ARRAY_SIZE(fxls8962af_scale_table); i++)
 331                 if (scale == fxls8962af_scale_table[i][1])
 332                         break;
 333
 334         if (i == ARRAY_SIZE(fxls8962af_scale_table))
 335                 return -EINVAL;
 336
 337         return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG1,
 338                                         FXLS8962AF_SC1_FSR_MASK,
 339                                         FXLS8962AF_SC1_FSR_PREP(i));
 340 }
 341
 342 static unsigned int fxls8962af_read_full_scale(struct fxls8962af_data *data,
 343                                                int *val)
 344 {
 345         int ret;
 346         unsigned int reg;
 347         u8 range_idx;
 348
 349         ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, &reg);
 350         if (ret)
 351                 return ret;
 352
 353         range_idx = FXLS8962AF_SC1_FSR_GET(reg);
 354
 355         *val = fxls8962af_scale_table[range_idx][1];
 356
 357         return IIO_VAL_INT_PLUS_NANO;
 358 }
 359
 360 static int fxls8962af_set_samp_freq(struct fxls8962af_data *data, u32 val,
 361                                     u32 val2)
 362 {
 363         int i;
 364
 365         for (i = 0; i < ARRAY_SIZE(fxls8962af_samp_freq_table); i++)
 366                 if (val == fxls8962af_samp_freq_table[i][0] &&
 367                     val2 == fxls8962af_samp_freq_table[i][1])
 368                         break;
 369
 370         if (i == ARRAY_SIZE(fxls8962af_samp_freq_table))
 371                 return -EINVAL;
 372
 373         return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG3,
 374                                         FXLS8962AF_SC3_WAKE_ODR_MASK,
 375                                         FXLS8962AF_SC3_WAKE_ODR_PREP(i));
 376 }
 377
 378 static unsigned int fxls8962af_read_samp_freq(struct fxls8962af_data *data,
 379                                               int *val, int *val2)
 380 {
 381         int ret;
 382         unsigned int reg;
 383         u8 range_idx;
 384
 385         ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG3, &reg);
 386         if (ret)
 387                 return ret;
 388
 389         range_idx = FXLS8962AF_SC3_WAKE_ODR_GET(reg);
 390
 391         *val = fxls8962af_samp_freq_table[range_idx][0];
 392         *val2 = fxls8962af_samp_freq_table[range_idx][1];
 393
 394         return IIO_VAL_INT_PLUS_MICRO;
 395 }
 396
 397 static int fxls8962af_read_raw(struct iio_dev *indio_dev,
 398                                struct iio_chan_spec const *chan,
 399                                int *val, int *val2, long mask)
 400 {
 401         struct fxls8962af_data *data = iio_priv(indio_dev);
 402
 403         switch (mask) {
 404         case IIO_CHAN_INFO_RAW:
 405                 switch (chan->type) {
 406                 case IIO_TEMP:
 407                 case IIO_ACCEL:
 408                         return fxls8962af_get_out(data, chan, val);
 409                 default:
 410                         return -EINVAL;
 411                 }
 412         case IIO_CHAN_INFO_OFFSET:
 413                 if (chan->type != IIO_TEMP)
 414                         return -EINVAL;
 415
 416                 *val = FXLS8962AF_TEMP_CENTER_VAL;
 417                 return IIO_VAL_INT;
 418         case IIO_CHAN_INFO_SCALE:
 419                 *val = 0;
 420                 return fxls8962af_read_full_scale(data, val2);
 421         case IIO_CHAN_INFO_SAMP_FREQ:
 422                 return fxls8962af_read_samp_freq(data, val, val2);
 423         default:
 424                 return -EINVAL;
 425         }
 426 }
 427
 428 static int fxls8962af_write_raw(struct iio_dev *indio_dev,
 429                                 struct iio_chan_spec const *chan,
 430                                 int val, int val2, long mask)
 431 {
 432         struct fxls8962af_data *data = iio_priv(indio_dev);
 433         int ret;
 434
 435         switch (mask) {
 436         case IIO_CHAN_INFO_SCALE:
 437                 if (val != 0)
 438                         return -EINVAL;
 439
 440                 ret = iio_device_claim_direct_mode(indio_dev);
 441                 if (ret)
 442                         return ret;
 443
 444                 ret = fxls8962af_set_full_scale(data, val2);
 445
 446                 iio_device_release_direct_mode(indio_dev);
 447                 return ret;
 448         case IIO_CHAN_INFO_SAMP_FREQ:
 449                 ret = iio_device_claim_direct_mode(indio_dev);
 450                 if (ret)
 451                         return ret;
 452
 453                 ret = fxls8962af_set_samp_freq(data, val, val2);
 454
 455                 iio_device_release_direct_mode(indio_dev);
 456                 return ret;
 457         default:
 458                 return -EINVAL;
 459         }
 460 }
 461
 462 static int fxls8962af_set_watermark(struct iio_dev *indio_dev, unsigned val)
 463 {
 464         struct fxls8962af_data *data = iio_priv(indio_dev);
 465
 466         if (val > FXLS8962AF_FIFO_LENGTH)
 467                 val = FXLS8962AF_FIFO_LENGTH;
 468
 469         data->watermark = val;
 470
 471         return 0;
 472 }
 473
 474 #define FXLS8962AF_CHANNEL(axis, reg, idx) { \
 475         .type = IIO_ACCEL, \
 476         .address = reg, \
 477         .modified = 1, \
 478         .channel2 = IIO_MOD_##axis, \
 479         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
 480         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
 481                                     BIT(IIO_CHAN_INFO_SAMP_FREQ), \
 482         .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \
 483                                               BIT(IIO_CHAN_INFO_SAMP_FREQ), \
 484         .scan_index = idx, \
 485         .scan_type = { \
 486                 .sign = 's', \
 487                 .realbits = 12, \
 488                 .storagebits = 16, \
 489                 .shift = 4, \
 490                 .endianness = IIO_BE, \
 491         }, \
 492 }
 493
 494 #define FXLS8962AF_TEMP_CHANNEL { \
 495         .type = IIO_TEMP, \
 496         .address = FXLS8962AF_TEMP_OUT, \
 497         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 498                               BIT(IIO_CHAN_INFO_OFFSET),\
 499         .scan_index = -1, \
 500         .scan_type = { \
 501                 .realbits = 8, \
 502                 .storagebits = 8, \
 503         }, \
 504 }
 505
 506 static const struct iio_chan_spec fxls8962af_channels[] = {
 507         FXLS8962AF_CHANNEL(X, FXLS8962AF_OUT_X_LSB, fxls8962af_idx_x),
 508         FXLS8962AF_CHANNEL(Y, FXLS8962AF_OUT_Y_LSB, fxls8962af_idx_y),
 509         FXLS8962AF_CHANNEL(Z, FXLS8962AF_OUT_Z_LSB, fxls8962af_idx_z),
 510         IIO_CHAN_SOFT_TIMESTAMP(fxls8962af_idx_ts),
 511         FXLS8962AF_TEMP_CHANNEL,
 512 };
 513
 514 static const struct fxls8962af_chip_info fxls_chip_info_table[] = {
 515         [fxls8962af] = {
 516                 .chip_id = FXLS8962AF_DEVICE_ID,
 517                 .name = "fxls8962af",
 518                 .channels = fxls8962af_channels,
 519                 .num_channels = ARRAY_SIZE(fxls8962af_channels),
 520         },
 521         [fxls8964af] = {
 522                 .chip_id = FXLS8964AF_DEVICE_ID,
 523                 .name = "fxls8964af",
 524                 .channels = fxls8962af_channels,
 525                 .num_channels = ARRAY_SIZE(fxls8962af_channels),
 526         },
 527 };
 528
 529 static const struct iio_info fxls8962af_info = {
 530         .read_raw = &fxls8962af_read_raw,
 531         .write_raw = &fxls8962af_write_raw,
 532         .write_raw_get_fmt = fxls8962af_write_raw_get_fmt,
 533         .read_avail = fxls8962af_read_avail,
 534         .hwfifo_set_watermark = fxls8962af_set_watermark,
 535 };
 536
 537 static int fxls8962af_reset(struct fxls8962af_data *data)
 538 {
 539         struct device *dev = regmap_get_device(data->regmap);
 540         unsigned int reg;
 541         int ret;
 542
 543         ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
 544                                  FXLS8962AF_SENS_CONFIG1_RST,
 545                                  FXLS8962AF_SENS_CONFIG1_RST);
 546         if (ret)
 547                 return ret;
 548
 549         /* TBOOT1, TBOOT2, specifies we have to wait between 1 - 17.7ms */
 550         ret = regmap_read_poll_timeout(data->regmap, FXLS8962AF_INT_STATUS, reg,
 551                                        (reg & FXLS8962AF_INT_STATUS_SRC_BOOT),
 552                                        1000, 18000);
 553         if (ret == -ETIMEDOUT)
 554                 dev_err(dev, "reset timeout, int_status = 0x%x\n", reg);
 555
 556         return ret;
 557 }
 558
 559 static int __fxls8962af_fifo_set_mode(struct fxls8962af_data *data, bool onoff)
 560 {
 561         int ret;
 562
 563         /* Enable watermark at max fifo size */
 564         ret = regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG2,
 565                                  FXLS8962AF_BUF_CONFIG2_BUF_WMRK,
 566                                  data->watermark);
 567         if (ret)
 568                 return ret;
 569
 570         return regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG1,
 571                                   FXLS8962AF_BC1_BUF_MODE_MASK,
 572                                   FXLS8962AF_BC1_BUF_MODE_PREP(onoff));
 573 }
 574
 575 static int fxls8962af_buffer_preenable(struct iio_dev *indio_dev)
 576 {
 577         return fxls8962af_power_on(iio_priv(indio_dev));
 578 }
 579
 580 static int fxls8962af_buffer_postenable(struct iio_dev *indio_dev)
 581 {
 582         struct fxls8962af_data *data = iio_priv(indio_dev);
 583         int ret;
 584
 585         fxls8962af_standby(data);
 586
 587         /* Enable buffer interrupt */
 588         ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
 589                                  FXLS8962AF_INT_EN_BUF_EN,
 590                                  FXLS8962AF_INT_EN_BUF_EN);
 591         if (ret)
 592                 return ret;
 593
 594         ret = __fxls8962af_fifo_set_mode(data, true);
 595
 596         fxls8962af_active(data);
 597
 598         return ret;
 599 }
 600
 601 static int fxls8962af_buffer_predisable(struct iio_dev *indio_dev)
 602 {
 603         struct fxls8962af_data *data = iio_priv(indio_dev);
 604         int ret;
 605
 606         fxls8962af_standby(data);
 607
 608         /* Disable buffer interrupt */
 609         ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
 610                                  FXLS8962AF_INT_EN_BUF_EN, 0);
 611         if (ret)
 612                 return ret;
 613
 614         ret = __fxls8962af_fifo_set_mode(data, false);
 615
 616         fxls8962af_active(data);
 617
 618         return ret;
 619 }
 620
 621 static int fxls8962af_buffer_postdisable(struct iio_dev *indio_dev)
 622 {
 623         struct fxls8962af_data *data = iio_priv(indio_dev);
 624
 625         return fxls8962af_power_off(data);
 626 }
 627
 628 static const struct iio_buffer_setup_ops fxls8962af_buffer_ops = {
 629         .preenable = fxls8962af_buffer_preenable,
 630         .postenable = fxls8962af_buffer_postenable,
 631         .predisable = fxls8962af_buffer_predisable,
 632         .postdisable = fxls8962af_buffer_postdisable,
 633 };
 634
 635 static int fxls8962af_i2c_raw_read_errata3(struct fxls8962af_data *data,
 636                                            u16 *buffer, int samples,
 637                                            int sample_length)
 638 {
 639         int i, ret;
 640
 641         for (i = 0; i < samples; i++) {
 642                 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB,
 643                                       &buffer[i * 3], sample_length);
 644                 if (ret)
 645                         return ret;
 646         }
 647
 648         return 0;
 649 }
 650
 651 static int fxls8962af_fifo_transfer(struct fxls8962af_data *data,
 652                                     u16 *buffer, int samples)
 653 {
 654         struct device *dev = regmap_get_device(data->regmap);
 655         int sample_length = 3 * sizeof(*buffer);
 656         int total_length = samples * sample_length;
 657         int ret;
 658
 659         if (i2c_verify_client(dev))
 660                 /*
 661                  * Due to errata bug:
 662                  * E3: FIFO burst read operation error using I2C interface
 663                  * We have to avoid burst reads on I2C..
 664                  */
 665                 ret = fxls8962af_i2c_raw_read_errata3(data, buffer, samples,
 666                                                       sample_length);
 667         else
 668                 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB, buffer,
 669                                       total_length);
 670
 671         if (ret)
 672                 dev_err(dev, "Error transferring data from fifo: %d\n", ret);
 673
 674         return ret;
 675 }
 676
 677 static int fxls8962af_fifo_flush(struct iio_dev *indio_dev)
 678 {
 679         struct fxls8962af_data *data = iio_priv(indio_dev);
 680         struct device *dev = regmap_get_device(data->regmap);
 681         u16 buffer[FXLS8962AF_FIFO_LENGTH * 3];
 682         uint64_t sample_period;
 683         unsigned int reg;
 684         int64_t tstamp;
 685         int ret, i;
 686         u8 count;
 687
 688         ret = regmap_read(data->regmap, FXLS8962AF_BUF_STATUS, &reg);
 689         if (ret)
 690                 return ret;
 691
 692         if (reg & FXLS8962AF_BUF_STATUS_BUF_OVF) {
 693                 dev_err(dev, "Buffer overflow");
 694                 return -EOVERFLOW;
 695         }
 696
 697         count = reg & FXLS8962AF_BUF_STATUS_BUF_CNT;
 698         if (!count)
 699                 return 0;
 700
 701         data->old_timestamp = data->timestamp;
 702         data->timestamp = iio_get_time_ns(indio_dev);
 703
 704         /*
 705          * Approximate timestamps for each of the sample based on the sampling,
 706          * frequency, timestamp for last sample and number of samples.
 707          */
 708         sample_period = (data->timestamp - data->old_timestamp);
 709         do_div(sample_period, count);
 710         tstamp = data->timestamp - (count - 1) * sample_period;
 711
 712         ret = fxls8962af_fifo_transfer(data, buffer, count);
 713         if (ret)
 714                 return ret;
 715
 716         /* Demux hw FIFO into kfifo. */
 717         for (i = 0; i < count; i++) {
 718                 int j, bit;
 719
 720                 j = 0;
 721                 for_each_set_bit(bit, indio_dev->active_scan_mask,
 722                                  indio_dev->masklength) {
 723                         memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],
 724                                sizeof(data->scan.channels[0]));
 725                 }
 726
 727                 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
 728                                                    tstamp);
 729
 730                 tstamp += sample_period;
 731         }
 732
 733         return count;
 734 }
 735
 736 static irqreturn_t fxls8962af_interrupt(int irq, void *p)
 737 {
 738         struct iio_dev *indio_dev = p;
 739         struct fxls8962af_data *data = iio_priv(indio_dev);
 740         unsigned int reg;
 741         int ret;
 742
 743         ret = regmap_read(data->regmap, FXLS8962AF_INT_STATUS, &reg);
 744         if (ret)
 745                 return IRQ_NONE;
 746
 747         if (reg & FXLS8962AF_INT_STATUS_SRC_BUF) {
 748                 ret = fxls8962af_fifo_flush(indio_dev);
 749                 if (ret < 0)
 750                         return IRQ_NONE;
 751
 752                 return IRQ_HANDLED;
 753         }
 754
 755         return IRQ_NONE;
 756 }
 757
 758 static void fxls8962af_regulator_disable(void *data_ptr)
 759 {
 760         struct fxls8962af_data *data = data_ptr;
 761
 762         regulator_disable(data->vdd_reg);
 763 }
 764
 765 static void fxls8962af_pm_disable(void *dev_ptr)
 766 {
 767         struct device *dev = dev_ptr;
 768         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 769
 770         pm_runtime_disable(dev);
 771         pm_runtime_set_suspended(dev);
 772         pm_runtime_put_noidle(dev);
 773
 774         fxls8962af_standby(iio_priv(indio_dev));
 775 }
 776
 777 static void fxls8962af_get_irq(struct device_node *of_node,
 778                                enum fxls8962af_int_pin *pin)
 779 {
 780         int irq;
 781
 782         irq = of_irq_get_byname(of_node, "INT2");
 783         if (irq > 0) {
 784                 *pin = FXLS8962AF_PIN_INT2;
 785                 return;
 786         }
 787
 788         *pin = FXLS8962AF_PIN_INT1;
 789 }
 790
 791 static int fxls8962af_irq_setup(struct iio_dev *indio_dev, int irq)
 792 {
 793         struct fxls8962af_data *data = iio_priv(indio_dev);
 794         struct device *dev = regmap_get_device(data->regmap);
 795         unsigned long irq_type;
 796         bool irq_active_high;
 797         enum fxls8962af_int_pin int_pin;
 798         u8 int_pin_sel;
 799         int ret;
 800
 801         fxls8962af_get_irq(dev->of_node, &int_pin);
 802         switch (int_pin) {
 803         case FXLS8962AF_PIN_INT1:
 804                 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT1;
 805                 break;
 806         case FXLS8962AF_PIN_INT2:
 807                 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT2;
 808                 break;
 809         default:
 810                 dev_err(dev, "unsupported int pin selected\n");
 811                 return -EINVAL;
 812         }
 813
 814         ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_PIN_SEL,
 815                                  FXLS8962AF_INT_PIN_SEL_MASK, int_pin_sel);
 816         if (ret)
 817                 return ret;
 818
 819         irq_type = irqd_get_trigger_type(irq_get_irq_data(irq));
 820
 821         switch (irq_type) {
 822         case IRQF_TRIGGER_HIGH:
 823         case IRQF_TRIGGER_RISING:
 824                 irq_active_high = true;
 825                 break;
 826         case IRQF_TRIGGER_LOW:
 827         case IRQF_TRIGGER_FALLING:
 828                 irq_active_high = false;
 829                 break;
 830         default:
 831                 dev_info(dev, "mode %lx unsupported\n", irq_type);
 832                 return -EINVAL;
 833         }
 834
 835         ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
 836                                  FXLS8962AF_SC4_INT_POL_MASK,
 837                                  FXLS8962AF_SC4_INT_POL_PREP(irq_active_high));
 838         if (ret)
 839                 return ret;
 840
 841         if (device_property_read_bool(dev, "drive-open-drain")) {
 842                 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
 843                                          FXLS8962AF_SC4_INT_PP_OD_MASK,
 844                                          FXLS8962AF_SC4_INT_PP_OD_PREP(1));
 845                 if (ret)
 846                         return ret;
 847
 848                 irq_type |= IRQF_SHARED;
 849         }
 850
 851         return devm_request_threaded_irq(dev,
 852                                          irq,
 853                                          NULL, fxls8962af_interrupt,
 854                                          irq_type | IRQF_ONESHOT,
 855                                          indio_dev->name, indio_dev);
 856 }
 857
 858 int fxls8962af_core_probe(struct device *dev, struct regmap *regmap, int irq)
 859 {
 860         struct fxls8962af_data *data;
 861         struct iio_dev *indio_dev;
 862         unsigned int reg;
 863         int ret, i;
 864
 865         indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
 866         if (!indio_dev)
 867                 return -ENOMEM;
 868
 869         data = iio_priv(indio_dev);
 870         dev_set_drvdata(dev, indio_dev);
 871         data->regmap = regmap;
 872
 873         ret = iio_read_mount_matrix(dev, &data->orientation);
 874         if (ret)
 875                 return ret;
 876
 877         data->vdd_reg = devm_regulator_get(dev, "vdd");
 878         if (IS_ERR(data->vdd_reg))
 879                 return dev_err_probe(dev, PTR_ERR(data->vdd_reg),
 880                                      "Failed to get vdd regulator\n");
 881
 882         ret = regulator_enable(data->vdd_reg);
 883         if (ret) {
 884                 dev_err(dev, "Failed to enable vdd regulator: %d\n", ret);
 885                 return ret;
 886         }
 887
 888         ret = devm_add_action_or_reset(dev, fxls8962af_regulator_disable, data);
 889         if (ret)
 890                 return ret;
 891
 892         ret = regmap_read(data->regmap, FXLS8962AF_WHO_AM_I, &reg);
 893         if (ret)
 894                 return ret;
 895
 896         for (i = 0; i < ARRAY_SIZE(fxls_chip_info_table); i++) {
 897                 if (fxls_chip_info_table[i].chip_id == reg) {
 898                         data->chip_info = &fxls_chip_info_table[i];
 899                         break;
 900                 }
 901         }
 902         if (i == ARRAY_SIZE(fxls_chip_info_table)) {
 903                 dev_err(dev, "failed to match device in table\n");
 904                 return -ENXIO;
 905         }
 906
 907         indio_dev->channels = data->chip_info->channels;
 908         indio_dev->num_channels = data->chip_info->num_channels;
 909         indio_dev->name = data->chip_info->name;
 910         indio_dev->info = &fxls8962af_info;
 911         indio_dev->modes = INDIO_DIRECT_MODE;
 912
 913         ret = fxls8962af_reset(data);
 914         if (ret)
 915                 return ret;
 916
 917         if (irq) {
 918                 ret = fxls8962af_irq_setup(indio_dev, irq);
 919                 if (ret)
 920                         return ret;
 921
 922                 ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
 923                                                   INDIO_BUFFER_SOFTWARE,
 924                                                   &fxls8962af_buffer_ops);
 925                 if (ret)
 926                         return ret;
 927         }
 928
 929         ret = pm_runtime_set_active(dev);
 930         if (ret)
 931                 return ret;
 932
 933         pm_runtime_enable(dev);
 934         pm_runtime_set_autosuspend_delay(dev, FXLS8962AF_AUTO_SUSPEND_DELAY_MS);
 935         pm_runtime_use_autosuspend(dev);
 936
 937         ret = devm_add_action_or_reset(dev, fxls8962af_pm_disable, dev);
 938         if (ret)
 939                 return ret;
 940
 941         return devm_iio_device_register(dev, indio_dev);
 942 }
 943 EXPORT_SYMBOL_GPL(fxls8962af_core_probe);
 944
 945 static int __maybe_unused fxls8962af_runtime_suspend(struct device *dev)
 946 {
 947         struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
 948         int ret;
 949
 950         ret = fxls8962af_standby(data);
 951         if (ret) {
 952                 dev_err(dev, "powering off device failed\n");
 953                 return ret;
 954         }
 955
 956         return 0;
 957 }
 958
 959 static int __maybe_unused fxls8962af_runtime_resume(struct device *dev)
 960 {
 961         struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
 962
 963         return fxls8962af_active(data);
 964 }
 965
 966 const struct dev_pm_ops fxls8962af_pm_ops = {
 967         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
 968                                 pm_runtime_force_resume)
 969         SET_RUNTIME_PM_OPS(fxls8962af_runtime_suspend,
 970                            fxls8962af_runtime_resume, NULL)
 971 };
 972 EXPORT_SYMBOL_GPL(fxls8962af_pm_ops);
 973
 974 MODULE_AUTHOR("Sean Nyekjaer <sean@geanix.com>");
 975 MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer driver");
 976 MODULE_LICENSE("GPL v2");