1 // SPDX-License-Identifier: GPL-2.0
3 * 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
6 * Copyright (c) 2018-2021, Topic Embedded Products
9 #include <linux/delay.h>
10 #include <linux/iio/iio.h>
11 #include <linux/iio/sysfs.h>
12 #include <linux/interrupt.h>
13 #include <linux/module.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/regmap.h>
17 #include <linux/slab.h>
18 #include <asm/unaligned.h>
20 #include "bmi088-accel.h"
22 #define BMI088_ACCEL_REG_CHIP_ID 0x00
23 #define BMI088_ACCEL_REG_ERROR 0x02
25 #define BMI088_ACCEL_REG_INT_STATUS 0x1D
26 #define BMI088_ACCEL_INT_STATUS_BIT_DRDY BIT(7)
28 #define BMI088_ACCEL_REG_RESET 0x7E
29 #define BMI088_ACCEL_RESET_VAL 0xB6
31 #define BMI088_ACCEL_REG_PWR_CTRL 0x7D
32 #define BMI088_ACCEL_REG_PWR_CONF 0x7C
34 #define BMI088_ACCEL_REG_INT_MAP_DATA 0x58
35 #define BMI088_ACCEL_INT_MAP_DATA_BIT_INT1_DRDY BIT(2)
36 #define BMI088_ACCEL_INT_MAP_DATA_BIT_INT2_FWM BIT(5)
38 #define BMI088_ACCEL_REG_INT1_IO_CONF 0x53
39 #define BMI088_ACCEL_INT1_IO_CONF_BIT_ENABLE_OUT BIT(3)
40 #define BMI088_ACCEL_INT1_IO_CONF_BIT_LVL BIT(1)
42 #define BMI088_ACCEL_REG_INT2_IO_CONF 0x54
43 #define BMI088_ACCEL_INT2_IO_CONF_BIT_ENABLE_OUT BIT(3)
44 #define BMI088_ACCEL_INT2_IO_CONF_BIT_LVL BIT(1)
46 #define BMI088_ACCEL_REG_ACC_CONF 0x40
47 #define BMI088_ACCEL_MODE_ODR_MASK 0x0f
49 #define BMI088_ACCEL_REG_ACC_RANGE 0x41
50 #define BMI088_ACCEL_RANGE_3G 0x00
51 #define BMI088_ACCEL_RANGE_6G 0x01
52 #define BMI088_ACCEL_RANGE_12G 0x02
53 #define BMI088_ACCEL_RANGE_24G 0x03
55 #define BMI088_ACCEL_REG_TEMP 0x22
56 #define BMI088_ACCEL_REG_TEMP_SHIFT 5
57 #define BMI088_ACCEL_TEMP_UNIT 125
58 #define BMI088_ACCEL_TEMP_OFFSET 23000
60 #define BMI088_ACCEL_REG_XOUT_L 0x12
61 #define BMI088_ACCEL_AXIS_TO_REG(axis) \
62 (BMI088_ACCEL_REG_XOUT_L + (axis * 2))
64 #define BMI088_ACCEL_MAX_STARTUP_TIME_US 1000
65 #define BMI088_AUTO_SUSPEND_DELAY_MS 2000
67 #define BMI088_ACCEL_REG_FIFO_STATUS 0x0E
68 #define BMI088_ACCEL_REG_FIFO_CONFIG0 0x48
69 #define BMI088_ACCEL_REG_FIFO_CONFIG1 0x49
70 #define BMI088_ACCEL_REG_FIFO_DATA 0x3F
71 #define BMI088_ACCEL_FIFO_LENGTH 100
73 #define BMI088_ACCEL_FIFO_MODE_FIFO 0x40
74 #define BMI088_ACCEL_FIFO_MODE_STREAM 0x80
76 enum bmi088_accel_axis {
82 static const int bmi088_sample_freqs[] = {
93 /* Available OSR (over sampling rate) sets the 3dB cut-off frequency */
94 enum bmi088_osr_modes {
95 BMI088_ACCEL_MODE_OSR_NORMAL = 0xA,
96 BMI088_ACCEL_MODE_OSR_2 = 0x9,
97 BMI088_ACCEL_MODE_OSR_4 = 0x8,
100 /* Available ODR (output data rates) in Hz */
101 enum bmi088_odr_modes {
102 BMI088_ACCEL_MODE_ODR_12_5 = 0x5,
103 BMI088_ACCEL_MODE_ODR_25 = 0x6,
104 BMI088_ACCEL_MODE_ODR_50 = 0x7,
105 BMI088_ACCEL_MODE_ODR_100 = 0x8,
106 BMI088_ACCEL_MODE_ODR_200 = 0x9,
107 BMI088_ACCEL_MODE_ODR_400 = 0xa,
108 BMI088_ACCEL_MODE_ODR_800 = 0xb,
109 BMI088_ACCEL_MODE_ODR_1600 = 0xc,
112 struct bmi088_scale_info {
117 struct bmi088_accel_chip_info {
120 const struct iio_chan_spec *channels;
124 struct bmi088_accel_data {
125 struct regmap *regmap;
126 const struct bmi088_accel_chip_info *chip_info;
127 u8 buffer[2] ____cacheline_aligned; /* shared DMA safe buffer */
130 static const struct regmap_range bmi088_volatile_ranges[] = {
131 /* All registers below 0x40 are volatile, except the CHIP ID. */
132 regmap_reg_range(BMI088_ACCEL_REG_ERROR, 0x3f),
133 /* Mark the RESET as volatile too, it is self-clearing */
134 regmap_reg_range(BMI088_ACCEL_REG_RESET, BMI088_ACCEL_REG_RESET),
137 static const struct regmap_access_table bmi088_volatile_table = {
138 .yes_ranges = bmi088_volatile_ranges,
139 .n_yes_ranges = ARRAY_SIZE(bmi088_volatile_ranges),
142 const struct regmap_config bmi088_regmap_conf = {
145 .max_register = 0x7E,
146 .volatile_table = &bmi088_volatile_table,
147 .cache_type = REGCACHE_RBTREE,
149 EXPORT_SYMBOL_GPL(bmi088_regmap_conf);
151 static int bmi088_accel_power_up(struct bmi088_accel_data *data)
155 /* Enable accelerometer and temperature sensor */
156 ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CTRL, 0x4);
160 /* Datasheet recommends to wait at least 5ms before communication */
161 usleep_range(5000, 6000);
163 /* Disable suspend mode */
164 ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CONF, 0x0);
168 /* Recommended at least 1ms before further communication */
169 usleep_range(1000, 1200);
174 static int bmi088_accel_power_down(struct bmi088_accel_data *data)
178 /* Enable suspend mode */
179 ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CONF, 0x3);
183 /* Recommended at least 1ms before further communication */
184 usleep_range(1000, 1200);
186 /* Disable accelerometer and temperature sensor */
187 ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CTRL, 0x0);
191 /* Datasheet recommends to wait at least 5ms before communication */
192 usleep_range(5000, 6000);
197 static int bmi088_accel_get_sample_freq(struct bmi088_accel_data *data,
203 ret = regmap_read(data->regmap, BMI088_ACCEL_REG_ACC_CONF,
208 value &= BMI088_ACCEL_MODE_ODR_MASK;
209 value -= BMI088_ACCEL_MODE_ODR_12_5;
212 if (value >= ARRAY_SIZE(bmi088_sample_freqs) - 1)
215 *val = bmi088_sample_freqs[value];
216 *val2 = bmi088_sample_freqs[value + 1];
218 return IIO_VAL_INT_PLUS_MICRO;
221 static int bmi088_accel_set_sample_freq(struct bmi088_accel_data *data, int val)
226 while (index < ARRAY_SIZE(bmi088_sample_freqs) &&
227 bmi088_sample_freqs[index] != val)
230 if (index >= ARRAY_SIZE(bmi088_sample_freqs))
233 regval = (index >> 1) + BMI088_ACCEL_MODE_ODR_12_5;
235 return regmap_update_bits(data->regmap, BMI088_ACCEL_REG_ACC_CONF,
236 BMI088_ACCEL_MODE_ODR_MASK, regval);
239 static int bmi088_accel_get_temp(struct bmi088_accel_data *data, int *val)
244 ret = regmap_bulk_read(data->regmap, BMI088_ACCEL_REG_TEMP,
245 &data->buffer, sizeof(__be16));
249 /* data->buffer is cacheline aligned */
250 temp = be16_to_cpu(*(__be16 *)data->buffer);
252 *val = temp >> BMI088_ACCEL_REG_TEMP_SHIFT;
257 static int bmi088_accel_get_axis(struct bmi088_accel_data *data,
258 struct iio_chan_spec const *chan,
264 ret = regmap_bulk_read(data->regmap,
265 BMI088_ACCEL_AXIS_TO_REG(chan->scan_index),
266 data->buffer, sizeof(__le16));
270 raw_val = le16_to_cpu(*(__le16 *)data->buffer);
276 static int bmi088_accel_read_raw(struct iio_dev *indio_dev,
277 struct iio_chan_spec const *chan,
278 int *val, int *val2, long mask)
280 struct bmi088_accel_data *data = iio_priv(indio_dev);
281 struct device *dev = regmap_get_device(data->regmap);
285 case IIO_CHAN_INFO_RAW:
286 switch (chan->type) {
288 ret = pm_runtime_resume_and_get(dev);
292 ret = bmi088_accel_get_temp(data, val);
293 goto out_read_raw_pm_put;
295 ret = pm_runtime_resume_and_get(dev);
299 ret = iio_device_claim_direct_mode(indio_dev);
301 goto out_read_raw_pm_put;
303 ret = bmi088_accel_get_axis(data, chan, val);
304 iio_device_release_direct_mode(indio_dev);
308 goto out_read_raw_pm_put;
312 case IIO_CHAN_INFO_OFFSET:
313 switch (chan->type) {
315 /* Offset applies before scale */
316 *val = BMI088_ACCEL_TEMP_OFFSET/BMI088_ACCEL_TEMP_UNIT;
321 case IIO_CHAN_INFO_SCALE:
322 switch (chan->type) {
324 /* 0.125 degrees per LSB */
325 *val = BMI088_ACCEL_TEMP_UNIT;
328 ret = pm_runtime_resume_and_get(dev);
332 ret = regmap_read(data->regmap,
333 BMI088_ACCEL_REG_ACC_RANGE, val);
335 goto out_read_raw_pm_put;
337 *val2 = 15 - (*val & 0x3);
339 ret = IIO_VAL_FRACTIONAL_LOG2;
341 goto out_read_raw_pm_put;
345 case IIO_CHAN_INFO_SAMP_FREQ:
346 ret = pm_runtime_resume_and_get(dev);
350 ret = bmi088_accel_get_sample_freq(data, val, val2);
351 goto out_read_raw_pm_put;
359 pm_runtime_mark_last_busy(dev);
360 pm_runtime_put_autosuspend(dev);
365 static int bmi088_accel_read_avail(struct iio_dev *indio_dev,
366 struct iio_chan_spec const *chan,
367 const int **vals, int *type, int *length,
371 case IIO_CHAN_INFO_SAMP_FREQ:
372 *type = IIO_VAL_INT_PLUS_MICRO;
373 *vals = bmi088_sample_freqs;
374 *length = ARRAY_SIZE(bmi088_sample_freqs);
375 return IIO_AVAIL_LIST;
381 static int bmi088_accel_write_raw(struct iio_dev *indio_dev,
382 struct iio_chan_spec const *chan,
383 int val, int val2, long mask)
385 struct bmi088_accel_data *data = iio_priv(indio_dev);
386 struct device *dev = regmap_get_device(data->regmap);
390 case IIO_CHAN_INFO_SAMP_FREQ:
391 ret = pm_runtime_resume_and_get(dev);
395 ret = bmi088_accel_set_sample_freq(data, val);
396 pm_runtime_mark_last_busy(dev);
397 pm_runtime_put_autosuspend(dev);
404 #define BMI088_ACCEL_CHANNEL(_axis) { \
407 .channel2 = IIO_MOD_##_axis, \
408 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
409 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
410 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
411 .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
412 .scan_index = AXIS_##_axis, \
415 static const struct iio_chan_spec bmi088_accel_channels[] = {
418 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
419 BIT(IIO_CHAN_INFO_SCALE) |
420 BIT(IIO_CHAN_INFO_OFFSET),
423 BMI088_ACCEL_CHANNEL(X),
424 BMI088_ACCEL_CHANNEL(Y),
425 BMI088_ACCEL_CHANNEL(Z),
426 IIO_CHAN_SOFT_TIMESTAMP(3),
429 static const struct bmi088_accel_chip_info bmi088_accel_chip_info_tbl[] = {
433 .channels = bmi088_accel_channels,
434 .num_channels = ARRAY_SIZE(bmi088_accel_channels),
438 static const struct iio_info bmi088_accel_info = {
439 .read_raw = bmi088_accel_read_raw,
440 .write_raw = bmi088_accel_write_raw,
441 .read_avail = bmi088_accel_read_avail,
444 static const unsigned long bmi088_accel_scan_masks[] = {
445 BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
449 static int bmi088_accel_chip_init(struct bmi088_accel_data *data)
451 struct device *dev = regmap_get_device(data->regmap);
455 /* Do a dummy read to enable SPI interface, won't harm I2C */
456 regmap_read(data->regmap, BMI088_ACCEL_REG_INT_STATUS, &val);
459 * Reset chip to get it in a known good state. A delay of 1ms after
460 * reset is required according to the data sheet
462 ret = regmap_write(data->regmap, BMI088_ACCEL_REG_RESET,
463 BMI088_ACCEL_RESET_VAL);
467 usleep_range(1000, 2000);
469 /* Do a dummy read again after a reset to enable the SPI interface */
470 regmap_read(data->regmap, BMI088_ACCEL_REG_INT_STATUS, &val);
473 ret = regmap_read(data->regmap, BMI088_ACCEL_REG_CHIP_ID, &val);
475 dev_err(dev, "Error: Reading chip id\n");
479 /* Validate chip ID */
480 for (i = 0; i < ARRAY_SIZE(bmi088_accel_chip_info_tbl); i++) {
481 if (bmi088_accel_chip_info_tbl[i].chip_id == val) {
482 data->chip_info = &bmi088_accel_chip_info_tbl[i];
486 if (i == ARRAY_SIZE(bmi088_accel_chip_info_tbl)) {
487 dev_err(dev, "Invalid chip %x\n", val);
494 int bmi088_accel_core_probe(struct device *dev, struct regmap *regmap,
495 int irq, const char *name, bool block_supported)
497 struct bmi088_accel_data *data;
498 struct iio_dev *indio_dev;
501 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
505 data = iio_priv(indio_dev);
506 dev_set_drvdata(dev, indio_dev);
508 data->regmap = regmap;
510 ret = bmi088_accel_chip_init(data);
514 indio_dev->channels = data->chip_info->channels;
515 indio_dev->num_channels = data->chip_info->num_channels;
516 indio_dev->name = name ? name : data->chip_info->name;
517 indio_dev->available_scan_masks = bmi088_accel_scan_masks;
518 indio_dev->modes = INDIO_DIRECT_MODE;
519 indio_dev->info = &bmi088_accel_info;
521 /* Enable runtime PM */
522 pm_runtime_get_noresume(dev);
523 pm_runtime_set_suspended(dev);
524 pm_runtime_enable(dev);
525 /* We need ~6ms to startup, so set the delay to 6 seconds */
526 pm_runtime_set_autosuspend_delay(dev, 6000);
527 pm_runtime_use_autosuspend(dev);
530 ret = iio_device_register(indio_dev);
532 dev_err(dev, "Unable to register iio device\n");
536 EXPORT_SYMBOL_GPL(bmi088_accel_core_probe);
539 void bmi088_accel_core_remove(struct device *dev)
541 struct iio_dev *indio_dev = dev_get_drvdata(dev);
542 struct bmi088_accel_data *data = iio_priv(indio_dev);
544 iio_device_unregister(indio_dev);
546 pm_runtime_disable(dev);
547 pm_runtime_set_suspended(dev);
548 bmi088_accel_power_down(data);
550 EXPORT_SYMBOL_GPL(bmi088_accel_core_remove);
552 static int __maybe_unused bmi088_accel_runtime_suspend(struct device *dev)
554 struct iio_dev *indio_dev = dev_get_drvdata(dev);
555 struct bmi088_accel_data *data = iio_priv(indio_dev);
557 return bmi088_accel_power_down(data);
560 static int __maybe_unused bmi088_accel_runtime_resume(struct device *dev)
562 struct iio_dev *indio_dev = dev_get_drvdata(dev);
563 struct bmi088_accel_data *data = iio_priv(indio_dev);
565 return bmi088_accel_power_up(data);
568 const struct dev_pm_ops bmi088_accel_pm_ops = {
569 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
570 pm_runtime_force_resume)
571 SET_RUNTIME_PM_OPS(bmi088_accel_runtime_suspend,
572 bmi088_accel_runtime_resume, NULL)
574 EXPORT_SYMBOL_GPL(bmi088_accel_pm_ops);
576 MODULE_AUTHOR("Niek van Agt <niek.van.agt@topicproducts.com>");
577 MODULE_LICENSE("GPL v2");
578 MODULE_DESCRIPTION("BMI088 accelerometer driver (core)");