1 // SPDX-License-Identifier: GPL-2.0-only
3 * ADXL355 3-Axis Digital Accelerometer IIO core driver
5 * Copyright (c) 2021 Puranjay Mohan <puranjay12@gmail.com>
7 * Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/adxl354_adxl355.pdf
10 #include <linux/bits.h>
11 #include <linux/bitfield.h>
12 #include <linux/iio/buffer.h>
13 #include <linux/iio/iio.h>
14 #include <linux/iio/trigger.h>
15 #include <linux/iio/triggered_buffer.h>
16 #include <linux/iio/trigger_consumer.h>
17 #include <linux/limits.h>
18 #include <linux/math64.h>
19 #include <linux/module.h>
20 #include <linux/mod_devicetable.h>
21 #include <linux/of_irq.h>
22 #include <linux/regmap.h>
23 #include <asm/unaligned.h>
27 /* ADXL355 Register Definitions */
28 #define ADXL355_DEVID_AD_REG 0x00
29 #define ADXL355_DEVID_MST_REG 0x01
30 #define ADXL355_PARTID_REG 0x02
31 #define ADXL355_STATUS_REG 0x04
32 #define ADXL355_FIFO_ENTRIES_REG 0x05
33 #define ADXL355_TEMP2_REG 0x06
34 #define ADXL355_XDATA3_REG 0x08
35 #define ADXL355_YDATA3_REG 0x0B
36 #define ADXL355_ZDATA3_REG 0x0E
37 #define ADXL355_FIFO_DATA_REG 0x11
38 #define ADXL355_OFFSET_X_H_REG 0x1E
39 #define ADXL355_OFFSET_Y_H_REG 0x20
40 #define ADXL355_OFFSET_Z_H_REG 0x22
41 #define ADXL355_ACT_EN_REG 0x24
42 #define ADXL355_ACT_THRESH_H_REG 0x25
43 #define ADXL355_ACT_THRESH_L_REG 0x26
44 #define ADXL355_ACT_COUNT_REG 0x27
45 #define ADXL355_FILTER_REG 0x28
46 #define ADXL355_FILTER_ODR_MSK GENMASK(3, 0)
47 #define ADXL355_FILTER_HPF_MSK GENMASK(6, 4)
48 #define ADXL355_FIFO_SAMPLES_REG 0x29
49 #define ADXL355_INT_MAP_REG 0x2A
50 #define ADXL355_SYNC_REG 0x2B
51 #define ADXL355_RANGE_REG 0x2C
52 #define ADXL355_POWER_CTL_REG 0x2D
53 #define ADXL355_POWER_CTL_MODE_MSK GENMASK(1, 0)
54 #define ADXL355_POWER_CTL_DRDY_MSK BIT(2)
55 #define ADXL355_SELF_TEST_REG 0x2E
56 #define ADXL355_RESET_REG 0x2F
58 #define ADXL355_DEVID_AD_VAL 0xAD
59 #define ADXL355_DEVID_MST_VAL 0x1D
60 #define ADXL355_PARTID_VAL 0xED
61 #define ADXL355_RESET_CODE 0x52
63 #define MEGA 1000000UL
64 #define TERA 1000000000000ULL
66 static const struct regmap_range adxl355_read_reg_range[] = {
67 regmap_reg_range(ADXL355_DEVID_AD_REG, ADXL355_FIFO_DATA_REG),
68 regmap_reg_range(ADXL355_OFFSET_X_H_REG, ADXL355_SELF_TEST_REG),
71 const struct regmap_access_table adxl355_readable_regs_tbl = {
72 .yes_ranges = adxl355_read_reg_range,
73 .n_yes_ranges = ARRAY_SIZE(adxl355_read_reg_range),
75 EXPORT_SYMBOL_GPL(adxl355_readable_regs_tbl);
77 static const struct regmap_range adxl355_write_reg_range[] = {
78 regmap_reg_range(ADXL355_OFFSET_X_H_REG, ADXL355_RESET_REG),
81 const struct regmap_access_table adxl355_writeable_regs_tbl = {
82 .yes_ranges = adxl355_write_reg_range,
83 .n_yes_ranges = ARRAY_SIZE(adxl355_write_reg_range),
85 EXPORT_SYMBOL_GPL(adxl355_writeable_regs_tbl);
87 enum adxl355_op_mode {
102 ADXL355_ODR_15_625HZ,
107 enum adxl355_hpf_3db {
117 static const int adxl355_odr_table[][2] = {
131 static const int adxl355_hpf_3db_multipliers[] = {
142 chan_x, chan_y, chan_z,
145 struct adxl355_chan_info {
150 static const struct adxl355_chan_info adxl355_chans[] = {
152 .data_reg = ADXL355_XDATA3_REG,
153 .offset_reg = ADXL355_OFFSET_X_H_REG
156 .data_reg = ADXL355_YDATA3_REG,
157 .offset_reg = ADXL355_OFFSET_Y_H_REG
160 .data_reg = ADXL355_ZDATA3_REG,
161 .offset_reg = ADXL355_OFFSET_Z_H_REG
165 struct adxl355_data {
166 struct regmap *regmap;
168 struct mutex lock; /* lock to protect op_mode */
169 enum adxl355_op_mode op_mode;
170 enum adxl355_odr odr;
171 enum adxl355_hpf_3db hpf_3db;
173 int adxl355_hpf_3db_table[7][2];
174 struct iio_trigger *dready_trig;
181 } ____cacheline_aligned;
184 static int adxl355_set_op_mode(struct adxl355_data *data,
185 enum adxl355_op_mode op_mode)
189 if (data->op_mode == op_mode)
192 ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
193 ADXL355_POWER_CTL_MODE_MSK, op_mode);
197 data->op_mode = op_mode;
202 static int adxl355_data_rdy_trigger_set_state(struct iio_trigger *trig,
205 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
206 struct adxl355_data *data = iio_priv(indio_dev);
209 mutex_lock(&data->lock);
210 ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
211 ADXL355_POWER_CTL_DRDY_MSK,
212 FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK,
214 mutex_unlock(&data->lock);
219 static void adxl355_fill_3db_frequency_table(struct adxl355_data *data)
226 odr = mul_u64_u32_shr(adxl355_odr_table[data->odr][0], MEGA, 0) +
227 adxl355_odr_table[data->odr][1];
229 for (i = 0; i < ARRAY_SIZE(adxl355_hpf_3db_multipliers); i++) {
230 multiplier = adxl355_hpf_3db_multipliers[i];
231 div = div64_u64_rem(mul_u64_u32_shr(odr, multiplier, 0),
234 data->adxl355_hpf_3db_table[i][0] = div;
235 data->adxl355_hpf_3db_table[i][1] = div_u64(rem, MEGA * 100);
239 static int adxl355_setup(struct adxl355_data *data)
244 ret = regmap_read(data->regmap, ADXL355_DEVID_AD_REG, ®val);
248 if (regval != ADXL355_DEVID_AD_VAL) {
249 dev_err(data->dev, "Invalid ADI ID 0x%02x\n", regval);
253 ret = regmap_read(data->regmap, ADXL355_DEVID_MST_REG, ®val);
257 if (regval != ADXL355_DEVID_MST_VAL) {
258 dev_err(data->dev, "Invalid MEMS ID 0x%02x\n", regval);
262 ret = regmap_read(data->regmap, ADXL355_PARTID_REG, ®val);
266 if (regval != ADXL355_PARTID_VAL) {
267 dev_err(data->dev, "Invalid DEV ID 0x%02x\n", regval);
272 * Perform a software reset to make sure the device is in a consistent
273 * state after start-up.
275 ret = regmap_write(data->regmap, ADXL355_RESET_REG, ADXL355_RESET_CODE);
279 ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
280 ADXL355_POWER_CTL_DRDY_MSK,
281 FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK, 1));
285 adxl355_fill_3db_frequency_table(data);
287 return adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
290 static int adxl355_get_temp_data(struct adxl355_data *data, u8 addr)
292 return regmap_bulk_read(data->regmap, addr, data->transf_buf, 2);
295 static int adxl355_read_axis(struct adxl355_data *data, u8 addr)
299 ret = regmap_bulk_read(data->regmap, addr, data->transf_buf,
300 ARRAY_SIZE(data->transf_buf));
304 return get_unaligned_be24(data->transf_buf);
307 static int adxl355_find_match(const int (*freq_tbl)[2], const int n,
308 const int val, const int val2)
312 for (i = 0; i < n; i++) {
313 if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
320 static int adxl355_set_odr(struct adxl355_data *data,
321 enum adxl355_odr odr)
325 mutex_lock(&data->lock);
327 if (data->odr == odr) {
328 mutex_unlock(&data->lock);
332 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
336 ret = regmap_update_bits(data->regmap, ADXL355_FILTER_REG,
337 ADXL355_FILTER_ODR_MSK,
338 FIELD_PREP(ADXL355_FILTER_ODR_MSK, odr));
343 adxl355_fill_3db_frequency_table(data);
345 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
349 mutex_unlock(&data->lock);
353 adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
355 mutex_unlock(&data->lock);
359 static int adxl355_set_hpf_3db(struct adxl355_data *data,
360 enum adxl355_hpf_3db hpf)
364 mutex_lock(&data->lock);
366 if (data->hpf_3db == hpf) {
367 mutex_unlock(&data->lock);
371 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
375 ret = regmap_update_bits(data->regmap, ADXL355_FILTER_REG,
376 ADXL355_FILTER_HPF_MSK,
377 FIELD_PREP(ADXL355_FILTER_HPF_MSK, hpf));
383 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
387 mutex_unlock(&data->lock);
391 adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
393 mutex_unlock(&data->lock);
397 static int adxl355_set_calibbias(struct adxl355_data *data,
398 enum adxl355_chans chan, int calibbias)
402 mutex_lock(&data->lock);
404 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
408 put_unaligned_be16(calibbias, data->transf_buf);
409 ret = regmap_bulk_write(data->regmap,
410 adxl355_chans[chan].offset_reg,
411 data->transf_buf, 2);
415 data->calibbias[chan] = calibbias;
417 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
421 mutex_unlock(&data->lock);
425 adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
427 mutex_unlock(&data->lock);
431 static int adxl355_read_raw(struct iio_dev *indio_dev,
432 struct iio_chan_spec const *chan,
433 int *val, int *val2, long mask)
435 struct adxl355_data *data = iio_priv(indio_dev);
439 case IIO_CHAN_INFO_RAW:
440 switch (chan->type) {
442 ret = adxl355_get_temp_data(data, chan->address);
445 *val = get_unaligned_be16(data->transf_buf);
449 ret = adxl355_read_axis(data, adxl355_chans[
450 chan->address].data_reg);
453 *val = sign_extend32(ret >> chan->scan_type.shift,
454 chan->scan_type.realbits - 1);
460 case IIO_CHAN_INFO_SCALE:
461 switch (chan->type) {
463 * The datasheet defines an intercept of 1885 LSB at 25 degC
464 * and a slope of -9.05 LSB/C. The following formula can be used
465 * to find the temperature:
466 * Temp = ((RAW - 1885)/(-9.05)) + 25 but this doesn't follow
467 * the format of the IIO which is Temp = (RAW + OFFSET) * SCALE.
468 * Hence using some rearranging we get the scale as -110.497238
469 * and offset as -2111.25.
474 return IIO_VAL_INT_PLUS_MICRO;
476 * At +/- 2g with 20-bit resolution, scale is given in datasheet
477 * as 3.9ug/LSB = 0.0000039 * 9.80665 = 0.00003824593 m/s^2.
482 return IIO_VAL_INT_PLUS_NANO;
486 case IIO_CHAN_INFO_OFFSET:
489 return IIO_VAL_INT_PLUS_MICRO;
490 case IIO_CHAN_INFO_CALIBBIAS:
491 *val = sign_extend32(data->calibbias[chan->address], 15);
493 case IIO_CHAN_INFO_SAMP_FREQ:
494 *val = adxl355_odr_table[data->odr][0];
495 *val2 = adxl355_odr_table[data->odr][1];
496 return IIO_VAL_INT_PLUS_MICRO;
497 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
498 *val = data->adxl355_hpf_3db_table[data->hpf_3db][0];
499 *val2 = data->adxl355_hpf_3db_table[data->hpf_3db][1];
500 return IIO_VAL_INT_PLUS_MICRO;
506 static int adxl355_write_raw(struct iio_dev *indio_dev,
507 struct iio_chan_spec const *chan,
508 int val, int val2, long mask)
510 struct adxl355_data *data = iio_priv(indio_dev);
511 int odr_idx, hpf_idx, calibbias;
514 case IIO_CHAN_INFO_SAMP_FREQ:
515 odr_idx = adxl355_find_match(adxl355_odr_table,
516 ARRAY_SIZE(adxl355_odr_table),
521 return adxl355_set_odr(data, odr_idx);
522 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
523 hpf_idx = adxl355_find_match(data->adxl355_hpf_3db_table,
524 ARRAY_SIZE(data->adxl355_hpf_3db_table),
529 return adxl355_set_hpf_3db(data, hpf_idx);
530 case IIO_CHAN_INFO_CALIBBIAS:
531 calibbias = clamp_t(int, val, S16_MIN, S16_MAX);
533 return adxl355_set_calibbias(data, chan->address, calibbias);
539 static int adxl355_read_avail(struct iio_dev *indio_dev,
540 struct iio_chan_spec const *chan,
541 const int **vals, int *type, int *length,
544 struct adxl355_data *data = iio_priv(indio_dev);
547 case IIO_CHAN_INFO_SAMP_FREQ:
548 *vals = (const int *)adxl355_odr_table;
549 *type = IIO_VAL_INT_PLUS_MICRO;
550 /* Values are stored in a 2D matrix */
551 *length = ARRAY_SIZE(adxl355_odr_table) * 2;
553 return IIO_AVAIL_LIST;
554 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
555 *vals = (const int *)data->adxl355_hpf_3db_table;
556 *type = IIO_VAL_INT_PLUS_MICRO;
557 /* Values are stored in a 2D matrix */
558 *length = ARRAY_SIZE(data->adxl355_hpf_3db_table) * 2;
560 return IIO_AVAIL_LIST;
566 static const unsigned long adxl355_avail_scan_masks[] = {
571 static const struct iio_info adxl355_info = {
572 .read_raw = adxl355_read_raw,
573 .write_raw = adxl355_write_raw,
574 .read_avail = &adxl355_read_avail,
577 static const struct iio_trigger_ops adxl355_trigger_ops = {
578 .set_trigger_state = &adxl355_data_rdy_trigger_set_state,
579 .validate_device = &iio_trigger_validate_own_device,
582 static irqreturn_t adxl355_trigger_handler(int irq, void *p)
584 struct iio_poll_func *pf = p;
585 struct iio_dev *indio_dev = pf->indio_dev;
586 struct adxl355_data *data = iio_priv(indio_dev);
589 mutex_lock(&data->lock);
592 * data->buffer is used both for triggered buffer support
593 * and read/write_raw(), hence, it has to be zeroed here before usage.
595 data->buffer.buf[0] = 0;
598 * The acceleration data is 24 bits and big endian. It has to be saved
599 * in 32 bits, hence, it is saved in the 2nd byte of the 4 byte buffer.
600 * The buf array is 14 bytes as it includes 3x4=12 bytes for
601 * accelaration data of x, y, and z axis. It also includes 2 bytes for
604 ret = regmap_bulk_read(data->regmap, ADXL355_XDATA3_REG,
605 &data->buffer.buf[1], 3);
607 goto out_unlock_notify;
609 ret = regmap_bulk_read(data->regmap, ADXL355_YDATA3_REG,
610 &data->buffer.buf[5], 3);
612 goto out_unlock_notify;
614 ret = regmap_bulk_read(data->regmap, ADXL355_ZDATA3_REG,
615 &data->buffer.buf[9], 3);
617 goto out_unlock_notify;
619 ret = regmap_bulk_read(data->regmap, ADXL355_TEMP2_REG,
620 &data->buffer.buf[12], 2);
622 goto out_unlock_notify;
624 iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
628 mutex_unlock(&data->lock);
629 iio_trigger_notify_done(indio_dev->trig);
634 #define ADXL355_ACCEL_CHANNEL(index, reg, axis) { \
638 .channel2 = IIO_MOD_##axis, \
639 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
640 BIT(IIO_CHAN_INFO_CALIBBIAS), \
641 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
642 BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
643 BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
644 .info_mask_shared_by_type_available = \
645 BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
646 BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
647 .scan_index = index, \
653 .endianness = IIO_BE, \
657 static const struct iio_chan_spec adxl355_channels[] = {
658 ADXL355_ACCEL_CHANNEL(0, chan_x, X),
659 ADXL355_ACCEL_CHANNEL(1, chan_y, Y),
660 ADXL355_ACCEL_CHANNEL(2, chan_z, Z),
663 .address = ADXL355_TEMP2_REG,
664 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
665 BIT(IIO_CHAN_INFO_SCALE) |
666 BIT(IIO_CHAN_INFO_OFFSET),
672 .endianness = IIO_BE,
675 IIO_CHAN_SOFT_TIMESTAMP(4),
678 static int adxl355_probe_trigger(struct iio_dev *indio_dev, int irq)
680 struct adxl355_data *data = iio_priv(indio_dev);
683 data->dready_trig = devm_iio_trigger_alloc(data->dev, "%s-dev%d",
685 iio_device_id(indio_dev));
686 if (!data->dready_trig)
689 data->dready_trig->ops = &adxl355_trigger_ops;
690 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
692 ret = devm_request_irq(data->dev, irq,
693 &iio_trigger_generic_data_rdy_poll,
694 IRQF_ONESHOT, "adxl355_irq", data->dready_trig);
696 return dev_err_probe(data->dev, ret, "request irq %d failed\n",
699 ret = devm_iio_trigger_register(data->dev, data->dready_trig);
701 dev_err(data->dev, "iio trigger register failed\n");
705 indio_dev->trig = iio_trigger_get(data->dready_trig);
710 int adxl355_core_probe(struct device *dev, struct regmap *regmap,
713 struct adxl355_data *data;
714 struct iio_dev *indio_dev;
718 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
722 data = iio_priv(indio_dev);
723 data->regmap = regmap;
725 data->op_mode = ADXL355_STANDBY;
726 mutex_init(&data->lock);
728 indio_dev->name = name;
729 indio_dev->info = &adxl355_info;
730 indio_dev->modes = INDIO_DIRECT_MODE;
731 indio_dev->channels = adxl355_channels;
732 indio_dev->num_channels = ARRAY_SIZE(adxl355_channels);
733 indio_dev->available_scan_masks = adxl355_avail_scan_masks;
735 ret = adxl355_setup(data);
737 dev_err(dev, "ADXL355 setup failed\n");
741 ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
742 &iio_pollfunc_store_time,
743 &adxl355_trigger_handler, NULL);
745 dev_err(dev, "iio triggered buffer setup failed\n");
750 * TODO: Would be good to move it to the generic version.
752 irq = of_irq_get_byname(dev->of_node, "DRDY");
754 ret = adxl355_probe_trigger(indio_dev, irq);
759 return devm_iio_device_register(dev, indio_dev);
761 EXPORT_SYMBOL_GPL(adxl355_core_probe);
763 MODULE_AUTHOR("Puranjay Mohan <puranjay12@gmail.com>");
764 MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer core driver");
765 MODULE_LICENSE("GPL v2");