1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Cadence Design Systems Inc.
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
8 #include <linux/atomic.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
20 #include "internals.h"
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24 static int __i3c_first_dynamic_bus_num;
25 static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
28 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
29 * @bus: I3C bus to take the lock on
31 * This function takes the bus lock so that no other operations can occur on
32 * the bus. This is needed for all kind of bus maintenance operation, like
33 * - enabling/disabling slave events
35 * - changing the dynamic address of a device
36 * - relinquishing mastership
39 * The reason for this kind of locking is that we don't want drivers and core
40 * logic to rely on I3C device information that could be changed behind their
43 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
45 down_write(&bus->lock);
49 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
51 * @bus: I3C bus to release the lock on
53 * Should be called when the bus maintenance operation is done. See
54 * i3c_bus_maintenance_lock() for more details on what these maintenance
57 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
63 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
64 * @bus: I3C bus to take the lock on
66 * This function takes the bus lock for any operation that is not a maintenance
67 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
68 * maintenance operations). Basically all communications with I3C devices are
69 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
70 * state or I3C dynamic address).
72 * Note that this lock is not guaranteeing serialization of normal operations.
73 * In other words, transfer requests passed to the I3C master can be submitted
74 * in parallel and I3C master drivers have to use their own locking to make
75 * sure two different communications are not inter-mixed, or access to the
76 * output/input queue is not done while the engine is busy.
78 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
80 down_read(&bus->lock);
84 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
85 * @bus: I3C bus to release the lock on
87 * Should be called when a normal operation is done. See
88 * i3c_bus_normaluse_lock() for more details on what these normal operations
91 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
96 static struct i3c_master_controller *
97 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
99 return container_of(i3cbus, struct i3c_master_controller, bus);
102 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
104 return container_of(dev, struct i3c_master_controller, dev);
107 static const struct device_type i3c_device_type;
109 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
111 struct i3c_master_controller *master;
113 if (dev->type == &i3c_device_type)
114 return dev_to_i3cdev(dev)->bus;
116 master = dev_to_i3cmaster(dev);
121 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
123 struct i3c_master_controller *master;
125 if (dev->type == &i3c_device_type)
126 return dev_to_i3cdev(dev)->desc;
128 master = dev_to_i3cmaster(dev);
133 static ssize_t bcr_show(struct device *dev,
134 struct device_attribute *da,
137 struct i3c_bus *bus = dev_to_i3cbus(dev);
138 struct i3c_dev_desc *desc;
141 i3c_bus_normaluse_lock(bus);
142 desc = dev_to_i3cdesc(dev);
143 ret = sprintf(buf, "%x\n", desc->info.bcr);
144 i3c_bus_normaluse_unlock(bus);
148 static DEVICE_ATTR_RO(bcr);
150 static ssize_t dcr_show(struct device *dev,
151 struct device_attribute *da,
154 struct i3c_bus *bus = dev_to_i3cbus(dev);
155 struct i3c_dev_desc *desc;
158 i3c_bus_normaluse_lock(bus);
159 desc = dev_to_i3cdesc(dev);
160 ret = sprintf(buf, "%x\n", desc->info.dcr);
161 i3c_bus_normaluse_unlock(bus);
165 static DEVICE_ATTR_RO(dcr);
167 static ssize_t pid_show(struct device *dev,
168 struct device_attribute *da,
171 struct i3c_bus *bus = dev_to_i3cbus(dev);
172 struct i3c_dev_desc *desc;
175 i3c_bus_normaluse_lock(bus);
176 desc = dev_to_i3cdesc(dev);
177 ret = sprintf(buf, "%llx\n", desc->info.pid);
178 i3c_bus_normaluse_unlock(bus);
182 static DEVICE_ATTR_RO(pid);
184 static ssize_t dynamic_address_show(struct device *dev,
185 struct device_attribute *da,
188 struct i3c_bus *bus = dev_to_i3cbus(dev);
189 struct i3c_dev_desc *desc;
192 i3c_bus_normaluse_lock(bus);
193 desc = dev_to_i3cdesc(dev);
194 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
195 i3c_bus_normaluse_unlock(bus);
199 static DEVICE_ATTR_RO(dynamic_address);
201 static const char * const hdrcap_strings[] = {
202 "hdr-ddr", "hdr-tsp", "hdr-tsl",
205 static ssize_t hdrcap_show(struct device *dev,
206 struct device_attribute *da,
209 struct i3c_bus *bus = dev_to_i3cbus(dev);
210 struct i3c_dev_desc *desc;
211 ssize_t offset = 0, ret;
215 i3c_bus_normaluse_lock(bus);
216 desc = dev_to_i3cdesc(dev);
217 caps = desc->info.hdr_cap;
218 for_each_set_bit(mode, &caps, 8) {
219 if (mode >= ARRAY_SIZE(hdrcap_strings))
222 if (!hdrcap_strings[mode])
225 ret = sprintf(buf + offset, offset ? " %s" : "%s",
226 hdrcap_strings[mode]);
233 ret = sprintf(buf + offset, "\n");
240 i3c_bus_normaluse_unlock(bus);
244 static DEVICE_ATTR_RO(hdrcap);
246 static ssize_t modalias_show(struct device *dev,
247 struct device_attribute *da, char *buf)
249 struct i3c_device *i3c = dev_to_i3cdev(dev);
250 struct i3c_device_info devinfo;
251 u16 manuf, part, ext;
253 i3c_device_get_info(i3c, &devinfo);
254 manuf = I3C_PID_MANUF_ID(devinfo.pid);
255 part = I3C_PID_PART_ID(devinfo.pid);
256 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
258 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
259 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
262 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
263 devinfo.dcr, manuf, part, ext);
265 static DEVICE_ATTR_RO(modalias);
267 static struct attribute *i3c_device_attrs[] = {
271 &dev_attr_dynamic_address.attr,
272 &dev_attr_hdrcap.attr,
273 &dev_attr_modalias.attr,
276 ATTRIBUTE_GROUPS(i3c_device);
278 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
280 const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
281 struct i3c_device_info devinfo;
282 u16 manuf, part, ext;
284 i3c_device_get_info(i3cdev, &devinfo);
285 manuf = I3C_PID_MANUF_ID(devinfo.pid);
286 part = I3C_PID_PART_ID(devinfo.pid);
287 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
289 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
290 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
293 return add_uevent_var(env,
294 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
295 devinfo.dcr, manuf, part, ext);
298 static const struct device_type i3c_device_type = {
299 .groups = i3c_device_groups,
300 .uevent = i3c_device_uevent,
303 static int i3c_device_match(struct device *dev, struct device_driver *drv)
305 struct i3c_device *i3cdev;
306 struct i3c_driver *i3cdrv;
308 if (dev->type != &i3c_device_type)
311 i3cdev = dev_to_i3cdev(dev);
312 i3cdrv = drv_to_i3cdrv(drv);
313 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
319 static int i3c_device_probe(struct device *dev)
321 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
322 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
324 return driver->probe(i3cdev);
327 static void i3c_device_remove(struct device *dev)
329 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
330 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
333 driver->remove(i3cdev);
335 i3c_device_free_ibi(i3cdev);
338 struct bus_type i3c_bus_type = {
340 .match = i3c_device_match,
341 .probe = i3c_device_probe,
342 .remove = i3c_device_remove,
345 static enum i3c_addr_slot_status
346 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
348 unsigned long status;
349 int bitpos = addr * 2;
351 if (addr > I2C_MAX_ADDR)
352 return I3C_ADDR_SLOT_RSVD;
354 status = bus->addrslots[bitpos / BITS_PER_LONG];
355 status >>= bitpos % BITS_PER_LONG;
357 return status & I3C_ADDR_SLOT_STATUS_MASK;
360 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
361 enum i3c_addr_slot_status status)
363 int bitpos = addr * 2;
366 if (addr > I2C_MAX_ADDR)
369 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
370 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
371 (bitpos % BITS_PER_LONG));
372 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
375 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
377 enum i3c_addr_slot_status status;
379 status = i3c_bus_get_addr_slot_status(bus, addr);
381 return status == I3C_ADDR_SLOT_FREE;
384 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
386 enum i3c_addr_slot_status status;
389 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
390 status = i3c_bus_get_addr_slot_status(bus, addr);
391 if (status == I3C_ADDR_SLOT_FREE)
398 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
402 /* Addresses 0 to 7 are reserved. */
403 for (i = 0; i < 8; i++)
404 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
407 * Reserve broadcast address and all addresses that might collide
408 * with the broadcast address when facing a single bit error.
410 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
412 for (i = 0; i < 7; i++)
413 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
417 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
419 mutex_lock(&i3c_core_lock);
420 idr_remove(&i3c_bus_idr, i3cbus->id);
421 mutex_unlock(&i3c_core_lock);
424 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
426 int ret, start, end, id = -1;
428 init_rwsem(&i3cbus->lock);
429 INIT_LIST_HEAD(&i3cbus->devs.i2c);
430 INIT_LIST_HEAD(&i3cbus->devs.i3c);
431 i3c_bus_init_addrslots(i3cbus);
432 i3cbus->mode = I3C_BUS_MODE_PURE;
435 id = of_alias_get_id(np, "i3c");
437 mutex_lock(&i3c_core_lock);
442 start = __i3c_first_dynamic_bus_num;
446 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
447 mutex_unlock(&i3c_core_lock);
457 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data),
463 mutex_lock(&i3c_core_lock);
464 idr_for_each_entry(&i3c_bus_idr, bus, id)
466 mutex_unlock(&i3c_core_lock);
468 EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
470 int i3c_register_notifier(struct notifier_block *nb)
472 return blocking_notifier_chain_register(&i3c_bus_notifier, nb);
474 EXPORT_SYMBOL_GPL(i3c_register_notifier);
476 int i3c_unregister_notifier(struct notifier_block *nb)
478 return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb);
480 EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
482 static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
484 blocking_notifier_call_chain(&i3c_bus_notifier, action, bus);
487 static const char * const i3c_bus_mode_strings[] = {
488 [I3C_BUS_MODE_PURE] = "pure",
489 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
490 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
491 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
494 static ssize_t mode_show(struct device *dev,
495 struct device_attribute *da,
498 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
501 i3c_bus_normaluse_lock(i3cbus);
502 if (i3cbus->mode < 0 ||
503 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
504 !i3c_bus_mode_strings[i3cbus->mode])
505 ret = sprintf(buf, "unknown\n");
507 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
508 i3c_bus_normaluse_unlock(i3cbus);
512 static DEVICE_ATTR_RO(mode);
514 static ssize_t current_master_show(struct device *dev,
515 struct device_attribute *da,
518 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
521 i3c_bus_normaluse_lock(i3cbus);
522 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
523 i3cbus->cur_master->info.pid);
524 i3c_bus_normaluse_unlock(i3cbus);
528 static DEVICE_ATTR_RO(current_master);
530 static ssize_t i3c_scl_frequency_show(struct device *dev,
531 struct device_attribute *da,
534 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
537 i3c_bus_normaluse_lock(i3cbus);
538 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
539 i3c_bus_normaluse_unlock(i3cbus);
543 static DEVICE_ATTR_RO(i3c_scl_frequency);
545 static ssize_t i2c_scl_frequency_show(struct device *dev,
546 struct device_attribute *da,
549 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
552 i3c_bus_normaluse_lock(i3cbus);
553 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
554 i3c_bus_normaluse_unlock(i3cbus);
558 static DEVICE_ATTR_RO(i2c_scl_frequency);
560 static struct attribute *i3c_masterdev_attrs[] = {
562 &dev_attr_current_master.attr,
563 &dev_attr_i3c_scl_frequency.attr,
564 &dev_attr_i2c_scl_frequency.attr,
568 &dev_attr_dynamic_address.attr,
569 &dev_attr_hdrcap.attr,
572 ATTRIBUTE_GROUPS(i3c_masterdev);
574 static void i3c_masterdev_release(struct device *dev)
576 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
577 struct i3c_bus *bus = dev_to_i3cbus(dev);
580 destroy_workqueue(master->wq);
582 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
583 i3c_bus_cleanup(bus);
585 of_node_put(dev->of_node);
588 static const struct device_type i3c_masterdev_type = {
589 .groups = i3c_masterdev_groups,
592 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
593 unsigned long max_i2c_scl_rate)
595 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
599 switch (i3cbus->mode) {
600 case I3C_BUS_MODE_PURE:
601 if (!i3cbus->scl_rate.i3c)
602 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
604 case I3C_BUS_MODE_MIXED_FAST:
605 case I3C_BUS_MODE_MIXED_LIMITED:
606 if (!i3cbus->scl_rate.i3c)
607 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
608 if (!i3cbus->scl_rate.i2c)
609 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
611 case I3C_BUS_MODE_MIXED_SLOW:
612 if (!i3cbus->scl_rate.i2c)
613 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
614 if (!i3cbus->scl_rate.i3c ||
615 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
616 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
622 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
623 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
626 * I3C/I2C frequency may have been overridden, check that user-provided
627 * values are not exceeding max possible frequency.
629 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
630 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
636 static struct i3c_master_controller *
637 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
639 return container_of(adap, struct i3c_master_controller, i2c);
642 static struct i2c_adapter *
643 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
648 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
653 static struct i2c_dev_desc *
654 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
657 struct i2c_dev_desc *dev;
659 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
661 return ERR_PTR(-ENOMEM);
663 dev->common.master = master;
670 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
674 dest->payload.len = payloadlen;
676 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
678 dest->payload.data = NULL;
680 return dest->payload.data;
683 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
685 kfree(dest->payload.data);
688 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
689 struct i3c_ccc_cmd_dest *dests,
692 cmd->rnw = rnw ? 1 : 0;
695 cmd->ndests = ndests;
696 cmd->err = I3C_ERROR_UNKNOWN;
699 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
700 struct i3c_ccc_cmd *cmd)
707 if (WARN_ON(master->init_done &&
708 !rwsem_is_locked(&master->bus.lock)))
711 if (!master->ops->send_ccc_cmd)
714 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
717 if (master->ops->supports_ccc_cmd &&
718 !master->ops->supports_ccc_cmd(master, cmd))
721 ret = master->ops->send_ccc_cmd(master, cmd);
723 if (cmd->err != I3C_ERROR_UNKNOWN)
732 static struct i2c_dev_desc *
733 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
736 struct i2c_dev_desc *dev;
738 i3c_bus_for_each_i2cdev(&master->bus, dev) {
739 if (dev->addr == addr)
747 * i3c_master_get_free_addr() - get a free address on the bus
748 * @master: I3C master object
749 * @start_addr: where to start searching
751 * This function must be called with the bus lock held in write mode.
753 * Return: the first free address starting at @start_addr (included) or -ENOMEM
754 * if there's no more address available.
756 int i3c_master_get_free_addr(struct i3c_master_controller *master,
759 return i3c_bus_get_free_addr(&master->bus, start_addr);
761 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
763 static void i3c_device_release(struct device *dev)
765 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
767 WARN_ON(i3cdev->desc);
769 of_node_put(i3cdev->dev.of_node);
773 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
778 static struct i3c_dev_desc *
779 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
780 const struct i3c_device_info *info)
782 struct i3c_dev_desc *dev;
784 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
786 return ERR_PTR(-ENOMEM);
788 dev->common.master = master;
790 mutex_init(&dev->ibi_lock);
795 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
798 enum i3c_addr_slot_status addrstat;
799 struct i3c_ccc_cmd_dest dest;
800 struct i3c_ccc_cmd cmd;
806 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
807 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
810 i3c_ccc_cmd_dest_init(&dest, addr, 0);
811 i3c_ccc_cmd_init(&cmd, false,
812 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
814 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
815 i3c_ccc_cmd_dest_cleanup(&dest);
821 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
823 * @master: master used to send frames on the bus
825 * Send a ENTDAA CCC command to start a DAA procedure.
827 * Note that this function only sends the ENTDAA CCC command, all the logic
828 * behind dynamic address assignment has to be handled in the I3C master
831 * This function must be called with the bus lock held in write mode.
833 * Return: 0 in case of success, a positive I3C error code if the error is
834 * one of the official Mx error codes, and a negative error code otherwise.
836 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
838 struct i3c_ccc_cmd_dest dest;
839 struct i3c_ccc_cmd cmd;
842 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
843 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
844 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
845 i3c_ccc_cmd_dest_cleanup(&dest);
849 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
851 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
852 u8 addr, bool enable, u8 evts)
854 struct i3c_ccc_events *events;
855 struct i3c_ccc_cmd_dest dest;
856 struct i3c_ccc_cmd cmd;
859 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
863 events->events = evts;
864 i3c_ccc_cmd_init(&cmd, false,
866 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
867 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
869 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
870 i3c_ccc_cmd_dest_cleanup(&dest);
876 * i3c_master_disec_locked() - send a DISEC CCC command
877 * @master: master used to send frames on the bus
878 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
879 * @evts: events to disable
881 * Send a DISEC CCC command to disable some or all events coming from a
882 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
884 * This function must be called with the bus lock held in write mode.
886 * Return: 0 in case of success, a positive I3C error code if the error is
887 * one of the official Mx error codes, and a negative error code otherwise.
889 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
892 return i3c_master_enec_disec_locked(master, addr, false, evts);
894 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
897 * i3c_master_enec_locked() - send an ENEC CCC command
898 * @master: master used to send frames on the bus
899 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
900 * @evts: events to disable
902 * Sends an ENEC CCC command to enable some or all events coming from a
903 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
905 * This function must be called with the bus lock held in write mode.
907 * Return: 0 in case of success, a positive I3C error code if the error is
908 * one of the official Mx error codes, and a negative error code otherwise.
910 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
913 return i3c_master_enec_disec_locked(master, addr, true, evts);
915 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
918 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
919 * @master: master used to send frames on the bus
921 * Send a DEFSLVS CCC command containing all the devices known to the @master.
922 * This is useful when you have secondary masters on the bus to propagate
923 * device information.
925 * This should be called after all I3C devices have been discovered (in other
926 * words, after the DAA procedure has finished) and instantiated in
927 * &i3c_master_controller_ops->bus_init().
928 * It should also be called if a master ACKed an Hot-Join request and assigned
929 * a dynamic address to the device joining the bus.
931 * This function must be called with the bus lock held in write mode.
933 * Return: 0 in case of success, a positive I3C error code if the error is
934 * one of the official Mx error codes, and a negative error code otherwise.
936 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
938 struct i3c_ccc_defslvs *defslvs;
939 struct i3c_ccc_dev_desc *desc;
940 struct i3c_ccc_cmd_dest dest;
941 struct i3c_dev_desc *i3cdev;
942 struct i2c_dev_desc *i2cdev;
943 struct i3c_ccc_cmd cmd;
951 bus = i3c_master_get_bus(master);
952 i3c_bus_for_each_i3cdev(bus, i3cdev) {
955 if (i3cdev == master->this)
958 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
963 /* No other master on the bus, skip DEFSLVS. */
967 i3c_bus_for_each_i2cdev(bus, i2cdev)
970 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
971 struct_size(defslvs, slaves,
976 defslvs->count = ndevs;
977 defslvs->master.bcr = master->this->info.bcr;
978 defslvs->master.dcr = master->this->info.dcr;
979 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
980 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
982 desc = defslvs->slaves;
983 i3c_bus_for_each_i2cdev(bus, i2cdev) {
984 desc->lvr = i2cdev->lvr;
985 desc->static_addr = i2cdev->addr << 1;
989 i3c_bus_for_each_i3cdev(bus, i3cdev) {
990 /* Skip the I3C dev representing this master. */
991 if (i3cdev == master->this)
994 desc->bcr = i3cdev->info.bcr;
995 desc->dcr = i3cdev->info.dcr;
996 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
997 desc->static_addr = i3cdev->info.static_addr << 1;
1001 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
1002 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1003 i3c_ccc_cmd_dest_cleanup(&dest);
1007 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
1009 static int i3c_master_setda_locked(struct i3c_master_controller *master,
1010 u8 oldaddr, u8 newaddr, bool setdasa)
1012 struct i3c_ccc_cmd_dest dest;
1013 struct i3c_ccc_setda *setda;
1014 struct i3c_ccc_cmd cmd;
1017 if (!oldaddr || !newaddr)
1020 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
1024 setda->addr = newaddr << 1;
1025 i3c_ccc_cmd_init(&cmd, false,
1026 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1028 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1029 i3c_ccc_cmd_dest_cleanup(&dest);
1034 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1035 u8 static_addr, u8 dyn_addr)
1037 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1040 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1041 u8 oldaddr, u8 newaddr)
1043 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1046 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1047 struct i3c_device_info *info)
1049 struct i3c_ccc_cmd_dest dest;
1050 struct i3c_ccc_mrl *mrl;
1051 struct i3c_ccc_cmd cmd;
1054 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1059 * When the device does not have IBI payload GETMRL only returns 2
1062 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1063 dest.payload.len -= 1;
1065 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1066 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1070 switch (dest.payload.len) {
1072 info->max_ibi_len = mrl->ibi_len;
1075 info->max_read_len = be16_to_cpu(mrl->read_len);
1083 i3c_ccc_cmd_dest_cleanup(&dest);
1088 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1089 struct i3c_device_info *info)
1091 struct i3c_ccc_cmd_dest dest;
1092 struct i3c_ccc_mwl *mwl;
1093 struct i3c_ccc_cmd cmd;
1096 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1100 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1101 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1105 if (dest.payload.len != sizeof(*mwl)) {
1110 info->max_write_len = be16_to_cpu(mwl->len);
1113 i3c_ccc_cmd_dest_cleanup(&dest);
1118 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1119 struct i3c_device_info *info)
1121 struct i3c_ccc_getmxds *getmaxds;
1122 struct i3c_ccc_cmd_dest dest;
1123 struct i3c_ccc_cmd cmd;
1126 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1131 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1132 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1136 if (dest.payload.len != 2 && dest.payload.len != 5) {
1141 info->max_read_ds = getmaxds->maxrd;
1142 info->max_write_ds = getmaxds->maxwr;
1143 if (dest.payload.len == 5)
1144 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1145 ((u32)getmaxds->maxrdturn[1] << 8) |
1146 ((u32)getmaxds->maxrdturn[2] << 16);
1149 i3c_ccc_cmd_dest_cleanup(&dest);
1154 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1155 struct i3c_device_info *info)
1157 struct i3c_ccc_gethdrcap *gethdrcap;
1158 struct i3c_ccc_cmd_dest dest;
1159 struct i3c_ccc_cmd cmd;
1162 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1163 sizeof(*gethdrcap));
1167 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1168 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1172 if (dest.payload.len != 1) {
1177 info->hdr_cap = gethdrcap->modes;
1180 i3c_ccc_cmd_dest_cleanup(&dest);
1185 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1186 struct i3c_device_info *info)
1188 struct i3c_ccc_getpid *getpid;
1189 struct i3c_ccc_cmd_dest dest;
1190 struct i3c_ccc_cmd cmd;
1193 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1197 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1198 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1203 for (i = 0; i < sizeof(getpid->pid); i++) {
1204 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1206 info->pid |= (u64)getpid->pid[i] << sft;
1210 i3c_ccc_cmd_dest_cleanup(&dest);
1215 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1216 struct i3c_device_info *info)
1218 struct i3c_ccc_getbcr *getbcr;
1219 struct i3c_ccc_cmd_dest dest;
1220 struct i3c_ccc_cmd cmd;
1223 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1227 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1228 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1232 info->bcr = getbcr->bcr;
1235 i3c_ccc_cmd_dest_cleanup(&dest);
1240 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1241 struct i3c_device_info *info)
1243 struct i3c_ccc_getdcr *getdcr;
1244 struct i3c_ccc_cmd_dest dest;
1245 struct i3c_ccc_cmd cmd;
1248 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1252 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1253 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1257 info->dcr = getdcr->dcr;
1260 i3c_ccc_cmd_dest_cleanup(&dest);
1265 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1267 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1268 enum i3c_addr_slot_status slot_status;
1271 if (!dev->info.dyn_addr)
1274 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1275 dev->info.dyn_addr);
1276 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1277 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1280 ret = i3c_master_getpid_locked(master, &dev->info);
1284 ret = i3c_master_getbcr_locked(master, &dev->info);
1288 ret = i3c_master_getdcr_locked(master, &dev->info);
1292 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1293 ret = i3c_master_getmxds_locked(master, &dev->info);
1298 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1299 dev->info.max_ibi_len = 1;
1301 i3c_master_getmrl_locked(master, &dev->info);
1302 i3c_master_getmwl_locked(master, &dev->info);
1304 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1305 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1313 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1315 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1317 if (dev->info.static_addr)
1318 i3c_bus_set_addr_slot_status(&master->bus,
1319 dev->info.static_addr,
1320 I3C_ADDR_SLOT_FREE);
1322 if (dev->info.dyn_addr)
1323 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1324 I3C_ADDR_SLOT_FREE);
1326 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1327 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1328 I3C_ADDR_SLOT_FREE);
1331 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1333 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1334 enum i3c_addr_slot_status status;
1336 if (!dev->info.static_addr && !dev->info.dyn_addr)
1339 if (dev->info.static_addr) {
1340 status = i3c_bus_get_addr_slot_status(&master->bus,
1341 dev->info.static_addr);
1342 /* Since static address and assigned dynamic address can be
1343 * equal, allow this case to pass.
1345 if (status != I3C_ADDR_SLOT_FREE &&
1346 dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1349 i3c_bus_set_addr_slot_status(&master->bus,
1350 dev->info.static_addr,
1351 I3C_ADDR_SLOT_I3C_DEV);
1355 * ->init_dyn_addr should have been reserved before that, so, if we're
1356 * trying to apply a pre-reserved dynamic address, we should not try
1357 * to reserve the address slot a second time.
1359 if (dev->info.dyn_addr &&
1361 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1362 status = i3c_bus_get_addr_slot_status(&master->bus,
1363 dev->info.dyn_addr);
1364 if (status != I3C_ADDR_SLOT_FREE)
1365 goto err_release_static_addr;
1367 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1368 I3C_ADDR_SLOT_I3C_DEV);
1373 err_release_static_addr:
1374 if (dev->info.static_addr)
1375 i3c_bus_set_addr_slot_status(&master->bus,
1376 dev->info.static_addr,
1377 I3C_ADDR_SLOT_FREE);
1382 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1383 struct i3c_dev_desc *dev)
1388 * We don't attach devices to the controller until they are
1389 * addressable on the bus.
1391 if (!dev->info.static_addr && !dev->info.dyn_addr)
1394 ret = i3c_master_get_i3c_addrs(dev);
1398 /* Do not attach the master device itself. */
1399 if (master->this != dev && master->ops->attach_i3c_dev) {
1400 ret = master->ops->attach_i3c_dev(dev);
1402 i3c_master_put_i3c_addrs(dev);
1407 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1412 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1415 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1416 enum i3c_addr_slot_status status;
1419 if (dev->info.dyn_addr != old_dyn_addr &&
1421 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1422 status = i3c_bus_get_addr_slot_status(&master->bus,
1423 dev->info.dyn_addr);
1424 if (status != I3C_ADDR_SLOT_FREE)
1426 i3c_bus_set_addr_slot_status(&master->bus,
1428 I3C_ADDR_SLOT_I3C_DEV);
1430 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1431 I3C_ADDR_SLOT_FREE);
1434 if (master->ops->reattach_i3c_dev) {
1435 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1437 i3c_master_put_i3c_addrs(dev);
1445 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1447 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1449 /* Do not detach the master device itself. */
1450 if (master->this != dev && master->ops->detach_i3c_dev)
1451 master->ops->detach_i3c_dev(dev);
1453 i3c_master_put_i3c_addrs(dev);
1454 list_del(&dev->common.node);
1457 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1458 struct i2c_dev_desc *dev)
1462 if (master->ops->attach_i2c_dev) {
1463 ret = master->ops->attach_i2c_dev(dev);
1468 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1473 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1475 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1477 list_del(&dev->common.node);
1479 if (master->ops->detach_i2c_dev)
1480 master->ops->detach_i2c_dev(dev);
1483 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1484 struct i3c_dev_boardinfo *boardinfo)
1486 struct i3c_device_info info = {
1487 .static_addr = boardinfo->static_addr,
1488 .pid = boardinfo->pid,
1490 struct i3c_dev_desc *i3cdev;
1493 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1497 i3cdev->boardinfo = boardinfo;
1499 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1503 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1504 i3cdev->boardinfo->init_dyn_addr);
1506 goto err_detach_dev;
1508 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1509 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1513 ret = i3c_master_retrieve_dev_info(i3cdev);
1520 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1522 i3c_master_detach_i3c_dev(i3cdev);
1524 i3c_master_free_i3c_dev(i3cdev);
1530 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1532 struct i3c_dev_desc *desc;
1535 if (!master->init_done)
1538 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1539 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1542 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1546 desc->dev->bus = &master->bus;
1547 desc->dev->desc = desc;
1548 desc->dev->dev.parent = &master->dev;
1549 desc->dev->dev.type = &i3c_device_type;
1550 desc->dev->dev.bus = &i3c_bus_type;
1551 desc->dev->dev.release = i3c_device_release;
1552 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1555 if (desc->boardinfo)
1556 desc->dev->dev.of_node = desc->boardinfo->of_node;
1558 ret = device_register(&desc->dev->dev);
1560 dev_err(&master->dev,
1561 "Failed to add I3C device (err = %d)\n", ret);
1562 put_device(&desc->dev->dev);
1568 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1569 * @master: master doing the DAA
1571 * This function is instantiating an I3C device object and adding it to the
1572 * I3C device list. All device information are automatically retrieved using
1573 * standard CCC commands.
1575 * The I3C device object is returned in case the master wants to attach
1576 * private data to it using i3c_dev_set_master_data().
1578 * This function must be called with the bus lock held in write mode.
1580 * Return: a 0 in case of success, an negative error code otherwise.
1582 int i3c_master_do_daa(struct i3c_master_controller *master)
1586 i3c_bus_maintenance_lock(&master->bus);
1587 ret = master->ops->do_daa(master);
1588 i3c_bus_maintenance_unlock(&master->bus);
1593 i3c_bus_normaluse_lock(&master->bus);
1594 i3c_master_register_new_i3c_devs(master);
1595 i3c_bus_normaluse_unlock(&master->bus);
1599 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1602 * i3c_master_set_info() - set master device information
1603 * @master: master used to send frames on the bus
1604 * @info: I3C device information
1606 * Set master device info. This should be called from
1607 * &i3c_master_controller_ops->bus_init().
1609 * Not all &i3c_device_info fields are meaningful for a master device.
1610 * Here is a list of fields that should be properly filled:
1612 * - &i3c_device_info->dyn_addr
1613 * - &i3c_device_info->bcr
1614 * - &i3c_device_info->dcr
1615 * - &i3c_device_info->pid
1616 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1617 * &i3c_device_info->bcr
1619 * This function must be called with the bus lock held in maintenance mode.
1621 * Return: 0 if @info contains valid information (not every piece of
1622 * information can be checked, but we can at least make sure @info->dyn_addr
1623 * and @info->bcr are correct), -EINVAL otherwise.
1625 int i3c_master_set_info(struct i3c_master_controller *master,
1626 const struct i3c_device_info *info)
1628 struct i3c_dev_desc *i3cdev;
1631 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1634 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1641 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1643 return PTR_ERR(i3cdev);
1645 master->this = i3cdev;
1646 master->bus.cur_master = master->this;
1648 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1655 i3c_master_free_i3c_dev(i3cdev);
1659 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1661 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1663 struct i3c_dev_desc *i3cdev, *i3ctmp;
1664 struct i2c_dev_desc *i2cdev, *i2ctmp;
1666 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1668 i3c_master_detach_i3c_dev(i3cdev);
1670 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1671 i3c_bus_set_addr_slot_status(&master->bus,
1672 i3cdev->boardinfo->init_dyn_addr,
1673 I3C_ADDR_SLOT_FREE);
1675 i3c_master_free_i3c_dev(i3cdev);
1678 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1680 i3c_master_detach_i2c_dev(i2cdev);
1681 i3c_bus_set_addr_slot_status(&master->bus,
1683 I3C_ADDR_SLOT_FREE);
1684 i3c_master_free_i2c_dev(i2cdev);
1689 * i3c_master_bus_init() - initialize an I3C bus
1690 * @master: main master initializing the bus
1692 * This function is following all initialisation steps described in the I3C
1695 * 1. Attach I2C devs to the master so that the master can fill its internal
1696 * device table appropriately
1698 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1699 * the master controller. That's usually where the bus mode is selected
1700 * (pure bus or mixed fast/slow bus)
1702 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1703 * particularly important when the bus was previously configured by someone
1704 * else (for example the bootloader)
1706 * 4. Disable all slave events.
1708 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1709 * also have static_addr, try to pre-assign dynamic addresses requested by
1710 * the FW with SETDASA and attach corresponding statically defined I3C
1711 * devices to the master.
1713 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1714 * remaining I3C devices
1716 * Once this is done, all I3C and I2C devices should be usable.
1718 * Return: a 0 in case of success, an negative error code otherwise.
1720 static int i3c_master_bus_init(struct i3c_master_controller *master)
1722 enum i3c_addr_slot_status status;
1723 struct i2c_dev_boardinfo *i2cboardinfo;
1724 struct i3c_dev_boardinfo *i3cboardinfo;
1725 struct i2c_dev_desc *i2cdev;
1729 * First attach all devices with static definitions provided by the
1732 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1733 status = i3c_bus_get_addr_slot_status(&master->bus,
1734 i2cboardinfo->base.addr);
1735 if (status != I3C_ADDR_SLOT_FREE) {
1737 goto err_detach_devs;
1740 i3c_bus_set_addr_slot_status(&master->bus,
1741 i2cboardinfo->base.addr,
1742 I3C_ADDR_SLOT_I2C_DEV);
1744 i2cdev = i3c_master_alloc_i2c_dev(master,
1745 i2cboardinfo->base.addr,
1747 if (IS_ERR(i2cdev)) {
1748 ret = PTR_ERR(i2cdev);
1749 goto err_detach_devs;
1752 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1754 i3c_master_free_i2c_dev(i2cdev);
1755 goto err_detach_devs;
1760 * Now execute the controller specific ->bus_init() routine, which
1761 * might configure its internal logic to match the bus limitations.
1763 ret = master->ops->bus_init(master);
1765 goto err_detach_devs;
1768 * The master device should have been instantiated in ->bus_init(),
1769 * complain if this was not the case.
1771 if (!master->this) {
1772 dev_err(&master->dev,
1773 "master_set_info() was not called in ->bus_init()\n");
1775 goto err_bus_cleanup;
1779 * Reset all dynamic address that may have been assigned before
1780 * (assigned by the bootloader for example).
1782 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1783 if (ret && ret != I3C_ERROR_M2)
1784 goto err_bus_cleanup;
1786 /* Disable all slave events before starting DAA. */
1787 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1788 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1790 if (ret && ret != I3C_ERROR_M2)
1791 goto err_bus_cleanup;
1794 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1795 * address and retrieve device information if needed.
1796 * In case pre-assign dynamic address fails, setting dynamic address to
1797 * the requested init_dyn_addr is retried after DAA is done in
1798 * i3c_master_add_i3c_dev_locked().
1800 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1803 * We don't reserve a dynamic address for devices that
1804 * don't explicitly request one.
1806 if (!i3cboardinfo->init_dyn_addr)
1809 ret = i3c_bus_get_addr_slot_status(&master->bus,
1810 i3cboardinfo->init_dyn_addr);
1811 if (ret != I3C_ADDR_SLOT_FREE) {
1816 i3c_bus_set_addr_slot_status(&master->bus,
1817 i3cboardinfo->init_dyn_addr,
1818 I3C_ADDR_SLOT_I3C_DEV);
1821 * Only try to create/attach devices that have a static
1822 * address. Other devices will be created/attached when
1823 * DAA happens, and the requested dynamic address will
1824 * be set using SETNEWDA once those devices become
1828 if (i3cboardinfo->static_addr)
1829 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1832 ret = i3c_master_do_daa(master);
1839 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1842 if (master->ops->bus_cleanup)
1843 master->ops->bus_cleanup(master);
1846 i3c_master_detach_free_devs(master);
1851 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1853 if (master->ops->bus_cleanup)
1854 master->ops->bus_cleanup(master);
1856 i3c_master_detach_free_devs(master);
1859 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1861 struct i3c_master_controller *master = i3cdev->common.master;
1862 struct i3c_dev_boardinfo *i3cboardinfo;
1864 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1865 if (i3cdev->info.pid != i3cboardinfo->pid)
1868 i3cdev->boardinfo = i3cboardinfo;
1869 i3cdev->info.static_addr = i3cboardinfo->static_addr;
1874 static struct i3c_dev_desc *
1875 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1877 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1878 struct i3c_dev_desc *i3cdev;
1880 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1881 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1889 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1890 * @master: master used to send frames on the bus
1891 * @addr: I3C slave dynamic address assigned to the device
1893 * This function is instantiating an I3C device object and adding it to the
1894 * I3C device list. All device information are automatically retrieved using
1895 * standard CCC commands.
1897 * The I3C device object is returned in case the master wants to attach
1898 * private data to it using i3c_dev_set_master_data().
1900 * This function must be called with the bus lock held in write mode.
1902 * Return: a 0 in case of success, an negative error code otherwise.
1904 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1907 struct i3c_device_info info = { .dyn_addr = addr };
1908 struct i3c_dev_desc *newdev, *olddev;
1909 u8 old_dyn_addr = addr, expected_dyn_addr;
1910 struct i3c_ibi_setup ibireq = { };
1911 bool enable_ibi = false;
1917 newdev = i3c_master_alloc_i3c_dev(master, &info);
1919 return PTR_ERR(newdev);
1921 ret = i3c_master_attach_i3c_dev(master, newdev);
1925 ret = i3c_master_retrieve_dev_info(newdev);
1927 goto err_detach_dev;
1929 i3c_master_attach_boardinfo(newdev);
1931 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1933 newdev->dev = olddev->dev;
1935 newdev->dev->desc = newdev;
1938 * We need to restore the IBI state too, so let's save the
1939 * IBI information and try to restore them after olddev has
1940 * been detached+released and its IBI has been stopped and
1941 * the associated resources have been freed.
1943 mutex_lock(&olddev->ibi_lock);
1945 ibireq.handler = olddev->ibi->handler;
1946 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1947 ibireq.num_slots = olddev->ibi->num_slots;
1949 if (olddev->ibi->enabled) {
1951 i3c_dev_disable_ibi_locked(olddev);
1954 i3c_dev_free_ibi_locked(olddev);
1956 mutex_unlock(&olddev->ibi_lock);
1958 old_dyn_addr = olddev->info.dyn_addr;
1960 i3c_master_detach_i3c_dev(olddev);
1961 i3c_master_free_i3c_dev(olddev);
1965 * Depending on our previous state, the expected dynamic address might
1967 * - if the device already had a dynamic address assigned, let's try to
1969 * - if the device did not have a dynamic address and the firmware
1970 * requested a specific address, pick this one
1971 * - in any other case, keep the address automatically assigned by the
1974 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1975 expected_dyn_addr = old_dyn_addr;
1976 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1977 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1979 expected_dyn_addr = newdev->info.dyn_addr;
1981 if (newdev->info.dyn_addr != expected_dyn_addr) {
1983 * Try to apply the expected dynamic address. If it fails, keep
1984 * the address assigned by the master.
1986 ret = i3c_master_setnewda_locked(master,
1987 newdev->info.dyn_addr,
1990 old_dyn_addr = newdev->info.dyn_addr;
1991 newdev->info.dyn_addr = expected_dyn_addr;
1992 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1994 dev_err(&master->dev,
1995 "Failed to assign reserved/old address to device %d%llx",
1996 master->bus.id, newdev->info.pid);
2001 * Now is time to try to restore the IBI setup. If we're lucky,
2002 * everything works as before, otherwise, all we can do is complain.
2003 * FIXME: maybe we should add callback to inform the driver that it
2004 * should request the IBI again instead of trying to hide that from
2007 if (ibireq.handler) {
2008 mutex_lock(&newdev->ibi_lock);
2009 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
2011 dev_err(&master->dev,
2012 "Failed to request IBI on device %d-%llx",
2013 master->bus.id, newdev->info.pid);
2014 } else if (enable_ibi) {
2015 ret = i3c_dev_enable_ibi_locked(newdev);
2017 dev_err(&master->dev,
2018 "Failed to re-enable IBI on device %d-%llx",
2019 master->bus.id, newdev->info.pid);
2021 mutex_unlock(&newdev->ibi_lock);
2027 if (newdev->dev && newdev->dev->desc)
2028 newdev->dev->desc = NULL;
2030 i3c_master_detach_i3c_dev(newdev);
2033 i3c_master_free_i3c_dev(newdev);
2037 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2039 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
2042 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2043 struct device_node *node, u32 *reg)
2045 struct i2c_dev_boardinfo *boardinfo;
2046 struct device *dev = &master->dev;
2049 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2053 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2058 * The I3C Specification does not clearly say I2C devices with 10-bit
2059 * address are supported. These devices can't be passed properly through
2062 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2063 dev_err(dev, "I2C device with 10 bit address not supported.");
2067 /* LVR is encoded in reg[2]. */
2068 boardinfo->lvr = reg[2];
2070 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2077 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2078 struct device_node *node, u32 *reg)
2080 struct i3c_dev_boardinfo *boardinfo;
2081 struct device *dev = &master->dev;
2082 enum i3c_addr_slot_status addrstatus;
2083 u32 init_dyn_addr = 0;
2085 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2090 if (reg[0] > I3C_MAX_ADDR)
2093 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2095 if (addrstatus != I3C_ADDR_SLOT_FREE)
2099 boardinfo->static_addr = reg[0];
2101 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2102 if (init_dyn_addr > I3C_MAX_ADDR)
2105 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2107 if (addrstatus != I3C_ADDR_SLOT_FREE)
2111 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2113 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2114 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2117 boardinfo->init_dyn_addr = init_dyn_addr;
2118 boardinfo->of_node = of_node_get(node);
2119 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2124 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2125 struct device_node *node)
2130 if (!master || !node)
2133 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2138 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2139 * dealing with an I2C device.
2142 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2144 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2149 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2151 struct device *dev = &master->dev;
2152 struct device_node *i3cbus_np = dev->of_node;
2153 struct device_node *node;
2160 for_each_available_child_of_node(i3cbus_np, node) {
2161 ret = of_i3c_master_add_dev(master, node);
2169 * The user might want to limit I2C and I3C speed in case some devices
2170 * on the bus are not supporting typical rates, or if the bus topology
2171 * prevents it from using max possible rate.
2173 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2174 master->bus.scl_rate.i2c = val;
2176 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2177 master->bus.scl_rate.i3c = val;
2182 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2183 struct i2c_msg *xfers, int nxfers)
2185 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2186 struct i2c_dev_desc *dev;
2190 if (!xfers || !master || nxfers <= 0)
2193 if (!master->ops->i2c_xfers)
2196 /* Doing transfers to different devices is not supported. */
2197 addr = xfers[0].addr;
2198 for (i = 1; i < nxfers; i++) {
2199 if (addr != xfers[i].addr)
2203 i3c_bus_normaluse_lock(&master->bus);
2204 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2208 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2209 i3c_bus_normaluse_unlock(&master->bus);
2211 return ret ? ret : nxfers;
2214 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2216 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2219 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2221 /* Fall back to no spike filters and FM bus mode. */
2222 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2224 if (client->dev.of_node) {
2227 if (!of_property_read_u32_array(client->dev.of_node, "reg",
2228 reg, ARRAY_SIZE(reg)))
2235 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2237 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2238 enum i3c_addr_slot_status status;
2239 struct i2c_dev_desc *i2cdev;
2242 /* Already added by board info? */
2243 if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2246 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2247 if (status != I3C_ADDR_SLOT_FREE)
2250 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2251 I3C_ADDR_SLOT_I2C_DEV);
2253 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2254 i3c_master_i2c_get_lvr(client));
2255 if (IS_ERR(i2cdev)) {
2256 ret = PTR_ERR(i2cdev);
2257 goto out_clear_status;
2260 ret = i3c_master_attach_i2c_dev(master, i2cdev);
2267 i3c_master_free_i2c_dev(i2cdev);
2269 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2270 I3C_ADDR_SLOT_FREE);
2275 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2277 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2278 struct i2c_dev_desc *dev;
2280 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2284 i3c_master_detach_i2c_dev(dev);
2285 i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2286 I3C_ADDR_SLOT_FREE);
2287 i3c_master_free_i2c_dev(dev);
2292 static const struct i2c_algorithm i3c_master_i2c_algo = {
2293 .master_xfer = i3c_master_i2c_adapter_xfer,
2294 .functionality = i3c_master_i2c_funcs,
2297 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2300 struct i2c_adapter *adap;
2301 struct i2c_client *client;
2302 struct device *dev = data;
2303 struct i3c_master_controller *master;
2306 if (dev->type != &i2c_client_type)
2309 client = to_i2c_client(dev);
2310 adap = client->adapter;
2312 if (adap->algo != &i3c_master_i2c_algo)
2315 master = i2c_adapter_to_i3c_master(adap);
2317 i3c_bus_maintenance_lock(&master->bus);
2319 case BUS_NOTIFY_ADD_DEVICE:
2320 ret = i3c_master_i2c_attach(adap, client);
2322 case BUS_NOTIFY_DEL_DEVICE:
2323 ret = i3c_master_i2c_detach(adap, client);
2326 i3c_bus_maintenance_unlock(&master->bus);
2331 static struct notifier_block i2cdev_notifier = {
2332 .notifier_call = i3c_i2c_notifier_call,
2335 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2337 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2338 struct i2c_dev_desc *i2cdev;
2339 struct i2c_dev_boardinfo *i2cboardinfo;
2342 adap->dev.parent = master->dev.parent;
2343 adap->owner = master->dev.parent->driver->owner;
2344 adap->algo = &i3c_master_i2c_algo;
2345 strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2347 /* FIXME: Should we allow i3c masters to override these values? */
2348 adap->timeout = 1000;
2351 ret = i2c_add_adapter(adap);
2356 * We silently ignore failures here. The bus should keep working
2357 * correctly even if one or more i2c devices are not registered.
2359 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2360 i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2361 i2cboardinfo->base.addr);
2362 if (WARN_ON(!i2cdev))
2364 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2370 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2372 struct i2c_dev_desc *i2cdev;
2374 i2c_del_adapter(&master->i2c);
2376 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2380 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2382 struct i3c_dev_desc *i3cdev;
2384 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2388 i3cdev->dev->desc = NULL;
2389 if (device_is_registered(&i3cdev->dev->dev))
2390 device_unregister(&i3cdev->dev->dev);
2392 put_device(&i3cdev->dev->dev);
2398 * i3c_master_queue_ibi() - Queue an IBI
2399 * @dev: the device this IBI is coming from
2400 * @slot: the IBI slot used to store the payload
2402 * Queue an IBI to the controller workqueue. The IBI handler attached to
2403 * the dev will be called from a workqueue context.
2405 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2407 atomic_inc(&dev->ibi->pending_ibis);
2408 queue_work(dev->ibi->wq, &slot->work);
2410 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2412 static void i3c_master_handle_ibi(struct work_struct *work)
2414 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2416 struct i3c_dev_desc *dev = slot->dev;
2417 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2418 struct i3c_ibi_payload payload;
2420 payload.data = slot->data;
2421 payload.len = slot->len;
2424 dev->ibi->handler(dev->dev, &payload);
2426 master->ops->recycle_ibi_slot(dev, slot);
2427 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2428 complete(&dev->ibi->all_ibis_handled);
2431 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2432 struct i3c_ibi_slot *slot)
2435 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2438 struct i3c_generic_ibi_slot {
2439 struct list_head node;
2440 struct i3c_ibi_slot base;
2443 struct i3c_generic_ibi_pool {
2445 unsigned int num_slots;
2446 struct i3c_generic_ibi_slot *slots;
2448 struct list_head free_slots;
2449 struct list_head pending;
2453 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2454 * @pool: the IBI pool to free
2456 * Free all IBI slots allated by a generic IBI pool.
2458 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2460 struct i3c_generic_ibi_slot *slot;
2461 unsigned int nslots = 0;
2463 while (!list_empty(&pool->free_slots)) {
2464 slot = list_first_entry(&pool->free_slots,
2465 struct i3c_generic_ibi_slot, node);
2466 list_del(&slot->node);
2471 * If the number of freed slots is not equal to the number of allocated
2472 * slots we have a leak somewhere.
2474 WARN_ON(nslots != pool->num_slots);
2476 kfree(pool->payload_buf);
2480 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2483 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2484 * @dev: the device this pool will be used for
2485 * @req: IBI setup request describing what the device driver expects
2487 * Create a generic IBI pool based on the information provided in @req.
2489 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2491 struct i3c_generic_ibi_pool *
2492 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2493 const struct i3c_ibi_setup *req)
2495 struct i3c_generic_ibi_pool *pool;
2496 struct i3c_generic_ibi_slot *slot;
2500 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2502 return ERR_PTR(-ENOMEM);
2504 spin_lock_init(&pool->lock);
2505 INIT_LIST_HEAD(&pool->free_slots);
2506 INIT_LIST_HEAD(&pool->pending);
2508 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2514 if (req->max_payload_len) {
2515 pool->payload_buf = kcalloc(req->num_slots,
2516 req->max_payload_len, GFP_KERNEL);
2517 if (!pool->payload_buf) {
2523 for (i = 0; i < req->num_slots; i++) {
2524 slot = &pool->slots[i];
2525 i3c_master_init_ibi_slot(dev, &slot->base);
2527 if (req->max_payload_len)
2528 slot->base.data = pool->payload_buf +
2529 (i * req->max_payload_len);
2531 list_add_tail(&slot->node, &pool->free_slots);
2538 i3c_generic_ibi_free_pool(pool);
2539 return ERR_PTR(ret);
2541 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2544 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2545 * @pool: the pool to query an IBI slot on
2547 * Search for a free slot in a generic IBI pool.
2548 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2549 * when it's no longer needed.
2551 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2553 struct i3c_ibi_slot *
2554 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2556 struct i3c_generic_ibi_slot *slot;
2557 unsigned long flags;
2559 spin_lock_irqsave(&pool->lock, flags);
2560 slot = list_first_entry_or_null(&pool->free_slots,
2561 struct i3c_generic_ibi_slot, node);
2563 list_del(&slot->node);
2564 spin_unlock_irqrestore(&pool->lock, flags);
2566 return slot ? &slot->base : NULL;
2568 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2571 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2572 * @pool: the pool to return the IBI slot to
2573 * @s: IBI slot to recycle
2575 * Add an IBI slot back to its generic IBI pool. Should be called from the
2576 * master driver struct_master_controller_ops->recycle_ibi() method.
2578 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2579 struct i3c_ibi_slot *s)
2581 struct i3c_generic_ibi_slot *slot;
2582 unsigned long flags;
2587 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2588 spin_lock_irqsave(&pool->lock, flags);
2589 list_add_tail(&slot->node, &pool->free_slots);
2590 spin_unlock_irqrestore(&pool->lock, flags);
2592 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2594 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2596 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2597 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2600 if (ops->request_ibi &&
2601 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2602 !ops->recycle_ibi_slot))
2609 * i3c_master_register() - register an I3C master
2610 * @master: master used to send frames on the bus
2611 * @parent: the parent device (the one that provides this I3C master
2613 * @ops: the master controller operations
2614 * @secondary: true if you are registering a secondary master. Will return
2615 * -ENOTSUPP if set to true since secondary masters are not yet
2618 * This function takes care of everything for you:
2620 * - creates and initializes the I3C bus
2621 * - populates the bus with static I2C devs if @parent->of_node is not
2623 * - registers all I3C devices added by the controller during bus
2625 * - registers the I2C adapter and all I2C devices
2627 * Return: 0 in case of success, a negative error code otherwise.
2629 int i3c_master_register(struct i3c_master_controller *master,
2630 struct device *parent,
2631 const struct i3c_master_controller_ops *ops,
2634 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2635 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2636 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2637 struct i2c_dev_boardinfo *i2cbi;
2640 /* We do not support secondary masters yet. */
2644 ret = i3c_master_check_ops(ops);
2648 master->dev.parent = parent;
2649 master->dev.of_node = of_node_get(parent->of_node);
2650 master->dev.bus = &i3c_bus_type;
2651 master->dev.type = &i3c_masterdev_type;
2652 master->dev.release = i3c_masterdev_release;
2654 master->secondary = secondary;
2655 INIT_LIST_HEAD(&master->boardinfo.i2c);
2656 INIT_LIST_HEAD(&master->boardinfo.i3c);
2658 ret = i3c_bus_init(i3cbus, master->dev.of_node);
2662 device_initialize(&master->dev);
2663 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2665 master->dev.dma_mask = parent->dma_mask;
2666 master->dev.coherent_dma_mask = parent->coherent_dma_mask;
2667 master->dev.dma_parms = parent->dma_parms;
2669 ret = of_populate_i3c_bus(master);
2673 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2674 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2675 case I3C_LVR_I2C_INDEX(0):
2676 if (mode < I3C_BUS_MODE_MIXED_FAST)
2677 mode = I3C_BUS_MODE_MIXED_FAST;
2679 case I3C_LVR_I2C_INDEX(1):
2680 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2681 mode = I3C_BUS_MODE_MIXED_LIMITED;
2683 case I3C_LVR_I2C_INDEX(2):
2684 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2685 mode = I3C_BUS_MODE_MIXED_SLOW;
2692 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2693 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2696 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2700 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2706 ret = i3c_master_bus_init(master);
2710 ret = device_add(&master->dev);
2712 goto err_cleanup_bus;
2715 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2716 * through the I2C subsystem.
2718 ret = i3c_master_i2c_adapter_init(master);
2722 i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD);
2725 * We're done initializing the bus and the controller, we can now
2726 * register I3C devices discovered during the initial DAA.
2728 master->init_done = true;
2729 i3c_bus_normaluse_lock(&master->bus);
2730 i3c_master_register_new_i3c_devs(master);
2731 i3c_bus_normaluse_unlock(&master->bus);
2736 device_del(&master->dev);
2739 i3c_master_bus_cleanup(master);
2742 put_device(&master->dev);
2746 EXPORT_SYMBOL_GPL(i3c_master_register);
2749 * i3c_master_unregister() - unregister an I3C master
2750 * @master: master used to send frames on the bus
2752 * Basically undo everything done in i3c_master_register().
2754 void i3c_master_unregister(struct i3c_master_controller *master)
2756 i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
2758 i3c_master_i2c_adapter_cleanup(master);
2759 i3c_master_unregister_i3c_devs(master);
2760 i3c_master_bus_cleanup(master);
2761 device_unregister(&master->dev);
2763 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2765 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2767 struct i3c_master_controller *master;
2772 master = i3c_dev_get_master(dev);
2776 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2777 !dev->boardinfo->static_addr)
2780 return i3c_master_setdasa_locked(master, dev->info.static_addr,
2781 dev->boardinfo->init_dyn_addr);
2784 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2785 struct i3c_priv_xfer *xfers,
2788 struct i3c_master_controller *master;
2793 master = i3c_dev_get_master(dev);
2794 if (!master || !xfers)
2797 if (!master->ops->priv_xfers)
2800 return master->ops->priv_xfers(dev, xfers, nxfers);
2803 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2805 struct i3c_master_controller *master;
2811 master = i3c_dev_get_master(dev);
2812 ret = master->ops->disable_ibi(dev);
2816 reinit_completion(&dev->ibi->all_ibis_handled);
2817 if (atomic_read(&dev->ibi->pending_ibis))
2818 wait_for_completion(&dev->ibi->all_ibis_handled);
2820 dev->ibi->enabled = false;
2825 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2827 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2833 ret = master->ops->enable_ibi(dev);
2835 dev->ibi->enabled = true;
2840 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2841 const struct i3c_ibi_setup *req)
2843 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2844 struct i3c_device_ibi_info *ibi;
2847 if (!master->ops->request_ibi)
2853 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2857 ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
2863 atomic_set(&ibi->pending_ibis, 0);
2864 init_completion(&ibi->all_ibis_handled);
2865 ibi->handler = req->handler;
2866 ibi->max_payload_len = req->max_payload_len;
2867 ibi->num_slots = req->num_slots;
2870 ret = master->ops->request_ibi(dev, req);
2879 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2881 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2886 if (WARN_ON(dev->ibi->enabled))
2887 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2889 master->ops->free_ibi(dev);
2892 destroy_workqueue(dev->ibi->wq);
2893 dev->ibi->wq = NULL;
2900 static int __init i3c_init(void)
2904 res = of_alias_get_highest_id("i3c");
2906 mutex_lock(&i3c_core_lock);
2907 __i3c_first_dynamic_bus_num = res + 1;
2908 mutex_unlock(&i3c_core_lock);
2911 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
2915 res = bus_register(&i3c_bus_type);
2917 goto out_unreg_notifier;
2922 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2926 subsys_initcall(i3c_init);
2928 static void __exit i3c_exit(void)
2930 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2931 idr_destroy(&i3c_bus_idr);
2932 bus_unregister(&i3c_bus_type);
2934 module_exit(i3c_exit);
2936 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2937 MODULE_DESCRIPTION("I3C core");
2938 MODULE_LICENSE("GPL v2");