1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Cadence Design Systems Inc.
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
8 #include <linux/atomic.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
20 #include "internals.h"
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27 * @bus: I3C bus to take the lock on
29 * This function takes the bus lock so that no other operations can occur on
30 * the bus. This is needed for all kind of bus maintenance operation, like
31 * - enabling/disabling slave events
33 * - changing the dynamic address of a device
34 * - relinquishing mastership
37 * The reason for this kind of locking is that we don't want drivers and core
38 * logic to rely on I3C device information that could be changed behind their
41 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
43 down_write(&bus->lock);
47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
49 * @bus: I3C bus to release the lock on
51 * Should be called when the bus maintenance operation is done. See
52 * i3c_bus_maintenance_lock() for more details on what these maintenance
55 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
62 * @bus: I3C bus to take the lock on
64 * This function takes the bus lock for any operation that is not a maintenance
65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
66 * maintenance operations). Basically all communications with I3C devices are
67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
68 * state or I3C dynamic address).
70 * Note that this lock is not guaranteeing serialization of normal operations.
71 * In other words, transfer requests passed to the I3C master can be submitted
72 * in parallel and I3C master drivers have to use their own locking to make
73 * sure two different communications are not inter-mixed, or access to the
74 * output/input queue is not done while the engine is busy.
76 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
78 down_read(&bus->lock);
82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
83 * @bus: I3C bus to release the lock on
85 * Should be called when a normal operation is done. See
86 * i3c_bus_normaluse_lock() for more details on what these normal operations
89 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
94 static struct i3c_master_controller *
95 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
97 return container_of(i3cbus, struct i3c_master_controller, bus);
100 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
102 return container_of(dev, struct i3c_master_controller, dev);
105 static const struct device_type i3c_device_type;
107 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
109 struct i3c_master_controller *master;
111 if (dev->type == &i3c_device_type)
112 return dev_to_i3cdev(dev)->bus;
114 master = dev_to_i3cmaster(dev);
119 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
121 struct i3c_master_controller *master;
123 if (dev->type == &i3c_device_type)
124 return dev_to_i3cdev(dev)->desc;
126 master = dev_to_i3cmaster(dev);
131 static ssize_t bcr_show(struct device *dev,
132 struct device_attribute *da,
135 struct i3c_bus *bus = dev_to_i3cbus(dev);
136 struct i3c_dev_desc *desc;
139 i3c_bus_normaluse_lock(bus);
140 desc = dev_to_i3cdesc(dev);
141 ret = sprintf(buf, "%x\n", desc->info.bcr);
142 i3c_bus_normaluse_unlock(bus);
146 static DEVICE_ATTR_RO(bcr);
148 static ssize_t dcr_show(struct device *dev,
149 struct device_attribute *da,
152 struct i3c_bus *bus = dev_to_i3cbus(dev);
153 struct i3c_dev_desc *desc;
156 i3c_bus_normaluse_lock(bus);
157 desc = dev_to_i3cdesc(dev);
158 ret = sprintf(buf, "%x\n", desc->info.dcr);
159 i3c_bus_normaluse_unlock(bus);
163 static DEVICE_ATTR_RO(dcr);
165 static ssize_t pid_show(struct device *dev,
166 struct device_attribute *da,
169 struct i3c_bus *bus = dev_to_i3cbus(dev);
170 struct i3c_dev_desc *desc;
173 i3c_bus_normaluse_lock(bus);
174 desc = dev_to_i3cdesc(dev);
175 ret = sprintf(buf, "%llx\n", desc->info.pid);
176 i3c_bus_normaluse_unlock(bus);
180 static DEVICE_ATTR_RO(pid);
182 static ssize_t dynamic_address_show(struct device *dev,
183 struct device_attribute *da,
186 struct i3c_bus *bus = dev_to_i3cbus(dev);
187 struct i3c_dev_desc *desc;
190 i3c_bus_normaluse_lock(bus);
191 desc = dev_to_i3cdesc(dev);
192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
193 i3c_bus_normaluse_unlock(bus);
197 static DEVICE_ATTR_RO(dynamic_address);
199 static const char * const hdrcap_strings[] = {
200 "hdr-ddr", "hdr-tsp", "hdr-tsl",
203 static ssize_t hdrcap_show(struct device *dev,
204 struct device_attribute *da,
207 struct i3c_bus *bus = dev_to_i3cbus(dev);
208 struct i3c_dev_desc *desc;
209 ssize_t offset = 0, ret;
213 i3c_bus_normaluse_lock(bus);
214 desc = dev_to_i3cdesc(dev);
215 caps = desc->info.hdr_cap;
216 for_each_set_bit(mode, &caps, 8) {
217 if (mode >= ARRAY_SIZE(hdrcap_strings))
220 if (!hdrcap_strings[mode])
223 ret = sprintf(buf + offset, offset ? " %s" : "%s",
224 hdrcap_strings[mode]);
231 ret = sprintf(buf + offset, "\n");
238 i3c_bus_normaluse_unlock(bus);
242 static DEVICE_ATTR_RO(hdrcap);
244 static ssize_t modalias_show(struct device *dev,
245 struct device_attribute *da, char *buf)
247 struct i3c_device *i3c = dev_to_i3cdev(dev);
248 struct i3c_device_info devinfo;
249 u16 manuf, part, ext;
251 i3c_device_get_info(i3c, &devinfo);
252 manuf = I3C_PID_MANUF_ID(devinfo.pid);
253 part = I3C_PID_PART_ID(devinfo.pid);
254 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
256 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
257 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
260 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
261 devinfo.dcr, manuf, part, ext);
263 static DEVICE_ATTR_RO(modalias);
265 static struct attribute *i3c_device_attrs[] = {
269 &dev_attr_dynamic_address.attr,
270 &dev_attr_hdrcap.attr,
271 &dev_attr_modalias.attr,
274 ATTRIBUTE_GROUPS(i3c_device);
276 static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
278 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
279 struct i3c_device_info devinfo;
280 u16 manuf, part, ext;
282 i3c_device_get_info(i3cdev, &devinfo);
283 manuf = I3C_PID_MANUF_ID(devinfo.pid);
284 part = I3C_PID_PART_ID(devinfo.pid);
285 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
287 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
288 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
291 return add_uevent_var(env,
292 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
293 devinfo.dcr, manuf, part, ext);
296 static const struct device_type i3c_device_type = {
297 .groups = i3c_device_groups,
298 .uevent = i3c_device_uevent,
301 static int i3c_device_match(struct device *dev, struct device_driver *drv)
303 struct i3c_device *i3cdev;
304 struct i3c_driver *i3cdrv;
306 if (dev->type != &i3c_device_type)
309 i3cdev = dev_to_i3cdev(dev);
310 i3cdrv = drv_to_i3cdrv(drv);
311 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
317 static int i3c_device_probe(struct device *dev)
319 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
320 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
322 return driver->probe(i3cdev);
325 static int i3c_device_remove(struct device *dev)
327 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
328 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
331 ret = driver->remove(i3cdev);
335 i3c_device_free_ibi(i3cdev);
340 struct bus_type i3c_bus_type = {
342 .match = i3c_device_match,
343 .probe = i3c_device_probe,
344 .remove = i3c_device_remove,
347 static enum i3c_addr_slot_status
348 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
350 int status, bitpos = addr * 2;
352 if (addr > I2C_MAX_ADDR)
353 return I3C_ADDR_SLOT_RSVD;
355 status = bus->addrslots[bitpos / BITS_PER_LONG];
356 status >>= bitpos % BITS_PER_LONG;
358 return status & I3C_ADDR_SLOT_STATUS_MASK;
361 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
362 enum i3c_addr_slot_status status)
364 int bitpos = addr * 2;
367 if (addr > I2C_MAX_ADDR)
370 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
371 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
372 (bitpos % BITS_PER_LONG));
373 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
376 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
378 enum i3c_addr_slot_status status;
380 status = i3c_bus_get_addr_slot_status(bus, addr);
382 return status == I3C_ADDR_SLOT_FREE;
385 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
387 enum i3c_addr_slot_status status;
390 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
391 status = i3c_bus_get_addr_slot_status(bus, addr);
392 if (status == I3C_ADDR_SLOT_FREE)
399 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
403 /* Addresses 0 to 7 are reserved. */
404 for (i = 0; i < 8; i++)
405 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
408 * Reserve broadcast address and all addresses that might collide
409 * with the broadcast address when facing a single bit error.
411 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
413 for (i = 0; i < 7; i++)
414 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
418 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
420 mutex_lock(&i3c_core_lock);
421 idr_remove(&i3c_bus_idr, i3cbus->id);
422 mutex_unlock(&i3c_core_lock);
425 static int i3c_bus_init(struct i3c_bus *i3cbus)
429 init_rwsem(&i3cbus->lock);
430 INIT_LIST_HEAD(&i3cbus->devs.i2c);
431 INIT_LIST_HEAD(&i3cbus->devs.i3c);
432 i3c_bus_init_addrslots(i3cbus);
433 i3cbus->mode = I3C_BUS_MODE_PURE;
435 mutex_lock(&i3c_core_lock);
436 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
437 mutex_unlock(&i3c_core_lock);
447 static const char * const i3c_bus_mode_strings[] = {
448 [I3C_BUS_MODE_PURE] = "pure",
449 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
450 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
451 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
454 static ssize_t mode_show(struct device *dev,
455 struct device_attribute *da,
458 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
461 i3c_bus_normaluse_lock(i3cbus);
462 if (i3cbus->mode < 0 ||
463 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
464 !i3c_bus_mode_strings[i3cbus->mode])
465 ret = sprintf(buf, "unknown\n");
467 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
468 i3c_bus_normaluse_unlock(i3cbus);
472 static DEVICE_ATTR_RO(mode);
474 static ssize_t current_master_show(struct device *dev,
475 struct device_attribute *da,
478 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
481 i3c_bus_normaluse_lock(i3cbus);
482 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
483 i3cbus->cur_master->info.pid);
484 i3c_bus_normaluse_unlock(i3cbus);
488 static DEVICE_ATTR_RO(current_master);
490 static ssize_t i3c_scl_frequency_show(struct device *dev,
491 struct device_attribute *da,
494 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
497 i3c_bus_normaluse_lock(i3cbus);
498 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
499 i3c_bus_normaluse_unlock(i3cbus);
503 static DEVICE_ATTR_RO(i3c_scl_frequency);
505 static ssize_t i2c_scl_frequency_show(struct device *dev,
506 struct device_attribute *da,
509 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
512 i3c_bus_normaluse_lock(i3cbus);
513 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
514 i3c_bus_normaluse_unlock(i3cbus);
518 static DEVICE_ATTR_RO(i2c_scl_frequency);
520 static struct attribute *i3c_masterdev_attrs[] = {
522 &dev_attr_current_master.attr,
523 &dev_attr_i3c_scl_frequency.attr,
524 &dev_attr_i2c_scl_frequency.attr,
528 &dev_attr_dynamic_address.attr,
529 &dev_attr_hdrcap.attr,
532 ATTRIBUTE_GROUPS(i3c_masterdev);
534 static void i3c_masterdev_release(struct device *dev)
536 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
537 struct i3c_bus *bus = dev_to_i3cbus(dev);
540 destroy_workqueue(master->wq);
542 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
543 i3c_bus_cleanup(bus);
545 of_node_put(dev->of_node);
548 static const struct device_type i3c_masterdev_type = {
549 .groups = i3c_masterdev_groups,
552 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
553 unsigned long max_i2c_scl_rate)
555 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
559 switch (i3cbus->mode) {
560 case I3C_BUS_MODE_PURE:
561 if (!i3cbus->scl_rate.i3c)
562 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
564 case I3C_BUS_MODE_MIXED_FAST:
565 case I3C_BUS_MODE_MIXED_LIMITED:
566 if (!i3cbus->scl_rate.i3c)
567 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
568 if (!i3cbus->scl_rate.i2c)
569 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
571 case I3C_BUS_MODE_MIXED_SLOW:
572 if (!i3cbus->scl_rate.i2c)
573 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
574 if (!i3cbus->scl_rate.i3c ||
575 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
576 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
582 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
583 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
586 * I3C/I2C frequency may have been overridden, check that user-provided
587 * values are not exceeding max possible frequency.
589 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
590 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
596 static struct i3c_master_controller *
597 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
599 return container_of(adap, struct i3c_master_controller, i2c);
602 static struct i2c_adapter *
603 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
608 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
613 static struct i2c_dev_desc *
614 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
615 const struct i2c_dev_boardinfo *boardinfo)
617 struct i2c_dev_desc *dev;
619 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
621 return ERR_PTR(-ENOMEM);
623 dev->common.master = master;
624 dev->boardinfo = boardinfo;
625 dev->addr = boardinfo->base.addr;
626 dev->lvr = boardinfo->lvr;
631 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
635 dest->payload.len = payloadlen;
637 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
639 dest->payload.data = NULL;
641 return dest->payload.data;
644 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
646 kfree(dest->payload.data);
649 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
650 struct i3c_ccc_cmd_dest *dests,
653 cmd->rnw = rnw ? 1 : 0;
656 cmd->ndests = ndests;
657 cmd->err = I3C_ERROR_UNKNOWN;
660 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
661 struct i3c_ccc_cmd *cmd)
668 if (WARN_ON(master->init_done &&
669 !rwsem_is_locked(&master->bus.lock)))
672 if (!master->ops->send_ccc_cmd)
675 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
678 if (master->ops->supports_ccc_cmd &&
679 !master->ops->supports_ccc_cmd(master, cmd))
682 ret = master->ops->send_ccc_cmd(master, cmd);
684 if (cmd->err != I3C_ERROR_UNKNOWN)
693 static struct i2c_dev_desc *
694 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
697 struct i2c_dev_desc *dev;
699 i3c_bus_for_each_i2cdev(&master->bus, dev) {
700 if (dev->boardinfo->base.addr == addr)
708 * i3c_master_get_free_addr() - get a free address on the bus
709 * @master: I3C master object
710 * @start_addr: where to start searching
712 * This function must be called with the bus lock held in write mode.
714 * Return: the first free address starting at @start_addr (included) or -ENOMEM
715 * if there's no more address available.
717 int i3c_master_get_free_addr(struct i3c_master_controller *master,
720 return i3c_bus_get_free_addr(&master->bus, start_addr);
722 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
724 static void i3c_device_release(struct device *dev)
726 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
728 WARN_ON(i3cdev->desc);
730 of_node_put(i3cdev->dev.of_node);
734 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
739 static struct i3c_dev_desc *
740 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
741 const struct i3c_device_info *info)
743 struct i3c_dev_desc *dev;
745 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
747 return ERR_PTR(-ENOMEM);
749 dev->common.master = master;
751 mutex_init(&dev->ibi_lock);
756 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
759 enum i3c_addr_slot_status addrstat;
760 struct i3c_ccc_cmd_dest dest;
761 struct i3c_ccc_cmd cmd;
767 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
768 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
771 i3c_ccc_cmd_dest_init(&dest, addr, 0);
772 i3c_ccc_cmd_init(&cmd, false,
773 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
775 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
776 i3c_ccc_cmd_dest_cleanup(&dest);
782 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
784 * @master: master used to send frames on the bus
786 * Send a ENTDAA CCC command to start a DAA procedure.
788 * Note that this function only sends the ENTDAA CCC command, all the logic
789 * behind dynamic address assignment has to be handled in the I3C master
792 * This function must be called with the bus lock held in write mode.
794 * Return: 0 in case of success, a positive I3C error code if the error is
795 * one of the official Mx error codes, and a negative error code otherwise.
797 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
799 struct i3c_ccc_cmd_dest dest;
800 struct i3c_ccc_cmd cmd;
803 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
804 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
805 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
806 i3c_ccc_cmd_dest_cleanup(&dest);
810 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
812 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
813 u8 addr, bool enable, u8 evts)
815 struct i3c_ccc_events *events;
816 struct i3c_ccc_cmd_dest dest;
817 struct i3c_ccc_cmd cmd;
820 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
824 events->events = evts;
825 i3c_ccc_cmd_init(&cmd, false,
827 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
828 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
830 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
831 i3c_ccc_cmd_dest_cleanup(&dest);
837 * i3c_master_disec_locked() - send a DISEC CCC command
838 * @master: master used to send frames on the bus
839 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
840 * @evts: events to disable
842 * Send a DISEC CCC command to disable some or all events coming from a
843 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
845 * This function must be called with the bus lock held in write mode.
847 * Return: 0 in case of success, a positive I3C error code if the error is
848 * one of the official Mx error codes, and a negative error code otherwise.
850 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
853 return i3c_master_enec_disec_locked(master, addr, false, evts);
855 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
858 * i3c_master_enec_locked() - send an ENEC CCC command
859 * @master: master used to send frames on the bus
860 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
861 * @evts: events to disable
863 * Sends an ENEC CCC command to enable some or all events coming from a
864 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
866 * This function must be called with the bus lock held in write mode.
868 * Return: 0 in case of success, a positive I3C error code if the error is
869 * one of the official Mx error codes, and a negative error code otherwise.
871 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
874 return i3c_master_enec_disec_locked(master, addr, true, evts);
876 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
879 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
880 * @master: master used to send frames on the bus
882 * Send a DEFSLVS CCC command containing all the devices known to the @master.
883 * This is useful when you have secondary masters on the bus to propagate
884 * device information.
886 * This should be called after all I3C devices have been discovered (in other
887 * words, after the DAA procedure has finished) and instantiated in
888 * &i3c_master_controller_ops->bus_init().
889 * It should also be called if a master ACKed an Hot-Join request and assigned
890 * a dynamic address to the device joining the bus.
892 * This function must be called with the bus lock held in write mode.
894 * Return: 0 in case of success, a positive I3C error code if the error is
895 * one of the official Mx error codes, and a negative error code otherwise.
897 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
899 struct i3c_ccc_defslvs *defslvs;
900 struct i3c_ccc_dev_desc *desc;
901 struct i3c_ccc_cmd_dest dest;
902 struct i3c_dev_desc *i3cdev;
903 struct i2c_dev_desc *i2cdev;
904 struct i3c_ccc_cmd cmd;
912 bus = i3c_master_get_bus(master);
913 i3c_bus_for_each_i3cdev(bus, i3cdev) {
916 if (i3cdev == master->this)
919 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
924 /* No other master on the bus, skip DEFSLVS. */
928 i3c_bus_for_each_i2cdev(bus, i2cdev)
931 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
932 struct_size(defslvs, slaves,
937 defslvs->count = ndevs;
938 defslvs->master.bcr = master->this->info.bcr;
939 defslvs->master.dcr = master->this->info.dcr;
940 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
941 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
943 desc = defslvs->slaves;
944 i3c_bus_for_each_i2cdev(bus, i2cdev) {
945 desc->lvr = i2cdev->lvr;
946 desc->static_addr = i2cdev->addr << 1;
950 i3c_bus_for_each_i3cdev(bus, i3cdev) {
951 /* Skip the I3C dev representing this master. */
952 if (i3cdev == master->this)
955 desc->bcr = i3cdev->info.bcr;
956 desc->dcr = i3cdev->info.dcr;
957 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
958 desc->static_addr = i3cdev->info.static_addr << 1;
962 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
963 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
964 i3c_ccc_cmd_dest_cleanup(&dest);
968 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
970 static int i3c_master_setda_locked(struct i3c_master_controller *master,
971 u8 oldaddr, u8 newaddr, bool setdasa)
973 struct i3c_ccc_cmd_dest dest;
974 struct i3c_ccc_setda *setda;
975 struct i3c_ccc_cmd cmd;
978 if (!oldaddr || !newaddr)
981 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
985 setda->addr = newaddr << 1;
986 i3c_ccc_cmd_init(&cmd, false,
987 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
989 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
990 i3c_ccc_cmd_dest_cleanup(&dest);
995 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
996 u8 static_addr, u8 dyn_addr)
998 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1001 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1002 u8 oldaddr, u8 newaddr)
1004 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1007 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1008 struct i3c_device_info *info)
1010 struct i3c_ccc_cmd_dest dest;
1011 struct i3c_ccc_mrl *mrl;
1012 struct i3c_ccc_cmd cmd;
1015 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1020 * When the device does not have IBI payload GETMRL only returns 2
1023 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1024 dest.payload.len -= 1;
1026 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1027 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1031 switch (dest.payload.len) {
1033 info->max_ibi_len = mrl->ibi_len;
1036 info->max_read_len = be16_to_cpu(mrl->read_len);
1044 i3c_ccc_cmd_dest_cleanup(&dest);
1049 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1050 struct i3c_device_info *info)
1052 struct i3c_ccc_cmd_dest dest;
1053 struct i3c_ccc_mwl *mwl;
1054 struct i3c_ccc_cmd cmd;
1057 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1061 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1062 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1066 if (dest.payload.len != sizeof(*mwl)) {
1071 info->max_write_len = be16_to_cpu(mwl->len);
1074 i3c_ccc_cmd_dest_cleanup(&dest);
1079 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1080 struct i3c_device_info *info)
1082 struct i3c_ccc_getmxds *getmaxds;
1083 struct i3c_ccc_cmd_dest dest;
1084 struct i3c_ccc_cmd cmd;
1087 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1092 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1093 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1097 if (dest.payload.len != 2 && dest.payload.len != 5) {
1102 info->max_read_ds = getmaxds->maxrd;
1103 info->max_write_ds = getmaxds->maxwr;
1104 if (dest.payload.len == 5)
1105 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1106 ((u32)getmaxds->maxrdturn[1] << 8) |
1107 ((u32)getmaxds->maxrdturn[2] << 16);
1110 i3c_ccc_cmd_dest_cleanup(&dest);
1115 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1116 struct i3c_device_info *info)
1118 struct i3c_ccc_gethdrcap *gethdrcap;
1119 struct i3c_ccc_cmd_dest dest;
1120 struct i3c_ccc_cmd cmd;
1123 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1124 sizeof(*gethdrcap));
1128 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1129 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1133 if (dest.payload.len != 1) {
1138 info->hdr_cap = gethdrcap->modes;
1141 i3c_ccc_cmd_dest_cleanup(&dest);
1146 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1147 struct i3c_device_info *info)
1149 struct i3c_ccc_getpid *getpid;
1150 struct i3c_ccc_cmd_dest dest;
1151 struct i3c_ccc_cmd cmd;
1154 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1158 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1159 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1164 for (i = 0; i < sizeof(getpid->pid); i++) {
1165 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1167 info->pid |= (u64)getpid->pid[i] << sft;
1171 i3c_ccc_cmd_dest_cleanup(&dest);
1176 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1177 struct i3c_device_info *info)
1179 struct i3c_ccc_getbcr *getbcr;
1180 struct i3c_ccc_cmd_dest dest;
1181 struct i3c_ccc_cmd cmd;
1184 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1188 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1189 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1193 info->bcr = getbcr->bcr;
1196 i3c_ccc_cmd_dest_cleanup(&dest);
1201 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1202 struct i3c_device_info *info)
1204 struct i3c_ccc_getdcr *getdcr;
1205 struct i3c_ccc_cmd_dest dest;
1206 struct i3c_ccc_cmd cmd;
1209 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1213 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1214 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1218 info->dcr = getdcr->dcr;
1221 i3c_ccc_cmd_dest_cleanup(&dest);
1226 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1228 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1229 enum i3c_addr_slot_status slot_status;
1232 if (!dev->info.dyn_addr)
1235 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1236 dev->info.dyn_addr);
1237 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1238 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1241 ret = i3c_master_getpid_locked(master, &dev->info);
1245 ret = i3c_master_getbcr_locked(master, &dev->info);
1249 ret = i3c_master_getdcr_locked(master, &dev->info);
1253 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1254 ret = i3c_master_getmxds_locked(master, &dev->info);
1259 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1260 dev->info.max_ibi_len = 1;
1262 i3c_master_getmrl_locked(master, &dev->info);
1263 i3c_master_getmwl_locked(master, &dev->info);
1265 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1266 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1274 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1276 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1278 if (dev->info.static_addr)
1279 i3c_bus_set_addr_slot_status(&master->bus,
1280 dev->info.static_addr,
1281 I3C_ADDR_SLOT_FREE);
1283 if (dev->info.dyn_addr)
1284 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1285 I3C_ADDR_SLOT_FREE);
1287 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1288 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1289 I3C_ADDR_SLOT_FREE);
1292 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1294 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1295 enum i3c_addr_slot_status status;
1297 if (!dev->info.static_addr && !dev->info.dyn_addr)
1300 if (dev->info.static_addr) {
1301 status = i3c_bus_get_addr_slot_status(&master->bus,
1302 dev->info.static_addr);
1303 if (status != I3C_ADDR_SLOT_FREE)
1306 i3c_bus_set_addr_slot_status(&master->bus,
1307 dev->info.static_addr,
1308 I3C_ADDR_SLOT_I3C_DEV);
1312 * ->init_dyn_addr should have been reserved before that, so, if we're
1313 * trying to apply a pre-reserved dynamic address, we should not try
1314 * to reserve the address slot a second time.
1316 if (dev->info.dyn_addr &&
1318 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1319 status = i3c_bus_get_addr_slot_status(&master->bus,
1320 dev->info.dyn_addr);
1321 if (status != I3C_ADDR_SLOT_FREE)
1322 goto err_release_static_addr;
1324 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1325 I3C_ADDR_SLOT_I3C_DEV);
1330 err_release_static_addr:
1331 if (dev->info.static_addr)
1332 i3c_bus_set_addr_slot_status(&master->bus,
1333 dev->info.static_addr,
1334 I3C_ADDR_SLOT_FREE);
1339 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1340 struct i3c_dev_desc *dev)
1345 * We don't attach devices to the controller until they are
1346 * addressable on the bus.
1348 if (!dev->info.static_addr && !dev->info.dyn_addr)
1351 ret = i3c_master_get_i3c_addrs(dev);
1355 /* Do not attach the master device itself. */
1356 if (master->this != dev && master->ops->attach_i3c_dev) {
1357 ret = master->ops->attach_i3c_dev(dev);
1359 i3c_master_put_i3c_addrs(dev);
1364 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1369 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1372 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1373 enum i3c_addr_slot_status status;
1376 if (dev->info.dyn_addr != old_dyn_addr &&
1378 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1379 status = i3c_bus_get_addr_slot_status(&master->bus,
1380 dev->info.dyn_addr);
1381 if (status != I3C_ADDR_SLOT_FREE)
1383 i3c_bus_set_addr_slot_status(&master->bus,
1385 I3C_ADDR_SLOT_I3C_DEV);
1388 if (master->ops->reattach_i3c_dev) {
1389 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1391 i3c_master_put_i3c_addrs(dev);
1399 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1401 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1403 /* Do not detach the master device itself. */
1404 if (master->this != dev && master->ops->detach_i3c_dev)
1405 master->ops->detach_i3c_dev(dev);
1407 i3c_master_put_i3c_addrs(dev);
1408 list_del(&dev->common.node);
1411 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1412 struct i2c_dev_desc *dev)
1416 if (master->ops->attach_i2c_dev) {
1417 ret = master->ops->attach_i2c_dev(dev);
1422 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1427 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1429 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1431 list_del(&dev->common.node);
1433 if (master->ops->detach_i2c_dev)
1434 master->ops->detach_i2c_dev(dev);
1437 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1438 struct i3c_dev_boardinfo *boardinfo)
1440 struct i3c_device_info info = {
1441 .static_addr = boardinfo->static_addr,
1443 struct i3c_dev_desc *i3cdev;
1446 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1450 i3cdev->boardinfo = boardinfo;
1452 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1456 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1457 i3cdev->boardinfo->init_dyn_addr);
1459 goto err_detach_dev;
1461 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1462 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1466 ret = i3c_master_retrieve_dev_info(i3cdev);
1473 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1475 i3c_master_detach_i3c_dev(i3cdev);
1477 i3c_master_free_i3c_dev(i3cdev);
1483 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1485 struct i3c_dev_desc *desc;
1488 if (!master->init_done)
1491 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1492 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1495 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1499 desc->dev->bus = &master->bus;
1500 desc->dev->desc = desc;
1501 desc->dev->dev.parent = &master->dev;
1502 desc->dev->dev.type = &i3c_device_type;
1503 desc->dev->dev.bus = &i3c_bus_type;
1504 desc->dev->dev.release = i3c_device_release;
1505 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1508 if (desc->boardinfo)
1509 desc->dev->dev.of_node = desc->boardinfo->of_node;
1511 ret = device_register(&desc->dev->dev);
1513 dev_err(&master->dev,
1514 "Failed to add I3C device (err = %d)\n", ret);
1515 put_device(&desc->dev->dev);
1521 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1522 * @master: master doing the DAA
1524 * This function is instantiating an I3C device object and adding it to the
1525 * I3C device list. All device information are automatically retrieved using
1526 * standard CCC commands.
1528 * The I3C device object is returned in case the master wants to attach
1529 * private data to it using i3c_dev_set_master_data().
1531 * This function must be called with the bus lock held in write mode.
1533 * Return: a 0 in case of success, an negative error code otherwise.
1535 int i3c_master_do_daa(struct i3c_master_controller *master)
1539 i3c_bus_maintenance_lock(&master->bus);
1540 ret = master->ops->do_daa(master);
1541 i3c_bus_maintenance_unlock(&master->bus);
1546 i3c_bus_normaluse_lock(&master->bus);
1547 i3c_master_register_new_i3c_devs(master);
1548 i3c_bus_normaluse_unlock(&master->bus);
1552 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1555 * i3c_master_set_info() - set master device information
1556 * @master: master used to send frames on the bus
1557 * @info: I3C device information
1559 * Set master device info. This should be called from
1560 * &i3c_master_controller_ops->bus_init().
1562 * Not all &i3c_device_info fields are meaningful for a master device.
1563 * Here is a list of fields that should be properly filled:
1565 * - &i3c_device_info->dyn_addr
1566 * - &i3c_device_info->bcr
1567 * - &i3c_device_info->dcr
1568 * - &i3c_device_info->pid
1569 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1570 * &i3c_device_info->bcr
1572 * This function must be called with the bus lock held in maintenance mode.
1574 * Return: 0 if @info contains valid information (not every piece of
1575 * information can be checked, but we can at least make sure @info->dyn_addr
1576 * and @info->bcr are correct), -EINVAL otherwise.
1578 int i3c_master_set_info(struct i3c_master_controller *master,
1579 const struct i3c_device_info *info)
1581 struct i3c_dev_desc *i3cdev;
1584 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1587 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1594 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1596 return PTR_ERR(i3cdev);
1598 master->this = i3cdev;
1599 master->bus.cur_master = master->this;
1601 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1608 i3c_master_free_i3c_dev(i3cdev);
1612 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1614 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1616 struct i3c_dev_desc *i3cdev, *i3ctmp;
1617 struct i2c_dev_desc *i2cdev, *i2ctmp;
1619 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1621 i3c_master_detach_i3c_dev(i3cdev);
1623 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1624 i3c_bus_set_addr_slot_status(&master->bus,
1625 i3cdev->boardinfo->init_dyn_addr,
1626 I3C_ADDR_SLOT_FREE);
1628 i3c_master_free_i3c_dev(i3cdev);
1631 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1633 i3c_master_detach_i2c_dev(i2cdev);
1634 i3c_bus_set_addr_slot_status(&master->bus,
1636 I3C_ADDR_SLOT_FREE);
1637 i3c_master_free_i2c_dev(i2cdev);
1642 * i3c_master_bus_init() - initialize an I3C bus
1643 * @master: main master initializing the bus
1645 * This function is following all initialisation steps described in the I3C
1648 * 1. Attach I2C devs to the master so that the master can fill its internal
1649 * device table appropriately
1651 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1652 * the master controller. That's usually where the bus mode is selected
1653 * (pure bus or mixed fast/slow bus)
1655 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1656 * particularly important when the bus was previously configured by someone
1657 * else (for example the bootloader)
1659 * 4. Disable all slave events.
1661 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1662 * also have static_addr, try to pre-assign dynamic addresses requested by
1663 * the FW with SETDASA and attach corresponding statically defined I3C
1664 * devices to the master.
1666 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1667 * remaining I3C devices
1669 * Once this is done, all I3C and I2C devices should be usable.
1671 * Return: a 0 in case of success, an negative error code otherwise.
1673 static int i3c_master_bus_init(struct i3c_master_controller *master)
1675 enum i3c_addr_slot_status status;
1676 struct i2c_dev_boardinfo *i2cboardinfo;
1677 struct i3c_dev_boardinfo *i3cboardinfo;
1678 struct i2c_dev_desc *i2cdev;
1682 * First attach all devices with static definitions provided by the
1685 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1686 status = i3c_bus_get_addr_slot_status(&master->bus,
1687 i2cboardinfo->base.addr);
1688 if (status != I3C_ADDR_SLOT_FREE) {
1690 goto err_detach_devs;
1693 i3c_bus_set_addr_slot_status(&master->bus,
1694 i2cboardinfo->base.addr,
1695 I3C_ADDR_SLOT_I2C_DEV);
1697 i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo);
1698 if (IS_ERR(i2cdev)) {
1699 ret = PTR_ERR(i2cdev);
1700 goto err_detach_devs;
1703 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1705 i3c_master_free_i2c_dev(i2cdev);
1706 goto err_detach_devs;
1711 * Now execute the controller specific ->bus_init() routine, which
1712 * might configure its internal logic to match the bus limitations.
1714 ret = master->ops->bus_init(master);
1716 goto err_detach_devs;
1719 * The master device should have been instantiated in ->bus_init(),
1720 * complain if this was not the case.
1722 if (!master->this) {
1723 dev_err(&master->dev,
1724 "master_set_info() was not called in ->bus_init()\n");
1726 goto err_bus_cleanup;
1730 * Reset all dynamic address that may have been assigned before
1731 * (assigned by the bootloader for example).
1733 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1734 if (ret && ret != I3C_ERROR_M2)
1735 goto err_bus_cleanup;
1737 /* Disable all slave events before starting DAA. */
1738 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1739 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1741 if (ret && ret != I3C_ERROR_M2)
1742 goto err_bus_cleanup;
1745 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1746 * address and retrieve device information if needed.
1747 * In case pre-assign dynamic address fails, setting dynamic address to
1748 * the requested init_dyn_addr is retried after DAA is done in
1749 * i3c_master_add_i3c_dev_locked().
1751 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1754 * We don't reserve a dynamic address for devices that
1755 * don't explicitly request one.
1757 if (!i3cboardinfo->init_dyn_addr)
1760 ret = i3c_bus_get_addr_slot_status(&master->bus,
1761 i3cboardinfo->init_dyn_addr);
1762 if (ret != I3C_ADDR_SLOT_FREE) {
1767 i3c_bus_set_addr_slot_status(&master->bus,
1768 i3cboardinfo->init_dyn_addr,
1769 I3C_ADDR_SLOT_I3C_DEV);
1772 * Only try to create/attach devices that have a static
1773 * address. Other devices will be created/attached when
1774 * DAA happens, and the requested dynamic address will
1775 * be set using SETNEWDA once those devices become
1779 if (i3cboardinfo->static_addr)
1780 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1783 ret = i3c_master_do_daa(master);
1790 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1793 if (master->ops->bus_cleanup)
1794 master->ops->bus_cleanup(master);
1797 i3c_master_detach_free_devs(master);
1802 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1804 if (master->ops->bus_cleanup)
1805 master->ops->bus_cleanup(master);
1807 i3c_master_detach_free_devs(master);
1810 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1812 struct i3c_master_controller *master = i3cdev->common.master;
1813 struct i3c_dev_boardinfo *i3cboardinfo;
1815 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1816 if (i3cdev->info.pid != i3cboardinfo->pid)
1819 i3cdev->boardinfo = i3cboardinfo;
1820 i3cdev->info.static_addr = i3cboardinfo->static_addr;
1825 static struct i3c_dev_desc *
1826 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1828 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1829 struct i3c_dev_desc *i3cdev;
1831 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1832 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1840 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1841 * @master: master used to send frames on the bus
1842 * @addr: I3C slave dynamic address assigned to the device
1844 * This function is instantiating an I3C device object and adding it to the
1845 * I3C device list. All device information are automatically retrieved using
1846 * standard CCC commands.
1848 * The I3C device object is returned in case the master wants to attach
1849 * private data to it using i3c_dev_set_master_data().
1851 * This function must be called with the bus lock held in write mode.
1853 * Return: a 0 in case of success, an negative error code otherwise.
1855 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1858 struct i3c_device_info info = { .dyn_addr = addr };
1859 struct i3c_dev_desc *newdev, *olddev;
1860 u8 old_dyn_addr = addr, expected_dyn_addr;
1861 struct i3c_ibi_setup ibireq = { };
1862 bool enable_ibi = false;
1868 newdev = i3c_master_alloc_i3c_dev(master, &info);
1870 return PTR_ERR(newdev);
1872 ret = i3c_master_attach_i3c_dev(master, newdev);
1876 ret = i3c_master_retrieve_dev_info(newdev);
1878 goto err_detach_dev;
1880 i3c_master_attach_boardinfo(newdev);
1882 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1884 newdev->dev = olddev->dev;
1886 newdev->dev->desc = newdev;
1889 * We need to restore the IBI state too, so let's save the
1890 * IBI information and try to restore them after olddev has
1891 * been detached+released and its IBI has been stopped and
1892 * the associated resources have been freed.
1894 mutex_lock(&olddev->ibi_lock);
1896 ibireq.handler = olddev->ibi->handler;
1897 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1898 ibireq.num_slots = olddev->ibi->num_slots;
1900 if (olddev->ibi->enabled) {
1902 i3c_dev_disable_ibi_locked(olddev);
1905 i3c_dev_free_ibi_locked(olddev);
1907 mutex_unlock(&olddev->ibi_lock);
1909 old_dyn_addr = olddev->info.dyn_addr;
1911 i3c_master_detach_i3c_dev(olddev);
1912 i3c_master_free_i3c_dev(olddev);
1915 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1917 goto err_detach_dev;
1920 * Depending on our previous state, the expected dynamic address might
1922 * - if the device already had a dynamic address assigned, let's try to
1924 * - if the device did not have a dynamic address and the firmware
1925 * requested a specific address, pick this one
1926 * - in any other case, keep the address automatically assigned by the
1929 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1930 expected_dyn_addr = old_dyn_addr;
1931 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1932 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1934 expected_dyn_addr = newdev->info.dyn_addr;
1936 if (newdev->info.dyn_addr != expected_dyn_addr) {
1938 * Try to apply the expected dynamic address. If it fails, keep
1939 * the address assigned by the master.
1941 ret = i3c_master_setnewda_locked(master,
1942 newdev->info.dyn_addr,
1945 old_dyn_addr = newdev->info.dyn_addr;
1946 newdev->info.dyn_addr = expected_dyn_addr;
1947 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1949 dev_err(&master->dev,
1950 "Failed to assign reserved/old address to device %d%llx",
1951 master->bus.id, newdev->info.pid);
1956 * Now is time to try to restore the IBI setup. If we're lucky,
1957 * everything works as before, otherwise, all we can do is complain.
1958 * FIXME: maybe we should add callback to inform the driver that it
1959 * should request the IBI again instead of trying to hide that from
1962 if (ibireq.handler) {
1963 mutex_lock(&newdev->ibi_lock);
1964 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1966 dev_err(&master->dev,
1967 "Failed to request IBI on device %d-%llx",
1968 master->bus.id, newdev->info.pid);
1969 } else if (enable_ibi) {
1970 ret = i3c_dev_enable_ibi_locked(newdev);
1972 dev_err(&master->dev,
1973 "Failed to re-enable IBI on device %d-%llx",
1974 master->bus.id, newdev->info.pid);
1976 mutex_unlock(&newdev->ibi_lock);
1982 if (newdev->dev && newdev->dev->desc)
1983 newdev->dev->desc = NULL;
1985 i3c_master_detach_i3c_dev(newdev);
1988 i3c_master_free_i3c_dev(newdev);
1992 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1994 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
1997 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1998 struct device_node *node, u32 *reg)
2000 struct i2c_dev_boardinfo *boardinfo;
2001 struct device *dev = &master->dev;
2004 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2008 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2013 * The I3C Specification does not clearly say I2C devices with 10-bit
2014 * address are supported. These devices can't be passed properly through
2017 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2018 dev_err(dev, "I2C device with 10 bit address not supported.");
2022 /* LVR is encoded in reg[2]. */
2023 boardinfo->lvr = reg[2];
2025 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2032 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2033 struct device_node *node, u32 *reg)
2035 struct i3c_dev_boardinfo *boardinfo;
2036 struct device *dev = &master->dev;
2037 enum i3c_addr_slot_status addrstatus;
2038 u32 init_dyn_addr = 0;
2040 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2045 if (reg[0] > I3C_MAX_ADDR)
2048 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2050 if (addrstatus != I3C_ADDR_SLOT_FREE)
2054 boardinfo->static_addr = reg[0];
2056 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2057 if (init_dyn_addr > I3C_MAX_ADDR)
2060 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2062 if (addrstatus != I3C_ADDR_SLOT_FREE)
2066 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2068 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2069 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2072 boardinfo->init_dyn_addr = init_dyn_addr;
2073 boardinfo->of_node = of_node_get(node);
2074 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2079 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2080 struct device_node *node)
2085 if (!master || !node)
2088 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2093 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2094 * dealing with an I2C device.
2097 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2099 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2104 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2106 struct device *dev = &master->dev;
2107 struct device_node *i3cbus_np = dev->of_node;
2108 struct device_node *node;
2115 for_each_available_child_of_node(i3cbus_np, node) {
2116 ret = of_i3c_master_add_dev(master, node);
2124 * The user might want to limit I2C and I3C speed in case some devices
2125 * on the bus are not supporting typical rates, or if the bus topology
2126 * prevents it from using max possible rate.
2128 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2129 master->bus.scl_rate.i2c = val;
2131 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2132 master->bus.scl_rate.i3c = val;
2137 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2138 struct i2c_msg *xfers, int nxfers)
2140 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2141 struct i2c_dev_desc *dev;
2145 if (!xfers || !master || nxfers <= 0)
2148 if (!master->ops->i2c_xfers)
2151 /* Doing transfers to different devices is not supported. */
2152 addr = xfers[0].addr;
2153 for (i = 1; i < nxfers; i++) {
2154 if (addr != xfers[i].addr)
2158 i3c_bus_normaluse_lock(&master->bus);
2159 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2163 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2164 i3c_bus_normaluse_unlock(&master->bus);
2166 return ret ? ret : nxfers;
2169 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2171 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2174 static const struct i2c_algorithm i3c_master_i2c_algo = {
2175 .master_xfer = i3c_master_i2c_adapter_xfer,
2176 .functionality = i3c_master_i2c_funcs,
2179 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2181 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2182 struct i2c_dev_desc *i2cdev;
2185 adap->dev.parent = master->dev.parent;
2186 adap->owner = master->dev.parent->driver->owner;
2187 adap->algo = &i3c_master_i2c_algo;
2188 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2190 /* FIXME: Should we allow i3c masters to override these values? */
2191 adap->timeout = 1000;
2194 ret = i2c_add_adapter(adap);
2199 * We silently ignore failures here. The bus should keep working
2200 * correctly even if one or more i2c devices are not registered.
2202 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2203 i2cdev->dev = i2c_new_client_device(adap, &i2cdev->boardinfo->base);
2208 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2210 struct i2c_dev_desc *i2cdev;
2212 i2c_del_adapter(&master->i2c);
2214 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2218 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2220 struct i3c_dev_desc *i3cdev;
2222 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2226 i3cdev->dev->desc = NULL;
2227 if (device_is_registered(&i3cdev->dev->dev))
2228 device_unregister(&i3cdev->dev->dev);
2230 put_device(&i3cdev->dev->dev);
2236 * i3c_master_queue_ibi() - Queue an IBI
2237 * @dev: the device this IBI is coming from
2238 * @slot: the IBI slot used to store the payload
2240 * Queue an IBI to the controller workqueue. The IBI handler attached to
2241 * the dev will be called from a workqueue context.
2243 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2245 atomic_inc(&dev->ibi->pending_ibis);
2246 queue_work(dev->common.master->wq, &slot->work);
2248 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2250 static void i3c_master_handle_ibi(struct work_struct *work)
2252 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2254 struct i3c_dev_desc *dev = slot->dev;
2255 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2256 struct i3c_ibi_payload payload;
2258 payload.data = slot->data;
2259 payload.len = slot->len;
2262 dev->ibi->handler(dev->dev, &payload);
2264 master->ops->recycle_ibi_slot(dev, slot);
2265 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2266 complete(&dev->ibi->all_ibis_handled);
2269 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2270 struct i3c_ibi_slot *slot)
2273 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2276 struct i3c_generic_ibi_slot {
2277 struct list_head node;
2278 struct i3c_ibi_slot base;
2281 struct i3c_generic_ibi_pool {
2283 unsigned int num_slots;
2284 struct i3c_generic_ibi_slot *slots;
2286 struct list_head free_slots;
2287 struct list_head pending;
2291 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2292 * @pool: the IBI pool to free
2294 * Free all IBI slots allated by a generic IBI pool.
2296 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2298 struct i3c_generic_ibi_slot *slot;
2299 unsigned int nslots = 0;
2301 while (!list_empty(&pool->free_slots)) {
2302 slot = list_first_entry(&pool->free_slots,
2303 struct i3c_generic_ibi_slot, node);
2304 list_del(&slot->node);
2309 * If the number of freed slots is not equal to the number of allocated
2310 * slots we have a leak somewhere.
2312 WARN_ON(nslots != pool->num_slots);
2314 kfree(pool->payload_buf);
2318 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2321 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2322 * @dev: the device this pool will be used for
2323 * @req: IBI setup request describing what the device driver expects
2325 * Create a generic IBI pool based on the information provided in @req.
2327 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2329 struct i3c_generic_ibi_pool *
2330 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2331 const struct i3c_ibi_setup *req)
2333 struct i3c_generic_ibi_pool *pool;
2334 struct i3c_generic_ibi_slot *slot;
2338 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2340 return ERR_PTR(-ENOMEM);
2342 spin_lock_init(&pool->lock);
2343 INIT_LIST_HEAD(&pool->free_slots);
2344 INIT_LIST_HEAD(&pool->pending);
2346 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2352 if (req->max_payload_len) {
2353 pool->payload_buf = kcalloc(req->num_slots,
2354 req->max_payload_len, GFP_KERNEL);
2355 if (!pool->payload_buf) {
2361 for (i = 0; i < req->num_slots; i++) {
2362 slot = &pool->slots[i];
2363 i3c_master_init_ibi_slot(dev, &slot->base);
2365 if (req->max_payload_len)
2366 slot->base.data = pool->payload_buf +
2367 (i * req->max_payload_len);
2369 list_add_tail(&slot->node, &pool->free_slots);
2376 i3c_generic_ibi_free_pool(pool);
2377 return ERR_PTR(ret);
2379 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2382 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2383 * @pool: the pool to query an IBI slot on
2385 * Search for a free slot in a generic IBI pool.
2386 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2387 * when it's no longer needed.
2389 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2391 struct i3c_ibi_slot *
2392 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2394 struct i3c_generic_ibi_slot *slot;
2395 unsigned long flags;
2397 spin_lock_irqsave(&pool->lock, flags);
2398 slot = list_first_entry_or_null(&pool->free_slots,
2399 struct i3c_generic_ibi_slot, node);
2401 list_del(&slot->node);
2402 spin_unlock_irqrestore(&pool->lock, flags);
2404 return slot ? &slot->base : NULL;
2406 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2409 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2410 * @pool: the pool to return the IBI slot to
2411 * @s: IBI slot to recycle
2413 * Add an IBI slot back to its generic IBI pool. Should be called from the
2414 * master driver struct_master_controller_ops->recycle_ibi() method.
2416 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2417 struct i3c_ibi_slot *s)
2419 struct i3c_generic_ibi_slot *slot;
2420 unsigned long flags;
2425 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2426 spin_lock_irqsave(&pool->lock, flags);
2427 list_add_tail(&slot->node, &pool->free_slots);
2428 spin_unlock_irqrestore(&pool->lock, flags);
2430 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2432 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2434 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2435 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2438 if (ops->request_ibi &&
2439 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2440 !ops->recycle_ibi_slot))
2447 * i3c_master_register() - register an I3C master
2448 * @master: master used to send frames on the bus
2449 * @parent: the parent device (the one that provides this I3C master
2451 * @ops: the master controller operations
2452 * @secondary: true if you are registering a secondary master. Will return
2453 * -ENOTSUPP if set to true since secondary masters are not yet
2456 * This function takes care of everything for you:
2458 * - creates and initializes the I3C bus
2459 * - populates the bus with static I2C devs if @parent->of_node is not
2461 * - registers all I3C devices added by the controller during bus
2463 * - registers the I2C adapter and all I2C devices
2465 * Return: 0 in case of success, a negative error code otherwise.
2467 int i3c_master_register(struct i3c_master_controller *master,
2468 struct device *parent,
2469 const struct i3c_master_controller_ops *ops,
2472 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2473 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2474 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2475 struct i2c_dev_boardinfo *i2cbi;
2478 /* We do not support secondary masters yet. */
2482 ret = i3c_master_check_ops(ops);
2486 master->dev.parent = parent;
2487 master->dev.of_node = of_node_get(parent->of_node);
2488 master->dev.bus = &i3c_bus_type;
2489 master->dev.type = &i3c_masterdev_type;
2490 master->dev.release = i3c_masterdev_release;
2492 master->secondary = secondary;
2493 INIT_LIST_HEAD(&master->boardinfo.i2c);
2494 INIT_LIST_HEAD(&master->boardinfo.i3c);
2496 ret = i3c_bus_init(i3cbus);
2500 device_initialize(&master->dev);
2501 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2503 ret = of_populate_i3c_bus(master);
2507 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2508 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2509 case I3C_LVR_I2C_INDEX(0):
2510 if (mode < I3C_BUS_MODE_MIXED_FAST)
2511 mode = I3C_BUS_MODE_MIXED_FAST;
2513 case I3C_LVR_I2C_INDEX(1):
2514 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2515 mode = I3C_BUS_MODE_MIXED_LIMITED;
2517 case I3C_LVR_I2C_INDEX(2):
2518 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2519 mode = I3C_BUS_MODE_MIXED_SLOW;
2526 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2527 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2530 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2534 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2540 ret = i3c_master_bus_init(master);
2544 ret = device_add(&master->dev);
2546 goto err_cleanup_bus;
2549 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2550 * through the I2C subsystem.
2552 ret = i3c_master_i2c_adapter_init(master);
2557 * We're done initializing the bus and the controller, we can now
2558 * register I3C devices discovered during the initial DAA.
2560 master->init_done = true;
2561 i3c_bus_normaluse_lock(&master->bus);
2562 i3c_master_register_new_i3c_devs(master);
2563 i3c_bus_normaluse_unlock(&master->bus);
2568 device_del(&master->dev);
2571 i3c_master_bus_cleanup(master);
2574 put_device(&master->dev);
2578 EXPORT_SYMBOL_GPL(i3c_master_register);
2581 * i3c_master_unregister() - unregister an I3C master
2582 * @master: master used to send frames on the bus
2584 * Basically undo everything done in i3c_master_register().
2586 * Return: 0 in case of success, a negative error code otherwise.
2588 int i3c_master_unregister(struct i3c_master_controller *master)
2590 i3c_master_i2c_adapter_cleanup(master);
2591 i3c_master_unregister_i3c_devs(master);
2592 i3c_master_bus_cleanup(master);
2593 device_unregister(&master->dev);
2597 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2599 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2600 struct i3c_priv_xfer *xfers,
2603 struct i3c_master_controller *master;
2608 master = i3c_dev_get_master(dev);
2609 if (!master || !xfers)
2612 if (!master->ops->priv_xfers)
2615 return master->ops->priv_xfers(dev, xfers, nxfers);
2618 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2620 struct i3c_master_controller *master;
2626 master = i3c_dev_get_master(dev);
2627 ret = master->ops->disable_ibi(dev);
2631 reinit_completion(&dev->ibi->all_ibis_handled);
2632 if (atomic_read(&dev->ibi->pending_ibis))
2633 wait_for_completion(&dev->ibi->all_ibis_handled);
2635 dev->ibi->enabled = false;
2640 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2642 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2648 ret = master->ops->enable_ibi(dev);
2650 dev->ibi->enabled = true;
2655 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2656 const struct i3c_ibi_setup *req)
2658 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2659 struct i3c_device_ibi_info *ibi;
2662 if (!master->ops->request_ibi)
2668 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2672 atomic_set(&ibi->pending_ibis, 0);
2673 init_completion(&ibi->all_ibis_handled);
2674 ibi->handler = req->handler;
2675 ibi->max_payload_len = req->max_payload_len;
2676 ibi->num_slots = req->num_slots;
2679 ret = master->ops->request_ibi(dev, req);
2688 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2690 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2695 if (WARN_ON(dev->ibi->enabled))
2696 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2698 master->ops->free_ibi(dev);
2703 static int __init i3c_init(void)
2705 return bus_register(&i3c_bus_type);
2707 subsys_initcall(i3c_init);
2709 static void __exit i3c_exit(void)
2711 idr_destroy(&i3c_bus_idr);
2712 bus_unregister(&i3c_bus_type);
2714 module_exit(i3c_exit);
2716 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2717 MODULE_DESCRIPTION("I3C core");
2718 MODULE_LICENSE("GPL v2");