GNU Linux-libre 4.19.295-gnu1
[releases.git] / drivers / i2c / busses / i2c-xgene-slimpro.c
1 /*
2  * X-Gene SLIMpro I2C Driver
3  *
4  * Copyright (c) 2014, Applied Micro Circuits Corporation
5  * Author: Feng Kan <fkan@apm.com>
6  * Author: Hieu Le <hnle@apm.com>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, see <http://www.gnu.org/licenses/>.
20  *
21  * This driver provides support for X-Gene SLIMpro I2C device access
22  * using the APM X-Gene SLIMpro mailbox driver.
23  *
24  */
25 #include <acpi/pcc.h>
26 #include <linux/acpi.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/i2c.h>
29 #include <linux/interrupt.h>
30 #include <linux/io.h>
31 #include <linux/mailbox_client.h>
32 #include <linux/module.h>
33 #include <linux/of.h>
34 #include <linux/platform_device.h>
35 #include <linux/version.h>
36
37 #define MAILBOX_OP_TIMEOUT              1000    /* Operation time out in ms */
38 #define MAILBOX_I2C_INDEX               0
39 #define SLIMPRO_IIC_BUS                 1       /* Use I2C bus 1 only */
40
41 #define SMBUS_CMD_LEN                   1
42 #define BYTE_DATA                       1
43 #define WORD_DATA                       2
44 #define BLOCK_DATA                      3
45
46 #define SLIMPRO_IIC_I2C_PROTOCOL        0
47 #define SLIMPRO_IIC_SMB_PROTOCOL        1
48
49 #define SLIMPRO_IIC_READ                0
50 #define SLIMPRO_IIC_WRITE               1
51
52 #define IIC_SMB_WITHOUT_DATA_LEN        0
53 #define IIC_SMB_WITH_DATA_LEN           1
54
55 #define SLIMPRO_DEBUG_MSG               0
56 #define SLIMPRO_MSG_TYPE_SHIFT          28
57 #define SLIMPRO_DBG_SUBTYPE_I2C1READ    4
58 #define SLIMPRO_DBGMSG_TYPE_SHIFT       24
59 #define SLIMPRO_DBGMSG_TYPE_MASK        0x0F000000U
60 #define SLIMPRO_IIC_DEV_SHIFT           23
61 #define SLIMPRO_IIC_DEV_MASK            0x00800000U
62 #define SLIMPRO_IIC_DEVID_SHIFT         13
63 #define SLIMPRO_IIC_DEVID_MASK          0x007FE000U
64 #define SLIMPRO_IIC_RW_SHIFT            12
65 #define SLIMPRO_IIC_RW_MASK             0x00001000U
66 #define SLIMPRO_IIC_PROTO_SHIFT         11
67 #define SLIMPRO_IIC_PROTO_MASK          0x00000800U
68 #define SLIMPRO_IIC_ADDRLEN_SHIFT       8
69 #define SLIMPRO_IIC_ADDRLEN_MASK        0x00000700U
70 #define SLIMPRO_IIC_DATALEN_SHIFT       0
71 #define SLIMPRO_IIC_DATALEN_MASK        0x000000FFU
72
73 /*
74  * SLIMpro I2C message encode
75  *
76  * dev          - Controller number (0-based)
77  * chip         - I2C chip address
78  * op           - SLIMPRO_IIC_READ or SLIMPRO_IIC_WRITE
79  * proto        - SLIMPRO_IIC_SMB_PROTOCOL or SLIMPRO_IIC_I2C_PROTOCOL
80  * addrlen      - Length of the address field
81  * datalen      - Length of the data field
82  */
83 #define SLIMPRO_IIC_ENCODE_MSG(dev, chip, op, proto, addrlen, datalen) \
84         ((SLIMPRO_DEBUG_MSG << SLIMPRO_MSG_TYPE_SHIFT) | \
85         ((SLIMPRO_DBG_SUBTYPE_I2C1READ << SLIMPRO_DBGMSG_TYPE_SHIFT) & \
86         SLIMPRO_DBGMSG_TYPE_MASK) | \
87         ((dev << SLIMPRO_IIC_DEV_SHIFT) & SLIMPRO_IIC_DEV_MASK) | \
88         ((chip << SLIMPRO_IIC_DEVID_SHIFT) & SLIMPRO_IIC_DEVID_MASK) | \
89         ((op << SLIMPRO_IIC_RW_SHIFT) & SLIMPRO_IIC_RW_MASK) | \
90         ((proto << SLIMPRO_IIC_PROTO_SHIFT) & SLIMPRO_IIC_PROTO_MASK) | \
91         ((addrlen << SLIMPRO_IIC_ADDRLEN_SHIFT) & SLIMPRO_IIC_ADDRLEN_MASK) | \
92         ((datalen << SLIMPRO_IIC_DATALEN_SHIFT) & SLIMPRO_IIC_DATALEN_MASK))
93
94 #define SLIMPRO_MSG_TYPE(v)             (((v) & 0xF0000000) >> 28)
95
96 /*
97  * Encode for upper address for block data
98  */
99 #define SLIMPRO_IIC_ENCODE_FLAG_BUFADDR                 0x80000000
100 #define SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(a)        ((u32) (((a) << 30) \
101                                                                 & 0x40000000))
102 #define SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(a)             ((u32) (((a) >> 12) \
103                                                                 & 0x3FF00000))
104 #define SLIMPRO_IIC_ENCODE_ADDR(a)                      ((a) & 0x000FFFFF)
105
106 #define SLIMPRO_IIC_MSG_DWORD_COUNT                     3
107
108 /* PCC related defines */
109 #define PCC_SIGNATURE                   0x50424300
110 #define PCC_STS_CMD_COMPLETE            BIT(0)
111 #define PCC_STS_SCI_DOORBELL            BIT(1)
112 #define PCC_STS_ERR                     BIT(2)
113 #define PCC_STS_PLAT_NOTIFY             BIT(3)
114 #define PCC_CMD_GENERATE_DB_INT         BIT(15)
115
116 struct slimpro_i2c_dev {
117         struct i2c_adapter adapter;
118         struct device *dev;
119         struct mbox_chan *mbox_chan;
120         struct mbox_client mbox_client;
121         int mbox_idx;
122         struct completion rd_complete;
123         u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* dma_buffer[0] is used for length */
124         u32 *resp_msg;
125         phys_addr_t comm_base_addr;
126         void *pcc_comm_addr;
127 };
128
129 #define to_slimpro_i2c_dev(cl)  \
130                 container_of(cl, struct slimpro_i2c_dev, mbox_client)
131
132 enum slimpro_i2c_version {
133         XGENE_SLIMPRO_I2C_V1 = 0,
134         XGENE_SLIMPRO_I2C_V2 = 1,
135 };
136
137 /*
138  * This function tests and clears a bitmask then returns its old value
139  */
140 static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask)
141 {
142         u16 ret, val;
143
144         val = le16_to_cpu(READ_ONCE(*addr));
145         ret = val & mask;
146         val &= ~mask;
147         WRITE_ONCE(*addr, cpu_to_le16(val));
148
149         return ret;
150 }
151
152 static void slimpro_i2c_rx_cb(struct mbox_client *cl, void *mssg)
153 {
154         struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
155
156         /*
157          * Response message format:
158          * mssg[0] is the return code of the operation
159          * mssg[1] is the first data word
160          * mssg[2] is NOT used
161          */
162         if (ctx->resp_msg)
163                 *ctx->resp_msg = ((u32 *)mssg)[1];
164
165         if (ctx->mbox_client.tx_block)
166                 complete(&ctx->rd_complete);
167 }
168
169 static void slimpro_i2c_pcc_rx_cb(struct mbox_client *cl, void *msg)
170 {
171         struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
172         struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
173
174         /* Check if platform sends interrupt */
175         if (!xgene_word_tst_and_clr(&generic_comm_base->status,
176                                     PCC_STS_SCI_DOORBELL))
177                 return;
178
179         if (xgene_word_tst_and_clr(&generic_comm_base->status,
180                                    PCC_STS_CMD_COMPLETE)) {
181                 msg = generic_comm_base + 1;
182
183                 /* Response message msg[1] contains the return value. */
184                 if (ctx->resp_msg)
185                         *ctx->resp_msg = ((u32 *)msg)[1];
186
187                 complete(&ctx->rd_complete);
188         }
189 }
190
191 static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev *ctx, u32 *msg)
192 {
193         struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
194         u32 *ptr = (void *)(generic_comm_base + 1);
195         u16 status;
196         int i;
197
198         WRITE_ONCE(generic_comm_base->signature,
199                    cpu_to_le32(PCC_SIGNATURE | ctx->mbox_idx));
200
201         WRITE_ONCE(generic_comm_base->command,
202                    cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) | PCC_CMD_GENERATE_DB_INT));
203
204         status = le16_to_cpu(READ_ONCE(generic_comm_base->status));
205         status &= ~PCC_STS_CMD_COMPLETE;
206         WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status));
207
208         /* Copy the message to the PCC comm space */
209         for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++)
210                 WRITE_ONCE(ptr[i], cpu_to_le32(msg[i]));
211 }
212
213 static int start_i2c_msg_xfer(struct slimpro_i2c_dev *ctx)
214 {
215         if (ctx->mbox_client.tx_block || !acpi_disabled) {
216                 if (!wait_for_completion_timeout(&ctx->rd_complete,
217                                                  msecs_to_jiffies(MAILBOX_OP_TIMEOUT)))
218                         return -ETIMEDOUT;
219         }
220
221         /* Check of invalid data or no device */
222         if (*ctx->resp_msg == 0xffffffff)
223                 return -ENODEV;
224
225         return 0;
226 }
227
228 static int slimpro_i2c_send_msg(struct slimpro_i2c_dev *ctx,
229                                 u32 *msg,
230                                 u32 *data)
231 {
232         int rc;
233
234         ctx->resp_msg = data;
235
236         if (!acpi_disabled) {
237                 reinit_completion(&ctx->rd_complete);
238                 slimpro_i2c_pcc_tx_prepare(ctx, msg);
239         }
240
241         rc = mbox_send_message(ctx->mbox_chan, msg);
242         if (rc < 0)
243                 goto err;
244
245         rc = start_i2c_msg_xfer(ctx);
246
247 err:
248         if (!acpi_disabled)
249                 mbox_chan_txdone(ctx->mbox_chan, 0);
250
251         ctx->resp_msg = NULL;
252
253         return rc;
254 }
255
256 static int slimpro_i2c_rd(struct slimpro_i2c_dev *ctx, u32 chip,
257                           u32 addr, u32 addrlen, u32 protocol,
258                           u32 readlen, u32 *data)
259 {
260         u32 msg[3];
261
262         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
263                                         SLIMPRO_IIC_READ, protocol, addrlen, readlen);
264         msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
265         msg[2] = 0;
266
267         return slimpro_i2c_send_msg(ctx, msg, data);
268 }
269
270 static int slimpro_i2c_wr(struct slimpro_i2c_dev *ctx, u32 chip,
271                           u32 addr, u32 addrlen, u32 protocol, u32 writelen,
272                           u32 data)
273 {
274         u32 msg[3];
275
276         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
277                                         SLIMPRO_IIC_WRITE, protocol, addrlen, writelen);
278         msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
279         msg[2] = data;
280
281         return slimpro_i2c_send_msg(ctx, msg, msg);
282 }
283
284 static int slimpro_i2c_blkrd(struct slimpro_i2c_dev *ctx, u32 chip, u32 addr,
285                              u32 addrlen, u32 protocol, u32 readlen,
286                              u32 with_data_len, void *data)
287 {
288         dma_addr_t paddr;
289         u32 msg[3];
290         int rc;
291
292         paddr = dma_map_single(ctx->dev, ctx->dma_buffer, readlen, DMA_FROM_DEVICE);
293         if (dma_mapping_error(ctx->dev, paddr)) {
294                 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
295                         ctx->dma_buffer);
296                 return -ENOMEM;
297         }
298
299         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_READ,
300                                         protocol, addrlen, readlen);
301         msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
302                  SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(with_data_len) |
303                  SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
304                  SLIMPRO_IIC_ENCODE_ADDR(addr);
305         msg[2] = (u32)paddr;
306
307         rc = slimpro_i2c_send_msg(ctx, msg, msg);
308
309         /* Copy to destination */
310         memcpy(data, ctx->dma_buffer, readlen);
311
312         dma_unmap_single(ctx->dev, paddr, readlen, DMA_FROM_DEVICE);
313         return rc;
314 }
315
316 static int slimpro_i2c_blkwr(struct slimpro_i2c_dev *ctx, u32 chip,
317                              u32 addr, u32 addrlen, u32 protocol, u32 writelen,
318                              void *data)
319 {
320         dma_addr_t paddr;
321         u32 msg[3];
322         int rc;
323
324         if (writelen > I2C_SMBUS_BLOCK_MAX)
325                 return -EINVAL;
326
327         memcpy(ctx->dma_buffer, data, writelen);
328         paddr = dma_map_single(ctx->dev, ctx->dma_buffer, writelen,
329                                DMA_TO_DEVICE);
330         if (dma_mapping_error(ctx->dev, paddr)) {
331                 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
332                         ctx->dma_buffer);
333                 return -ENOMEM;
334         }
335
336         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_WRITE,
337                                         protocol, addrlen, writelen);
338         msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
339                  SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
340                  SLIMPRO_IIC_ENCODE_ADDR(addr);
341         msg[2] = (u32)paddr;
342
343         if (ctx->mbox_client.tx_block)
344                 reinit_completion(&ctx->rd_complete);
345
346         rc = slimpro_i2c_send_msg(ctx, msg, msg);
347
348         dma_unmap_single(ctx->dev, paddr, writelen, DMA_TO_DEVICE);
349         return rc;
350 }
351
352 static int xgene_slimpro_i2c_xfer(struct i2c_adapter *adap, u16 addr,
353                                   unsigned short flags, char read_write,
354                                   u8 command, int size,
355                                   union i2c_smbus_data *data)
356 {
357         struct slimpro_i2c_dev *ctx = i2c_get_adapdata(adap);
358         int ret = -EOPNOTSUPP;
359         u32 val;
360
361         switch (size) {
362         case I2C_SMBUS_BYTE:
363                 if (read_write == I2C_SMBUS_READ) {
364                         ret = slimpro_i2c_rd(ctx, addr, 0, 0,
365                                              SLIMPRO_IIC_SMB_PROTOCOL,
366                                              BYTE_DATA, &val);
367                         data->byte = val;
368                 } else {
369                         ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
370                                              SLIMPRO_IIC_SMB_PROTOCOL,
371                                              0, 0);
372                 }
373                 break;
374         case I2C_SMBUS_BYTE_DATA:
375                 if (read_write == I2C_SMBUS_READ) {
376                         ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
377                                              SLIMPRO_IIC_SMB_PROTOCOL,
378                                              BYTE_DATA, &val);
379                         data->byte = val;
380                 } else {
381                         val = data->byte;
382                         ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
383                                              SLIMPRO_IIC_SMB_PROTOCOL,
384                                              BYTE_DATA, val);
385                 }
386                 break;
387         case I2C_SMBUS_WORD_DATA:
388                 if (read_write == I2C_SMBUS_READ) {
389                         ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
390                                              SLIMPRO_IIC_SMB_PROTOCOL,
391                                              WORD_DATA, &val);
392                         data->word = val;
393                 } else {
394                         val = data->word;
395                         ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
396                                              SLIMPRO_IIC_SMB_PROTOCOL,
397                                              WORD_DATA, val);
398                 }
399                 break;
400         case I2C_SMBUS_BLOCK_DATA:
401                 if (read_write == I2C_SMBUS_READ) {
402                         ret = slimpro_i2c_blkrd(ctx, addr, command,
403                                                 SMBUS_CMD_LEN,
404                                                 SLIMPRO_IIC_SMB_PROTOCOL,
405                                                 I2C_SMBUS_BLOCK_MAX + 1,
406                                                 IIC_SMB_WITH_DATA_LEN,
407                                                 &data->block[0]);
408
409                 } else {
410                         ret = slimpro_i2c_blkwr(ctx, addr, command,
411                                                 SMBUS_CMD_LEN,
412                                                 SLIMPRO_IIC_SMB_PROTOCOL,
413                                                 data->block[0] + 1,
414                                                 &data->block[0]);
415                 }
416                 break;
417         case I2C_SMBUS_I2C_BLOCK_DATA:
418                 if (read_write == I2C_SMBUS_READ) {
419                         ret = slimpro_i2c_blkrd(ctx, addr,
420                                                 command,
421                                                 SMBUS_CMD_LEN,
422                                                 SLIMPRO_IIC_I2C_PROTOCOL,
423                                                 I2C_SMBUS_BLOCK_MAX,
424                                                 IIC_SMB_WITHOUT_DATA_LEN,
425                                                 &data->block[1]);
426                 } else {
427                         ret = slimpro_i2c_blkwr(ctx, addr, command,
428                                                 SMBUS_CMD_LEN,
429                                                 SLIMPRO_IIC_I2C_PROTOCOL,
430                                                 data->block[0],
431                                                 &data->block[1]);
432                 }
433                 break;
434         default:
435                 break;
436         }
437         return ret;
438 }
439
440 /*
441 * Return list of supported functionality.
442 */
443 static u32 xgene_slimpro_i2c_func(struct i2c_adapter *adapter)
444 {
445         return I2C_FUNC_SMBUS_BYTE |
446                 I2C_FUNC_SMBUS_BYTE_DATA |
447                 I2C_FUNC_SMBUS_WORD_DATA |
448                 I2C_FUNC_SMBUS_BLOCK_DATA |
449                 I2C_FUNC_SMBUS_I2C_BLOCK;
450 }
451
452 static const struct i2c_algorithm xgene_slimpro_i2c_algorithm = {
453         .smbus_xfer = xgene_slimpro_i2c_xfer,
454         .functionality = xgene_slimpro_i2c_func,
455 };
456
457 static int xgene_slimpro_i2c_probe(struct platform_device *pdev)
458 {
459         struct slimpro_i2c_dev *ctx;
460         struct i2c_adapter *adapter;
461         struct mbox_client *cl;
462         int rc;
463
464         ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
465         if (!ctx)
466                 return -ENOMEM;
467
468         ctx->dev = &pdev->dev;
469         platform_set_drvdata(pdev, ctx);
470         cl = &ctx->mbox_client;
471
472         /* Request mailbox channel */
473         cl->dev = &pdev->dev;
474         init_completion(&ctx->rd_complete);
475         cl->tx_tout = MAILBOX_OP_TIMEOUT;
476         cl->knows_txdone = false;
477         if (acpi_disabled) {
478                 cl->tx_block = true;
479                 cl->rx_callback = slimpro_i2c_rx_cb;
480                 ctx->mbox_chan = mbox_request_channel(cl, MAILBOX_I2C_INDEX);
481                 if (IS_ERR(ctx->mbox_chan)) {
482                         dev_err(&pdev->dev, "i2c mailbox channel request failed\n");
483                         return PTR_ERR(ctx->mbox_chan);
484                 }
485         } else {
486                 struct acpi_pcct_hw_reduced *cppc_ss;
487                 const struct acpi_device_id *acpi_id;
488                 int version = XGENE_SLIMPRO_I2C_V1;
489
490                 acpi_id = acpi_match_device(pdev->dev.driver->acpi_match_table,
491                                             &pdev->dev);
492                 if (!acpi_id)
493                         return -EINVAL;
494
495                 version = (int)acpi_id->driver_data;
496
497                 if (device_property_read_u32(&pdev->dev, "pcc-channel",
498                                              &ctx->mbox_idx))
499                         ctx->mbox_idx = MAILBOX_I2C_INDEX;
500
501                 cl->tx_block = false;
502                 cl->rx_callback = slimpro_i2c_pcc_rx_cb;
503                 ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx);
504                 if (IS_ERR(ctx->mbox_chan)) {
505                         dev_err(&pdev->dev, "PCC mailbox channel request failed\n");
506                         return PTR_ERR(ctx->mbox_chan);
507                 }
508
509                 /*
510                  * The PCC mailbox controller driver should
511                  * have parsed the PCCT (global table of all
512                  * PCC channels) and stored pointers to the
513                  * subspace communication region in con_priv.
514                  */
515                 cppc_ss = ctx->mbox_chan->con_priv;
516                 if (!cppc_ss) {
517                         dev_err(&pdev->dev, "PPC subspace not found\n");
518                         rc = -ENOENT;
519                         goto mbox_err;
520                 }
521
522                 if (!ctx->mbox_chan->mbox->txdone_irq) {
523                         dev_err(&pdev->dev, "PCC IRQ not supported\n");
524                         rc = -ENOENT;
525                         goto mbox_err;
526                 }
527
528                 /*
529                  * This is the shared communication region
530                  * for the OS and Platform to communicate over.
531                  */
532                 ctx->comm_base_addr = cppc_ss->base_address;
533                 if (ctx->comm_base_addr) {
534                         if (version == XGENE_SLIMPRO_I2C_V2)
535                                 ctx->pcc_comm_addr = memremap(
536                                                         ctx->comm_base_addr,
537                                                         cppc_ss->length,
538                                                         MEMREMAP_WT);
539                         else
540                                 ctx->pcc_comm_addr = memremap(
541                                                         ctx->comm_base_addr,
542                                                         cppc_ss->length,
543                                                         MEMREMAP_WB);
544                 } else {
545                         dev_err(&pdev->dev, "Failed to get PCC comm region\n");
546                         rc = -ENOENT;
547                         goto mbox_err;
548                 }
549
550                 if (!ctx->pcc_comm_addr) {
551                         dev_err(&pdev->dev,
552                                 "Failed to ioremap PCC comm region\n");
553                         rc = -ENOMEM;
554                         goto mbox_err;
555                 }
556         }
557         rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
558         if (rc)
559                 dev_warn(&pdev->dev, "Unable to set dma mask\n");
560
561         /* Setup I2C adapter */
562         adapter = &ctx->adapter;
563         snprintf(adapter->name, sizeof(adapter->name), "MAILBOX I2C");
564         adapter->algo = &xgene_slimpro_i2c_algorithm;
565         adapter->class = I2C_CLASS_HWMON;
566         adapter->dev.parent = &pdev->dev;
567         adapter->dev.of_node = pdev->dev.of_node;
568         ACPI_COMPANION_SET(&adapter->dev, ACPI_COMPANION(&pdev->dev));
569         i2c_set_adapdata(adapter, ctx);
570         rc = i2c_add_adapter(adapter);
571         if (rc)
572                 goto mbox_err;
573
574         dev_info(&pdev->dev, "Mailbox I2C Adapter registered\n");
575         return 0;
576
577 mbox_err:
578         if (acpi_disabled)
579                 mbox_free_channel(ctx->mbox_chan);
580         else
581                 pcc_mbox_free_channel(ctx->mbox_chan);
582
583         return rc;
584 }
585
586 static int xgene_slimpro_i2c_remove(struct platform_device *pdev)
587 {
588         struct slimpro_i2c_dev *ctx = platform_get_drvdata(pdev);
589
590         i2c_del_adapter(&ctx->adapter);
591
592         if (acpi_disabled)
593                 mbox_free_channel(ctx->mbox_chan);
594         else
595                 pcc_mbox_free_channel(ctx->mbox_chan);
596
597         return 0;
598 }
599
600 static const struct of_device_id xgene_slimpro_i2c_dt_ids[] = {
601         {.compatible = "apm,xgene-slimpro-i2c" },
602         {},
603 };
604 MODULE_DEVICE_TABLE(of, xgene_slimpro_i2c_dt_ids);
605
606 #ifdef CONFIG_ACPI
607 static const struct acpi_device_id xgene_slimpro_i2c_acpi_ids[] = {
608         {"APMC0D40", XGENE_SLIMPRO_I2C_V1},
609         {"APMC0D8B", XGENE_SLIMPRO_I2C_V2},
610         {}
611 };
612 MODULE_DEVICE_TABLE(acpi, xgene_slimpro_i2c_acpi_ids);
613 #endif
614
615 static struct platform_driver xgene_slimpro_i2c_driver = {
616         .probe  = xgene_slimpro_i2c_probe,
617         .remove = xgene_slimpro_i2c_remove,
618         .driver = {
619                 .name   = "xgene-slimpro-i2c",
620                 .of_match_table = of_match_ptr(xgene_slimpro_i2c_dt_ids),
621                 .acpi_match_table = ACPI_PTR(xgene_slimpro_i2c_acpi_ids)
622         },
623 };
624
625 module_platform_driver(xgene_slimpro_i2c_driver);
626
627 MODULE_DESCRIPTION("APM X-Gene SLIMpro I2C driver");
628 MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
629 MODULE_AUTHOR("Hieu Le <hnle@apm.com>");
630 MODULE_LICENSE("GPL");