drivers/i2c/busses/i2c-piix4.c

   1 /*
   2     Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
   3     Philip Edelbrock <phil@netroedge.com>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 2 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14 */
  15
  16 /*
  17    Supports:
  18         Intel PIIX4, 440MX
  19         Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
  20         ATI IXP200, IXP300, IXP400, SB600, SB700/SP5100, SB800
  21         AMD Hudson-2, ML, CZ
  22         SMSC Victory66
  23
  24    Note: we assume there can only be one device, with one or more
  25    SMBus interfaces.
  26    The device can register multiple i2c_adapters (up to PIIX4_MAX_ADAPTERS).
  27    For devices supporting multiple ports the i2c_adapter should provide
  28    an i2c_algorithm to access them.
  29 */
  30
  31 #include <linux/module.h>
  32 #include <linux/moduleparam.h>
  33 #include <linux/pci.h>
  34 #include <linux/kernel.h>
  35 #include <linux/delay.h>
  36 #include <linux/stddef.h>
  37 #include <linux/ioport.h>
  38 #include <linux/i2c.h>
  39 #include <linux/slab.h>
  40 #include <linux/dmi.h>
  41 #include <linux/acpi.h>
  42 #include <linux/io.h>
  43
  44
  45 /* PIIX4 SMBus address offsets */
  46 #define SMBHSTSTS       (0 + piix4_smba)
  47 #define SMBHSLVSTS      (1 + piix4_smba)
  48 #define SMBHSTCNT       (2 + piix4_smba)
  49 #define SMBHSTCMD       (3 + piix4_smba)
  50 #define SMBHSTADD       (4 + piix4_smba)
  51 #define SMBHSTDAT0      (5 + piix4_smba)
  52 #define SMBHSTDAT1      (6 + piix4_smba)
  53 #define SMBBLKDAT       (7 + piix4_smba)
  54 #define SMBSLVCNT       (8 + piix4_smba)
  55 #define SMBSHDWCMD      (9 + piix4_smba)
  56 #define SMBSLVEVT       (0xA + piix4_smba)
  57 #define SMBSLVDAT       (0xC + piix4_smba)
  58
  59 /* count for request_region */
  60 #define SMBIOSIZE       9
  61
  62 /* PCI Address Constants */
  63 #define SMBBA           0x090
  64 #define SMBHSTCFG       0x0D2
  65 #define SMBSLVC         0x0D3
  66 #define SMBSHDW1        0x0D4
  67 #define SMBSHDW2        0x0D5
  68 #define SMBREV          0x0D6
  69
  70 /* Other settings */
  71 #define MAX_TIMEOUT     500
  72 #define  ENABLE_INT9    0
  73
  74 /* PIIX4 constants */
  75 #define PIIX4_QUICK             0x00
  76 #define PIIX4_BYTE              0x04
  77 #define PIIX4_BYTE_DATA         0x08
  78 #define PIIX4_WORD_DATA         0x0C
  79 #define PIIX4_BLOCK_DATA        0x14
  80
  81 /* Multi-port constants */
  82 #define PIIX4_MAX_ADAPTERS 4
  83
  84 /* SB800 constants */
  85 #define SB800_PIIX4_SMB_IDX             0xcd6
  86
  87 #define KERNCZ_IMC_IDX                  0x3e
  88 #define KERNCZ_IMC_DATA                 0x3f
  89
  90 /*
  91  * SB800 port is selected by bits 2:1 of the smb_en register (0x2c)
  92  * or the smb_sel register (0x2e), depending on bit 0 of register 0x2f.
  93  * Hudson-2/Bolton port is always selected by bits 2:1 of register 0x2f.
  94  */
  95 #define SB800_PIIX4_PORT_IDX            0x2c
  96 #define SB800_PIIX4_PORT_IDX_ALT        0x2e
  97 #define SB800_PIIX4_PORT_IDX_SEL        0x2f
  98 #define SB800_PIIX4_PORT_IDX_MASK       0x06
  99 #define SB800_PIIX4_PORT_IDX_SHIFT      1
 100
 101 /* On kerncz and Hudson2, SmBus0Sel is at bit 20:19 of PMx00 DecodeEn */
 102 #define SB800_PIIX4_PORT_IDX_KERNCZ             0x02
 103 #define SB800_PIIX4_PORT_IDX_MASK_KERNCZ        0x18
 104 #define SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ       3
 105
 106 /* insmod parameters */
 107
 108 /* If force is set to anything different from 0, we forcibly enable the
 109    PIIX4. DANGEROUS! */
 110 static int force;
 111 module_param (force, int, 0);
 112 MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
 113
 114 /* If force_addr is set to anything different from 0, we forcibly enable
 115    the PIIX4 at the given address. VERY DANGEROUS! */
 116 static int force_addr;
 117 module_param_hw(force_addr, int, ioport, 0);
 118 MODULE_PARM_DESC(force_addr,
 119                  "Forcibly enable the PIIX4 at the given address. "
 120                  "EXTREMELY DANGEROUS!");
 121
 122 static int srvrworks_csb5_delay;
 123 static struct pci_driver piix4_driver;
 124
 125 static const struct dmi_system_id piix4_dmi_blacklist[] = {
 126         {
 127                 .ident = "Sapphire AM2RD790",
 128                 .matches = {
 129                         DMI_MATCH(DMI_BOARD_VENDOR, "SAPPHIRE Inc."),
 130                         DMI_MATCH(DMI_BOARD_NAME, "PC-AM2RD790"),
 131                 },
 132         },
 133         {
 134                 .ident = "DFI Lanparty UT 790FX",
 135                 .matches = {
 136                         DMI_MATCH(DMI_BOARD_VENDOR, "DFI Inc."),
 137                         DMI_MATCH(DMI_BOARD_NAME, "LP UT 790FX"),
 138                 },
 139         },
 140         { }
 141 };
 142
 143 /* The IBM entry is in a separate table because we only check it
 144    on Intel-based systems */
 145 static const struct dmi_system_id piix4_dmi_ibm[] = {
 146         {
 147                 .ident = "IBM",
 148                 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
 149         },
 150         { },
 151 };
 152
 153 /*
 154  * SB800 globals
 155  */
 156 static u8 piix4_port_sel_sb800;
 157 static u8 piix4_port_mask_sb800;
 158 static u8 piix4_port_shift_sb800;
 159 static const char *piix4_main_port_names_sb800[PIIX4_MAX_ADAPTERS] = {
 160         " port 0", " port 2", " port 3", " port 4"
 161 };
 162 static const char *piix4_aux_port_name_sb800 = " port 1";
 163
 164 struct i2c_piix4_adapdata {
 165         unsigned short smba;
 166
 167         /* SB800 */
 168         bool sb800_main;
 169         bool notify_imc;
 170         u8 port;                /* Port number, shifted */
 171 };
 172
 173 static int piix4_setup(struct pci_dev *PIIX4_dev,
 174                        const struct pci_device_id *id)
 175 {
 176         unsigned char temp;
 177         unsigned short piix4_smba;
 178
 179         if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
 180             (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5))
 181                 srvrworks_csb5_delay = 1;
 182
 183         /* On some motherboards, it was reported that accessing the SMBus
 184            caused severe hardware problems */
 185         if (dmi_check_system(piix4_dmi_blacklist)) {
 186                 dev_err(&PIIX4_dev->dev,
 187                         "Accessing the SMBus on this system is unsafe!\n");
 188                 return -EPERM;
 189         }
 190
 191         /* Don't access SMBus on IBM systems which get corrupted eeproms */
 192         if (dmi_check_system(piix4_dmi_ibm) &&
 193                         PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
 194                 dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
 195                         "may corrupt your serial eeprom! Refusing to load "
 196                         "module!\n");
 197                 return -EPERM;
 198         }
 199
 200         /* Determine the address of the SMBus areas */
 201         if (force_addr) {
 202                 piix4_smba = force_addr & 0xfff0;
 203                 force = 0;
 204         } else {
 205                 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
 206                 piix4_smba &= 0xfff0;
 207                 if(piix4_smba == 0) {
 208                         dev_err(&PIIX4_dev->dev, "SMBus base address "
 209                                 "uninitialized - upgrade BIOS or use "
 210                                 "force_addr=0xaddr\n");
 211                         return -ENODEV;
 212                 }
 213         }
 214
 215         if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
 216                 return -ENODEV;
 217
 218         if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
 219                 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
 220                         piix4_smba);
 221                 return -EBUSY;
 222         }
 223
 224         pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
 225
 226         /* If force_addr is set, we program the new address here. Just to make
 227            sure, we disable the PIIX4 first. */
 228         if (force_addr) {
 229                 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
 230                 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
 231                 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
 232                 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
 233                         "new address %04x!\n", piix4_smba);
 234         } else if ((temp & 1) == 0) {
 235                 if (force) {
 236                         /* This should never need to be done, but has been
 237                          * noted that many Dell machines have the SMBus
 238                          * interface on the PIIX4 disabled!? NOTE: This assumes
 239                          * I/O space and other allocations WERE done by the
 240                          * Bios!  Don't complain if your hardware does weird
 241                          * things after enabling this. :') Check for Bios
 242                          * updates before resorting to this.
 243                          */
 244                         pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
 245                                               temp | 1);
 246                         dev_notice(&PIIX4_dev->dev,
 247                                    "WARNING: SMBus interface has been FORCEFULLY ENABLED!\n");
 248                 } else {
 249                         dev_err(&PIIX4_dev->dev,
 250                                 "SMBus Host Controller not enabled!\n");
 251                         release_region(piix4_smba, SMBIOSIZE);
 252                         return -ENODEV;
 253                 }
 254         }
 255
 256         if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
 257                 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n");
 258         else if ((temp & 0x0E) == 0)
 259                 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n");
 260         else
 261                 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
 262                         "(or code out of date)!\n");
 263
 264         pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
 265         dev_info(&PIIX4_dev->dev,
 266                  "SMBus Host Controller at 0x%x, revision %d\n",
 267                  piix4_smba, temp);
 268
 269         return piix4_smba;
 270 }
 271
 272 static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
 273                              const struct pci_device_id *id, u8 aux)
 274 {
 275         unsigned short piix4_smba;
 276         u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status, port_sel;
 277         u8 i2ccfg, i2ccfg_offset = 0x10;
 278
 279         /* SB800 and later SMBus does not support forcing address */
 280         if (force || force_addr) {
 281                 dev_err(&PIIX4_dev->dev, "SMBus does not support "
 282                         "forcing address!\n");
 283                 return -EINVAL;
 284         }
 285
 286         /* Determine the address of the SMBus areas */
 287         if ((PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
 288              PIIX4_dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS &&
 289              PIIX4_dev->revision >= 0x41) ||
 290             (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
 291              PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS &&
 292              PIIX4_dev->revision >= 0x49))
 293                 smb_en = 0x00;
 294         else
 295                 smb_en = (aux) ? 0x28 : 0x2c;
 296
 297         if (!request_muxed_region(SB800_PIIX4_SMB_IDX, 2, "sb800_piix4_smb")) {
 298                 dev_err(&PIIX4_dev->dev,
 299                         "SMB base address index region 0x%x already in use.\n",
 300                         SB800_PIIX4_SMB_IDX);
 301                 return -EBUSY;
 302         }
 303
 304         outb_p(smb_en, SB800_PIIX4_SMB_IDX);
 305         smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
 306         outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX);
 307         smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1);
 308
 309         release_region(SB800_PIIX4_SMB_IDX, 2);
 310
 311         if (!smb_en) {
 312                 smb_en_status = smba_en_lo & 0x10;
 313                 piix4_smba = smba_en_hi << 8;
 314                 if (aux)
 315                         piix4_smba |= 0x20;
 316         } else {
 317                 smb_en_status = smba_en_lo & 0x01;
 318                 piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0;
 319         }
 320
 321         if (!smb_en_status) {
 322                 dev_err(&PIIX4_dev->dev,
 323                         "SMBus Host Controller not enabled!\n");
 324                 return -ENODEV;
 325         }
 326
 327         if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
 328                 return -ENODEV;
 329
 330         if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
 331                 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
 332                         piix4_smba);
 333                 return -EBUSY;
 334         }
 335
 336         /* Aux SMBus does not support IRQ information */
 337         if (aux) {
 338                 dev_info(&PIIX4_dev->dev,
 339                          "Auxiliary SMBus Host Controller at 0x%x\n",
 340                          piix4_smba);
 341                 return piix4_smba;
 342         }
 343
 344         /* Request the SMBus I2C bus config region */
 345         if (!request_region(piix4_smba + i2ccfg_offset, 1, "i2ccfg")) {
 346                 dev_err(&PIIX4_dev->dev, "SMBus I2C bus config region "
 347                         "0x%x already in use!\n", piix4_smba + i2ccfg_offset);
 348                 release_region(piix4_smba, SMBIOSIZE);
 349                 return -EBUSY;
 350         }
 351         i2ccfg = inb_p(piix4_smba + i2ccfg_offset);
 352         release_region(piix4_smba + i2ccfg_offset, 1);
 353
 354         if (i2ccfg & 1)
 355                 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n");
 356         else
 357                 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n");
 358
 359         dev_info(&PIIX4_dev->dev,
 360                  "SMBus Host Controller at 0x%x, revision %d\n",
 361                  piix4_smba, i2ccfg >> 4);
 362
 363         /* Find which register is used for port selection */
 364         if (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD) {
 365                 if (PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS ||
 366                     (PIIX4_dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS &&
 367                      PIIX4_dev->revision >= 0x1F)) {
 368                         piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_KERNCZ;
 369                         piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK_KERNCZ;
 370                         piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ;
 371                 } else {
 372                         piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_ALT;
 373                         piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK;
 374                         piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT;
 375                 }
 376         } else {
 377                 if (!request_muxed_region(SB800_PIIX4_SMB_IDX, 2,
 378                                           "sb800_piix4_smb")) {
 379                         release_region(piix4_smba, SMBIOSIZE);
 380                         return -EBUSY;
 381                 }
 382
 383                 outb_p(SB800_PIIX4_PORT_IDX_SEL, SB800_PIIX4_SMB_IDX);
 384                 port_sel = inb_p(SB800_PIIX4_SMB_IDX + 1);
 385                 piix4_port_sel_sb800 = (port_sel & 0x01) ?
 386                                        SB800_PIIX4_PORT_IDX_ALT :
 387                                        SB800_PIIX4_PORT_IDX;
 388                 piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK;
 389                 piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT;
 390                 release_region(SB800_PIIX4_SMB_IDX, 2);
 391         }
 392
 393         dev_info(&PIIX4_dev->dev,
 394                  "Using register 0x%02x for SMBus port selection\n",
 395                  (unsigned int)piix4_port_sel_sb800);
 396
 397         return piix4_smba;
 398 }
 399
 400 static int piix4_setup_aux(struct pci_dev *PIIX4_dev,
 401                            const struct pci_device_id *id,
 402                            unsigned short base_reg_addr)
 403 {
 404         /* Set up auxiliary SMBus controllers found on some
 405          * AMD chipsets e.g. SP5100 (SB700 derivative) */
 406
 407         unsigned short piix4_smba;
 408
 409         /* Read address of auxiliary SMBus controller */
 410         pci_read_config_word(PIIX4_dev, base_reg_addr, &piix4_smba);
 411         if ((piix4_smba & 1) == 0) {
 412                 dev_dbg(&PIIX4_dev->dev,
 413                         "Auxiliary SMBus controller not enabled\n");
 414                 return -ENODEV;
 415         }
 416
 417         piix4_smba &= 0xfff0;
 418         if (piix4_smba == 0) {
 419                 dev_dbg(&PIIX4_dev->dev,
 420                         "Auxiliary SMBus base address uninitialized\n");
 421                 return -ENODEV;
 422         }
 423
 424         if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
 425                 return -ENODEV;
 426
 427         if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
 428                 dev_err(&PIIX4_dev->dev, "Auxiliary SMBus region 0x%x "
 429                         "already in use!\n", piix4_smba);
 430                 return -EBUSY;
 431         }
 432
 433         dev_info(&PIIX4_dev->dev,
 434                  "Auxiliary SMBus Host Controller at 0x%x\n",
 435                  piix4_smba);
 436
 437         return piix4_smba;
 438 }
 439
 440 static int piix4_transaction(struct i2c_adapter *piix4_adapter)
 441 {
 442         struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(piix4_adapter);
 443         unsigned short piix4_smba = adapdata->smba;
 444         int temp;
 445         int result = 0;
 446         int timeout = 0;
 447
 448         dev_dbg(&piix4_adapter->dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
 449                 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
 450                 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
 451                 inb_p(SMBHSTDAT1));
 452
 453         /* Make sure the SMBus host is ready to start transmitting */
 454         if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 455                 dev_dbg(&piix4_adapter->dev, "SMBus busy (%02x). "
 456                         "Resetting...\n", temp);
 457                 outb_p(temp, SMBHSTSTS);
 458                 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 459                         dev_err(&piix4_adapter->dev, "Failed! (%02x)\n", temp);
 460                         return -EBUSY;
 461                 } else {
 462                         dev_dbg(&piix4_adapter->dev, "Successful!\n");
 463                 }
 464         }
 465
 466         /* start the transaction by setting bit 6 */
 467         outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
 468
 469         /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
 470         if (srvrworks_csb5_delay) /* Extra delay for SERVERWORKS_CSB5 */
 471                 usleep_range(2000, 2100);
 472         else
 473                 usleep_range(250, 500);
 474
 475         while ((++timeout < MAX_TIMEOUT) &&
 476                ((temp = inb_p(SMBHSTSTS)) & 0x01))
 477                 usleep_range(250, 500);
 478
 479         /* If the SMBus is still busy, we give up */
 480         if (timeout == MAX_TIMEOUT) {
 481                 dev_err(&piix4_adapter->dev, "SMBus Timeout!\n");
 482                 result = -ETIMEDOUT;
 483         }
 484
 485         if (temp & 0x10) {
 486                 result = -EIO;
 487                 dev_err(&piix4_adapter->dev, "Error: Failed bus transaction\n");
 488         }
 489
 490         if (temp & 0x08) {
 491                 result = -EIO;
 492                 dev_dbg(&piix4_adapter->dev, "Bus collision! SMBus may be "
 493                         "locked until next hard reset. (sorry!)\n");
 494                 /* Clock stops and slave is stuck in mid-transmission */
 495         }
 496
 497         if (temp & 0x04) {
 498                 result = -ENXIO;
 499                 dev_dbg(&piix4_adapter->dev, "Error: no response!\n");
 500         }
 501
 502         if (inb_p(SMBHSTSTS) != 0x00)
 503                 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
 504
 505         if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 506                 dev_err(&piix4_adapter->dev, "Failed reset at end of "
 507                         "transaction (%02x)\n", temp);
 508         }
 509         dev_dbg(&piix4_adapter->dev, "Transaction (post): CNT=%02x, CMD=%02x, "
 510                 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
 511                 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
 512                 inb_p(SMBHSTDAT1));
 513         return result;
 514 }
 515
 516 /* Return negative errno on error. */
 517 static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
 518                  unsigned short flags, char read_write,
 519                  u8 command, int size, union i2c_smbus_data * data)
 520 {
 521         struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
 522         unsigned short piix4_smba = adapdata->smba;
 523         int i, len;
 524         int status;
 525
 526         switch (size) {
 527         case I2C_SMBUS_QUICK:
 528                 outb_p((addr << 1) | read_write,
 529                        SMBHSTADD);
 530                 size = PIIX4_QUICK;
 531                 break;
 532         case I2C_SMBUS_BYTE:
 533                 outb_p((addr << 1) | read_write,
 534                        SMBHSTADD);
 535                 if (read_write == I2C_SMBUS_WRITE)
 536                         outb_p(command, SMBHSTCMD);
 537                 size = PIIX4_BYTE;
 538                 break;
 539         case I2C_SMBUS_BYTE_DATA:
 540                 outb_p((addr << 1) | read_write,
 541                        SMBHSTADD);
 542                 outb_p(command, SMBHSTCMD);
 543                 if (read_write == I2C_SMBUS_WRITE)
 544                         outb_p(data->byte, SMBHSTDAT0);
 545                 size = PIIX4_BYTE_DATA;
 546                 break;
 547         case I2C_SMBUS_WORD_DATA:
 548                 outb_p((addr << 1) | read_write,
 549                        SMBHSTADD);
 550                 outb_p(command, SMBHSTCMD);
 551                 if (read_write == I2C_SMBUS_WRITE) {
 552                         outb_p(data->word & 0xff, SMBHSTDAT0);
 553                         outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
 554                 }
 555                 size = PIIX4_WORD_DATA;
 556                 break;
 557         case I2C_SMBUS_BLOCK_DATA:
 558                 outb_p((addr << 1) | read_write,
 559                        SMBHSTADD);
 560                 outb_p(command, SMBHSTCMD);
 561                 if (read_write == I2C_SMBUS_WRITE) {
 562                         len = data->block[0];
 563                         if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
 564                                 return -EINVAL;
 565                         outb_p(len, SMBHSTDAT0);
 566                         inb_p(SMBHSTCNT);       /* Reset SMBBLKDAT */
 567                         for (i = 1; i <= len; i++)
 568                                 outb_p(data->block[i], SMBBLKDAT);
 569                 }
 570                 size = PIIX4_BLOCK_DATA;
 571                 break;
 572         default:
 573                 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
 574                 return -EOPNOTSUPP;
 575         }
 576
 577         outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
 578
 579         status = piix4_transaction(adap);
 580         if (status)
 581                 return status;
 582
 583         if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
 584                 return 0;
 585
 586
 587         switch (size) {
 588         case PIIX4_BYTE:
 589         case PIIX4_BYTE_DATA:
 590                 data->byte = inb_p(SMBHSTDAT0);
 591                 break;
 592         case PIIX4_WORD_DATA:
 593                 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
 594                 break;
 595         case PIIX4_BLOCK_DATA:
 596                 data->block[0] = inb_p(SMBHSTDAT0);
 597                 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
 598                         return -EPROTO;
 599                 inb_p(SMBHSTCNT);       /* Reset SMBBLKDAT */
 600                 for (i = 1; i <= data->block[0]; i++)
 601                         data->block[i] = inb_p(SMBBLKDAT);
 602                 break;
 603         }
 604         return 0;
 605 }
 606
 607 static uint8_t piix4_imc_read(uint8_t idx)
 608 {
 609         outb_p(idx, KERNCZ_IMC_IDX);
 610         return inb_p(KERNCZ_IMC_DATA);
 611 }
 612
 613 static void piix4_imc_write(uint8_t idx, uint8_t value)
 614 {
 615         outb_p(idx, KERNCZ_IMC_IDX);
 616         outb_p(value, KERNCZ_IMC_DATA);
 617 }
 618
 619 static int piix4_imc_sleep(void)
 620 {
 621         int timeout = MAX_TIMEOUT;
 622
 623         if (!request_muxed_region(KERNCZ_IMC_IDX, 2, "smbus_kerncz_imc"))
 624                 return -EBUSY;
 625
 626         /* clear response register */
 627         piix4_imc_write(0x82, 0x00);
 628         /* request ownership flag */
 629         piix4_imc_write(0x83, 0xB4);
 630         /* kick off IMC Mailbox command 96 */
 631         piix4_imc_write(0x80, 0x96);
 632
 633         while (timeout--) {
 634                 if (piix4_imc_read(0x82) == 0xfa) {
 635                         release_region(KERNCZ_IMC_IDX, 2);
 636                         return 0;
 637                 }
 638                 usleep_range(1000, 2000);
 639         }
 640
 641         release_region(KERNCZ_IMC_IDX, 2);
 642         return -ETIMEDOUT;
 643 }
 644
 645 static void piix4_imc_wakeup(void)
 646 {
 647         int timeout = MAX_TIMEOUT;
 648
 649         if (!request_muxed_region(KERNCZ_IMC_IDX, 2, "smbus_kerncz_imc"))
 650                 return;
 651
 652         /* clear response register */
 653         piix4_imc_write(0x82, 0x00);
 654         /* release ownership flag */
 655         piix4_imc_write(0x83, 0xB5);
 656         /* kick off IMC Mailbox command 96 */
 657         piix4_imc_write(0x80, 0x96);
 658
 659         while (timeout--) {
 660                 if (piix4_imc_read(0x82) == 0xfa)
 661                         break;
 662                 usleep_range(1000, 2000);
 663         }
 664
 665         release_region(KERNCZ_IMC_IDX, 2);
 666 }
 667
 668 /*
 669  * Handles access to multiple SMBus ports on the SB800.
 670  * The port is selected by bits 2:1 of the smb_en register (0x2c).
 671  * Returns negative errno on error.
 672  *
 673  * Note: The selected port must be returned to the initial selection to avoid
 674  * problems on certain systems.
 675  */
 676 static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr,
 677                  unsigned short flags, char read_write,
 678                  u8 command, int size, union i2c_smbus_data *data)
 679 {
 680         struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
 681         unsigned short piix4_smba = adapdata->smba;
 682         int retries = MAX_TIMEOUT;
 683         int smbslvcnt;
 684         u8 smba_en_lo;
 685         u8 port;
 686         int retval;
 687
 688         if (!request_muxed_region(SB800_PIIX4_SMB_IDX, 2, "sb800_piix4_smb"))
 689                 return -EBUSY;
 690
 691         /* Request the SMBUS semaphore, avoid conflicts with the IMC */
 692         smbslvcnt  = inb_p(SMBSLVCNT);
 693         do {
 694                 outb_p(smbslvcnt | 0x10, SMBSLVCNT);
 695
 696                 /* Check the semaphore status */
 697                 smbslvcnt  = inb_p(SMBSLVCNT);
 698                 if (smbslvcnt & 0x10)
 699                         break;
 700
 701                 usleep_range(1000, 2000);
 702         } while (--retries);
 703         /* SMBus is still owned by the IMC, we give up */
 704         if (!retries) {
 705                 retval = -EBUSY;
 706                 goto release;
 707         }
 708
 709         /*
 710          * Notify the IMC (Integrated Micro Controller) if required.
 711          * Among other responsibilities, the IMC is in charge of monitoring
 712          * the System fans and temperature sensors, and act accordingly.
 713          * All this is done through SMBus and can/will collide
 714          * with our transactions if they are long (BLOCK_DATA).
 715          * Therefore we need to request the ownership flag during those
 716          * transactions.
 717          */
 718         if ((size == I2C_SMBUS_BLOCK_DATA) && adapdata->notify_imc) {
 719                 int ret;
 720
 721                 ret = piix4_imc_sleep();
 722                 switch (ret) {
 723                 case -EBUSY:
 724                         dev_warn(&adap->dev,
 725                                  "IMC base address index region 0x%x already in use.\n",
 726                                  KERNCZ_IMC_IDX);
 727                         break;
 728                 case -ETIMEDOUT:
 729                         dev_warn(&adap->dev,
 730                                  "Failed to communicate with the IMC.\n");
 731                         break;
 732                 default:
 733                         break;
 734                 }
 735
 736                 /* If IMC communication fails do not retry */
 737                 if (ret) {
 738                         dev_warn(&adap->dev,
 739                                  "Continuing without IMC notification.\n");
 740                         adapdata->notify_imc = false;
 741                 }
 742         }
 743
 744         outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX);
 745         smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
 746
 747         port = adapdata->port;
 748         if ((smba_en_lo & piix4_port_mask_sb800) != port)
 749                 outb_p((smba_en_lo & ~piix4_port_mask_sb800) | port,
 750                        SB800_PIIX4_SMB_IDX + 1);
 751
 752         retval = piix4_access(adap, addr, flags, read_write,
 753                               command, size, data);
 754
 755         outb_p(smba_en_lo, SB800_PIIX4_SMB_IDX + 1);
 756
 757         /* Release the semaphore */
 758         outb_p(smbslvcnt | 0x20, SMBSLVCNT);
 759
 760         if ((size == I2C_SMBUS_BLOCK_DATA) && adapdata->notify_imc)
 761                 piix4_imc_wakeup();
 762
 763 release:
 764         release_region(SB800_PIIX4_SMB_IDX, 2);
 765         return retval;
 766 }
 767
 768 static u32 piix4_func(struct i2c_adapter *adapter)
 769 {
 770         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 771             I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 772             I2C_FUNC_SMBUS_BLOCK_DATA;
 773 }
 774
 775 static const struct i2c_algorithm smbus_algorithm = {
 776         .smbus_xfer     = piix4_access,
 777         .functionality  = piix4_func,
 778 };
 779
 780 static const struct i2c_algorithm piix4_smbus_algorithm_sb800 = {
 781         .smbus_xfer     = piix4_access_sb800,
 782         .functionality  = piix4_func,
 783 };
 784
 785 static const struct pci_device_id piix4_ids[] = {
 786         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
 787         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
 788         { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
 789         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) },
 790         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
 791         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
 792         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
 793         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
 794         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS) },
 795         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 796                      PCI_DEVICE_ID_SERVERWORKS_OSB4) },
 797         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 798                      PCI_DEVICE_ID_SERVERWORKS_CSB5) },
 799         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 800                      PCI_DEVICE_ID_SERVERWORKS_CSB6) },
 801         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 802                      PCI_DEVICE_ID_SERVERWORKS_HT1000SB) },
 803         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 804                      PCI_DEVICE_ID_SERVERWORKS_HT1100LD) },
 805         { 0, }
 806 };
 807
 808 MODULE_DEVICE_TABLE (pci, piix4_ids);
 809
 810 static struct i2c_adapter *piix4_main_adapters[PIIX4_MAX_ADAPTERS];
 811 static struct i2c_adapter *piix4_aux_adapter;
 812
 813 static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
 814                              bool sb800_main, u8 port, bool notify_imc,
 815                              const char *name, struct i2c_adapter **padap)
 816 {
 817         struct i2c_adapter *adap;
 818         struct i2c_piix4_adapdata *adapdata;
 819         int retval;
 820
 821         adap = kzalloc(sizeof(*adap), GFP_KERNEL);
 822         if (adap == NULL) {
 823                 release_region(smba, SMBIOSIZE);
 824                 return -ENOMEM;
 825         }
 826
 827         adap->owner = THIS_MODULE;
 828         adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 829         adap->algo = sb800_main ? &piix4_smbus_algorithm_sb800
 830                                 : &smbus_algorithm;
 831
 832         adapdata = kzalloc(sizeof(*adapdata), GFP_KERNEL);
 833         if (adapdata == NULL) {
 834                 kfree(adap);
 835                 release_region(smba, SMBIOSIZE);
 836                 return -ENOMEM;
 837         }
 838
 839         adapdata->smba = smba;
 840         adapdata->sb800_main = sb800_main;
 841         adapdata->port = port << piix4_port_shift_sb800;
 842         adapdata->notify_imc = notify_imc;
 843
 844         /* set up the sysfs linkage to our parent device */
 845         adap->dev.parent = &dev->dev;
 846
 847         snprintf(adap->name, sizeof(adap->name),
 848                 "SMBus PIIX4 adapter%s at %04x", name, smba);
 849
 850         i2c_set_adapdata(adap, adapdata);
 851
 852         retval = i2c_add_adapter(adap);
 853         if (retval) {
 854                 kfree(adapdata);
 855                 kfree(adap);
 856                 release_region(smba, SMBIOSIZE);
 857                 return retval;
 858         }
 859
 860         *padap = adap;
 861         return 0;
 862 }
 863
 864 static int piix4_add_adapters_sb800(struct pci_dev *dev, unsigned short smba,
 865                                     bool notify_imc)
 866 {
 867         struct i2c_piix4_adapdata *adapdata;
 868         int port;
 869         int retval;
 870
 871         for (port = 0; port < PIIX4_MAX_ADAPTERS; port++) {
 872                 retval = piix4_add_adapter(dev, smba, true, port, notify_imc,
 873                                            piix4_main_port_names_sb800[port],
 874                                            &piix4_main_adapters[port]);
 875                 if (retval < 0)
 876                         goto error;
 877         }
 878
 879         return retval;
 880
 881 error:
 882         dev_err(&dev->dev,
 883                 "Error setting up SB800 adapters. Unregistering!\n");
 884         while (--port >= 0) {
 885                 adapdata = i2c_get_adapdata(piix4_main_adapters[port]);
 886                 if (adapdata->smba) {
 887                         i2c_del_adapter(piix4_main_adapters[port]);
 888                         kfree(adapdata);
 889                         kfree(piix4_main_adapters[port]);
 890                         piix4_main_adapters[port] = NULL;
 891                 }
 892         }
 893
 894         return retval;
 895 }
 896
 897 static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
 898 {
 899         int retval;
 900         bool is_sb800 = false;
 901
 902         if ((dev->vendor == PCI_VENDOR_ID_ATI &&
 903              dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
 904              dev->revision >= 0x40) ||
 905             dev->vendor == PCI_VENDOR_ID_AMD) {
 906                 bool notify_imc = false;
 907                 is_sb800 = true;
 908
 909                 if (dev->vendor == PCI_VENDOR_ID_AMD &&
 910                     dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS) {
 911                         u8 imc;
 912
 913                         /*
 914                          * Detect if IMC is active or not, this method is
 915                          * described on coreboot's AMD IMC notes
 916                          */
 917                         pci_bus_read_config_byte(dev->bus, PCI_DEVFN(0x14, 3),
 918                                                  0x40, &imc);
 919                         if (imc & 0x80)
 920                                 notify_imc = true;
 921                 }
 922
 923                 /* base address location etc changed in SB800 */
 924                 retval = piix4_setup_sb800(dev, id, 0);
 925                 if (retval < 0)
 926                         return retval;
 927
 928                 /*
 929                  * Try to register multiplexed main SMBus adapter,
 930                  * give up if we can't
 931                  */
 932                 retval = piix4_add_adapters_sb800(dev, retval, notify_imc);
 933                 if (retval < 0)
 934                         return retval;
 935         } else {
 936                 retval = piix4_setup(dev, id);
 937                 if (retval < 0)
 938                         return retval;
 939
 940                 /* Try to register main SMBus adapter, give up if we can't */
 941                 retval = piix4_add_adapter(dev, retval, false, 0, false, "",
 942                                            &piix4_main_adapters[0]);
 943                 if (retval < 0)
 944                         return retval;
 945         }
 946
 947         /* Check for auxiliary SMBus on some AMD chipsets */
 948         retval = -ENODEV;
 949
 950         if (dev->vendor == PCI_VENDOR_ID_ATI &&
 951             dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS) {
 952                 if (dev->revision < 0x40) {
 953                         retval = piix4_setup_aux(dev, id, 0x58);
 954                 } else {
 955                         /* SB800 added aux bus too */
 956                         retval = piix4_setup_sb800(dev, id, 1);
 957                 }
 958         }
 959
 960         if (dev->vendor == PCI_VENDOR_ID_AMD &&
 961             (dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS ||
 962              dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS)) {
 963                 retval = piix4_setup_sb800(dev, id, 1);
 964         }
 965
 966         if (retval > 0) {
 967                 /* Try to add the aux adapter if it exists,
 968                  * piix4_add_adapter will clean up if this fails */
 969                 piix4_add_adapter(dev, retval, false, 0, false,
 970                                   is_sb800 ? piix4_aux_port_name_sb800 : "",
 971                                   &piix4_aux_adapter);
 972         }
 973
 974         return 0;
 975 }
 976
 977 static void piix4_adap_remove(struct i2c_adapter *adap)
 978 {
 979         struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
 980
 981         if (adapdata->smba) {
 982                 i2c_del_adapter(adap);
 983                 if (adapdata->port == (0 << piix4_port_shift_sb800))
 984                         release_region(adapdata->smba, SMBIOSIZE);
 985                 kfree(adapdata);
 986                 kfree(adap);
 987         }
 988 }
 989
 990 static void piix4_remove(struct pci_dev *dev)
 991 {
 992         int port = PIIX4_MAX_ADAPTERS;
 993
 994         while (--port >= 0) {
 995                 if (piix4_main_adapters[port]) {
 996                         piix4_adap_remove(piix4_main_adapters[port]);
 997                         piix4_main_adapters[port] = NULL;
 998                 }
 999         }
1000
1001         if (piix4_aux_adapter) {
1002                 piix4_adap_remove(piix4_aux_adapter);
1003                 piix4_aux_adapter = NULL;
1004         }
1005 }
1006
1007 static struct pci_driver piix4_driver = {
1008         .name           = "piix4_smbus",
1009         .id_table       = piix4_ids,
1010         .probe          = piix4_probe,
1011         .remove         = piix4_remove,
1012 };
1013
1014 module_pci_driver(piix4_driver);
1015
1016 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
1017                 "Philip Edelbrock <phil@netroedge.com>");
1018 MODULE_DESCRIPTION("PIIX4 SMBus driver");
1019 MODULE_LICENSE("GPL");