1 // SPDX-License-Identifier: GPL-2.0+
3 * This is i.MX low power i2c controller driver.
5 * Copyright 2016 Freescale Semiconductor, Inc.
9 #include <linux/completion.h>
10 #include <linux/delay.h>
11 #include <linux/err.h>
12 #include <linux/errno.h>
13 #include <linux/i2c.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
20 #include <linux/pinctrl/consumer.h>
21 #include <linux/platform_device.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/sched.h>
24 #include <linux/slab.h>
26 #define DRIVER_NAME "imx-lpi2c"
28 #define LPI2C_PARAM 0x04 /* i2c RX/TX FIFO size */
29 #define LPI2C_MCR 0x10 /* i2c contrl register */
30 #define LPI2C_MSR 0x14 /* i2c status register */
31 #define LPI2C_MIER 0x18 /* i2c interrupt enable */
32 #define LPI2C_MCFGR0 0x20 /* i2c master configuration */
33 #define LPI2C_MCFGR1 0x24 /* i2c master configuration */
34 #define LPI2C_MCFGR2 0x28 /* i2c master configuration */
35 #define LPI2C_MCFGR3 0x2C /* i2c master configuration */
36 #define LPI2C_MCCR0 0x48 /* i2c master clk configuration */
37 #define LPI2C_MCCR1 0x50 /* i2c master clk configuration */
38 #define LPI2C_MFCR 0x58 /* i2c master FIFO control */
39 #define LPI2C_MFSR 0x5C /* i2c master FIFO status */
40 #define LPI2C_MTDR 0x60 /* i2c master TX data register */
41 #define LPI2C_MRDR 0x70 /* i2c master RX data register */
44 #define TRAN_DATA 0X00
45 #define RECV_DATA 0X01
47 #define RECV_DISCARD 0X03
48 #define GEN_START 0X04
49 #define START_NACK 0X05
50 #define START_HIGH 0X06
51 #define START_HIGH_NACK 0X07
53 #define MCR_MEN BIT(0)
54 #define MCR_RST BIT(1)
55 #define MCR_DOZEN BIT(2)
56 #define MCR_DBGEN BIT(3)
57 #define MCR_RTF BIT(8)
58 #define MCR_RRF BIT(9)
59 #define MSR_TDF BIT(0)
60 #define MSR_RDF BIT(1)
61 #define MSR_SDF BIT(9)
62 #define MSR_NDF BIT(10)
63 #define MSR_ALF BIT(11)
64 #define MSR_MBF BIT(24)
65 #define MSR_BBF BIT(25)
66 #define MIER_TDIE BIT(0)
67 #define MIER_RDIE BIT(1)
68 #define MIER_SDIE BIT(9)
69 #define MIER_NDIE BIT(10)
70 #define MCFGR1_AUTOSTOP BIT(8)
71 #define MCFGR1_IGNACK BIT(9)
72 #define MRDR_RXEMPTY BIT(14)
74 #define I2C_CLK_RATIO 2
75 #define CHUNK_DATA 256
77 #define I2C_PM_TIMEOUT 10 /* ms */
80 STANDARD, /* 100+Kbps */
82 FAST_PLUS, /* 1.0+Mbps */
84 ULTRA_FAST, /* 5.0+Mbps */
87 enum lpi2c_imx_pincfg {
94 struct lpi2c_imx_struct {
95 struct i2c_adapter adapter;
97 struct clk_bulk_data *clks;
101 struct completion complete;
103 unsigned int delivered;
104 unsigned int block_data;
105 unsigned int bitrate;
106 unsigned int txfifosize;
107 unsigned int rxfifosize;
108 enum lpi2c_imx_mode mode;
109 struct i2c_bus_recovery_info rinfo;
112 static void lpi2c_imx_intctrl(struct lpi2c_imx_struct *lpi2c_imx,
115 writel(enable, lpi2c_imx->base + LPI2C_MIER);
118 static int lpi2c_imx_bus_busy(struct lpi2c_imx_struct *lpi2c_imx)
120 unsigned long orig_jiffies = jiffies;
124 temp = readl(lpi2c_imx->base + LPI2C_MSR);
126 /* check for arbitration lost, clear if set */
127 if (temp & MSR_ALF) {
128 writel(temp, lpi2c_imx->base + LPI2C_MSR);
132 if (temp & (MSR_BBF | MSR_MBF))
135 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
136 dev_dbg(&lpi2c_imx->adapter.dev, "bus not work\n");
137 if (lpi2c_imx->adapter.bus_recovery_info)
138 i2c_recover_bus(&lpi2c_imx->adapter);
147 static void lpi2c_imx_set_mode(struct lpi2c_imx_struct *lpi2c_imx)
149 unsigned int bitrate = lpi2c_imx->bitrate;
150 enum lpi2c_imx_mode mode;
152 if (bitrate < I2C_MAX_FAST_MODE_FREQ)
154 else if (bitrate < I2C_MAX_FAST_MODE_PLUS_FREQ)
156 else if (bitrate < I2C_MAX_HIGH_SPEED_MODE_FREQ)
158 else if (bitrate < I2C_MAX_ULTRA_FAST_MODE_FREQ)
163 lpi2c_imx->mode = mode;
166 static int lpi2c_imx_start(struct lpi2c_imx_struct *lpi2c_imx,
167 struct i2c_msg *msgs)
171 temp = readl(lpi2c_imx->base + LPI2C_MCR);
172 temp |= MCR_RRF | MCR_RTF;
173 writel(temp, lpi2c_imx->base + LPI2C_MCR);
174 writel(0x7f00, lpi2c_imx->base + LPI2C_MSR);
176 temp = i2c_8bit_addr_from_msg(msgs) | (GEN_START << 8);
177 writel(temp, lpi2c_imx->base + LPI2C_MTDR);
179 return lpi2c_imx_bus_busy(lpi2c_imx);
182 static void lpi2c_imx_stop(struct lpi2c_imx_struct *lpi2c_imx)
184 unsigned long orig_jiffies = jiffies;
187 writel(GEN_STOP << 8, lpi2c_imx->base + LPI2C_MTDR);
190 temp = readl(lpi2c_imx->base + LPI2C_MSR);
194 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
195 dev_dbg(&lpi2c_imx->adapter.dev, "stop timeout\n");
196 if (lpi2c_imx->adapter.bus_recovery_info)
197 i2c_recover_bus(&lpi2c_imx->adapter);
205 /* CLKLO = I2C_CLK_RATIO * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI/2 */
206 static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx)
208 u8 prescale, filt, sethold, datavd;
209 unsigned int clk_rate, clk_cycle, clkhi, clklo;
210 enum lpi2c_imx_pincfg pincfg;
213 lpi2c_imx_set_mode(lpi2c_imx);
215 clk_rate = clk_get_rate(lpi2c_imx->clks[0].clk);
219 if (lpi2c_imx->mode == HS || lpi2c_imx->mode == ULTRA_FAST)
224 for (prescale = 0; prescale <= 7; prescale++) {
225 clk_cycle = clk_rate / ((1 << prescale) * lpi2c_imx->bitrate)
227 clkhi = DIV_ROUND_UP(clk_cycle, I2C_CLK_RATIO + 1);
228 clklo = clk_cycle - clkhi;
236 /* set MCFGR1: PINCFG, PRESCALE, IGNACK */
237 if (lpi2c_imx->mode == ULTRA_FAST)
241 temp = prescale | pincfg << 24;
243 if (lpi2c_imx->mode == ULTRA_FAST)
244 temp |= MCFGR1_IGNACK;
246 writel(temp, lpi2c_imx->base + LPI2C_MCFGR1);
248 /* set MCFGR2: FILTSDA, FILTSCL */
249 temp = (filt << 16) | (filt << 24);
250 writel(temp, lpi2c_imx->base + LPI2C_MCFGR2);
252 /* set MCCR: DATAVD, SETHOLD, CLKHI, CLKLO */
255 temp = datavd << 24 | sethold << 16 | clkhi << 8 | clklo;
257 if (lpi2c_imx->mode == HS)
258 writel(temp, lpi2c_imx->base + LPI2C_MCCR1);
260 writel(temp, lpi2c_imx->base + LPI2C_MCCR0);
265 static int lpi2c_imx_master_enable(struct lpi2c_imx_struct *lpi2c_imx)
270 ret = pm_runtime_resume_and_get(lpi2c_imx->adapter.dev.parent);
275 writel(temp, lpi2c_imx->base + LPI2C_MCR);
276 writel(0, lpi2c_imx->base + LPI2C_MCR);
278 ret = lpi2c_imx_config(lpi2c_imx);
282 temp = readl(lpi2c_imx->base + LPI2C_MCR);
284 writel(temp, lpi2c_imx->base + LPI2C_MCR);
289 pm_runtime_mark_last_busy(lpi2c_imx->adapter.dev.parent);
290 pm_runtime_put_autosuspend(lpi2c_imx->adapter.dev.parent);
295 static int lpi2c_imx_master_disable(struct lpi2c_imx_struct *lpi2c_imx)
299 temp = readl(lpi2c_imx->base + LPI2C_MCR);
301 writel(temp, lpi2c_imx->base + LPI2C_MCR);
303 pm_runtime_mark_last_busy(lpi2c_imx->adapter.dev.parent);
304 pm_runtime_put_autosuspend(lpi2c_imx->adapter.dev.parent);
309 static int lpi2c_imx_msg_complete(struct lpi2c_imx_struct *lpi2c_imx)
311 unsigned long timeout;
313 timeout = wait_for_completion_timeout(&lpi2c_imx->complete, HZ);
315 return timeout ? 0 : -ETIMEDOUT;
318 static int lpi2c_imx_txfifo_empty(struct lpi2c_imx_struct *lpi2c_imx)
320 unsigned long orig_jiffies = jiffies;
324 txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff;
326 if (readl(lpi2c_imx->base + LPI2C_MSR) & MSR_NDF) {
327 dev_dbg(&lpi2c_imx->adapter.dev, "NDF detected\n");
331 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
332 dev_dbg(&lpi2c_imx->adapter.dev, "txfifo empty timeout\n");
333 if (lpi2c_imx->adapter.bus_recovery_info)
334 i2c_recover_bus(&lpi2c_imx->adapter);
344 static void lpi2c_imx_set_tx_watermark(struct lpi2c_imx_struct *lpi2c_imx)
346 writel(lpi2c_imx->txfifosize >> 1, lpi2c_imx->base + LPI2C_MFCR);
349 static void lpi2c_imx_set_rx_watermark(struct lpi2c_imx_struct *lpi2c_imx)
351 unsigned int temp, remaining;
353 remaining = lpi2c_imx->msglen - lpi2c_imx->delivered;
355 if (remaining > (lpi2c_imx->rxfifosize >> 1))
356 temp = lpi2c_imx->rxfifosize >> 1;
360 writel(temp << 16, lpi2c_imx->base + LPI2C_MFCR);
363 static void lpi2c_imx_write_txfifo(struct lpi2c_imx_struct *lpi2c_imx)
365 unsigned int data, txcnt;
367 txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff;
369 while (txcnt < lpi2c_imx->txfifosize) {
370 if (lpi2c_imx->delivered == lpi2c_imx->msglen)
373 data = lpi2c_imx->tx_buf[lpi2c_imx->delivered++];
374 writel(data, lpi2c_imx->base + LPI2C_MTDR);
378 if (lpi2c_imx->delivered < lpi2c_imx->msglen)
379 lpi2c_imx_intctrl(lpi2c_imx, MIER_TDIE | MIER_NDIE);
381 complete(&lpi2c_imx->complete);
384 static void lpi2c_imx_read_rxfifo(struct lpi2c_imx_struct *lpi2c_imx)
386 unsigned int blocklen, remaining;
387 unsigned int temp, data;
390 data = readl(lpi2c_imx->base + LPI2C_MRDR);
391 if (data & MRDR_RXEMPTY)
394 lpi2c_imx->rx_buf[lpi2c_imx->delivered++] = data & 0xff;
398 * First byte is the length of remaining packet in the SMBus block
399 * data read. Add it to msgs->len.
401 if (lpi2c_imx->block_data) {
402 blocklen = lpi2c_imx->rx_buf[0];
403 lpi2c_imx->msglen += blocklen;
406 remaining = lpi2c_imx->msglen - lpi2c_imx->delivered;
409 complete(&lpi2c_imx->complete);
413 /* not finished, still waiting for rx data */
414 lpi2c_imx_set_rx_watermark(lpi2c_imx);
416 /* multiple receive commands */
417 if (lpi2c_imx->block_data) {
418 lpi2c_imx->block_data = 0;
420 temp |= (RECV_DATA << 8);
421 writel(temp, lpi2c_imx->base + LPI2C_MTDR);
422 } else if (!(lpi2c_imx->delivered & 0xff)) {
423 temp = (remaining > CHUNK_DATA ? CHUNK_DATA : remaining) - 1;
424 temp |= (RECV_DATA << 8);
425 writel(temp, lpi2c_imx->base + LPI2C_MTDR);
428 lpi2c_imx_intctrl(lpi2c_imx, MIER_RDIE);
431 static void lpi2c_imx_write(struct lpi2c_imx_struct *lpi2c_imx,
432 struct i2c_msg *msgs)
434 lpi2c_imx->tx_buf = msgs->buf;
435 lpi2c_imx_set_tx_watermark(lpi2c_imx);
436 lpi2c_imx_write_txfifo(lpi2c_imx);
439 static void lpi2c_imx_read(struct lpi2c_imx_struct *lpi2c_imx,
440 struct i2c_msg *msgs)
444 lpi2c_imx->rx_buf = msgs->buf;
445 lpi2c_imx->block_data = msgs->flags & I2C_M_RECV_LEN;
447 lpi2c_imx_set_rx_watermark(lpi2c_imx);
448 temp = msgs->len > CHUNK_DATA ? CHUNK_DATA - 1 : msgs->len - 1;
449 temp |= (RECV_DATA << 8);
450 writel(temp, lpi2c_imx->base + LPI2C_MTDR);
452 lpi2c_imx_intctrl(lpi2c_imx, MIER_RDIE | MIER_NDIE);
455 static int lpi2c_imx_xfer(struct i2c_adapter *adapter,
456 struct i2c_msg *msgs, int num)
458 struct lpi2c_imx_struct *lpi2c_imx = i2c_get_adapdata(adapter);
462 result = lpi2c_imx_master_enable(lpi2c_imx);
466 for (i = 0; i < num; i++) {
467 result = lpi2c_imx_start(lpi2c_imx, &msgs[i]);
472 if (num == 1 && msgs[0].len == 0)
475 lpi2c_imx->rx_buf = NULL;
476 lpi2c_imx->tx_buf = NULL;
477 lpi2c_imx->delivered = 0;
478 lpi2c_imx->msglen = msgs[i].len;
479 init_completion(&lpi2c_imx->complete);
481 if (msgs[i].flags & I2C_M_RD)
482 lpi2c_imx_read(lpi2c_imx, &msgs[i]);
484 lpi2c_imx_write(lpi2c_imx, &msgs[i]);
486 result = lpi2c_imx_msg_complete(lpi2c_imx);
490 if (!(msgs[i].flags & I2C_M_RD)) {
491 result = lpi2c_imx_txfifo_empty(lpi2c_imx);
498 lpi2c_imx_stop(lpi2c_imx);
500 temp = readl(lpi2c_imx->base + LPI2C_MSR);
501 if ((temp & MSR_NDF) && !result)
505 lpi2c_imx_master_disable(lpi2c_imx);
507 dev_dbg(&lpi2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__,
508 (result < 0) ? "error" : "success msg",
509 (result < 0) ? result : num);
511 return (result < 0) ? result : num;
514 static irqreturn_t lpi2c_imx_isr(int irq, void *dev_id)
516 struct lpi2c_imx_struct *lpi2c_imx = dev_id;
517 unsigned int enabled;
520 enabled = readl(lpi2c_imx->base + LPI2C_MIER);
522 lpi2c_imx_intctrl(lpi2c_imx, 0);
523 temp = readl(lpi2c_imx->base + LPI2C_MSR);
527 complete(&lpi2c_imx->complete);
528 else if (temp & MSR_RDF)
529 lpi2c_imx_read_rxfifo(lpi2c_imx);
530 else if (temp & MSR_TDF)
531 lpi2c_imx_write_txfifo(lpi2c_imx);
536 static int lpi2c_imx_init_recovery_info(struct lpi2c_imx_struct *lpi2c_imx,
537 struct platform_device *pdev)
539 struct i2c_bus_recovery_info *bri = &lpi2c_imx->rinfo;
541 bri->pinctrl = devm_pinctrl_get(&pdev->dev);
542 if (IS_ERR(bri->pinctrl))
543 return PTR_ERR(bri->pinctrl);
545 lpi2c_imx->adapter.bus_recovery_info = bri;
550 static u32 lpi2c_imx_func(struct i2c_adapter *adapter)
552 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
553 I2C_FUNC_SMBUS_READ_BLOCK_DATA;
556 static const struct i2c_algorithm lpi2c_imx_algo = {
557 .master_xfer = lpi2c_imx_xfer,
558 .functionality = lpi2c_imx_func,
561 static const struct of_device_id lpi2c_imx_of_match[] = {
562 { .compatible = "fsl,imx7ulp-lpi2c" },
565 MODULE_DEVICE_TABLE(of, lpi2c_imx_of_match);
567 static int lpi2c_imx_probe(struct platform_device *pdev)
569 struct lpi2c_imx_struct *lpi2c_imx;
573 lpi2c_imx = devm_kzalloc(&pdev->dev, sizeof(*lpi2c_imx), GFP_KERNEL);
577 lpi2c_imx->base = devm_platform_ioremap_resource(pdev, 0);
578 if (IS_ERR(lpi2c_imx->base))
579 return PTR_ERR(lpi2c_imx->base);
581 irq = platform_get_irq(pdev, 0);
585 lpi2c_imx->adapter.owner = THIS_MODULE;
586 lpi2c_imx->adapter.algo = &lpi2c_imx_algo;
587 lpi2c_imx->adapter.dev.parent = &pdev->dev;
588 lpi2c_imx->adapter.dev.of_node = pdev->dev.of_node;
589 strscpy(lpi2c_imx->adapter.name, pdev->name,
590 sizeof(lpi2c_imx->adapter.name));
592 ret = devm_clk_bulk_get_all(&pdev->dev, &lpi2c_imx->clks);
594 return dev_err_probe(&pdev->dev, ret, "can't get I2C peripheral clock\n");
595 lpi2c_imx->num_clks = ret;
597 ret = of_property_read_u32(pdev->dev.of_node,
598 "clock-frequency", &lpi2c_imx->bitrate);
600 lpi2c_imx->bitrate = I2C_MAX_STANDARD_MODE_FREQ;
602 ret = devm_request_irq(&pdev->dev, irq, lpi2c_imx_isr, 0,
603 pdev->name, lpi2c_imx);
605 return dev_err_probe(&pdev->dev, ret, "can't claim irq %d\n", irq);
607 i2c_set_adapdata(&lpi2c_imx->adapter, lpi2c_imx);
608 platform_set_drvdata(pdev, lpi2c_imx);
610 ret = clk_bulk_prepare_enable(lpi2c_imx->num_clks, lpi2c_imx->clks);
614 pm_runtime_set_autosuspend_delay(&pdev->dev, I2C_PM_TIMEOUT);
615 pm_runtime_use_autosuspend(&pdev->dev);
616 pm_runtime_get_noresume(&pdev->dev);
617 pm_runtime_set_active(&pdev->dev);
618 pm_runtime_enable(&pdev->dev);
620 temp = readl(lpi2c_imx->base + LPI2C_PARAM);
621 lpi2c_imx->txfifosize = 1 << (temp & 0x0f);
622 lpi2c_imx->rxfifosize = 1 << ((temp >> 8) & 0x0f);
624 /* Init optional bus recovery function */
625 ret = lpi2c_imx_init_recovery_info(lpi2c_imx, pdev);
626 /* Give it another chance if pinctrl used is not ready yet */
627 if (ret == -EPROBE_DEFER)
630 ret = i2c_add_adapter(&lpi2c_imx->adapter);
634 pm_runtime_mark_last_busy(&pdev->dev);
635 pm_runtime_put_autosuspend(&pdev->dev);
637 dev_info(&lpi2c_imx->adapter.dev, "LPI2C adapter registered\n");
642 pm_runtime_put(&pdev->dev);
643 pm_runtime_disable(&pdev->dev);
644 pm_runtime_dont_use_autosuspend(&pdev->dev);
649 static void lpi2c_imx_remove(struct platform_device *pdev)
651 struct lpi2c_imx_struct *lpi2c_imx = platform_get_drvdata(pdev);
653 i2c_del_adapter(&lpi2c_imx->adapter);
655 pm_runtime_disable(&pdev->dev);
656 pm_runtime_dont_use_autosuspend(&pdev->dev);
659 static int __maybe_unused lpi2c_runtime_suspend(struct device *dev)
661 struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev);
663 clk_bulk_disable(lpi2c_imx->num_clks, lpi2c_imx->clks);
664 pinctrl_pm_select_sleep_state(dev);
669 static int __maybe_unused lpi2c_runtime_resume(struct device *dev)
671 struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev);
674 pinctrl_pm_select_default_state(dev);
675 ret = clk_bulk_enable(lpi2c_imx->num_clks, lpi2c_imx->clks);
677 dev_err(dev, "failed to enable I2C clock, ret=%d\n", ret);
684 static const struct dev_pm_ops lpi2c_pm_ops = {
685 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
686 pm_runtime_force_resume)
687 SET_RUNTIME_PM_OPS(lpi2c_runtime_suspend,
688 lpi2c_runtime_resume, NULL)
691 static struct platform_driver lpi2c_imx_driver = {
692 .probe = lpi2c_imx_probe,
693 .remove_new = lpi2c_imx_remove,
696 .of_match_table = lpi2c_imx_of_match,
701 module_platform_driver(lpi2c_imx_driver);
703 MODULE_AUTHOR("Gao Pan <pandy.gao@nxp.com>");
704 MODULE_DESCRIPTION("I2C adapter driver for LPI2C bus");
705 MODULE_LICENSE("GPL");