1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Synopsys DesignWare I2C adapter driver.
5 * Based on the TI DAVINCI I2C adapter driver.
7 * Copyright (C) 2006 Texas Instruments.
8 * Copyright (C) 2007 MontaVista Software Inc.
9 * Copyright (C) 2009 Provigent Ltd.
11 #include <linux/acpi.h>
12 #include <linux/clk-provider.h>
13 #include <linux/clk.h>
14 #include <linux/delay.h>
15 #include <linux/dmi.h>
16 #include <linux/err.h>
17 #include <linux/errno.h>
18 #include <linux/i2c.h>
19 #include <linux/interrupt.h>
21 #include <linux/kernel.h>
22 #include <linux/mfd/syscon.h>
23 #include <linux/module.h>
25 #include <linux/platform_data/i2c-designware.h>
26 #include <linux/platform_device.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/property.h>
30 #include <linux/regmap.h>
31 #include <linux/reset.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/suspend.h>
35 #include <linux/units.h>
37 #include "i2c-designware-core.h"
39 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
41 return clk_get_rate(dev->clk) / KILO;
45 static const struct acpi_device_id dw_i2c_acpi_match[] = {
50 { "80860F41", ACCESS_NO_IRQ_SUSPEND },
51 { "808622C1", ACCESS_NO_IRQ_SUSPEND },
52 { "AMD0010", ACCESS_INTR_MASK },
53 { "AMDI0010", ACCESS_INTR_MASK },
59 { "HYGO0010", ACCESS_INTR_MASK },
62 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
66 #define BT1_I2C_CTL 0x100
67 #define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0)
68 #define BT1_I2C_CTL_WR BIT(8)
69 #define BT1_I2C_CTL_GO BIT(31)
70 #define BT1_I2C_DI 0x104
71 #define BT1_I2C_DO 0x108
73 static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val)
75 struct dw_i2c_dev *dev = context;
79 * Note these methods shouldn't ever fail because the system controller
80 * registers are memory mapped. We check the return value just in case.
82 ret = regmap_write(dev->sysmap, BT1_I2C_CTL,
83 BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK));
87 return regmap_read(dev->sysmap, BT1_I2C_DO, val);
90 static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val)
92 struct dw_i2c_dev *dev = context;
95 ret = regmap_write(dev->sysmap, BT1_I2C_DI, val);
99 return regmap_write(dev->sysmap, BT1_I2C_CTL,
100 BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK));
103 static struct regmap_config bt1_i2c_cfg = {
108 .reg_read = bt1_i2c_read,
109 .reg_write = bt1_i2c_write,
110 .max_register = DW_IC_COMP_TYPE,
113 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
115 dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent);
116 if (IS_ERR(dev->sysmap))
117 return PTR_ERR(dev->sysmap);
119 dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg);
120 return PTR_ERR_OR_ZERO(dev->map);
123 #define MSCC_ICPU_CFG_TWI_DELAY 0x0
124 #define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0)
125 #define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4
127 static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)
129 writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
130 dev->ext + MSCC_ICPU_CFG_TWI_DELAY);
135 static int dw_i2c_of_configure(struct platform_device *pdev)
137 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
139 switch (dev->flags & MODEL_MASK) {
140 case MODEL_MSCC_OCELOT:
141 dev->ext = devm_platform_ioremap_resource(pdev, 1);
142 if (!IS_ERR(dev->ext))
143 dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;
152 static const struct of_device_id dw_i2c_of_match[] = {
153 { .compatible = "snps,designware-i2c", },
154 { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
155 { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
158 MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
160 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
165 static inline int dw_i2c_of_configure(struct platform_device *pdev)
171 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
173 pm_runtime_disable(dev->dev);
175 if (dev->shared_with_punit)
176 pm_runtime_put_noidle(dev->dev);
179 static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev)
181 struct platform_device *pdev = to_platform_device(dev->dev);
184 switch (dev->flags & MODEL_MASK) {
185 case MODEL_BAIKAL_BT1:
186 ret = bt1_i2c_request_regs(dev);
189 dev->base = devm_platform_ioremap_resource(pdev, 0);
190 ret = PTR_ERR_OR_ZERO(dev->base);
197 static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = {
199 .ident = "Qtechnology QT5222",
201 DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"),
202 DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"),
205 { } /* terminate list */
208 static int dw_i2c_plat_probe(struct platform_device *pdev)
210 struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
211 struct i2c_adapter *adap;
212 struct dw_i2c_dev *dev;
213 struct i2c_timings *t;
216 irq = platform_get_irq(pdev, 0);
220 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
224 dev->flags = (uintptr_t)device_get_match_data(&pdev->dev);
225 dev->dev = &pdev->dev;
227 platform_set_drvdata(pdev, dev);
229 ret = dw_i2c_plat_request_regs(dev);
233 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
234 if (IS_ERR(dev->rst))
235 return PTR_ERR(dev->rst);
237 reset_control_deassert(dev->rst);
241 t->bus_freq_hz = pdata->i2c_scl_freq;
243 i2c_parse_fw_timings(&pdev->dev, t, false);
245 i2c_dw_adjust_bus_speed(dev);
247 if (pdev->dev.of_node)
248 dw_i2c_of_configure(pdev);
250 if (has_acpi_companion(&pdev->dev))
251 i2c_dw_acpi_configure(&pdev->dev);
253 ret = i2c_dw_validate_speed(dev);
257 ret = i2c_dw_probe_lock_support(dev);
261 i2c_dw_configure(dev);
263 /* Optional interface clock */
264 dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
265 if (IS_ERR(dev->pclk)) {
266 ret = PTR_ERR(dev->pclk);
270 dev->clk = devm_clk_get_optional(&pdev->dev, NULL);
271 if (IS_ERR(dev->clk)) {
272 ret = PTR_ERR(dev->clk);
276 ret = i2c_dw_prepare_clk(dev, true);
283 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
284 clk_khz = dev->get_clk_rate_khz(dev);
286 if (!dev->sda_hold_time && t->sda_hold_ns)
288 DIV_S64_ROUND_CLOSEST(clk_khz * t->sda_hold_ns, MICRO);
291 adap = &dev->adapter;
292 adap->owner = THIS_MODULE;
293 adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ?
294 I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED;
295 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
296 adap->dev.of_node = pdev->dev.of_node;
299 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {
300 dev_pm_set_driver_flags(&pdev->dev,
301 DPM_FLAG_SMART_PREPARE |
302 DPM_FLAG_MAY_SKIP_RESUME);
304 dev_pm_set_driver_flags(&pdev->dev,
305 DPM_FLAG_SMART_PREPARE |
306 DPM_FLAG_SMART_SUSPEND |
307 DPM_FLAG_MAY_SKIP_RESUME);
310 /* The code below assumes runtime PM to be disabled. */
311 WARN_ON(pm_runtime_enabled(&pdev->dev));
313 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
314 pm_runtime_use_autosuspend(&pdev->dev);
315 pm_runtime_set_active(&pdev->dev);
317 if (dev->shared_with_punit)
318 pm_runtime_get_noresume(&pdev->dev);
320 pm_runtime_enable(&pdev->dev);
322 ret = i2c_dw_probe(dev);
329 dw_i2c_plat_pm_cleanup(dev);
331 reset_control_assert(dev->rst);
335 static int dw_i2c_plat_remove(struct platform_device *pdev)
337 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
339 pm_runtime_get_sync(&pdev->dev);
341 i2c_del_adapter(&dev->adapter);
345 pm_runtime_dont_use_autosuspend(&pdev->dev);
346 pm_runtime_put_sync(&pdev->dev);
347 dw_i2c_plat_pm_cleanup(dev);
349 reset_control_assert(dev->rst);
354 #ifdef CONFIG_PM_SLEEP
355 static int dw_i2c_plat_prepare(struct device *dev)
358 * If the ACPI companion device object is present for this device, it
359 * may be accessed during suspend and resume of other devices via I2C
360 * operation regions, so tell the PM core and middle layers to avoid
361 * skipping system suspend/resume callbacks for it in that case.
363 return !has_acpi_companion(dev);
366 static void dw_i2c_plat_complete(struct device *dev)
369 * The device can only be in runtime suspend at this point if it has not
370 * been resumed throughout the ending system suspend/resume cycle, so if
371 * the platform firmware might mess up with it, request the runtime PM
372 * framework to resume it.
374 if (pm_runtime_suspended(dev) && pm_resume_via_firmware())
375 pm_request_resume(dev);
378 #define dw_i2c_plat_prepare NULL
379 #define dw_i2c_plat_complete NULL
383 static int dw_i2c_plat_suspend(struct device *dev)
385 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
387 i_dev->suspended = true;
389 if (i_dev->shared_with_punit)
392 i_dev->disable(i_dev);
393 i2c_dw_prepare_clk(i_dev, false);
398 static int dw_i2c_plat_resume(struct device *dev)
400 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
402 if (!i_dev->shared_with_punit)
403 i2c_dw_prepare_clk(i_dev, true);
406 i_dev->suspended = false;
411 static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
412 .prepare = dw_i2c_plat_prepare,
413 .complete = dw_i2c_plat_complete,
414 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
415 SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
418 #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
420 #define DW_I2C_DEV_PMOPS NULL
423 /* Work with hotplug and coldplug */
424 MODULE_ALIAS("platform:i2c_designware");
426 static struct platform_driver dw_i2c_driver = {
427 .probe = dw_i2c_plat_probe,
428 .remove = dw_i2c_plat_remove,
430 .name = "i2c_designware",
431 .of_match_table = of_match_ptr(dw_i2c_of_match),
432 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
433 .pm = DW_I2C_DEV_PMOPS,
437 static int __init dw_i2c_init_driver(void)
439 return platform_driver_register(&dw_i2c_driver);
441 subsys_initcall(dw_i2c_init_driver);
443 static void __exit dw_i2c_exit_driver(void)
445 platform_driver_unregister(&dw_i2c_driver);
447 module_exit(dw_i2c_exit_driver);
449 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
450 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
451 MODULE_LICENSE("GPL");