1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Synopsys DesignWare I2C adapter driver.
5 * Based on the TI DAVINCI I2C adapter driver.
7 * Copyright (C) 2006 Texas Instruments.
8 * Copyright (C) 2007 MontaVista Software Inc.
9 * Copyright (C) 2009 Provigent Ltd.
11 #include <linux/acpi.h>
12 #include <linux/clk-provider.h>
13 #include <linux/clk.h>
14 #include <linux/delay.h>
15 #include <linux/dmi.h>
16 #include <linux/err.h>
17 #include <linux/errno.h>
18 #include <linux/i2c.h>
19 #include <linux/interrupt.h>
21 #include <linux/kernel.h>
22 #include <linux/mfd/syscon.h>
23 #include <linux/module.h>
25 #include <linux/platform_data/i2c-designware.h>
26 #include <linux/platform_device.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/property.h>
30 #include <linux/regmap.h>
31 #include <linux/reset.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/suspend.h>
36 #include "i2c-designware-core.h"
38 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
40 return clk_get_rate(dev->clk)/1000;
44 static const struct acpi_device_id dw_i2c_acpi_match[] = {
49 { "80860F41", ACCESS_NO_IRQ_SUSPEND },
50 { "808622C1", ACCESS_NO_IRQ_SUSPEND },
51 { "AMD0010", ACCESS_INTR_MASK },
52 { "AMDI0010", ACCESS_INTR_MASK },
58 { "HYGO0010", ACCESS_INTR_MASK },
61 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
65 #define BT1_I2C_CTL 0x100
66 #define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0)
67 #define BT1_I2C_CTL_WR BIT(8)
68 #define BT1_I2C_CTL_GO BIT(31)
69 #define BT1_I2C_DI 0x104
70 #define BT1_I2C_DO 0x108
72 static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val)
74 struct dw_i2c_dev *dev = context;
78 * Note these methods shouldn't ever fail because the system controller
79 * registers are memory mapped. We check the return value just in case.
81 ret = regmap_write(dev->sysmap, BT1_I2C_CTL,
82 BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK));
86 return regmap_read(dev->sysmap, BT1_I2C_DO, val);
89 static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val)
91 struct dw_i2c_dev *dev = context;
94 ret = regmap_write(dev->sysmap, BT1_I2C_DI, val);
98 return regmap_write(dev->sysmap, BT1_I2C_CTL,
99 BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK));
102 static struct regmap_config bt1_i2c_cfg = {
107 .reg_read = bt1_i2c_read,
108 .reg_write = bt1_i2c_write,
109 .max_register = DW_IC_COMP_TYPE,
112 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
114 dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent);
115 if (IS_ERR(dev->sysmap))
116 return PTR_ERR(dev->sysmap);
118 dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg);
119 return PTR_ERR_OR_ZERO(dev->map);
122 #define MSCC_ICPU_CFG_TWI_DELAY 0x0
123 #define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0)
124 #define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4
126 static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)
128 writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
129 dev->ext + MSCC_ICPU_CFG_TWI_DELAY);
134 static int dw_i2c_of_configure(struct platform_device *pdev)
136 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
138 switch (dev->flags & MODEL_MASK) {
139 case MODEL_MSCC_OCELOT:
140 dev->ext = devm_platform_ioremap_resource(pdev, 1);
141 if (!IS_ERR(dev->ext))
142 dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;
151 static const struct of_device_id dw_i2c_of_match[] = {
152 { .compatible = "snps,designware-i2c", },
153 { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
154 { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
157 MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
159 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
164 static inline int dw_i2c_of_configure(struct platform_device *pdev)
170 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
172 pm_runtime_disable(dev->dev);
174 if (dev->shared_with_punit)
175 pm_runtime_put_noidle(dev->dev);
178 static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev)
180 struct platform_device *pdev = to_platform_device(dev->dev);
183 switch (dev->flags & MODEL_MASK) {
184 case MODEL_BAIKAL_BT1:
185 ret = bt1_i2c_request_regs(dev);
188 dev->base = devm_platform_ioremap_resource(pdev, 0);
189 ret = PTR_ERR_OR_ZERO(dev->base);
196 static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = {
198 .ident = "Qtechnology QT5222",
200 DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"),
201 DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"),
204 { } /* terminate list */
207 static int dw_i2c_plat_probe(struct platform_device *pdev)
209 struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
210 struct i2c_adapter *adap;
211 struct dw_i2c_dev *dev;
212 struct i2c_timings *t;
215 irq = platform_get_irq(pdev, 0);
219 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
223 dev->flags = (uintptr_t)device_get_match_data(&pdev->dev);
224 dev->dev = &pdev->dev;
226 platform_set_drvdata(pdev, dev);
228 ret = dw_i2c_plat_request_regs(dev);
232 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
233 if (IS_ERR(dev->rst))
234 return PTR_ERR(dev->rst);
236 reset_control_deassert(dev->rst);
240 t->bus_freq_hz = pdata->i2c_scl_freq;
242 i2c_parse_fw_timings(&pdev->dev, t, false);
244 i2c_dw_adjust_bus_speed(dev);
246 if (pdev->dev.of_node)
247 dw_i2c_of_configure(pdev);
249 if (has_acpi_companion(&pdev->dev))
250 i2c_dw_acpi_configure(&pdev->dev);
252 ret = i2c_dw_validate_speed(dev);
256 ret = i2c_dw_probe_lock_support(dev);
260 i2c_dw_configure(dev);
262 /* Optional interface clock */
263 dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
264 if (IS_ERR(dev->pclk)) {
265 ret = PTR_ERR(dev->pclk);
269 dev->clk = devm_clk_get_optional(&pdev->dev, NULL);
270 if (IS_ERR(dev->clk)) {
271 ret = PTR_ERR(dev->clk);
275 ret = i2c_dw_prepare_clk(dev, true);
282 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
283 clk_khz = dev->get_clk_rate_khz(dev);
285 if (!dev->sda_hold_time && t->sda_hold_ns)
287 div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000);
290 adap = &dev->adapter;
291 adap->owner = THIS_MODULE;
292 adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ?
293 I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED;
294 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
295 adap->dev.of_node = pdev->dev.of_node;
298 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {
299 dev_pm_set_driver_flags(&pdev->dev,
300 DPM_FLAG_SMART_PREPARE |
301 DPM_FLAG_MAY_SKIP_RESUME);
303 dev_pm_set_driver_flags(&pdev->dev,
304 DPM_FLAG_SMART_PREPARE |
305 DPM_FLAG_SMART_SUSPEND |
306 DPM_FLAG_MAY_SKIP_RESUME);
309 /* The code below assumes runtime PM to be disabled. */
310 WARN_ON(pm_runtime_enabled(&pdev->dev));
312 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
313 pm_runtime_use_autosuspend(&pdev->dev);
314 pm_runtime_set_active(&pdev->dev);
316 if (dev->shared_with_punit)
317 pm_runtime_get_noresume(&pdev->dev);
319 pm_runtime_enable(&pdev->dev);
321 ret = i2c_dw_probe(dev);
328 dw_i2c_plat_pm_cleanup(dev);
330 reset_control_assert(dev->rst);
334 static int dw_i2c_plat_remove(struct platform_device *pdev)
336 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
338 pm_runtime_get_sync(&pdev->dev);
340 i2c_del_adapter(&dev->adapter);
344 pm_runtime_dont_use_autosuspend(&pdev->dev);
345 pm_runtime_put_sync(&pdev->dev);
346 dw_i2c_plat_pm_cleanup(dev);
348 reset_control_assert(dev->rst);
353 #ifdef CONFIG_PM_SLEEP
354 static int dw_i2c_plat_prepare(struct device *dev)
357 * If the ACPI companion device object is present for this device, it
358 * may be accessed during suspend and resume of other devices via I2C
359 * operation regions, so tell the PM core and middle layers to avoid
360 * skipping system suspend/resume callbacks for it in that case.
362 return !has_acpi_companion(dev);
365 static void dw_i2c_plat_complete(struct device *dev)
368 * The device can only be in runtime suspend at this point if it has not
369 * been resumed throughout the ending system suspend/resume cycle, so if
370 * the platform firmware might mess up with it, request the runtime PM
371 * framework to resume it.
373 if (pm_runtime_suspended(dev) && pm_resume_via_firmware())
374 pm_request_resume(dev);
377 #define dw_i2c_plat_prepare NULL
378 #define dw_i2c_plat_complete NULL
382 static int dw_i2c_plat_suspend(struct device *dev)
384 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
386 i_dev->suspended = true;
388 if (i_dev->shared_with_punit)
391 i_dev->disable(i_dev);
392 i2c_dw_prepare_clk(i_dev, false);
397 static int dw_i2c_plat_resume(struct device *dev)
399 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
401 if (!i_dev->shared_with_punit)
402 i2c_dw_prepare_clk(i_dev, true);
405 i_dev->suspended = false;
410 static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
411 .prepare = dw_i2c_plat_prepare,
412 .complete = dw_i2c_plat_complete,
413 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
414 SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
417 #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
419 #define DW_I2C_DEV_PMOPS NULL
422 /* Work with hotplug and coldplug */
423 MODULE_ALIAS("platform:i2c_designware");
425 static struct platform_driver dw_i2c_driver = {
426 .probe = dw_i2c_plat_probe,
427 .remove = dw_i2c_plat_remove,
429 .name = "i2c_designware",
430 .of_match_table = of_match_ptr(dw_i2c_of_match),
431 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
432 .pm = DW_I2C_DEV_PMOPS,
436 static int __init dw_i2c_init_driver(void)
438 return platform_driver_register(&dw_i2c_driver);
440 subsys_initcall(dw_i2c_init_driver);
442 static void __exit dw_i2c_exit_driver(void)
444 platform_driver_unregister(&dw_i2c_driver);
446 module_exit(dw_i2c_exit_driver);
448 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
449 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
450 MODULE_LICENSE("GPL");