1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Intel(R) Trace Hub data structures
5 * Copyright (C) 2014-2015 Intel Corporation.
11 /* intel_th_device device types */
13 /* Devices that generate trace data */
15 /* Output ports (MSC, PTI) */
17 /* Switch, the Global Trace Hub (GTH) */
22 * struct intel_th_output - descriptor INTEL_TH_OUTPUT type devices
23 * @port: output port number, assigned by the switch
24 * @type: GTH_{MSU,CTP,PTI}
25 * @scratchpad: scratchpad bits to flag when this output is enabled
26 * @multiblock: true for multiblock output configuration
27 * @active: true when this output is enabled
29 * Output port descriptor, used by switch driver to tell which output
30 * port this output device corresponds to. Filled in at output device's
31 * probe time by switch::assign(). Passed from output device driver to
32 * switch related code to enable/disable its port.
34 struct intel_th_output {
37 unsigned int scratchpad;
43 * struct intel_th_drvdata - describes hardware capabilities and quirks
44 * @tscu_enable: device needs SW to enable time stamping unit
45 * @host_mode_only: device can only operate in 'host debugger' mode
47 struct intel_th_drvdata {
48 unsigned int tscu_enable : 1,
52 #define INTEL_TH_CAP(_th, _cap) ((_th)->drvdata ? (_th)->drvdata->_cap : 0)
55 * struct intel_th_device - device on the intel_th bus
57 * @drvdata: hardware capabilities/quirks
58 * @resource: array of resources available to this device
59 * @num_resources: number of resources in @resource array
60 * @type: INTEL_TH_{SOURCE,OUTPUT,SWITCH}
61 * @id: device instance or -1
62 * @host_mode: Intel TH is controlled by an external debug host
63 * @output: output descriptor for INTEL_TH_OUTPUT devices
64 * @name: device name to match the driver
66 struct intel_th_device {
68 struct intel_th_drvdata *drvdata;
69 struct resource *resource;
70 unsigned int num_resources;
74 /* INTEL_TH_SWITCH specific */
77 /* INTEL_TH_OUTPUT specific */
78 struct intel_th_output output;
83 #define to_intel_th_device(_d) \
84 container_of((_d), struct intel_th_device, dev)
87 * intel_th_device_get_resource() - obtain @num'th resource of type @type
88 * @thdev: the device to search the resource for
89 * @type: resource type
90 * @num: number of the resource
92 static inline struct resource *
93 intel_th_device_get_resource(struct intel_th_device *thdev, unsigned int type,
98 for (i = 0; i < thdev->num_resources; i++)
99 if (resource_type(&thdev->resource[i]) == type && !num--)
100 return &thdev->resource[i];
106 * GTH, output ports configuration
110 GTH_MSU, /* memory/usb */
111 GTH_CTP, /* Common Trace Port */
112 GTH_LPP, /* Low Power Path */
113 GTH_PTI, /* MIPI-PTI */
117 * intel_th_output_assigned() - if an output device is assigned to a switch port
118 * @thdev: the output device
120 * Return: true if the device is INTEL_TH_OUTPUT *and* is assigned a port
123 intel_th_output_assigned(struct intel_th_device *thdev)
125 return thdev->type == INTEL_TH_OUTPUT &&
126 (thdev->output.port >= 0 ||
127 thdev->output.type == GTH_NONE);
131 * struct intel_th_driver - driver for an intel_th_device device
132 * @driver: generic driver
133 * @probe: probe method
134 * @remove: remove method
135 * @assign: match a given output type device against available outputs
136 * @unassign: deassociate an output type device from an output port
137 * @prepare: prepare output port for tracing
138 * @enable: enable tracing for a given output device
139 * @disable: disable tracing for a given output device
140 * @irq: interrupt callback
141 * @activate: enable tracing on the output's side
142 * @deactivate: disable tracing on the output's side
143 * @fops: file operations for device nodes
144 * @attr_group: attributes provided by the driver
146 * Callbacks @probe and @remove are required for all device types.
147 * Switch device driver needs to fill in @assign, @enable and @disable
150 struct intel_th_driver {
151 struct device_driver driver;
152 int (*probe)(struct intel_th_device *thdev);
153 void (*remove)(struct intel_th_device *thdev);
154 /* switch (GTH) ops */
155 int (*assign)(struct intel_th_device *thdev,
156 struct intel_th_device *othdev);
157 void (*unassign)(struct intel_th_device *thdev,
158 struct intel_th_device *othdev);
159 void (*prepare)(struct intel_th_device *thdev,
160 struct intel_th_output *output);
161 void (*enable)(struct intel_th_device *thdev,
162 struct intel_th_output *output);
163 void (*disable)(struct intel_th_device *thdev,
164 struct intel_th_output *output);
166 void (*irq)(struct intel_th_device *thdev);
167 int (*activate)(struct intel_th_device *thdev);
168 void (*deactivate)(struct intel_th_device *thdev);
169 /* file_operations for those who want a device node */
170 const struct file_operations *fops;
171 /* optional attributes */
172 struct attribute_group *attr_group;
175 int (*set_output)(struct intel_th_device *thdev,
176 unsigned int master);
179 #define to_intel_th_driver(_d) \
180 container_of((_d), struct intel_th_driver, driver)
182 #define to_intel_th_driver_or_null(_d) \
183 ((_d) ? to_intel_th_driver(_d) : NULL)
186 * Subdevice tree structure is as follows:
187 * + struct intel_th device (pci; dev_{get,set}_drvdata()
188 * + struct intel_th_device INTEL_TH_SWITCH (GTH)
189 * + struct intel_th_device INTEL_TH_OUTPUT (MSU, PTI)
190 * + struct intel_th_device INTEL_TH_SOURCE (STH)
192 * In other words, INTEL_TH_OUTPUT devices are children of INTEL_TH_SWITCH;
193 * INTEL_TH_SWITCH and INTEL_TH_SOURCE are children of the intel_th device.
195 static inline struct intel_th_device *
196 to_intel_th_parent(struct intel_th_device *thdev)
198 struct device *parent = thdev->dev.parent;
203 return to_intel_th_device(parent);
206 static inline struct intel_th *to_intel_th(struct intel_th_device *thdev)
208 if (thdev->type == INTEL_TH_OUTPUT)
209 thdev = to_intel_th_parent(thdev);
211 if (WARN_ON_ONCE(!thdev || thdev->type == INTEL_TH_OUTPUT))
214 return dev_get_drvdata(thdev->dev.parent);
218 intel_th_alloc(struct device *dev, struct intel_th_drvdata *drvdata,
219 struct resource *devres, unsigned int ndevres, int irq);
220 void intel_th_free(struct intel_th *th);
222 int intel_th_driver_register(struct intel_th_driver *thdrv);
223 void intel_th_driver_unregister(struct intel_th_driver *thdrv);
225 int intel_th_trace_enable(struct intel_th_device *thdev);
226 int intel_th_trace_disable(struct intel_th_device *thdev);
227 int intel_th_set_output(struct intel_th_device *thdev,
228 unsigned int master);
229 int intel_th_output_enable(struct intel_th *th, unsigned int otype);
237 #define TH_POSSIBLE_OUTPUTS 8
238 /* Total number of possible subdevices: outputs + GTH + STH */
239 #define TH_SUBDEVICE_MAX (TH_POSSIBLE_OUTPUTS + 2)
240 #define TH_CONFIGURABLE_MASTERS 256
244 * struct intel_th - Intel TH controller
245 * @dev: driver core's device
247 * @hub: "switch" subdevice (GTH)
248 * @resource: resources of the entire controller
249 * @num_thdevs: number of devices in the @thdev array
250 * @num_resources: number or resources in the @resource array
252 * @id: this Intel TH controller's device ID in the system
253 * @major: device node major for output devices
258 struct intel_th_device *thdev[TH_SUBDEVICE_MAX];
259 struct intel_th_device *hub;
260 struct intel_th_drvdata *drvdata;
262 struct resource *resource;
263 int (*activate)(struct intel_th *);
264 void (*deactivate)(struct intel_th *);
265 unsigned int num_thdevs;
266 unsigned int num_resources;
271 #ifdef CONFIG_MODULES
272 struct work_struct request_module_work;
273 #endif /* CONFIG_MODULES */
274 #ifdef CONFIG_INTEL_TH_DEBUG
279 static inline struct intel_th_device *
280 to_intel_th_hub(struct intel_th_device *thdev)
282 if (thdev->type == INTEL_TH_SWITCH)
284 else if (thdev->type == INTEL_TH_OUTPUT)
285 return to_intel_th_parent(thdev);
287 return to_intel_th(thdev)->hub;
294 /* Global Trace Hub (GTH) */
295 REG_GTH_OFFSET = 0x0000,
296 REG_GTH_LENGTH = 0x2000,
298 /* Timestamp counter unit (TSCU) */
299 REG_TSCU_OFFSET = 0x2000,
300 REG_TSCU_LENGTH = 0x1000,
302 /* Software Trace Hub (STH) [0x4000..0x4fff] */
303 REG_STH_OFFSET = 0x4000,
304 REG_STH_LENGTH = 0x2000,
306 /* Memory Storage Unit (MSU) [0xa0000..0xa1fff] */
307 REG_MSU_OFFSET = 0xa0000,
308 REG_MSU_LENGTH = 0x02000,
310 /* Internal MSU trace buffer [0x80000..0x9ffff] */
311 BUF_MSU_OFFSET = 0x80000,
312 BUF_MSU_LENGTH = 0x20000,
314 /* PTI output == same window as GTH */
315 REG_PTI_OFFSET = REG_GTH_OFFSET,
316 REG_PTI_LENGTH = REG_GTH_LENGTH,
318 /* DCI Handler (DCIH) == some window as MSU */
319 REG_DCIH_OFFSET = REG_MSU_OFFSET,
320 REG_DCIH_LENGTH = REG_MSU_LENGTH,
324 * Scratchpad bits: tell firmware and external debuggers
328 /* Memory is the primary destination */
329 SCRPD_MEM_IS_PRIM_DEST = BIT(0),
330 /* XHCI DbC is the primary destination */
331 SCRPD_DBC_IS_PRIM_DEST = BIT(1),
332 /* PTI is the primary destination */
333 SCRPD_PTI_IS_PRIM_DEST = BIT(2),
334 /* BSSB is the primary destination */
335 SCRPD_BSSB_IS_PRIM_DEST = BIT(3),
336 /* PTI is the alternate destination */
337 SCRPD_PTI_IS_ALT_DEST = BIT(4),
338 /* BSSB is the alternate destination */
339 SCRPD_BSSB_IS_ALT_DEST = BIT(5),
340 /* DeepSx exit occurred */
341 SCRPD_DEEPSX_EXIT = BIT(6),
342 /* S4 exit occurred */
343 SCRPD_S4_EXIT = BIT(7),
344 /* S5 exit occurred */
345 SCRPD_S5_EXIT = BIT(8),
346 /* MSU controller 0/1 is enabled */
347 SCRPD_MSC0_IS_ENABLED = BIT(9),
348 SCRPD_MSC1_IS_ENABLED = BIT(10),
349 /* Sx exit occurred */
350 SCRPD_SX_EXIT = BIT(11),
351 /* Trigger Unit is enabled */
352 SCRPD_TRIGGER_IS_ENABLED = BIT(12),
353 SCRPD_ODLA_IS_ENABLED = BIT(13),
354 SCRPD_SOCHAP_IS_ENABLED = BIT(14),
355 SCRPD_STH_IS_ENABLED = BIT(15),
356 SCRPD_DCIH_IS_ENABLED = BIT(16),
357 SCRPD_VER_IS_ENABLED = BIT(17),
358 /* External debugger is using Intel TH */
359 SCRPD_DEBUGGER_IN_USE = BIT(24),