1 /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
3 * Description: CoreSight Trace Port Interface Unit driver
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 and
7 * only version 2 as published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
19 #include <linux/err.h>
20 #include <linux/slab.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/coresight.h>
23 #include <linux/amba/bus.h>
24 #include <linux/clk.h>
26 #include "coresight-priv.h"
28 #define TPIU_SUPP_PORTSZ 0x000
29 #define TPIU_CURR_PORTSZ 0x004
30 #define TPIU_SUPP_TRIGMODES 0x100
31 #define TPIU_TRIG_CNTRVAL 0x104
32 #define TPIU_TRIG_MULT 0x108
33 #define TPIU_SUPP_TESTPATM 0x200
34 #define TPIU_CURR_TESTPATM 0x204
35 #define TPIU_TEST_PATREPCNTR 0x208
36 #define TPIU_FFSR 0x300
37 #define TPIU_FFCR 0x304
38 #define TPIU_FSYNC_CNTR 0x308
39 #define TPIU_EXTCTL_INPORT 0x400
40 #define TPIU_EXTCTL_OUTPORT 0x404
41 #define TPIU_ITTRFLINACK 0xee4
42 #define TPIU_ITTRFLIN 0xee8
43 #define TPIU_ITATBDATA0 0xeec
44 #define TPIU_ITATBCTR2 0xef0
45 #define TPIU_ITATBCTR1 0xef4
46 #define TPIU_ITATBCTR0 0xef8
48 /** register definition **/
50 #define FFSR_FT_STOPPED_BIT 1
52 #define FFCR_FON_MAN_BIT 6
53 #define FFCR_FON_MAN BIT(6)
54 #define FFCR_STOP_FI BIT(12)
57 * @base: memory mapped base address for this component.
58 * @dev: the device entity associated to this component.
59 * @atclk: optional clock for the core parts of the TPIU.
60 * @csdev: component vitals needed by the framework.
66 struct coresight_device *csdev;
69 static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
71 CS_UNLOCK(drvdata->base);
73 /* TODO: fill this up */
75 CS_LOCK(drvdata->base);
78 static int tpiu_enable(struct coresight_device *csdev, u32 mode)
80 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
82 tpiu_enable_hw(drvdata);
84 dev_info(drvdata->dev, "TPIU enabled\n");
88 static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
90 CS_UNLOCK(drvdata->base);
92 /* Clear formatter and stop on flush */
93 writel_relaxed(FFCR_STOP_FI, drvdata->base + TPIU_FFCR);
94 /* Generate manual flush */
95 writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR);
96 /* Wait for flush to complete */
97 coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0);
98 /* Wait for formatter to stop */
99 coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1);
101 CS_LOCK(drvdata->base);
104 static void tpiu_disable(struct coresight_device *csdev)
106 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
108 tpiu_disable_hw(drvdata);
110 dev_info(drvdata->dev, "TPIU disabled\n");
113 static const struct coresight_ops_sink tpiu_sink_ops = {
114 .enable = tpiu_enable,
115 .disable = tpiu_disable,
118 static const struct coresight_ops tpiu_cs_ops = {
119 .sink_ops = &tpiu_sink_ops,
122 static int tpiu_probe(struct amba_device *adev, const struct amba_id *id)
126 struct device *dev = &adev->dev;
127 struct coresight_platform_data *pdata = NULL;
128 struct tpiu_drvdata *drvdata;
129 struct resource *res = &adev->res;
130 struct coresight_desc desc = { 0 };
131 struct device_node *np = adev->dev.of_node;
134 pdata = of_get_coresight_platform_data(dev, np);
136 return PTR_ERR(pdata);
137 adev->dev.platform_data = pdata;
140 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
144 drvdata->dev = &adev->dev;
145 drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
146 if (!IS_ERR(drvdata->atclk)) {
147 ret = clk_prepare_enable(drvdata->atclk);
151 dev_set_drvdata(dev, drvdata);
153 /* Validity for the resource is already checked by the AMBA core */
154 base = devm_ioremap_resource(dev, res);
156 return PTR_ERR(base);
158 drvdata->base = base;
160 /* Disable tpiu to support older devices */
161 tpiu_disable_hw(drvdata);
163 pm_runtime_put(&adev->dev);
165 desc.type = CORESIGHT_DEV_TYPE_SINK;
166 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
167 desc.ops = &tpiu_cs_ops;
170 drvdata->csdev = coresight_register(&desc);
171 if (IS_ERR(drvdata->csdev))
172 return PTR_ERR(drvdata->csdev);
178 static int tpiu_runtime_suspend(struct device *dev)
180 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
182 if (drvdata && !IS_ERR(drvdata->atclk))
183 clk_disable_unprepare(drvdata->atclk);
188 static int tpiu_runtime_resume(struct device *dev)
190 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
192 if (drvdata && !IS_ERR(drvdata->atclk))
193 clk_prepare_enable(drvdata->atclk);
199 static const struct dev_pm_ops tpiu_dev_pm_ops = {
200 SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL)
203 static const struct amba_id tpiu_ids[] = {
213 /* Coresight SoC-600 */
220 static struct amba_driver tpiu_driver = {
222 .name = "coresight-tpiu",
223 .owner = THIS_MODULE,
224 .pm = &tpiu_dev_pm_ops,
225 .suppress_bind_attrs = true,
228 .id_table = tpiu_ids,
230 builtin_amba_driver(tpiu_driver);