1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
7 #include <linux/bitfield.h>
8 #include <linux/coresight.h>
9 #include <linux/coresight-pmu.h>
10 #include <linux/cpumask.h>
11 #include <linux/device.h>
12 #include <linux/list.h>
14 #include <linux/init.h>
15 #include <linux/perf_event.h>
16 #include <linux/percpu-defs.h>
17 #include <linux/slab.h>
18 #include <linux/stringhash.h>
19 #include <linux/types.h>
20 #include <linux/workqueue.h>
22 #include "coresight-config.h"
23 #include "coresight-etm-perf.h"
24 #include "coresight-priv.h"
25 #include "coresight-syscfg.h"
26 #include "coresight-trace-id.h"
28 static struct pmu etm_pmu;
29 static bool etm_perf_up;
32 * An ETM context for a running event includes the perf aux handle
33 * and aux_data. For ETM, the aux_data (etm_event_data), consists of
34 * the trace path and the sink configuration. The event data is accessible
35 * via perf_get_aux(handle). However, a sink could "end" a perf output
36 * handle via the IRQ handler. And if the "sink" encounters a failure
37 * to "begin" another session (e.g due to lack of space in the buffer),
38 * the handle will be cleared. Thus, the event_data may not be accessible
39 * from the handle when we get to the etm_event_stop(), which is required
40 * for stopping the trace path. The event_data is guaranteed to stay alive
41 * until "free_aux()", which cannot happen as long as the event is active on
42 * the ETM. Thus the event_data for the session must be part of the ETM context
43 * to make sure we can disable the trace path.
46 struct perf_output_handle handle;
47 struct etm_event_data *event_data;
50 static DEFINE_PER_CPU(struct etm_ctxt, etm_ctxt);
51 static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
54 * The PMU formats were orignally for ETMv3.5/PTM's ETMCR 'config';
55 * now take them as general formats and apply on all ETMs.
57 PMU_FORMAT_ATTR(branch_broadcast, "config:"__stringify(ETM_OPT_BRANCH_BROADCAST));
58 PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC));
59 /* contextid1 enables tracing CONTEXTIDR_EL1 for ETMv4 */
60 PMU_FORMAT_ATTR(contextid1, "config:" __stringify(ETM_OPT_CTXTID));
61 /* contextid2 enables tracing CONTEXTIDR_EL2 for ETMv4 */
62 PMU_FORMAT_ATTR(contextid2, "config:" __stringify(ETM_OPT_CTXTID2));
63 PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS));
64 PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK));
65 /* preset - if sink ID is used as a configuration selector */
66 PMU_FORMAT_ATTR(preset, "config:0-3");
67 /* Sink ID - same for all ETMs */
68 PMU_FORMAT_ATTR(sinkid, "config2:0-31");
69 /* config ID - set if a system configuration is selected */
70 PMU_FORMAT_ATTR(configid, "config2:32-63");
74 * contextid always traces the "PID". The PID is in CONTEXTIDR_EL1
75 * when the kernel is running at EL1; when the kernel is at EL2,
76 * the PID is in CONTEXTIDR_EL2.
78 static ssize_t format_attr_contextid_show(struct device *dev,
79 struct device_attribute *attr,
82 int pid_fmt = ETM_OPT_CTXTID;
84 #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM4X)
85 pid_fmt = is_kernel_in_hyp_mode() ? ETM_OPT_CTXTID2 : ETM_OPT_CTXTID;
87 return sprintf(page, "config:%d\n", pid_fmt);
90 static struct device_attribute format_attr_contextid =
91 __ATTR(contextid, 0444, format_attr_contextid_show, NULL);
93 static struct attribute *etm_config_formats_attr[] = {
94 &format_attr_cycacc.attr,
95 &format_attr_contextid.attr,
96 &format_attr_contextid1.attr,
97 &format_attr_contextid2.attr,
98 &format_attr_timestamp.attr,
99 &format_attr_retstack.attr,
100 &format_attr_sinkid.attr,
101 &format_attr_preset.attr,
102 &format_attr_configid.attr,
103 &format_attr_branch_broadcast.attr,
107 static const struct attribute_group etm_pmu_format_group = {
109 .attrs = etm_config_formats_attr,
112 static struct attribute *etm_config_sinks_attr[] = {
116 static const struct attribute_group etm_pmu_sinks_group = {
118 .attrs = etm_config_sinks_attr,
121 static struct attribute *etm_config_events_attr[] = {
125 static const struct attribute_group etm_pmu_events_group = {
127 .attrs = etm_config_events_attr,
130 static const struct attribute_group *etm_pmu_attr_groups[] = {
131 &etm_pmu_format_group,
132 &etm_pmu_sinks_group,
133 &etm_pmu_events_group,
137 static inline struct list_head **
138 etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
140 return per_cpu_ptr(data->path, cpu);
143 static inline struct list_head *
144 etm_event_cpu_path(struct etm_event_data *data, int cpu)
146 return *etm_event_cpu_path_ptr(data, cpu);
149 static void etm_event_read(struct perf_event *event) {}
151 static int etm_addr_filters_alloc(struct perf_event *event)
153 struct etm_filters *filters;
154 int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
156 filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
161 memcpy(filters, event->parent->hw.addr_filters,
164 event->hw.addr_filters = filters;
169 static void etm_event_destroy(struct perf_event *event)
171 kfree(event->hw.addr_filters);
172 event->hw.addr_filters = NULL;
175 static int etm_event_init(struct perf_event *event)
179 if (event->attr.type != etm_pmu.type) {
184 ret = etm_addr_filters_alloc(event);
188 event->destroy = etm_event_destroy;
193 static void free_sink_buffer(struct etm_event_data *event_data)
196 cpumask_t *mask = &event_data->mask;
197 struct coresight_device *sink;
199 if (!event_data->snk_config)
202 if (WARN_ON(cpumask_empty(mask)))
205 cpu = cpumask_first(mask);
206 sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
207 sink_ops(sink)->free_buffer(event_data->snk_config);
210 static void free_event_data(struct work_struct *work)
214 struct etm_event_data *event_data;
216 event_data = container_of(work, struct etm_event_data, work);
217 mask = &event_data->mask;
219 /* Free the sink buffers, if there are any */
220 free_sink_buffer(event_data);
222 /* clear any configuration we were using */
223 if (event_data->cfg_hash)
224 cscfg_deactivate_config(event_data->cfg_hash);
226 for_each_cpu(cpu, mask) {
227 struct list_head **ppath;
229 ppath = etm_event_cpu_path_ptr(event_data, cpu);
230 if (!(IS_ERR_OR_NULL(*ppath)))
231 coresight_release_path(*ppath);
233 coresight_trace_id_put_cpu_id(cpu);
236 /* mark perf event as done for trace id allocator */
237 coresight_trace_id_perf_stop();
239 free_percpu(event_data->path);
243 static void *alloc_event_data(int cpu)
246 struct etm_event_data *event_data;
248 /* First get memory for the session's data */
249 event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
254 mask = &event_data->mask;
256 cpumask_set_cpu(cpu, mask);
258 cpumask_copy(mask, cpu_present_mask);
261 * Each CPU has a single path between source and destination. As such
262 * allocate an array using CPU numbers as indexes. That way a path
263 * for any CPU can easily be accessed at any given time. We proceed
264 * the same way for sessions involving a single CPU. The cost of
265 * unused memory when dealing with single CPU trace scenarios is small
266 * compared to the cost of searching through an optimized array.
268 event_data->path = alloc_percpu(struct list_head *);
270 if (!event_data->path) {
278 static void etm_free_aux(void *data)
280 struct etm_event_data *event_data = data;
282 schedule_work(&event_data->work);
286 * Check if two given sinks are compatible with each other,
287 * so that they can use the same sink buffers, when an event
290 static bool sinks_compatible(struct coresight_device *a,
291 struct coresight_device *b)
296 * If the sinks are of the same subtype and driven
297 * by the same driver, we can use the same buffer
300 return (a->subtype.sink_subtype == b->subtype.sink_subtype) &&
301 (sink_ops(a) == sink_ops(b));
304 static void *etm_setup_aux(struct perf_event *event, void **pages,
305 int nr_pages, bool overwrite)
308 int cpu = event->cpu;
311 struct coresight_device *sink = NULL;
312 struct coresight_device *user_sink = NULL, *last_sink = NULL;
313 struct etm_event_data *event_data = NULL;
315 event_data = alloc_event_data(cpu);
318 INIT_WORK(&event_data->work, free_event_data);
320 /* First get the selected sink from user space. */
321 if (event->attr.config2 & GENMASK_ULL(31, 0)) {
322 id = (u32)event->attr.config2;
323 sink = user_sink = coresight_get_sink_by_id(id);
326 /* tell the trace ID allocator that a perf event is starting up */
327 coresight_trace_id_perf_start();
329 /* check if user wants a coresight configuration selected */
330 cfg_hash = (u32)((event->attr.config2 & GENMASK_ULL(63, 32)) >> 32);
332 if (cscfg_activate_config(cfg_hash))
334 event_data->cfg_hash = cfg_hash;
337 mask = &event_data->mask;
340 * Setup the path for each CPU in a trace session. We try to build
341 * trace path for each CPU in the mask. If we don't find an ETM
342 * for the CPU or fail to build a path, we clear the CPU from the
343 * mask and continue with the rest. If ever we try to trace on those
344 * CPUs, we can handle it and fail the session.
346 for_each_cpu(cpu, mask) {
347 struct list_head *path;
348 struct coresight_device *csdev;
350 csdev = per_cpu(csdev_src, cpu);
352 * If there is no ETM associated with this CPU clear it from
353 * the mask and continue with the rest. If ever we try to trace
354 * on this CPU, we handle it accordingly.
357 cpumask_clear_cpu(cpu, mask);
362 * No sink provided - look for a default sink for all the ETMs,
363 * where this event can be scheduled.
364 * We allocate the sink specific buffers only once for this
365 * event. If the ETMs have different default sink devices, we
366 * can only use a single "type" of sink as the event can carry
367 * only one sink specific buffer. Thus we have to make sure
368 * that the sinks are of the same type and driven by the same
369 * driver, as the one we allocate the buffer for. As such
370 * we choose the first sink and check if the remaining ETMs
371 * have a compatible default sink. We don't trace on a CPU
372 * if the sink is not compatible.
375 /* Find the default sink for this ETM */
376 sink = coresight_find_default_sink(csdev);
378 cpumask_clear_cpu(cpu, mask);
382 /* Check if this sink compatible with the last sink */
383 if (last_sink && !sinks_compatible(last_sink, sink)) {
384 cpumask_clear_cpu(cpu, mask);
391 * Building a path doesn't enable it, it simply builds a
392 * list of devices from source to sink that can be
393 * referenced later when the path is actually needed.
395 path = coresight_build_path(csdev, sink);
397 cpumask_clear_cpu(cpu, mask);
401 /* ensure we can allocate a trace ID for this CPU */
402 trace_id = coresight_trace_id_get_cpu_id(cpu);
403 if (!IS_VALID_CS_TRACE_ID(trace_id)) {
404 cpumask_clear_cpu(cpu, mask);
405 coresight_release_path(path);
409 *etm_event_cpu_path_ptr(event_data, cpu) = path;
412 /* no sink found for any CPU - cannot trace */
416 /* If we don't have any CPUs ready for tracing, abort */
417 cpu = cpumask_first(mask);
418 if (cpu >= nr_cpu_ids)
421 if (!sink_ops(sink)->alloc_buffer || !sink_ops(sink)->free_buffer)
425 * Allocate the sink buffer for this session. All the sinks
426 * where this event can be scheduled are ensured to be of the
427 * same type. Thus the same sink configuration is used by the
430 event_data->snk_config =
431 sink_ops(sink)->alloc_buffer(sink, event, pages,
432 nr_pages, overwrite);
433 if (!event_data->snk_config)
440 etm_free_aux(event_data);
445 static void etm_event_start(struct perf_event *event, int flags)
447 int cpu = smp_processor_id();
448 struct etm_event_data *event_data;
449 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
450 struct perf_output_handle *handle = &ctxt->handle;
451 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
452 struct list_head *path;
458 /* Have we messed up our tracking ? */
459 if (WARN_ON(ctxt->event_data))
463 * Deal with the ring buffer API and get a handle on the
464 * session's information.
466 event_data = perf_aux_output_begin(handle, event);
471 * Check if this ETM is allowed to trace, as decided
472 * at etm_setup_aux(). This could be due to an unreachable
473 * sink from this ETM. We can't do much in this case if
474 * the sink was specified or hinted to the driver. For
475 * now, simply don't record anything on this ETM.
477 * As such we pretend that everything is fine, and let
478 * it continue without actually tracing. The event could
479 * continue tracing when it moves to a CPU where it is
480 * reachable to a sink.
482 if (!cpumask_test_cpu(cpu, &event_data->mask))
485 path = etm_event_cpu_path(event_data, cpu);
486 /* We need a sink, no need to continue without one */
487 sink = coresight_get_sink(path);
488 if (WARN_ON_ONCE(!sink))
491 /* Nothing will happen without a path */
492 if (coresight_enable_path(path, CS_MODE_PERF, handle))
495 /* Finally enable the tracer */
496 if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
497 goto fail_disable_path;
500 * output cpu / trace ID in perf record, once for the lifetime
503 if (!cpumask_test_cpu(cpu, &event_data->aux_hwid_done)) {
504 cpumask_set_cpu(cpu, &event_data->aux_hwid_done);
505 hw_id = FIELD_PREP(CS_AUX_HW_ID_VERSION_MASK,
506 CS_AUX_HW_ID_CURR_VERSION);
507 hw_id |= FIELD_PREP(CS_AUX_HW_ID_TRACE_ID_MASK,
508 coresight_trace_id_read_cpu_id(cpu));
509 perf_report_aux_output_id(event, hw_id);
513 /* Tell the perf core the event is alive */
515 /* Save the event_data for this ETM */
516 ctxt->event_data = event_data;
520 coresight_disable_path(path);
523 * Check if the handle is still associated with the event,
524 * to handle cases where if the sink failed to start the
525 * trace and TRUNCATED the handle already.
527 if (READ_ONCE(handle->event)) {
528 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
529 perf_aux_output_end(handle, 0);
532 event->hw.state = PERF_HES_STOPPED;
536 static void etm_event_stop(struct perf_event *event, int mode)
538 int cpu = smp_processor_id();
540 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
541 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
542 struct perf_output_handle *handle = &ctxt->handle;
543 struct etm_event_data *event_data;
544 struct list_head *path;
547 * If we still have access to the event_data via handle,
548 * confirm that we haven't messed up the tracking.
551 WARN_ON(perf_get_aux(handle) != ctxt->event_data))
554 event_data = ctxt->event_data;
555 /* Clear the event_data as this ETM is stopping the trace. */
556 ctxt->event_data = NULL;
558 if (event->hw.state == PERF_HES_STOPPED)
561 /* We must have a valid event_data for a running event */
562 if (WARN_ON(!event_data))
566 * Check if this ETM was allowed to trace, as decided at
567 * etm_setup_aux(). If it wasn't allowed to trace, then
568 * nothing needs to be torn down other than outputting a
571 if (handle->event && (mode & PERF_EF_UPDATE) &&
572 !cpumask_test_cpu(cpu, &event_data->mask)) {
573 event->hw.state = PERF_HES_STOPPED;
574 perf_aux_output_end(handle, 0);
581 path = etm_event_cpu_path(event_data, cpu);
585 sink = coresight_get_sink(path);
590 source_ops(csdev)->disable(csdev, event);
593 event->hw.state = PERF_HES_STOPPED;
596 * If the handle is not bound to an event anymore
597 * (e.g, the sink driver was unable to restart the
598 * handle due to lack of buffer space), we don't
599 * have to do anything here.
601 if (handle->event && (mode & PERF_EF_UPDATE)) {
602 if (WARN_ON_ONCE(handle->event != event))
605 /* update trace information */
606 if (!sink_ops(sink)->update_buffer)
609 size = sink_ops(sink)->update_buffer(sink, handle,
610 event_data->snk_config);
612 * Make sure the handle is still valid as the
613 * sink could have closed it from an IRQ.
614 * The sink driver must handle the race with
615 * update_buffer() and IRQ. Thus either we
616 * should get a valid handle and valid size
619 * But we should never get a non-zero size with
622 if (READ_ONCE(handle->event))
623 perf_aux_output_end(handle, size);
628 /* Disabling the path make its elements available to other sessions */
629 coresight_disable_path(path);
632 static int etm_event_add(struct perf_event *event, int mode)
635 struct hw_perf_event *hwc = &event->hw;
637 if (mode & PERF_EF_START) {
638 etm_event_start(event, 0);
639 if (hwc->state & PERF_HES_STOPPED)
642 hwc->state = PERF_HES_STOPPED;
648 static void etm_event_del(struct perf_event *event, int mode)
650 etm_event_stop(event, PERF_EF_UPDATE);
653 static int etm_addr_filters_validate(struct list_head *filters)
655 bool range = false, address = false;
657 struct perf_addr_filter *filter;
659 list_for_each_entry(filter, filters, entry) {
661 * No need to go further if there's no more
664 if (++index > ETM_ADDR_CMP_MAX)
667 /* filter::size==0 means single address trigger */
670 * The existing code relies on START/STOP filters
671 * being address filters.
673 if (filter->action == PERF_ADDR_FILTER_ACTION_START ||
674 filter->action == PERF_ADDR_FILTER_ACTION_STOP)
682 * At this time we don't allow range and start/stop filtering
683 * to cohabitate, they have to be mutually exclusive.
685 if (range && address)
692 static void etm_addr_filters_sync(struct perf_event *event)
694 struct perf_addr_filters_head *head = perf_event_addr_filters(event);
695 unsigned long start, stop;
696 struct perf_addr_filter_range *fr = event->addr_filter_ranges;
697 struct etm_filters *filters = event->hw.addr_filters;
698 struct etm_filter *etm_filter;
699 struct perf_addr_filter *filter;
702 list_for_each_entry(filter, &head->list, entry) {
704 stop = start + fr[i].size;
705 etm_filter = &filters->etm_filter[i];
707 switch (filter->action) {
708 case PERF_ADDR_FILTER_ACTION_FILTER:
709 etm_filter->start_addr = start;
710 etm_filter->stop_addr = stop;
711 etm_filter->type = ETM_ADDR_TYPE_RANGE;
713 case PERF_ADDR_FILTER_ACTION_START:
714 etm_filter->start_addr = start;
715 etm_filter->type = ETM_ADDR_TYPE_START;
717 case PERF_ADDR_FILTER_ACTION_STOP:
718 etm_filter->stop_addr = stop;
719 etm_filter->type = ETM_ADDR_TYPE_STOP;
725 filters->nr_filters = i;
728 int etm_perf_symlink(struct coresight_device *csdev, bool link)
730 char entry[sizeof("cpu9999999")];
731 int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
732 struct device *pmu_dev = etm_pmu.dev;
733 struct device *cs_dev = &csdev->dev;
735 sprintf(entry, "cpu%d", cpu);
738 return -EPROBE_DEFER;
741 ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry);
744 per_cpu(csdev_src, cpu) = csdev;
746 sysfs_remove_link(&pmu_dev->kobj, entry);
747 per_cpu(csdev_src, cpu) = NULL;
752 EXPORT_SYMBOL_GPL(etm_perf_symlink);
754 static ssize_t etm_perf_sink_name_show(struct device *dev,
755 struct device_attribute *dattr,
758 struct dev_ext_attribute *ea;
760 ea = container_of(dattr, struct dev_ext_attribute, attr);
761 return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var));
764 static struct dev_ext_attribute *
765 etm_perf_add_symlink_group(struct device *dev, const char *name, const char *group_name)
767 struct dev_ext_attribute *ea;
770 struct device *pmu_dev = etm_pmu.dev;
773 return ERR_PTR(-EPROBE_DEFER);
775 ea = devm_kzalloc(dev, sizeof(*ea), GFP_KERNEL);
777 return ERR_PTR(-ENOMEM);
780 * If this function is called adding a sink then the hash is used for
781 * sink selection - see function coresight_get_sink_by_id().
782 * If adding a configuration then the hash is used for selection in
783 * cscfg_activate_config()
785 hash = hashlen_hash(hashlen_string(NULL, name));
787 sysfs_attr_init(&ea->attr.attr);
788 ea->attr.attr.name = devm_kstrdup(dev, name, GFP_KERNEL);
789 if (!ea->attr.attr.name)
790 return ERR_PTR(-ENOMEM);
792 ea->attr.attr.mode = 0444;
793 ea->var = (unsigned long *)hash;
795 ret = sysfs_add_file_to_group(&pmu_dev->kobj,
796 &ea->attr.attr, group_name);
798 return ret ? ERR_PTR(ret) : ea;
801 int etm_perf_add_symlink_sink(struct coresight_device *csdev)
804 struct device *dev = &csdev->dev;
807 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
808 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
811 if (csdev->ea != NULL)
814 name = dev_name(dev);
815 csdev->ea = etm_perf_add_symlink_group(dev, name, "sinks");
816 if (IS_ERR(csdev->ea)) {
817 err = PTR_ERR(csdev->ea);
820 csdev->ea->attr.show = etm_perf_sink_name_show;
825 static void etm_perf_del_symlink_group(struct dev_ext_attribute *ea, const char *group_name)
827 struct device *pmu_dev = etm_pmu.dev;
829 sysfs_remove_file_from_group(&pmu_dev->kobj,
830 &ea->attr.attr, group_name);
833 void etm_perf_del_symlink_sink(struct coresight_device *csdev)
835 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
836 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
842 etm_perf_del_symlink_group(csdev->ea, "sinks");
846 static ssize_t etm_perf_cscfg_event_show(struct device *dev,
847 struct device_attribute *dattr,
850 struct dev_ext_attribute *ea;
852 ea = container_of(dattr, struct dev_ext_attribute, attr);
853 return scnprintf(buf, PAGE_SIZE, "configid=0x%lx\n", (unsigned long)(ea->var));
856 int etm_perf_add_symlink_cscfg(struct device *dev, struct cscfg_config_desc *config_desc)
860 if (config_desc->event_ea != NULL)
863 config_desc->event_ea = etm_perf_add_symlink_group(dev, config_desc->name, "events");
865 /* set the show function to the custom cscfg event */
866 if (!IS_ERR(config_desc->event_ea))
867 config_desc->event_ea->attr.show = etm_perf_cscfg_event_show;
869 err = PTR_ERR(config_desc->event_ea);
870 config_desc->event_ea = NULL;
876 void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc)
878 if (!config_desc->event_ea)
881 etm_perf_del_symlink_group(config_desc->event_ea, "events");
882 config_desc->event_ea = NULL;
885 int __init etm_perf_init(void)
889 etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE |
890 PERF_PMU_CAP_ITRACE);
892 etm_pmu.attr_groups = etm_pmu_attr_groups;
893 etm_pmu.task_ctx_nr = perf_sw_context;
894 etm_pmu.read = etm_event_read;
895 etm_pmu.event_init = etm_event_init;
896 etm_pmu.setup_aux = etm_setup_aux;
897 etm_pmu.free_aux = etm_free_aux;
898 etm_pmu.start = etm_event_start;
899 etm_pmu.stop = etm_event_stop;
900 etm_pmu.add = etm_event_add;
901 etm_pmu.del = etm_event_del;
902 etm_pmu.addr_filters_sync = etm_addr_filters_sync;
903 etm_pmu.addr_filters_validate = etm_addr_filters_validate;
904 etm_pmu.nr_addr_filters = ETM_ADDR_CMP_MAX;
905 etm_pmu.module = THIS_MODULE;
907 ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
914 void etm_perf_exit(void)
916 perf_pmu_unregister(&etm_pmu);