drivers/hwtracing/coresight/coresight-etb10.c

   1 /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
   2  *
   3  * Description: CoreSight Embedded Trace Buffer driver
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 and
   7  * only version 2 as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <asm/local.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/types.h>
  19 #include <linux/device.h>
  20 #include <linux/io.h>
  21 #include <linux/err.h>
  22 #include <linux/fs.h>
  23 #include <linux/miscdevice.h>
  24 #include <linux/uaccess.h>
  25 #include <linux/slab.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/pm_runtime.h>
  28 #include <linux/seq_file.h>
  29 #include <linux/coresight.h>
  30 #include <linux/amba/bus.h>
  31 #include <linux/clk.h>
  32 #include <linux/circ_buf.h>
  33 #include <linux/mm.h>
  34 #include <linux/perf_event.h>
  35
  36 #include <asm/local.h>
  37
  38 #include "coresight-priv.h"
  39
  40 #define ETB_RAM_DEPTH_REG       0x004
  41 #define ETB_STATUS_REG          0x00c
  42 #define ETB_RAM_READ_DATA_REG   0x010
  43 #define ETB_RAM_READ_POINTER    0x014
  44 #define ETB_RAM_WRITE_POINTER   0x018
  45 #define ETB_TRG                 0x01c
  46 #define ETB_CTL_REG             0x020
  47 #define ETB_RWD_REG             0x024
  48 #define ETB_FFSR                0x300
  49 #define ETB_FFCR                0x304
  50 #define ETB_ITMISCOP0           0xee0
  51 #define ETB_ITTRFLINACK         0xee4
  52 #define ETB_ITTRFLIN            0xee8
  53 #define ETB_ITATBDATA0          0xeeC
  54 #define ETB_ITATBCTR2           0xef0
  55 #define ETB_ITATBCTR1           0xef4
  56 #define ETB_ITATBCTR0           0xef8
  57
  58 /* register description */
  59 /* STS - 0x00C */
  60 #define ETB_STATUS_RAM_FULL     BIT(0)
  61 /* CTL - 0x020 */
  62 #define ETB_CTL_CAPT_EN         BIT(0)
  63 /* FFCR - 0x304 */
  64 #define ETB_FFCR_EN_FTC         BIT(0)
  65 #define ETB_FFCR_FON_MAN        BIT(6)
  66 #define ETB_FFCR_STOP_FI        BIT(12)
  67 #define ETB_FFCR_STOP_TRIGGER   BIT(13)
  68
  69 #define ETB_FFCR_BIT            6
  70 #define ETB_FFSR_BIT            1
  71 #define ETB_FRAME_SIZE_WORDS    4
  72
  73 /**
  74  * struct etb_drvdata - specifics associated to an ETB component
  75  * @base:       memory mapped base address for this component.
  76  * @dev:        the device entity associated to this component.
  77  * @atclk:      optional clock for the core parts of the ETB.
  78  * @csdev:      component vitals needed by the framework.
  79  * @miscdev:    specifics to handle "/dev/xyz.etb" entry.
  80  * @spinlock:   only one at a time pls.
  81  * @reading:    synchronise user space access to etb buffer.
  82  * @mode:       this ETB is being used.
  83  * @buf:        area of memory where ETB buffer content gets sent.
  84  * @buffer_depth: size of @buf.
  85  * @trigger_cntr: amount of words to store after a trigger.
  86  */
  87 struct etb_drvdata {
  88         void __iomem            *base;
  89         struct device           *dev;
  90         struct clk              *atclk;
  91         struct coresight_device *csdev;
  92         struct miscdevice       miscdev;
  93         spinlock_t              spinlock;
  94         local_t                 reading;
  95         local_t                 mode;
  96         u8                      *buf;
  97         u32                     buffer_depth;
  98         u32                     trigger_cntr;
  99 };
 100
 101 static unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata)
 102 {
 103         u32 depth = 0;
 104
 105         pm_runtime_get_sync(drvdata->dev);
 106
 107         /* RO registers don't need locking */
 108         depth = readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG);
 109
 110         pm_runtime_put(drvdata->dev);
 111         return depth;
 112 }
 113
 114 static void etb_enable_hw(struct etb_drvdata *drvdata)
 115 {
 116         int i;
 117         u32 depth;
 118
 119         CS_UNLOCK(drvdata->base);
 120
 121         depth = drvdata->buffer_depth;
 122         /* reset write RAM pointer address */
 123         writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
 124         /* clear entire RAM buffer */
 125         for (i = 0; i < depth; i++)
 126                 writel_relaxed(0x0, drvdata->base + ETB_RWD_REG);
 127
 128         /* reset write RAM pointer address */
 129         writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
 130         /* reset read RAM pointer address */
 131         writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
 132
 133         writel_relaxed(drvdata->trigger_cntr, drvdata->base + ETB_TRG);
 134         writel_relaxed(ETB_FFCR_EN_FTC | ETB_FFCR_STOP_TRIGGER,
 135                        drvdata->base + ETB_FFCR);
 136         /* ETB trace capture enable */
 137         writel_relaxed(ETB_CTL_CAPT_EN, drvdata->base + ETB_CTL_REG);
 138
 139         CS_LOCK(drvdata->base);
 140 }
 141
 142 static int etb_enable(struct coresight_device *csdev, u32 mode)
 143 {
 144         u32 val;
 145         unsigned long flags;
 146         struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 147
 148         val = local_cmpxchg(&drvdata->mode,
 149                             CS_MODE_DISABLED, mode);
 150         /*
 151          * When accessing from Perf, a HW buffer can be handled
 152          * by a single trace entity.  In sysFS mode many tracers
 153          * can be logging to the same HW buffer.
 154          */
 155         if (val == CS_MODE_PERF)
 156                 return -EBUSY;
 157
 158         /* Don't let perf disturb sysFS sessions */
 159         if (val == CS_MODE_SYSFS && mode == CS_MODE_PERF)
 160                 return -EBUSY;
 161
 162         /* Nothing to do, the tracer is already enabled. */
 163         if (val == CS_MODE_SYSFS)
 164                 goto out;
 165
 166         spin_lock_irqsave(&drvdata->spinlock, flags);
 167         etb_enable_hw(drvdata);
 168         spin_unlock_irqrestore(&drvdata->spinlock, flags);
 169
 170 out:
 171         dev_info(drvdata->dev, "ETB enabled\n");
 172         return 0;
 173 }
 174
 175 static void etb_disable_hw(struct etb_drvdata *drvdata)
 176 {
 177         u32 ffcr;
 178
 179         CS_UNLOCK(drvdata->base);
 180
 181         ffcr = readl_relaxed(drvdata->base + ETB_FFCR);
 182         /* stop formatter when a stop has completed */
 183         ffcr |= ETB_FFCR_STOP_FI;
 184         writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
 185         /* manually generate a flush of the system */
 186         ffcr |= ETB_FFCR_FON_MAN;
 187         writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
 188
 189         if (coresight_timeout(drvdata->base, ETB_FFCR, ETB_FFCR_BIT, 0)) {
 190                 dev_err(drvdata->dev,
 191                 "timeout while waiting for completion of Manual Flush\n");
 192         }
 193
 194         /* disable trace capture */
 195         writel_relaxed(0x0, drvdata->base + ETB_CTL_REG);
 196
 197         if (coresight_timeout(drvdata->base, ETB_FFSR, ETB_FFSR_BIT, 1)) {
 198                 dev_err(drvdata->dev,
 199                         "timeout while waiting for Formatter to Stop\n");
 200         }
 201
 202         CS_LOCK(drvdata->base);
 203 }
 204
 205 static void etb_dump_hw(struct etb_drvdata *drvdata)
 206 {
 207         int i;
 208         u8 *buf_ptr;
 209         u32 read_data, depth;
 210         u32 read_ptr, write_ptr;
 211         u32 frame_off, frame_endoff;
 212
 213         CS_UNLOCK(drvdata->base);
 214
 215         read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
 216         write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
 217
 218         frame_off = write_ptr % ETB_FRAME_SIZE_WORDS;
 219         frame_endoff = ETB_FRAME_SIZE_WORDS - frame_off;
 220         if (frame_off) {
 221                 dev_err(drvdata->dev,
 222                         "write_ptr: %lu not aligned to formatter frame size\n",
 223                         (unsigned long)write_ptr);
 224                 dev_err(drvdata->dev, "frameoff: %lu, frame_endoff: %lu\n",
 225                         (unsigned long)frame_off, (unsigned long)frame_endoff);
 226                 write_ptr += frame_endoff;
 227         }
 228
 229         if ((readl_relaxed(drvdata->base + ETB_STATUS_REG)
 230                       & ETB_STATUS_RAM_FULL) == 0)
 231                 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
 232         else
 233                 writel_relaxed(write_ptr, drvdata->base + ETB_RAM_READ_POINTER);
 234
 235         depth = drvdata->buffer_depth;
 236         buf_ptr = drvdata->buf;
 237         for (i = 0; i < depth; i++) {
 238                 read_data = readl_relaxed(drvdata->base +
 239                                           ETB_RAM_READ_DATA_REG);
 240                 *buf_ptr++ = read_data >> 0;
 241                 *buf_ptr++ = read_data >> 8;
 242                 *buf_ptr++ = read_data >> 16;
 243                 *buf_ptr++ = read_data >> 24;
 244         }
 245
 246         if (frame_off) {
 247                 buf_ptr -= (frame_endoff * 4);
 248                 for (i = 0; i < frame_endoff; i++) {
 249                         *buf_ptr++ = 0x0;
 250                         *buf_ptr++ = 0x0;
 251                         *buf_ptr++ = 0x0;
 252                         *buf_ptr++ = 0x0;
 253                 }
 254         }
 255
 256         writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
 257
 258         CS_LOCK(drvdata->base);
 259 }
 260
 261 static void etb_disable(struct coresight_device *csdev)
 262 {
 263         struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 264         unsigned long flags;
 265
 266         spin_lock_irqsave(&drvdata->spinlock, flags);
 267         etb_disable_hw(drvdata);
 268         etb_dump_hw(drvdata);
 269         spin_unlock_irqrestore(&drvdata->spinlock, flags);
 270
 271         local_set(&drvdata->mode, CS_MODE_DISABLED);
 272
 273         dev_info(drvdata->dev, "ETB disabled\n");
 274 }
 275
 276 static void *etb_alloc_buffer(struct coresight_device *csdev, int cpu,
 277                               void **pages, int nr_pages, bool overwrite)
 278 {
 279         int node;
 280         struct cs_buffers *buf;
 281
 282         node = (cpu == -1) ? NUMA_NO_NODE : cpu_to_node(cpu);
 283
 284         buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
 285         if (!buf)
 286                 return NULL;
 287
 288         buf->snapshot = overwrite;
 289         buf->nr_pages = nr_pages;
 290         buf->data_pages = pages;
 291
 292         return buf;
 293 }
 294
 295 static void etb_free_buffer(void *config)
 296 {
 297         struct cs_buffers *buf = config;
 298
 299         kfree(buf);
 300 }
 301
 302 static int etb_set_buffer(struct coresight_device *csdev,
 303                           struct perf_output_handle *handle,
 304                           void *sink_config)
 305 {
 306         int ret = 0;
 307         unsigned long head;
 308         struct cs_buffers *buf = sink_config;
 309
 310         /* wrap head around to the amount of space we have */
 311         head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
 312
 313         /* find the page to write to */
 314         buf->cur = head / PAGE_SIZE;
 315
 316         /* and offset within that page */
 317         buf->offset = head % PAGE_SIZE;
 318
 319         local_set(&buf->data_size, 0);
 320
 321         return ret;
 322 }
 323
 324 static unsigned long etb_reset_buffer(struct coresight_device *csdev,
 325                                       struct perf_output_handle *handle,
 326                                       void *sink_config, bool *lost)
 327 {
 328         unsigned long size = 0;
 329         struct cs_buffers *buf = sink_config;
 330
 331         if (buf) {
 332                 /*
 333                  * In snapshot mode ->data_size holds the new address of the
 334                  * ring buffer's head.  The size itself is the whole address
 335                  * range since we want the latest information.
 336                  */
 337                 if (buf->snapshot)
 338                         handle->head = local_xchg(&buf->data_size,
 339                                                   buf->nr_pages << PAGE_SHIFT);
 340
 341                 /*
 342                  * Tell the tracer PMU how much we got in this run and if
 343                  * something went wrong along the way.  Nobody else can use
 344                  * this cs_buffers instance until we are done.  As such
 345                  * resetting parameters here and squaring off with the ring
 346                  * buffer API in the tracer PMU is fine.
 347                  */
 348                 *lost = !!local_xchg(&buf->lost, 0);
 349                 size = local_xchg(&buf->data_size, 0);
 350         }
 351
 352         return size;
 353 }
 354
 355 static void etb_update_buffer(struct coresight_device *csdev,
 356                               struct perf_output_handle *handle,
 357                               void *sink_config)
 358 {
 359         int i, cur;
 360         u8 *buf_ptr;
 361         u32 read_ptr, write_ptr, capacity;
 362         u32 status, read_data, to_read;
 363         unsigned long offset;
 364         struct cs_buffers *buf = sink_config;
 365         struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 366
 367         if (!buf)
 368                 return;
 369
 370         capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS;
 371
 372         CS_UNLOCK(drvdata->base);
 373         etb_disable_hw(drvdata);
 374
 375         /* unit is in words, not bytes */
 376         read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
 377         write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
 378
 379         /*
 380          * Entries should be aligned to the frame size.  If they are not
 381          * go back to the last alignement point to give decoding tools a
 382          * chance to fix things.
 383          */
 384         if (write_ptr % ETB_FRAME_SIZE_WORDS) {
 385                 dev_err(drvdata->dev,
 386                         "write_ptr: %lu not aligned to formatter frame size\n",
 387                         (unsigned long)write_ptr);
 388
 389                 write_ptr &= ~(ETB_FRAME_SIZE_WORDS - 1);
 390                 local_inc(&buf->lost);
 391         }
 392
 393         /*
 394          * Get a hold of the status register and see if a wrap around
 395          * has occurred.  If so adjust things accordingly.  Otherwise
 396          * start at the beginning and go until the write pointer has
 397          * been reached.
 398          */
 399         status = readl_relaxed(drvdata->base + ETB_STATUS_REG);
 400         if (status & ETB_STATUS_RAM_FULL) {
 401                 local_inc(&buf->lost);
 402                 to_read = capacity;
 403                 read_ptr = write_ptr;
 404         } else {
 405                 to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->buffer_depth);
 406                 to_read *= ETB_FRAME_SIZE_WORDS;
 407         }
 408
 409         /*
 410          * Make sure we don't overwrite data that hasn't been consumed yet.
 411          * It is entirely possible that the HW buffer has more data than the
 412          * ring buffer can currently handle.  If so adjust the start address
 413          * to take only the last traces.
 414          *
 415          * In snapshot mode we are looking to get the latest traces only and as
 416          * such, we don't care about not overwriting data that hasn't been
 417          * processed by user space.
 418          */
 419         if (!buf->snapshot && to_read > handle->size) {
 420                 u32 mask = ~(ETB_FRAME_SIZE_WORDS - 1);
 421
 422                 /* The new read pointer must be frame size aligned */
 423                 to_read = handle->size & mask;
 424                 /*
 425                  * Move the RAM read pointer up, keeping in mind that
 426                  * everything is in frame size units.
 427                  */
 428                 read_ptr = (write_ptr + drvdata->buffer_depth) -
 429                                         to_read / ETB_FRAME_SIZE_WORDS;
 430                 /* Wrap around if need be*/
 431                 if (read_ptr > (drvdata->buffer_depth - 1))
 432                         read_ptr -= drvdata->buffer_depth;
 433                 /* let the decoder know we've skipped ahead */
 434                 local_inc(&buf->lost);
 435         }
 436
 437         /* finally tell HW where we want to start reading from */
 438         writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
 439
 440         cur = buf->cur;
 441         offset = buf->offset;
 442         for (i = 0; i < to_read; i += 4) {
 443                 buf_ptr = buf->data_pages[cur] + offset;
 444                 read_data = readl_relaxed(drvdata->base +
 445                                           ETB_RAM_READ_DATA_REG);
 446                 *buf_ptr++ = read_data >> 0;
 447                 *buf_ptr++ = read_data >> 8;
 448                 *buf_ptr++ = read_data >> 16;
 449                 *buf_ptr++ = read_data >> 24;
 450
 451                 offset += 4;
 452                 if (offset >= PAGE_SIZE) {
 453                         offset = 0;
 454                         cur++;
 455                         /* wrap around at the end of the buffer */
 456                         cur &= buf->nr_pages - 1;
 457                 }
 458         }
 459
 460         /* reset ETB buffer for next run */
 461         writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
 462         writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
 463
 464         /*
 465          * In snapshot mode all we have to do is communicate to
 466          * perf_aux_output_end() the address of the current head.  In full
 467          * trace mode the same function expects a size to move rb->aux_head
 468          * forward.
 469          */
 470         if (buf->snapshot)
 471                 local_set(&buf->data_size, (cur * PAGE_SIZE) + offset);
 472         else
 473                 local_add(to_read, &buf->data_size);
 474
 475         etb_enable_hw(drvdata);
 476         CS_LOCK(drvdata->base);
 477 }
 478
 479 static const struct coresight_ops_sink etb_sink_ops = {
 480         .enable         = etb_enable,
 481         .disable        = etb_disable,
 482         .alloc_buffer   = etb_alloc_buffer,
 483         .free_buffer    = etb_free_buffer,
 484         .set_buffer     = etb_set_buffer,
 485         .reset_buffer   = etb_reset_buffer,
 486         .update_buffer  = etb_update_buffer,
 487 };
 488
 489 static const struct coresight_ops etb_cs_ops = {
 490         .sink_ops       = &etb_sink_ops,
 491 };
 492
 493 static void etb_dump(struct etb_drvdata *drvdata)
 494 {
 495         unsigned long flags;
 496
 497         spin_lock_irqsave(&drvdata->spinlock, flags);
 498         if (local_read(&drvdata->mode) == CS_MODE_SYSFS) {
 499                 etb_disable_hw(drvdata);
 500                 etb_dump_hw(drvdata);
 501                 etb_enable_hw(drvdata);
 502         }
 503         spin_unlock_irqrestore(&drvdata->spinlock, flags);
 504
 505         dev_info(drvdata->dev, "ETB dumped\n");
 506 }
 507
 508 static int etb_open(struct inode *inode, struct file *file)
 509 {
 510         struct etb_drvdata *drvdata = container_of(file->private_data,
 511                                                    struct etb_drvdata, miscdev);
 512
 513         if (local_cmpxchg(&drvdata->reading, 0, 1))
 514                 return -EBUSY;
 515
 516         dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__);
 517         return 0;
 518 }
 519
 520 static ssize_t etb_read(struct file *file, char __user *data,
 521                                 size_t len, loff_t *ppos)
 522 {
 523         u32 depth;
 524         struct etb_drvdata *drvdata = container_of(file->private_data,
 525                                                    struct etb_drvdata, miscdev);
 526
 527         etb_dump(drvdata);
 528
 529         depth = drvdata->buffer_depth;
 530         if (*ppos + len > depth * 4)
 531                 len = depth * 4 - *ppos;
 532
 533         if (copy_to_user(data, drvdata->buf + *ppos, len)) {
 534                 dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__);
 535                 return -EFAULT;
 536         }
 537
 538         *ppos += len;
 539
 540         dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n",
 541                 __func__, len, (int)(depth * 4 - *ppos));
 542         return len;
 543 }
 544
 545 static int etb_release(struct inode *inode, struct file *file)
 546 {
 547         struct etb_drvdata *drvdata = container_of(file->private_data,
 548                                                    struct etb_drvdata, miscdev);
 549         local_set(&drvdata->reading, 0);
 550
 551         dev_dbg(drvdata->dev, "%s: released\n", __func__);
 552         return 0;
 553 }
 554
 555 static const struct file_operations etb_fops = {
 556         .owner          = THIS_MODULE,
 557         .open           = etb_open,
 558         .read           = etb_read,
 559         .release        = etb_release,
 560         .llseek         = no_llseek,
 561 };
 562
 563 #define coresight_etb10_simple_func(name, offset)                       \
 564         coresight_simple_func(struct etb_drvdata, NULL, name, offset)
 565
 566 coresight_etb10_simple_func(rdp, ETB_RAM_DEPTH_REG);
 567 coresight_etb10_simple_func(sts, ETB_STATUS_REG);
 568 coresight_etb10_simple_func(rrp, ETB_RAM_READ_POINTER);
 569 coresight_etb10_simple_func(rwp, ETB_RAM_WRITE_POINTER);
 570 coresight_etb10_simple_func(trg, ETB_TRG);
 571 coresight_etb10_simple_func(ctl, ETB_CTL_REG);
 572 coresight_etb10_simple_func(ffsr, ETB_FFSR);
 573 coresight_etb10_simple_func(ffcr, ETB_FFCR);
 574
 575 static struct attribute *coresight_etb_mgmt_attrs[] = {
 576         &dev_attr_rdp.attr,
 577         &dev_attr_sts.attr,
 578         &dev_attr_rrp.attr,
 579         &dev_attr_rwp.attr,
 580         &dev_attr_trg.attr,
 581         &dev_attr_ctl.attr,
 582         &dev_attr_ffsr.attr,
 583         &dev_attr_ffcr.attr,
 584         NULL,
 585 };
 586
 587 static ssize_t trigger_cntr_show(struct device *dev,
 588                             struct device_attribute *attr, char *buf)
 589 {
 590         struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
 591         unsigned long val = drvdata->trigger_cntr;
 592
 593         return sprintf(buf, "%#lx\n", val);
 594 }
 595
 596 static ssize_t trigger_cntr_store(struct device *dev,
 597                              struct device_attribute *attr,
 598                              const char *buf, size_t size)
 599 {
 600         int ret;
 601         unsigned long val;
 602         struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
 603
 604         ret = kstrtoul(buf, 16, &val);
 605         if (ret)
 606                 return ret;
 607
 608         drvdata->trigger_cntr = val;
 609         return size;
 610 }
 611 static DEVICE_ATTR_RW(trigger_cntr);
 612
 613 static struct attribute *coresight_etb_attrs[] = {
 614         &dev_attr_trigger_cntr.attr,
 615         NULL,
 616 };
 617
 618 static const struct attribute_group coresight_etb_group = {
 619         .attrs = coresight_etb_attrs,
 620 };
 621
 622 static const struct attribute_group coresight_etb_mgmt_group = {
 623         .attrs = coresight_etb_mgmt_attrs,
 624         .name = "mgmt",
 625 };
 626
 627 const struct attribute_group *coresight_etb_groups[] = {
 628         &coresight_etb_group,
 629         &coresight_etb_mgmt_group,
 630         NULL,
 631 };
 632
 633 static int etb_probe(struct amba_device *adev, const struct amba_id *id)
 634 {
 635         int ret;
 636         void __iomem *base;
 637         struct device *dev = &adev->dev;
 638         struct coresight_platform_data *pdata = NULL;
 639         struct etb_drvdata *drvdata;
 640         struct resource *res = &adev->res;
 641         struct coresight_desc desc = { 0 };
 642         struct device_node *np = adev->dev.of_node;
 643
 644         if (np) {
 645                 pdata = of_get_coresight_platform_data(dev, np);
 646                 if (IS_ERR(pdata))
 647                         return PTR_ERR(pdata);
 648                 adev->dev.platform_data = pdata;
 649         }
 650
 651         drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
 652         if (!drvdata)
 653                 return -ENOMEM;
 654
 655         drvdata->dev = &adev->dev;
 656         drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
 657         if (!IS_ERR(drvdata->atclk)) {
 658                 ret = clk_prepare_enable(drvdata->atclk);
 659                 if (ret)
 660                         return ret;
 661         }
 662         dev_set_drvdata(dev, drvdata);
 663
 664         /* validity for the resource is already checked by the AMBA core */
 665         base = devm_ioremap_resource(dev, res);
 666         if (IS_ERR(base))
 667                 return PTR_ERR(base);
 668
 669         drvdata->base = base;
 670
 671         spin_lock_init(&drvdata->spinlock);
 672
 673         drvdata->buffer_depth = etb_get_buffer_depth(drvdata);
 674         pm_runtime_put(&adev->dev);
 675
 676         if (drvdata->buffer_depth & 0x80000000)
 677                 return -EINVAL;
 678
 679         drvdata->buf = devm_kzalloc(dev,
 680                                     drvdata->buffer_depth * 4, GFP_KERNEL);
 681         if (!drvdata->buf) {
 682                 dev_err(dev, "Failed to allocate %u bytes for buffer data\n",
 683                         drvdata->buffer_depth * 4);
 684                 return -ENOMEM;
 685         }
 686
 687         desc.type = CORESIGHT_DEV_TYPE_SINK;
 688         desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
 689         desc.ops = &etb_cs_ops;
 690         desc.pdata = pdata;
 691         desc.dev = dev;
 692         desc.groups = coresight_etb_groups;
 693         drvdata->csdev = coresight_register(&desc);
 694         if (IS_ERR(drvdata->csdev))
 695                 return PTR_ERR(drvdata->csdev);
 696
 697         drvdata->miscdev.name = pdata->name;
 698         drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
 699         drvdata->miscdev.fops = &etb_fops;
 700         ret = misc_register(&drvdata->miscdev);
 701         if (ret)
 702                 goto err_misc_register;
 703
 704         return 0;
 705
 706 err_misc_register:
 707         coresight_unregister(drvdata->csdev);
 708         return ret;
 709 }
 710
 711 #ifdef CONFIG_PM
 712 static int etb_runtime_suspend(struct device *dev)
 713 {
 714         struct etb_drvdata *drvdata = dev_get_drvdata(dev);
 715
 716         if (drvdata && !IS_ERR(drvdata->atclk))
 717                 clk_disable_unprepare(drvdata->atclk);
 718
 719         return 0;
 720 }
 721
 722 static int etb_runtime_resume(struct device *dev)
 723 {
 724         struct etb_drvdata *drvdata = dev_get_drvdata(dev);
 725
 726         if (drvdata && !IS_ERR(drvdata->atclk))
 727                 clk_prepare_enable(drvdata->atclk);
 728
 729         return 0;
 730 }
 731 #endif
 732
 733 static const struct dev_pm_ops etb_dev_pm_ops = {
 734         SET_RUNTIME_PM_OPS(etb_runtime_suspend, etb_runtime_resume, NULL)
 735 };
 736
 737 static struct amba_id etb_ids[] = {
 738         {
 739                 .id     = 0x0003b907,
 740                 .mask   = 0x0003ffff,
 741         },
 742         { 0, 0},
 743 };
 744
 745 static struct amba_driver etb_driver = {
 746         .drv = {
 747                 .name   = "coresight-etb10",
 748                 .owner  = THIS_MODULE,
 749                 .pm     = &etb_dev_pm_ops,
 750                 .suppress_bind_attrs = true,
 751
 752         },
 753         .probe          = etb_probe,
 754         .id_table       = etb_ids,
 755 };
 756 builtin_amba_driver(etb_driver);