2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
41 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
42 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
43 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3
46 * #temp lists the number of monitored temperature sources (first value) plus
47 * the number of directly connectable temperature sensors (second value).
50 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
52 #include <linux/module.h>
53 #include <linux/init.h>
54 #include <linux/slab.h>
55 #include <linux/jiffies.h>
56 #include <linux/platform_device.h>
57 #include <linux/hwmon.h>
58 #include <linux/hwmon-sysfs.h>
59 #include <linux/hwmon-vid.h>
60 #include <linux/err.h>
61 #include <linux/mutex.h>
62 #include <linux/acpi.h>
63 #include <linux/bitops.h>
64 #include <linux/dmi.h>
66 #include <linux/nospec.h>
71 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793,
74 /* used to set data->name = nct6775_device_names[data->sio_kind] */
75 static const char * const nct6775_device_names[] = {
86 static const char * const nct6775_sio_names[] __initconst = {
97 static unsigned short force_id;
98 module_param(force_id, ushort, 0);
99 MODULE_PARM_DESC(force_id, "Override the detected device ID");
101 static unsigned short fan_debounce;
102 module_param(fan_debounce, ushort, 0);
103 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
105 #define DRVNAME "nct6775"
108 * Super-I/O constants and functions
111 #define NCT6775_LD_ACPI 0x0a
112 #define NCT6775_LD_HWM 0x0b
113 #define NCT6775_LD_VID 0x0d
114 #define NCT6775_LD_12 0x12
116 #define SIO_REG_LDSEL 0x07 /* Logical device select */
117 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
118 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
119 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
121 #define SIO_NCT6106_ID 0xc450
122 #define SIO_NCT6775_ID 0xb470
123 #define SIO_NCT6776_ID 0xc330
124 #define SIO_NCT6779_ID 0xc560
125 #define SIO_NCT6791_ID 0xc800
126 #define SIO_NCT6792_ID 0xc910
127 #define SIO_NCT6793_ID 0xd120
128 #define SIO_NCT6795_ID 0xd350
129 #define SIO_ID_MASK 0xFFF0
131 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
134 superio_outb(int ioreg, int reg, int val)
137 outb(val, ioreg + 1);
141 superio_inb(int ioreg, int reg)
144 return inb(ioreg + 1);
148 superio_select(int ioreg, int ld)
150 outb(SIO_REG_LDSEL, ioreg);
155 superio_enter(int ioreg)
158 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
160 if (!request_muxed_region(ioreg, 2, DRVNAME))
170 superio_exit(int ioreg)
174 outb(0x02, ioreg + 1);
175 release_region(ioreg, 2);
182 #define IOREGION_ALIGNMENT (~7)
183 #define IOREGION_OFFSET 5
184 #define IOREGION_LENGTH 2
185 #define ADDR_REG_OFFSET 0
186 #define DATA_REG_OFFSET 1
188 #define NCT6775_REG_BANK 0x4E
189 #define NCT6775_REG_CONFIG 0x40
192 * Not currently used:
193 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
194 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
195 * REG_MAN_ID is at port 0x4f
196 * REG_CHIP_ID is at port 0x58
199 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
200 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
202 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
203 #define NUM_REG_BEEP 5 /* Max number of beep registers */
207 #define TEMP_SOURCE_VIRTUAL 0x1f
209 /* Common and NCT6775 specific data */
211 /* Voltage min/max registers for nr=7..14 are in bank 5 */
213 static const u16 NCT6775_REG_IN_MAX[] = {
214 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
215 0x55c, 0x55e, 0x560, 0x562 };
216 static const u16 NCT6775_REG_IN_MIN[] = {
217 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
218 0x55d, 0x55f, 0x561, 0x563 };
219 static const u16 NCT6775_REG_IN[] = {
220 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
223 #define NCT6775_REG_VBAT 0x5D
224 #define NCT6775_REG_DIODE 0x5E
225 #define NCT6775_DIODE_MASK 0x02
227 #define NCT6775_REG_FANDIV1 0x506
228 #define NCT6775_REG_FANDIV2 0x507
230 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
232 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
234 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
236 static const s8 NCT6775_ALARM_BITS[] = {
237 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
238 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
240 6, 7, 11, -1, -1, /* fan1..fan5 */
241 -1, -1, -1, /* unused */
242 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
243 12, -1 }; /* intrusion0, intrusion1 */
245 #define FAN_ALARM_BASE 16
246 #define TEMP_ALARM_BASE 24
247 #define INTRUSION_ALARM_BASE 30
249 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
252 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
255 static const s8 NCT6775_BEEP_BITS[] = {
256 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
257 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
258 21, /* global beep enable */
259 6, 7, 11, 28, -1, /* fan1..fan5 */
260 -1, -1, -1, /* unused */
261 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
262 12, -1 }; /* intrusion0, intrusion1 */
264 #define BEEP_ENABLE_BASE 15
266 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
267 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
269 /* DC or PWM output fan configuration */
270 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
271 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
273 /* Advanced Fan control, some values are common for all fans */
275 static const u16 NCT6775_REG_TARGET[] = {
276 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
277 static const u16 NCT6775_REG_FAN_MODE[] = {
278 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
279 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
280 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
281 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
282 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
283 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
284 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
285 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
286 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
287 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
288 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
290 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
291 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
292 static const u16 NCT6775_REG_PWM[] = {
293 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
294 static const u16 NCT6775_REG_PWM_READ[] = {
295 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
297 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
298 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
299 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
300 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
302 static const u16 NCT6775_REG_TEMP[] = {
303 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
305 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
307 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
308 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
309 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
310 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
311 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
312 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
314 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
315 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
317 static const u16 NCT6775_REG_TEMP_SEL[] = {
318 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
320 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
321 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
322 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
323 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
324 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
325 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
326 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
327 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
328 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
329 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
331 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
333 static const u16 NCT6775_REG_AUTO_TEMP[] = {
334 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
335 static const u16 NCT6775_REG_AUTO_PWM[] = {
336 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
338 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
339 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
341 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
343 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
344 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
345 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
346 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
348 static const char *const nct6775_temp_label[] = {
362 "PCH_CHIP_CPU_MAX_TEMP",
372 #define NCT6775_TEMP_MASK 0x001ffffe
374 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
380 static const u16 NCT6775_REG_TEMP_CRIT[32] = {
391 /* NCT6776 specific data */
393 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
394 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
395 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
397 static const s8 NCT6776_ALARM_BITS[] = {
398 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
399 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
401 6, 7, 11, 10, 23, /* fan1..fan5 */
402 -1, -1, -1, /* unused */
403 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
404 12, 9 }; /* intrusion0, intrusion1 */
406 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
408 static const s8 NCT6776_BEEP_BITS[] = {
409 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
410 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
411 24, /* global beep enable */
412 25, 26, 27, 28, 29, /* fan1..fan5 */
413 -1, -1, -1, /* unused */
414 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
415 30, 31 }; /* intrusion0, intrusion1 */
417 static const u16 NCT6776_REG_TOLERANCE_H[] = {
418 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
420 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
421 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
423 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
424 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
426 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
427 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
429 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
430 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
432 static const char *const nct6776_temp_label[] = {
447 "PCH_CHIP_CPU_MAX_TEMP",
458 #define NCT6776_TEMP_MASK 0x007ffffe
460 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
466 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
471 /* NCT6779 specific data */
473 static const u16 NCT6779_REG_IN[] = {
474 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
475 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
477 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
478 0x459, 0x45A, 0x45B, 0x568 };
480 static const s8 NCT6779_ALARM_BITS[] = {
481 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
482 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
484 6, 7, 11, 10, 23, /* fan1..fan5 */
485 -1, -1, -1, /* unused */
486 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
487 12, 9 }; /* intrusion0, intrusion1 */
489 static const s8 NCT6779_BEEP_BITS[] = {
490 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
491 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
492 24, /* global beep enable */
493 25, 26, 27, 28, 29, /* fan1..fan5 */
494 -1, -1, -1, /* unused */
495 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
496 30, 31 }; /* intrusion0, intrusion1 */
498 static const u16 NCT6779_REG_FAN[] = {
499 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
500 static const u16 NCT6779_REG_FAN_PULSES[] = {
501 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
503 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
504 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
505 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
506 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
507 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
509 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
510 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
511 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
513 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
515 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
518 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
519 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
521 static const char *const nct6779_temp_label[] = {
540 "PCH_CHIP_CPU_MAX_TEMP",
556 #define NCT6779_TEMP_MASK 0x07ffff7e
557 #define NCT6791_TEMP_MASK 0x87ffff7e
559 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
560 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
561 0, 0, 0, 0, 0, 0, 0, 0,
562 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
565 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
570 /* NCT6791 specific data */
572 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
574 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
575 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
576 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
577 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
578 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
579 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
581 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
582 0x459, 0x45A, 0x45B, 0x568, 0x45D };
584 static const s8 NCT6791_ALARM_BITS[] = {
585 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
586 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
588 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
590 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
591 12, 9 }; /* intrusion0, intrusion1 */
593 /* NCT6792/NCT6793 specific data */
595 static const u16 NCT6792_REG_TEMP_MON[] = {
596 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
597 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
598 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
600 static const char *const nct6792_temp_label[] = {
619 "PCH_CHIP_CPU_MAX_TEMP",
628 "PECI Agent 0 Calibration",
629 "PECI Agent 1 Calibration",
635 #define NCT6792_TEMP_MASK 0x9fffff7e
637 static const char *const nct6793_temp_label[] = {
656 "PCH_CHIP_CPU_MAX_TEMP",
666 "PECI Agent 0 Calibration",
667 "PECI Agent 1 Calibration",
672 #define NCT6793_TEMP_MASK 0xbfff037e
674 static const char *const nct6795_temp_label[] = {
693 "PCH_CHIP_CPU_MAX_TEMP",
703 "PECI Agent 0 Calibration",
704 "PECI Agent 1 Calibration",
709 #define NCT6795_TEMP_MASK 0xbfffff7e
711 /* NCT6102D/NCT6106D specific data */
713 #define NCT6106_REG_VBAT 0x318
714 #define NCT6106_REG_DIODE 0x319
715 #define NCT6106_DIODE_MASK 0x01
717 static const u16 NCT6106_REG_IN_MAX[] = {
718 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
719 static const u16 NCT6106_REG_IN_MIN[] = {
720 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
721 static const u16 NCT6106_REG_IN[] = {
722 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
724 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
725 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
726 static const u16 NCT6106_REG_TEMP_HYST[] = {
727 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
728 static const u16 NCT6106_REG_TEMP_OVER[] = {
729 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
730 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
731 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
732 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
733 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
734 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
735 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
736 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
738 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
739 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
740 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
741 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
743 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
744 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
745 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
746 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
747 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
748 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
749 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
750 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
752 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
753 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
754 0x11b, 0x12b, 0x13b };
756 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
757 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
758 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
760 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
761 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
762 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
763 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
764 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
765 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
767 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
769 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
770 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
771 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
772 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b };
773 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
774 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
776 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
777 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
779 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
780 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
782 static const s8 NCT6106_ALARM_BITS[] = {
783 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
784 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
786 32, 33, 34, -1, -1, /* fan1..fan5 */
787 -1, -1, -1, /* unused */
788 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
789 48, -1 /* intrusion0, intrusion1 */
792 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
793 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
795 static const s8 NCT6106_BEEP_BITS[] = {
796 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
797 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
798 32, /* global beep enable */
799 24, 25, 26, 27, 28, /* fan1..fan5 */
800 -1, -1, -1, /* unused */
801 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
802 34, -1 /* intrusion0, intrusion1 */
805 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
811 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
816 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
818 if (mode == 0 && pwm == 255)
823 static int pwm_enable_to_reg(enum pwm_enable mode)
834 /* 1 is DC mode, output in ms */
835 static unsigned int step_time_from_reg(u8 reg, u8 mode)
837 return mode ? 400 * reg : 100 * reg;
840 static u8 step_time_to_reg(unsigned int msec, u8 mode)
842 return clamp_val((mode ? (msec + 200) / 400 :
843 (msec + 50) / 100), 1, 255);
846 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
848 if (reg == 0 || reg == 255)
850 return 1350000U / (reg << divreg);
853 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
855 if ((reg & 0xff1f) == 0xff1f)
858 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
863 return 1350000U / reg;
866 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
868 if (reg == 0 || reg == 0xffff)
872 * Even though the registers are 16 bit wide, the fan divisor
875 return 1350000U / (reg << divreg);
878 static u16 fan_to_reg(u32 fan, unsigned int divreg)
883 return (1350000U / fan) >> divreg;
886 static inline unsigned int
893 * Some of the voltage inputs have internal scaling, the tables below
894 * contain 8 (the ADC LSB in mV) * scaling factor * 100
896 static const u16 scale_in[15] = {
897 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
901 static inline long in_from_reg(u8 reg, u8 nr)
903 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
906 static inline u8 in_to_reg(u32 val, u8 nr)
908 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
912 * Data structures and manipulation thereof
915 struct nct6775_data {
916 int addr; /* IO base of hw monitor block */
917 int sioreg; /* SIO register address */
921 const struct attribute_group *groups[6];
923 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
924 * 3=temp_crit, 4=temp_lcrit
926 u8 temp_src[NUM_TEMP];
927 u16 reg_temp_config[NUM_TEMP];
928 const char * const *temp_label;
936 const s8 *ALARM_BITS;
940 const u16 *REG_IN_MINMAX[2];
942 const u16 *REG_TARGET;
944 const u16 *REG_FAN_MODE;
945 const u16 *REG_FAN_MIN;
946 const u16 *REG_FAN_PULSES;
947 const u16 *FAN_PULSE_SHIFT;
948 const u16 *REG_FAN_TIME[3];
950 const u16 *REG_TOLERANCE_H;
952 const u8 *REG_PWM_MODE;
953 const u8 *PWM_MODE_MASK;
955 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
956 * [3]=pwm_max, [4]=pwm_step,
957 * [5]=weight_duty_step, [6]=weight_duty_base
959 const u16 *REG_PWM_READ;
961 const u16 *REG_CRITICAL_PWM_ENABLE;
962 u8 CRITICAL_PWM_ENABLE_MASK;
963 const u16 *REG_CRITICAL_PWM;
965 const u16 *REG_AUTO_TEMP;
966 const u16 *REG_AUTO_PWM;
968 const u16 *REG_CRITICAL_TEMP;
969 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
971 const u16 *REG_TEMP_SOURCE; /* temp register sources */
972 const u16 *REG_TEMP_SEL;
973 const u16 *REG_WEIGHT_TEMP_SEL;
974 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
976 const u16 *REG_TEMP_OFFSET;
978 const u16 *REG_ALARM;
981 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
982 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
984 struct mutex update_lock;
985 bool valid; /* true if following fields are valid */
986 unsigned long last_updated; /* In jiffies */
988 /* Register values */
989 u8 bank; /* current register bank */
990 u8 in_num; /* number of in inputs we have */
991 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
992 unsigned int rpm[NUM_FAN];
993 u16 fan_min[NUM_FAN];
994 u8 fan_pulses[NUM_FAN];
997 u8 has_fan; /* some fan inputs can be disabled */
998 u8 has_fan_min; /* some fans don't have min register */
1001 u8 num_temp_alarms; /* 2, 3, or 6 */
1002 u8 num_temp_beeps; /* 2, 3, or 6 */
1003 u8 temp_fixed_num; /* 3 or 6 */
1004 u8 temp_type[NUM_TEMP_FIXED];
1005 s8 temp_offset[NUM_TEMP_FIXED];
1006 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
1007 * 3=temp_crit, 4=temp_lcrit */
1011 u8 pwm_num; /* number of pwm */
1012 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
1013 * 0->PWM variable duty cycle
1015 enum pwm_enable pwm_enable[NUM_FAN];
1018 * 2->thermal cruise mode (also called SmartFan I)
1019 * 3->fan speed cruise mode
1021 * 5->enhanced variable thermal cruise (SmartFan IV)
1023 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
1024 * [3]=pwm_max, [4]=pwm_step,
1025 * [5]=weight_duty_step, [6]=weight_duty_base
1028 u8 target_temp[NUM_FAN];
1029 u8 target_temp_mask;
1030 u32 target_speed[NUM_FAN];
1031 u32 target_speed_tolerance[NUM_FAN];
1032 u8 speed_tolerance_limit;
1034 u8 temp_tolerance[2][NUM_FAN];
1037 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
1039 /* Automatic fan speed control registers */
1041 u8 auto_pwm[NUM_FAN][7];
1042 u8 auto_temp[NUM_FAN][7];
1043 u8 pwm_temp_sel[NUM_FAN];
1044 u8 pwm_weight_temp_sel[NUM_FAN];
1045 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
1055 u16 have_temp_fixed;
1058 /* Remember extra register values over suspend/resume */
1065 struct nct6775_sio_data {
1070 struct sensor_device_template {
1071 struct device_attribute dev_attr;
1079 bool s2; /* true if both index and nr are used */
1082 struct sensor_device_attr_u {
1084 struct sensor_device_attribute a1;
1085 struct sensor_device_attribute_2 a2;
1090 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
1091 .attr = {.name = _template, .mode = _mode }, \
1096 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1097 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1098 .u.index = _index, \
1101 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
1103 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1104 .u.s.index = _index, \
1108 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1109 static struct sensor_device_template sensor_dev_template_##_name \
1110 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
1113 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
1115 static struct sensor_device_template sensor_dev_template_##_name \
1116 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
1119 struct sensor_template_group {
1120 struct sensor_device_template **templates;
1121 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1125 static struct attribute_group *
1126 nct6775_create_attr_group(struct device *dev,
1127 const struct sensor_template_group *tg,
1130 struct attribute_group *group;
1131 struct sensor_device_attr_u *su;
1132 struct sensor_device_attribute *a;
1133 struct sensor_device_attribute_2 *a2;
1134 struct attribute **attrs;
1135 struct sensor_device_template **t;
1139 return ERR_PTR(-EINVAL);
1142 for (count = 0; *t; t++, count++)
1146 return ERR_PTR(-EINVAL);
1148 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1150 return ERR_PTR(-ENOMEM);
1152 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1155 return ERR_PTR(-ENOMEM);
1157 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1160 return ERR_PTR(-ENOMEM);
1162 group->attrs = attrs;
1163 group->is_visible = tg->is_visible;
1165 for (i = 0; i < repeat; i++) {
1167 while (*t != NULL) {
1168 snprintf(su->name, sizeof(su->name),
1169 (*t)->dev_attr.attr.name, tg->base + i);
1172 sysfs_attr_init(&a2->dev_attr.attr);
1173 a2->dev_attr.attr.name = su->name;
1174 a2->nr = (*t)->u.s.nr + i;
1175 a2->index = (*t)->u.s.index;
1176 a2->dev_attr.attr.mode =
1177 (*t)->dev_attr.attr.mode;
1178 a2->dev_attr.show = (*t)->dev_attr.show;
1179 a2->dev_attr.store = (*t)->dev_attr.store;
1180 *attrs = &a2->dev_attr.attr;
1183 sysfs_attr_init(&a->dev_attr.attr);
1184 a->dev_attr.attr.name = su->name;
1185 a->index = (*t)->u.index + i;
1186 a->dev_attr.attr.mode =
1187 (*t)->dev_attr.attr.mode;
1188 a->dev_attr.show = (*t)->dev_attr.show;
1189 a->dev_attr.store = (*t)->dev_attr.store;
1190 *attrs = &a->dev_attr.attr;
1201 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1203 switch (data->kind) {
1205 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1206 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1207 reg == 0x111 || reg == 0x121 || reg == 0x131;
1209 return (((reg & 0xff00) == 0x100 ||
1210 (reg & 0xff00) == 0x200) &&
1211 ((reg & 0x00ff) == 0x50 ||
1212 (reg & 0x00ff) == 0x53 ||
1213 (reg & 0x00ff) == 0x55)) ||
1214 (reg & 0xfff0) == 0x630 ||
1215 reg == 0x640 || reg == 0x642 ||
1217 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1218 reg == 0x73 || reg == 0x75 || reg == 0x77;
1220 return (((reg & 0xff00) == 0x100 ||
1221 (reg & 0xff00) == 0x200) &&
1222 ((reg & 0x00ff) == 0x50 ||
1223 (reg & 0x00ff) == 0x53 ||
1224 (reg & 0x00ff) == 0x55)) ||
1225 (reg & 0xfff0) == 0x630 ||
1227 reg == 0x640 || reg == 0x642 ||
1228 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1229 reg == 0x73 || reg == 0x75 || reg == 0x77;
1235 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1236 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1238 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1239 reg == 0x640 || reg == 0x642 ||
1240 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1241 reg == 0x7b || reg == 0x7d;
1247 * On older chips, only registers 0x50-0x5f are banked.
1248 * On more recent chips, all registers are banked.
1249 * Assume that is the case and set the bank number for each access.
1250 * Cache the bank number so it only needs to be set if it changes.
1252 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1256 if (data->bank != bank) {
1257 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1258 outb_p(bank, data->addr + DATA_REG_OFFSET);
1263 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1265 int res, word_sized = is_word_sized(data, reg);
1267 nct6775_set_bank(data, reg);
1268 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1269 res = inb_p(data->addr + DATA_REG_OFFSET);
1271 outb_p((reg & 0xff) + 1,
1272 data->addr + ADDR_REG_OFFSET);
1273 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1278 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1280 int word_sized = is_word_sized(data, reg);
1282 nct6775_set_bank(data, reg);
1283 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1285 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1286 outb_p((reg & 0xff) + 1,
1287 data->addr + ADDR_REG_OFFSET);
1289 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1293 /* We left-align 8-bit temperature values to make the code simpler */
1294 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1298 res = nct6775_read_value(data, reg);
1299 if (!is_word_sized(data, reg))
1305 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1307 if (!is_word_sized(data, reg))
1309 return nct6775_write_value(data, reg, value);
1312 /* This function assumes that the caller holds data->update_lock */
1313 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1319 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1320 | (data->fan_div[0] & 0x7);
1321 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1324 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1325 | ((data->fan_div[1] << 4) & 0x70);
1326 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1329 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1330 | (data->fan_div[2] & 0x7);
1331 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1334 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1335 | ((data->fan_div[3] << 4) & 0x70);
1336 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1341 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1343 if (data->kind == nct6775)
1344 nct6775_write_fan_div(data, nr);
1347 static void nct6775_update_fan_div(struct nct6775_data *data)
1351 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1352 data->fan_div[0] = i & 0x7;
1353 data->fan_div[1] = (i & 0x70) >> 4;
1354 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1355 data->fan_div[2] = i & 0x7;
1356 if (data->has_fan & BIT(3))
1357 data->fan_div[3] = (i & 0x70) >> 4;
1360 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1362 if (data->kind == nct6775)
1363 nct6775_update_fan_div(data);
1366 static void nct6775_init_fan_div(struct nct6775_data *data)
1370 nct6775_update_fan_div_common(data);
1372 * For all fans, start with highest divider value if the divider
1373 * register is not initialized. This ensures that we get a
1374 * reading from the fan count register, even if it is not optimal.
1375 * We'll compute a better divider later on.
1377 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1378 if (!(data->has_fan & BIT(i)))
1380 if (data->fan_div[i] == 0) {
1381 data->fan_div[i] = 7;
1382 nct6775_write_fan_div_common(data, i);
1387 static void nct6775_init_fan_common(struct device *dev,
1388 struct nct6775_data *data)
1393 if (data->has_fan_div)
1394 nct6775_init_fan_div(data);
1397 * If fan_min is not set (0), set it to 0xff to disable it. This
1398 * prevents the unnecessary warning when fanX_min is reported as 0.
1400 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1401 if (data->has_fan_min & BIT(i)) {
1402 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1404 nct6775_write_value(data, data->REG_FAN_MIN[i],
1405 data->has_fan_div ? 0xff
1411 static void nct6775_select_fan_div(struct device *dev,
1412 struct nct6775_data *data, int nr, u16 reg)
1414 u8 fan_div = data->fan_div[nr];
1417 if (!data->has_fan_div)
1421 * If we failed to measure the fan speed, or the reported value is not
1422 * in the optimal range, and the clock divider can be modified,
1423 * let's try that for next time.
1425 if (reg == 0x00 && fan_div < 0x07)
1427 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1430 if (fan_div != data->fan_div[nr]) {
1431 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1432 nr + 1, div_from_reg(data->fan_div[nr]),
1433 div_from_reg(fan_div));
1435 /* Preserve min limit if possible */
1436 if (data->has_fan_min & BIT(nr)) {
1437 fan_min = data->fan_min[nr];
1438 if (fan_div > data->fan_div[nr]) {
1439 if (fan_min != 255 && fan_min > 1)
1442 if (fan_min != 255) {
1448 if (fan_min != data->fan_min[nr]) {
1449 data->fan_min[nr] = fan_min;
1450 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1454 data->fan_div[nr] = fan_div;
1455 nct6775_write_fan_div_common(data, nr);
1459 static void nct6775_update_pwm(struct device *dev)
1461 struct nct6775_data *data = dev_get_drvdata(dev);
1463 int fanmodecfg, reg;
1466 for (i = 0; i < data->pwm_num; i++) {
1467 if (!(data->has_pwm & BIT(i)))
1470 duty_is_dc = data->REG_PWM_MODE[i] &&
1471 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1472 & data->PWM_MODE_MASK[i]);
1473 data->pwm_mode[i] = !duty_is_dc;
1475 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1476 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1477 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1479 = nct6775_read_value(data,
1480 data->REG_PWM[j][i]);
1484 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1485 (fanmodecfg >> 4) & 7);
1487 if (!data->temp_tolerance[0][i] ||
1488 data->pwm_enable[i] != speed_cruise)
1489 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1490 if (!data->target_speed_tolerance[i] ||
1491 data->pwm_enable[i] == speed_cruise) {
1492 u8 t = fanmodecfg & 0x0f;
1494 if (data->REG_TOLERANCE_H) {
1495 t |= (nct6775_read_value(data,
1496 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1498 data->target_speed_tolerance[i] = t;
1501 data->temp_tolerance[1][i] =
1502 nct6775_read_value(data,
1503 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1505 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1506 data->pwm_temp_sel[i] = reg & 0x1f;
1507 /* If fan can stop, report floor as 0 */
1509 data->pwm[2][i] = 0;
1511 if (!data->REG_WEIGHT_TEMP_SEL[i])
1514 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1515 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1516 /* If weight is disabled, report weight source as 0 */
1517 if (j == 1 && !(reg & 0x80))
1518 data->pwm_weight_temp_sel[i] = 0;
1520 /* Weight temp data */
1521 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1522 data->weight_temp[j][i]
1523 = nct6775_read_value(data,
1524 data->REG_WEIGHT_TEMP[j][i]);
1529 static void nct6775_update_pwm_limits(struct device *dev)
1531 struct nct6775_data *data = dev_get_drvdata(dev);
1536 for (i = 0; i < data->pwm_num; i++) {
1537 if (!(data->has_pwm & BIT(i)))
1540 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1541 data->fan_time[j][i] =
1542 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1545 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1546 /* Update only in matching mode or if never updated */
1547 if (!data->target_temp[i] ||
1548 data->pwm_enable[i] == thermal_cruise)
1549 data->target_temp[i] = reg_t & data->target_temp_mask;
1550 if (!data->target_speed[i] ||
1551 data->pwm_enable[i] == speed_cruise) {
1552 if (data->REG_TOLERANCE_H) {
1553 reg_t |= (nct6775_read_value(data,
1554 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1556 data->target_speed[i] = reg_t;
1559 for (j = 0; j < data->auto_pwm_num; j++) {
1560 data->auto_pwm[i][j] =
1561 nct6775_read_value(data,
1562 NCT6775_AUTO_PWM(data, i, j));
1563 data->auto_temp[i][j] =
1564 nct6775_read_value(data,
1565 NCT6775_AUTO_TEMP(data, i, j));
1568 /* critical auto_pwm temperature data */
1569 data->auto_temp[i][data->auto_pwm_num] =
1570 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1572 switch (data->kind) {
1574 reg = nct6775_read_value(data,
1575 NCT6775_REG_CRITICAL_ENAB[i]);
1576 data->auto_pwm[i][data->auto_pwm_num] =
1577 (reg & 0x02) ? 0xff : 0x00;
1580 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1588 reg = nct6775_read_value(data,
1589 data->REG_CRITICAL_PWM_ENABLE[i]);
1590 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1591 reg = nct6775_read_value(data,
1592 data->REG_CRITICAL_PWM[i]);
1595 data->auto_pwm[i][data->auto_pwm_num] = reg;
1601 static struct nct6775_data *nct6775_update_device(struct device *dev)
1603 struct nct6775_data *data = dev_get_drvdata(dev);
1606 mutex_lock(&data->update_lock);
1608 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1610 /* Fan clock dividers */
1611 nct6775_update_fan_div_common(data);
1613 /* Measured voltages and limits */
1614 for (i = 0; i < data->in_num; i++) {
1615 if (!(data->have_in & BIT(i)))
1618 data->in[i][0] = nct6775_read_value(data,
1620 data->in[i][1] = nct6775_read_value(data,
1621 data->REG_IN_MINMAX[0][i]);
1622 data->in[i][2] = nct6775_read_value(data,
1623 data->REG_IN_MINMAX[1][i]);
1626 /* Measured fan speeds and limits */
1627 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1630 if (!(data->has_fan & BIT(i)))
1633 reg = nct6775_read_value(data, data->REG_FAN[i]);
1634 data->rpm[i] = data->fan_from_reg(reg,
1637 if (data->has_fan_min & BIT(i))
1638 data->fan_min[i] = nct6775_read_value(data,
1639 data->REG_FAN_MIN[i]);
1640 data->fan_pulses[i] =
1641 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1642 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1644 nct6775_select_fan_div(dev, data, i, reg);
1647 nct6775_update_pwm(dev);
1648 nct6775_update_pwm_limits(dev);
1650 /* Measured temperatures and limits */
1651 for (i = 0; i < NUM_TEMP; i++) {
1652 if (!(data->have_temp & BIT(i)))
1654 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1655 if (data->reg_temp[j][i])
1657 = nct6775_read_temp(data,
1658 data->reg_temp[j][i]);
1660 if (i >= NUM_TEMP_FIXED ||
1661 !(data->have_temp_fixed & BIT(i)))
1663 data->temp_offset[i]
1664 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1668 for (i = 0; i < NUM_REG_ALARM; i++) {
1671 if (!data->REG_ALARM[i])
1673 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1674 data->alarms |= ((u64)alarm) << (i << 3);
1678 for (i = 0; i < NUM_REG_BEEP; i++) {
1681 if (!data->REG_BEEP[i])
1683 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1684 data->beeps |= ((u64)beep) << (i << 3);
1687 data->last_updated = jiffies;
1691 mutex_unlock(&data->update_lock);
1696 * Sysfs callback functions
1699 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1701 struct nct6775_data *data = nct6775_update_device(dev);
1702 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1703 int index = sattr->index;
1706 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1710 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1713 struct nct6775_data *data = dev_get_drvdata(dev);
1714 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1715 int index = sattr->index;
1720 err = kstrtoul(buf, 10, &val);
1723 mutex_lock(&data->update_lock);
1724 data->in[nr][index] = in_to_reg(val, nr);
1725 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1726 data->in[nr][index]);
1727 mutex_unlock(&data->update_lock);
1732 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1734 struct nct6775_data *data = nct6775_update_device(dev);
1735 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1736 int nr = data->ALARM_BITS[sattr->index];
1738 return sprintf(buf, "%u\n",
1739 (unsigned int)((data->alarms >> nr) & 0x01));
1742 static int find_temp_source(struct nct6775_data *data, int index, int count)
1744 int source = data->temp_src[index];
1747 for (nr = 0; nr < count; nr++) {
1750 src = nct6775_read_value(data,
1751 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1759 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1761 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1762 struct nct6775_data *data = nct6775_update_device(dev);
1763 unsigned int alarm = 0;
1767 * For temperatures, there is no fixed mapping from registers to alarm
1768 * bits. Alarm bits are determined by the temperature source mapping.
1770 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1772 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1774 alarm = (data->alarms >> bit) & 0x01;
1776 return sprintf(buf, "%u\n", alarm);
1780 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1782 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1783 struct nct6775_data *data = nct6775_update_device(dev);
1784 int nr = data->BEEP_BITS[sattr->index];
1786 return sprintf(buf, "%u\n",
1787 (unsigned int)((data->beeps >> nr) & 0x01));
1791 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1794 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1795 struct nct6775_data *data = dev_get_drvdata(dev);
1796 int nr = data->BEEP_BITS[sattr->index];
1797 int regindex = nr >> 3;
1801 err = kstrtoul(buf, 10, &val);
1807 mutex_lock(&data->update_lock);
1809 data->beeps |= (1ULL << nr);
1811 data->beeps &= ~(1ULL << nr);
1812 nct6775_write_value(data, data->REG_BEEP[regindex],
1813 (data->beeps >> (regindex << 3)) & 0xff);
1814 mutex_unlock(&data->update_lock);
1819 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1821 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1822 struct nct6775_data *data = nct6775_update_device(dev);
1823 unsigned int beep = 0;
1827 * For temperatures, there is no fixed mapping from registers to beep
1828 * enable bits. Beep enable bits are determined by the temperature
1831 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1833 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1835 beep = (data->beeps >> bit) & 0x01;
1837 return sprintf(buf, "%u\n", beep);
1841 store_temp_beep(struct device *dev, struct device_attribute *attr,
1842 const char *buf, size_t count)
1844 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1845 struct nct6775_data *data = dev_get_drvdata(dev);
1846 int nr, bit, regindex;
1850 err = kstrtoul(buf, 10, &val);
1856 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1860 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1861 regindex = bit >> 3;
1863 mutex_lock(&data->update_lock);
1865 data->beeps |= (1ULL << bit);
1867 data->beeps &= ~(1ULL << bit);
1868 nct6775_write_value(data, data->REG_BEEP[regindex],
1869 (data->beeps >> (regindex << 3)) & 0xff);
1870 mutex_unlock(&data->update_lock);
1875 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1876 struct attribute *attr, int index)
1878 struct device *dev = container_of(kobj, struct device, kobj);
1879 struct nct6775_data *data = dev_get_drvdata(dev);
1880 int in = index / 5; /* voltage index */
1882 if (!(data->have_in & BIT(in)))
1888 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1889 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1890 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1892 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1893 store_in_reg, 0, 1);
1894 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1895 store_in_reg, 0, 2);
1898 * nct6775_in_is_visible uses the index into the following array
1899 * to determine if attributes should be created or not.
1900 * Any change in order or content must be matched.
1902 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1903 &sensor_dev_template_in_input,
1904 &sensor_dev_template_in_alarm,
1905 &sensor_dev_template_in_beep,
1906 &sensor_dev_template_in_min,
1907 &sensor_dev_template_in_max,
1911 static const struct sensor_template_group nct6775_in_template_group = {
1912 .templates = nct6775_attributes_in_template,
1913 .is_visible = nct6775_in_is_visible,
1917 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1919 struct nct6775_data *data = nct6775_update_device(dev);
1920 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1921 int nr = sattr->index;
1923 return sprintf(buf, "%d\n", data->rpm[nr]);
1927 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1929 struct nct6775_data *data = nct6775_update_device(dev);
1930 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1931 int nr = sattr->index;
1933 return sprintf(buf, "%d\n",
1934 data->fan_from_reg_min(data->fan_min[nr],
1935 data->fan_div[nr]));
1939 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1941 struct nct6775_data *data = nct6775_update_device(dev);
1942 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1943 int nr = sattr->index;
1945 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1949 store_fan_min(struct device *dev, struct device_attribute *attr,
1950 const char *buf, size_t count)
1952 struct nct6775_data *data = dev_get_drvdata(dev);
1953 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1954 int nr = sattr->index;
1960 err = kstrtoul(buf, 10, &val);
1964 mutex_lock(&data->update_lock);
1965 if (!data->has_fan_div) {
1966 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1972 val = 1350000U / val;
1973 val = (val & 0x1f) | ((val << 3) & 0xff00);
1975 data->fan_min[nr] = val;
1976 goto write_min; /* Leave fan divider alone */
1979 /* No min limit, alarm disabled */
1980 data->fan_min[nr] = 255;
1981 new_div = data->fan_div[nr]; /* No change */
1982 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1985 reg = 1350000U / val;
1986 if (reg >= 128 * 255) {
1988 * Speed below this value cannot possibly be represented,
1989 * even with the highest divider (128)
1991 data->fan_min[nr] = 254;
1992 new_div = 7; /* 128 == BIT(7) */
1994 "fan%u low limit %lu below minimum %u, set to minimum\n",
1995 nr + 1, val, data->fan_from_reg_min(254, 7));
1998 * Speed above this value cannot possibly be represented,
1999 * even with the lowest divider (1)
2001 data->fan_min[nr] = 1;
2002 new_div = 0; /* 1 == BIT(0) */
2004 "fan%u low limit %lu above maximum %u, set to maximum\n",
2005 nr + 1, val, data->fan_from_reg_min(1, 0));
2008 * Automatically pick the best divider, i.e. the one such
2009 * that the min limit will correspond to a register value
2010 * in the 96..192 range
2013 while (reg > 192 && new_div < 7) {
2017 data->fan_min[nr] = reg;
2022 * Write both the fan clock divider (if it changed) and the new
2023 * fan min (unconditionally)
2025 if (new_div != data->fan_div[nr]) {
2026 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
2027 nr + 1, div_from_reg(data->fan_div[nr]),
2028 div_from_reg(new_div));
2029 data->fan_div[nr] = new_div;
2030 nct6775_write_fan_div_common(data, nr);
2031 /* Give the chip time to sample a new speed value */
2032 data->last_updated = jiffies;
2036 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
2037 mutex_unlock(&data->update_lock);
2043 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2045 struct nct6775_data *data = nct6775_update_device(dev);
2046 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2047 int p = data->fan_pulses[sattr->index];
2049 return sprintf(buf, "%d\n", p ? : 4);
2053 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2054 const char *buf, size_t count)
2056 struct nct6775_data *data = dev_get_drvdata(dev);
2057 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2058 int nr = sattr->index;
2063 err = kstrtoul(buf, 10, &val);
2070 mutex_lock(&data->update_lock);
2071 data->fan_pulses[nr] = val & 3;
2072 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
2073 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2074 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2075 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2076 mutex_unlock(&data->update_lock);
2081 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2082 struct attribute *attr, int index)
2084 struct device *dev = container_of(kobj, struct device, kobj);
2085 struct nct6775_data *data = dev_get_drvdata(dev);
2086 int fan = index / 6; /* fan index */
2087 int nr = index % 6; /* attribute index */
2089 if (!(data->has_fan & BIT(fan)))
2092 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2094 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2096 if (nr == 4 && !(data->has_fan_min & BIT(fan)))
2098 if (nr == 5 && data->kind != nct6775)
2104 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2105 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2107 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2108 store_beep, FAN_ALARM_BASE);
2109 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2110 store_fan_pulses, 0);
2111 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2113 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2116 * nct6775_fan_is_visible uses the index into the following array
2117 * to determine if attributes should be created or not.
2118 * Any change in order or content must be matched.
2120 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2121 &sensor_dev_template_fan_input,
2122 &sensor_dev_template_fan_alarm, /* 1 */
2123 &sensor_dev_template_fan_beep, /* 2 */
2124 &sensor_dev_template_fan_pulses,
2125 &sensor_dev_template_fan_min, /* 4 */
2126 &sensor_dev_template_fan_div, /* 5 */
2130 static const struct sensor_template_group nct6775_fan_template_group = {
2131 .templates = nct6775_attributes_fan_template,
2132 .is_visible = nct6775_fan_is_visible,
2137 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2139 struct nct6775_data *data = nct6775_update_device(dev);
2140 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2141 int nr = sattr->index;
2143 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2147 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2149 struct nct6775_data *data = nct6775_update_device(dev);
2150 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2152 int index = sattr->index;
2154 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2158 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2161 struct nct6775_data *data = dev_get_drvdata(dev);
2162 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2164 int index = sattr->index;
2168 err = kstrtol(buf, 10, &val);
2172 mutex_lock(&data->update_lock);
2173 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2174 nct6775_write_temp(data, data->reg_temp[index][nr],
2175 data->temp[index][nr]);
2176 mutex_unlock(&data->update_lock);
2181 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2183 struct nct6775_data *data = nct6775_update_device(dev);
2184 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2186 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2190 store_temp_offset(struct device *dev, struct device_attribute *attr,
2191 const char *buf, size_t count)
2193 struct nct6775_data *data = dev_get_drvdata(dev);
2194 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2195 int nr = sattr->index;
2199 err = kstrtol(buf, 10, &val);
2203 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2205 mutex_lock(&data->update_lock);
2206 data->temp_offset[nr] = val;
2207 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2208 mutex_unlock(&data->update_lock);
2214 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2216 struct nct6775_data *data = nct6775_update_device(dev);
2217 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2218 int nr = sattr->index;
2220 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2224 store_temp_type(struct device *dev, struct device_attribute *attr,
2225 const char *buf, size_t count)
2227 struct nct6775_data *data = nct6775_update_device(dev);
2228 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2229 int nr = sattr->index;
2232 u8 vbat, diode, vbit, dbit;
2234 err = kstrtoul(buf, 10, &val);
2238 if (val != 1 && val != 3 && val != 4)
2241 mutex_lock(&data->update_lock);
2243 data->temp_type[nr] = val;
2245 dbit = data->DIODE_MASK << nr;
2246 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2247 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2249 case 1: /* CPU diode (diode, current mode) */
2253 case 3: /* diode, voltage mode */
2256 case 4: /* thermistor */
2259 nct6775_write_value(data, data->REG_VBAT, vbat);
2260 nct6775_write_value(data, data->REG_DIODE, diode);
2262 mutex_unlock(&data->update_lock);
2266 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2267 struct attribute *attr, int index)
2269 struct device *dev = container_of(kobj, struct device, kobj);
2270 struct nct6775_data *data = dev_get_drvdata(dev);
2271 int temp = index / 10; /* temp index */
2272 int nr = index % 10; /* attribute index */
2274 if (!(data->have_temp & BIT(temp)))
2277 if (nr == 1 && !data->temp_label)
2280 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2281 return 0; /* alarm */
2283 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2284 return 0; /* beep */
2286 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2289 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2292 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2295 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2298 /* offset and type only apply to fixed sensors */
2299 if (nr > 7 && !(data->have_temp_fixed & BIT(temp)))
2305 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2306 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2307 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2309 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2310 show_temp, store_temp, 0, 2);
2311 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2313 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2315 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2316 show_temp_offset, store_temp_offset, 0);
2317 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2318 store_temp_type, 0);
2319 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2320 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2321 store_temp_beep, 0);
2324 * nct6775_temp_is_visible uses the index into the following array
2325 * to determine if attributes should be created or not.
2326 * Any change in order or content must be matched.
2328 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2329 &sensor_dev_template_temp_input,
2330 &sensor_dev_template_temp_label,
2331 &sensor_dev_template_temp_alarm, /* 2 */
2332 &sensor_dev_template_temp_beep, /* 3 */
2333 &sensor_dev_template_temp_max, /* 4 */
2334 &sensor_dev_template_temp_max_hyst, /* 5 */
2335 &sensor_dev_template_temp_crit, /* 6 */
2336 &sensor_dev_template_temp_lcrit, /* 7 */
2337 &sensor_dev_template_temp_offset, /* 8 */
2338 &sensor_dev_template_temp_type, /* 9 */
2342 static const struct sensor_template_group nct6775_temp_template_group = {
2343 .templates = nct6775_attributes_temp_template,
2344 .is_visible = nct6775_temp_is_visible,
2349 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2351 struct nct6775_data *data = nct6775_update_device(dev);
2352 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2354 return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]);
2358 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2359 const char *buf, size_t count)
2361 struct nct6775_data *data = dev_get_drvdata(dev);
2362 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2363 int nr = sattr->index;
2368 err = kstrtoul(buf, 10, &val);
2375 /* Setting DC mode (0) is not supported for all chips/channels */
2376 if (data->REG_PWM_MODE[nr] == 0) {
2382 mutex_lock(&data->update_lock);
2383 data->pwm_mode[nr] = val;
2384 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2385 reg &= ~data->PWM_MODE_MASK[nr];
2387 reg |= data->PWM_MODE_MASK[nr];
2388 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2389 mutex_unlock(&data->update_lock);
2394 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2396 struct nct6775_data *data = nct6775_update_device(dev);
2397 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2399 int index = sattr->index;
2403 * For automatic fan control modes, show current pwm readings.
2404 * Otherwise, show the configured value.
2406 if (index == 0 && data->pwm_enable[nr] > manual)
2407 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2409 pwm = data->pwm[index][nr];
2411 return sprintf(buf, "%d\n", pwm);
2415 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2418 struct nct6775_data *data = dev_get_drvdata(dev);
2419 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2421 int index = sattr->index;
2423 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2425 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2429 err = kstrtoul(buf, 10, &val);
2432 val = clamp_val(val, minval[index], maxval[index]);
2434 mutex_lock(&data->update_lock);
2435 data->pwm[index][nr] = val;
2436 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2437 if (index == 2) { /* floor: disable if val == 0 */
2438 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2442 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2444 mutex_unlock(&data->update_lock);
2448 /* Returns 0 if OK, -EINVAL otherwise */
2449 static int check_trip_points(struct nct6775_data *data, int nr)
2453 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2454 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2457 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2458 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2461 /* validate critical temperature and pwm if enabled (pwm > 0) */
2462 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2463 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2464 data->auto_temp[nr][data->auto_pwm_num] ||
2465 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2466 data->auto_pwm[nr][data->auto_pwm_num])
2472 static void pwm_update_registers(struct nct6775_data *data, int nr)
2476 switch (data->pwm_enable[nr]) {
2481 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2482 reg = (reg & ~data->tolerance_mask) |
2483 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2484 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2485 nct6775_write_value(data, data->REG_TARGET[nr],
2486 data->target_speed[nr] & 0xff);
2487 if (data->REG_TOLERANCE_H) {
2488 reg = (data->target_speed[nr] >> 8) & 0x0f;
2489 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2490 nct6775_write_value(data,
2491 data->REG_TOLERANCE_H[nr],
2495 case thermal_cruise:
2496 nct6775_write_value(data, data->REG_TARGET[nr],
2497 data->target_temp[nr]);
2500 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2501 reg = (reg & ~data->tolerance_mask) |
2502 data->temp_tolerance[0][nr];
2503 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2509 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2511 struct nct6775_data *data = nct6775_update_device(dev);
2512 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2514 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2518 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2519 const char *buf, size_t count)
2521 struct nct6775_data *data = dev_get_drvdata(dev);
2522 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2523 int nr = sattr->index;
2528 err = kstrtoul(buf, 10, &val);
2535 if (val == sf3 && data->kind != nct6775)
2538 if (val == sf4 && check_trip_points(data, nr)) {
2539 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2540 dev_err(dev, "Adjust trip points and try again\n");
2544 mutex_lock(&data->update_lock);
2545 data->pwm_enable[nr] = val;
2548 * turn off pwm control: select manual mode, set pwm to maximum
2550 data->pwm[0][nr] = 255;
2551 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2553 pwm_update_registers(data, nr);
2554 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2556 reg |= pwm_enable_to_reg(val) << 4;
2557 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2558 mutex_unlock(&data->update_lock);
2563 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2567 for (i = 0; i < NUM_TEMP; i++) {
2568 if (!(data->have_temp & BIT(i)))
2570 if (src == data->temp_src[i]) {
2576 return sprintf(buf, "%d\n", sel);
2580 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2582 struct nct6775_data *data = nct6775_update_device(dev);
2583 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2584 int index = sattr->index;
2586 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2590 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2591 const char *buf, size_t count)
2593 struct nct6775_data *data = nct6775_update_device(dev);
2594 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2595 int nr = sattr->index;
2599 err = kstrtoul(buf, 10, &val);
2602 if (val == 0 || val > NUM_TEMP)
2604 if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1])
2607 mutex_lock(&data->update_lock);
2608 src = data->temp_src[val - 1];
2609 data->pwm_temp_sel[nr] = src;
2610 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2613 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2614 mutex_unlock(&data->update_lock);
2620 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2623 struct nct6775_data *data = nct6775_update_device(dev);
2624 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2625 int index = sattr->index;
2627 return show_pwm_temp_sel_common(data, buf,
2628 data->pwm_weight_temp_sel[index]);
2632 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2633 const char *buf, size_t count)
2635 struct nct6775_data *data = nct6775_update_device(dev);
2636 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2637 int nr = sattr->index;
2641 err = kstrtoul(buf, 10, &val);
2646 val = array_index_nospec(val, NUM_TEMP + 1);
2647 if (val && (!(data->have_temp & BIT(val - 1)) ||
2648 !data->temp_src[val - 1]))
2651 mutex_lock(&data->update_lock);
2653 src = data->temp_src[val - 1];
2654 data->pwm_weight_temp_sel[nr] = src;
2655 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2657 reg |= (src | 0x80);
2658 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2660 data->pwm_weight_temp_sel[nr] = 0;
2661 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2663 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2665 mutex_unlock(&data->update_lock);
2671 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2673 struct nct6775_data *data = nct6775_update_device(dev);
2674 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2676 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2680 store_target_temp(struct device *dev, struct device_attribute *attr,
2681 const char *buf, size_t count)
2683 struct nct6775_data *data = dev_get_drvdata(dev);
2684 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2685 int nr = sattr->index;
2689 err = kstrtoul(buf, 10, &val);
2693 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2694 data->target_temp_mask);
2696 mutex_lock(&data->update_lock);
2697 data->target_temp[nr] = val;
2698 pwm_update_registers(data, nr);
2699 mutex_unlock(&data->update_lock);
2704 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2706 struct nct6775_data *data = nct6775_update_device(dev);
2707 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2708 int nr = sattr->index;
2710 return sprintf(buf, "%d\n",
2711 fan_from_reg16(data->target_speed[nr],
2712 data->fan_div[nr]));
2716 store_target_speed(struct device *dev, struct device_attribute *attr,
2717 const char *buf, size_t count)
2719 struct nct6775_data *data = dev_get_drvdata(dev);
2720 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2721 int nr = sattr->index;
2726 err = kstrtoul(buf, 10, &val);
2730 val = clamp_val(val, 0, 1350000U);
2731 speed = fan_to_reg(val, data->fan_div[nr]);
2733 mutex_lock(&data->update_lock);
2734 data->target_speed[nr] = speed;
2735 pwm_update_registers(data, nr);
2736 mutex_unlock(&data->update_lock);
2741 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2744 struct nct6775_data *data = nct6775_update_device(dev);
2745 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2747 int index = sattr->index;
2749 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2753 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2754 const char *buf, size_t count)
2756 struct nct6775_data *data = dev_get_drvdata(dev);
2757 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2759 int index = sattr->index;
2763 err = kstrtoul(buf, 10, &val);
2767 /* Limit tolerance as needed */
2768 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2770 mutex_lock(&data->update_lock);
2771 data->temp_tolerance[index][nr] = val;
2773 pwm_update_registers(data, nr);
2775 nct6775_write_value(data,
2776 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2778 mutex_unlock(&data->update_lock);
2783 * Fan speed tolerance is a tricky beast, since the associated register is
2784 * a tick counter, but the value is reported and configured as rpm.
2785 * Compute resulting low and high rpm values and report the difference.
2788 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2791 struct nct6775_data *data = nct6775_update_device(dev);
2792 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2793 int nr = sattr->index;
2794 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2795 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2805 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2806 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2808 return sprintf(buf, "%d\n", tolerance);
2812 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2813 const char *buf, size_t count)
2815 struct nct6775_data *data = dev_get_drvdata(dev);
2816 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2817 int nr = sattr->index;
2822 err = kstrtoul(buf, 10, &val);
2826 high = fan_from_reg16(data->target_speed[nr],
2827 data->fan_div[nr]) + val;
2828 low = fan_from_reg16(data->target_speed[nr],
2829 data->fan_div[nr]) - val;
2835 val = (fan_to_reg(low, data->fan_div[nr]) -
2836 fan_to_reg(high, data->fan_div[nr])) / 2;
2838 /* Limit tolerance as needed */
2839 val = clamp_val(val, 0, data->speed_tolerance_limit);
2841 mutex_lock(&data->update_lock);
2842 data->target_speed_tolerance[nr] = val;
2843 pwm_update_registers(data, nr);
2844 mutex_unlock(&data->update_lock);
2848 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2849 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2851 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2852 store_pwm_enable, 0);
2853 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2854 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2855 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2856 show_target_temp, store_target_temp, 0);
2857 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2858 show_target_speed, store_target_speed, 0);
2859 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2860 show_speed_tolerance, store_speed_tolerance, 0);
2862 /* Smart Fan registers */
2865 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2867 struct nct6775_data *data = nct6775_update_device(dev);
2868 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2870 int index = sattr->index;
2872 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2876 store_weight_temp(struct device *dev, struct device_attribute *attr,
2877 const char *buf, size_t count)
2879 struct nct6775_data *data = dev_get_drvdata(dev);
2880 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2882 int index = sattr->index;
2886 err = kstrtoul(buf, 10, &val);
2890 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2892 mutex_lock(&data->update_lock);
2893 data->weight_temp[index][nr] = val;
2894 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2895 mutex_unlock(&data->update_lock);
2899 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2900 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2901 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2902 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2903 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2904 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2905 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2906 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2907 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2908 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2909 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2910 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2913 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2915 struct nct6775_data *data = nct6775_update_device(dev);
2916 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2918 int index = sattr->index;
2920 return sprintf(buf, "%d\n",
2921 step_time_from_reg(data->fan_time[index][nr],
2922 data->pwm_mode[nr]));
2926 store_fan_time(struct device *dev, struct device_attribute *attr,
2927 const char *buf, size_t count)
2929 struct nct6775_data *data = dev_get_drvdata(dev);
2930 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2932 int index = sattr->index;
2936 err = kstrtoul(buf, 10, &val);
2940 val = step_time_to_reg(val, data->pwm_mode[nr]);
2941 mutex_lock(&data->update_lock);
2942 data->fan_time[index][nr] = val;
2943 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2944 mutex_unlock(&data->update_lock);
2949 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2951 struct nct6775_data *data = nct6775_update_device(dev);
2952 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2954 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2958 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2959 const char *buf, size_t count)
2961 struct nct6775_data *data = dev_get_drvdata(dev);
2962 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2964 int point = sattr->index;
2969 err = kstrtoul(buf, 10, &val);
2975 if (point == data->auto_pwm_num) {
2976 if (data->kind != nct6775 && !val)
2978 if (data->kind != nct6779 && val)
2982 mutex_lock(&data->update_lock);
2983 data->auto_pwm[nr][point] = val;
2984 if (point < data->auto_pwm_num) {
2985 nct6775_write_value(data,
2986 NCT6775_AUTO_PWM(data, nr, point),
2987 data->auto_pwm[nr][point]);
2989 switch (data->kind) {
2991 /* disable if needed (pwm == 0) */
2992 reg = nct6775_read_value(data,
2993 NCT6775_REG_CRITICAL_ENAB[nr]);
2998 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
3002 break; /* always enabled, nothing to do */
3009 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
3011 reg = nct6775_read_value(data,
3012 data->REG_CRITICAL_PWM_ENABLE[nr]);
3014 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3016 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3017 nct6775_write_value(data,
3018 data->REG_CRITICAL_PWM_ENABLE[nr],
3023 mutex_unlock(&data->update_lock);
3028 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3030 struct nct6775_data *data = nct6775_update_device(dev);
3031 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3033 int point = sattr->index;
3036 * We don't know for sure if the temperature is signed or unsigned.
3037 * Assume it is unsigned.
3039 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3043 store_auto_temp(struct device *dev, struct device_attribute *attr,
3044 const char *buf, size_t count)
3046 struct nct6775_data *data = dev_get_drvdata(dev);
3047 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3049 int point = sattr->index;
3053 err = kstrtoul(buf, 10, &val);
3059 mutex_lock(&data->update_lock);
3060 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3061 if (point < data->auto_pwm_num) {
3062 nct6775_write_value(data,
3063 NCT6775_AUTO_TEMP(data, nr, point),
3064 data->auto_temp[nr][point]);
3066 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3067 data->auto_temp[nr][point]);
3069 mutex_unlock(&data->update_lock);
3073 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3074 struct attribute *attr, int index)
3076 struct device *dev = container_of(kobj, struct device, kobj);
3077 struct nct6775_data *data = dev_get_drvdata(dev);
3078 int pwm = index / 36; /* pwm index */
3079 int nr = index % 36; /* attribute index */
3081 if (!(data->has_pwm & BIT(pwm)))
3084 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
3085 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3087 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3089 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3091 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3094 if (nr >= 22 && nr <= 35) { /* auto point */
3095 int api = (nr - 22) / 2; /* auto point index */
3097 if (api > data->auto_pwm_num)
3103 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3104 show_fan_time, store_fan_time, 0, 0);
3105 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3106 show_fan_time, store_fan_time, 0, 1);
3107 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3108 show_fan_time, store_fan_time, 0, 2);
3109 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3111 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3113 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3114 show_temp_tolerance, store_temp_tolerance, 0, 0);
3115 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3116 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3119 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3122 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3125 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3126 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3127 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3128 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3130 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3131 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3132 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3133 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3135 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3136 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3137 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3138 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3140 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3141 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3142 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3143 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3145 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3146 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3147 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3148 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3150 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3151 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3152 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3153 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3155 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3156 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3157 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3158 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3161 * nct6775_pwm_is_visible uses the index into the following array
3162 * to determine if attributes should be created or not.
3163 * Any change in order or content must be matched.
3165 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3166 &sensor_dev_template_pwm,
3167 &sensor_dev_template_pwm_mode,
3168 &sensor_dev_template_pwm_enable,
3169 &sensor_dev_template_pwm_temp_sel,
3170 &sensor_dev_template_pwm_temp_tolerance,
3171 &sensor_dev_template_pwm_crit_temp_tolerance,
3172 &sensor_dev_template_pwm_target_temp,
3173 &sensor_dev_template_fan_target,
3174 &sensor_dev_template_fan_tolerance,
3175 &sensor_dev_template_pwm_stop_time,
3176 &sensor_dev_template_pwm_step_up_time,
3177 &sensor_dev_template_pwm_step_down_time,
3178 &sensor_dev_template_pwm_start,
3179 &sensor_dev_template_pwm_floor,
3180 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
3181 &sensor_dev_template_pwm_weight_temp_step,
3182 &sensor_dev_template_pwm_weight_temp_step_tol,
3183 &sensor_dev_template_pwm_weight_temp_step_base,
3184 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
3185 &sensor_dev_template_pwm_max, /* 19 */
3186 &sensor_dev_template_pwm_step, /* 20 */
3187 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
3188 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
3189 &sensor_dev_template_pwm_auto_point1_temp,
3190 &sensor_dev_template_pwm_auto_point2_pwm,
3191 &sensor_dev_template_pwm_auto_point2_temp,
3192 &sensor_dev_template_pwm_auto_point3_pwm,
3193 &sensor_dev_template_pwm_auto_point3_temp,
3194 &sensor_dev_template_pwm_auto_point4_pwm,
3195 &sensor_dev_template_pwm_auto_point4_temp,
3196 &sensor_dev_template_pwm_auto_point5_pwm,
3197 &sensor_dev_template_pwm_auto_point5_temp,
3198 &sensor_dev_template_pwm_auto_point6_pwm,
3199 &sensor_dev_template_pwm_auto_point6_temp,
3200 &sensor_dev_template_pwm_auto_point7_pwm,
3201 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3206 static const struct sensor_template_group nct6775_pwm_template_group = {
3207 .templates = nct6775_attributes_pwm_template,
3208 .is_visible = nct6775_pwm_is_visible,
3213 cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
3215 struct nct6775_data *data = dev_get_drvdata(dev);
3217 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3220 static DEVICE_ATTR_RO(cpu0_vid);
3222 /* Case open detection */
3225 clear_caseopen(struct device *dev, struct device_attribute *attr,
3226 const char *buf, size_t count)
3228 struct nct6775_data *data = dev_get_drvdata(dev);
3229 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3234 if (kstrtoul(buf, 10, &val) || val != 0)
3237 mutex_lock(&data->update_lock);
3240 * Use CR registers to clear caseopen status.
3241 * The CR registers are the same for all chips, and not all chips
3242 * support clearing the caseopen status through "regular" registers.
3244 ret = superio_enter(data->sioreg);
3250 superio_select(data->sioreg, NCT6775_LD_ACPI);
3251 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3252 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3253 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3254 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3255 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3256 superio_exit(data->sioreg);
3258 data->valid = false; /* Force cache refresh */
3260 mutex_unlock(&data->update_lock);
3264 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3265 clear_caseopen, INTRUSION_ALARM_BASE);
3266 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3267 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3268 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3269 store_beep, INTRUSION_ALARM_BASE);
3270 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3271 store_beep, INTRUSION_ALARM_BASE + 1);
3272 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3273 store_beep, BEEP_ENABLE_BASE);
3275 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3276 struct attribute *attr, int index)
3278 struct device *dev = container_of(kobj, struct device, kobj);
3279 struct nct6775_data *data = dev_get_drvdata(dev);
3281 if (index == 0 && !data->have_vid)
3284 if (index == 1 || index == 2) {
3285 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3289 if (index == 3 || index == 4) {
3290 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3298 * nct6775_other_is_visible uses the index into the following array
3299 * to determine if attributes should be created or not.
3300 * Any change in order or content must be matched.
3302 static struct attribute *nct6775_attributes_other[] = {
3303 &dev_attr_cpu0_vid.attr, /* 0 */
3304 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 1 */
3305 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 2 */
3306 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 3 */
3307 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 4 */
3308 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 5 */
3313 static const struct attribute_group nct6775_group_other = {
3314 .attrs = nct6775_attributes_other,
3315 .is_visible = nct6775_other_is_visible,
3318 static inline void nct6775_init_device(struct nct6775_data *data)
3323 /* Start monitoring if needed */
3324 if (data->REG_CONFIG) {
3325 tmp = nct6775_read_value(data, data->REG_CONFIG);
3327 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3330 /* Enable temperature sensors if needed */
3331 for (i = 0; i < NUM_TEMP; i++) {
3332 if (!(data->have_temp & BIT(i)))
3334 if (!data->reg_temp_config[i])
3336 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3338 nct6775_write_value(data, data->reg_temp_config[i],
3342 /* Enable VBAT monitoring if needed */
3343 tmp = nct6775_read_value(data, data->REG_VBAT);
3345 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3347 diode = nct6775_read_value(data, data->REG_DIODE);
3349 for (i = 0; i < data->temp_fixed_num; i++) {
3350 if (!(data->have_temp_fixed & BIT(i)))
3352 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3354 = 3 - ((diode >> i) & data->DIODE_MASK);
3355 else /* thermistor */
3356 data->temp_type[i] = 4;
3361 nct6775_check_fan_inputs(struct nct6775_data *data)
3363 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3364 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3365 int sioreg = data->sioreg;
3368 /* Store SIO_REG_ENABLE for use during resume */
3369 superio_select(sioreg, NCT6775_LD_HWM);
3370 data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3372 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3373 if (data->kind == nct6775) {
3374 regval = superio_inb(sioreg, 0x2c);
3376 fan3pin = regval & BIT(6);
3377 pwm3pin = regval & BIT(7);
3379 /* On NCT6775, fan4 shares pins with the fdc interface */
3380 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3387 } else if (data->kind == nct6776) {
3388 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3389 const char *board_vendor, *board_name;
3391 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3392 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3394 if (board_name && board_vendor &&
3395 !strcmp(board_vendor, "ASRock")) {
3397 * Auxiliary fan monitoring is not enabled on ASRock
3398 * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3399 * Observed with BIOS version 2.00.
3401 if (!strcmp(board_name, "Z77 Pro4-M")) {
3402 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3403 data->sio_reg_enable |= 0xe0;
3404 superio_outb(sioreg, SIO_REG_ENABLE,
3405 data->sio_reg_enable);
3410 if (data->sio_reg_enable & 0x80)
3413 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3415 if (data->sio_reg_enable & 0x40)
3418 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3420 if (data->sio_reg_enable & 0x20)
3423 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3431 } else if (data->kind == nct6106) {
3432 regval = superio_inb(sioreg, 0x24);
3433 fan3pin = !(regval & 0x80);
3434 pwm3pin = regval & 0x08;
3443 } else { /* NCT6779D, NCT6791D, NCT6792D, NCT6793D, or NCT6795D */
3444 int regval_1b, regval_2a, regval_eb;
3446 regval = superio_inb(sioreg, 0x1c);
3448 fan3pin = !(regval & BIT(5));
3449 fan4pin = !(regval & BIT(6));
3450 fan5pin = !(regval & BIT(7));
3452 pwm3pin = !(regval & BIT(0));
3453 pwm4pin = !(regval & BIT(1));
3454 pwm5pin = !(regval & BIT(2));
3456 regval = superio_inb(sioreg, 0x2d);
3457 switch (data->kind) {
3460 fan6pin = regval & BIT(1);
3461 pwm6pin = regval & BIT(0);
3465 regval_1b = superio_inb(sioreg, 0x1b);
3466 regval_2a = superio_inb(sioreg, 0x2a);
3469 pwm5pin = regval & BIT(7);
3470 fan6pin = regval & BIT(1);
3471 pwm6pin = regval & BIT(0);
3473 fan5pin = regval_1b & BIT(5);
3475 superio_select(sioreg, NCT6775_LD_12);
3476 regval_eb = superio_inb(sioreg, 0xeb);
3478 fan5pin = regval_eb & BIT(5);
3480 pwm5pin = (regval_eb & BIT(4)) &&
3481 !(regval_2a & BIT(0));
3483 fan6pin = regval_eb & BIT(3);
3485 pwm6pin = regval_eb & BIT(2);
3487 default: /* NCT6779D */
3496 /* fan 1 and 2 (0x03) are always present */
3497 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3498 (fan5pin << 4) | (fan6pin << 5);
3499 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3501 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3502 (pwm5pin << 4) | (pwm6pin << 5);
3505 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3506 int *available, int *mask)
3511 for (i = 0; i < data->pwm_num && *available; i++) {
3516 src = nct6775_read_value(data, regp[i]);
3518 if (!src || (*mask & BIT(src)))
3520 if (!(data->temp_mask & BIT(src)))
3523 index = __ffs(*available);
3524 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3525 *available &= ~BIT(index);
3530 static int nct6775_probe(struct platform_device *pdev)
3532 struct device *dev = &pdev->dev;
3533 struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3534 struct nct6775_data *data;
3535 struct resource *res;
3537 int src, mask, available;
3538 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3539 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3540 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3541 int num_reg_temp, num_reg_temp_mon;
3543 struct attribute_group *group;
3544 struct device *hwmon_dev;
3545 int num_attr_groups = 0;
3547 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3548 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3552 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3557 data->kind = sio_data->kind;
3558 data->sioreg = sio_data->sioreg;
3559 data->addr = res->start;
3560 mutex_init(&data->update_lock);
3561 data->name = nct6775_device_names[data->kind];
3562 data->bank = 0xff; /* Force initial bank selection */
3563 platform_set_drvdata(pdev, data);
3565 switch (data->kind) {
3569 data->auto_pwm_num = 4;
3570 data->temp_fixed_num = 3;
3571 data->num_temp_alarms = 6;
3572 data->num_temp_beeps = 6;
3574 data->fan_from_reg = fan_from_reg13;
3575 data->fan_from_reg_min = fan_from_reg13;
3577 data->temp_label = nct6776_temp_label;
3578 data->temp_mask = NCT6776_TEMP_MASK;
3580 data->REG_VBAT = NCT6106_REG_VBAT;
3581 data->REG_DIODE = NCT6106_REG_DIODE;
3582 data->DIODE_MASK = NCT6106_DIODE_MASK;
3583 data->REG_VIN = NCT6106_REG_IN;
3584 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3585 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3586 data->REG_TARGET = NCT6106_REG_TARGET;
3587 data->REG_FAN = NCT6106_REG_FAN;
3588 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3589 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3590 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3591 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3592 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3593 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3594 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3595 data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H;
3596 data->REG_PWM[0] = NCT6106_REG_PWM;
3597 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3598 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3599 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3600 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3601 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3602 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3603 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3604 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3605 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3606 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3607 data->REG_CRITICAL_TEMP_TOLERANCE
3608 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3609 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3610 data->CRITICAL_PWM_ENABLE_MASK
3611 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3612 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3613 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3614 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3615 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3616 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3617 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3618 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3619 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3620 data->REG_ALARM = NCT6106_REG_ALARM;
3621 data->ALARM_BITS = NCT6106_ALARM_BITS;
3622 data->REG_BEEP = NCT6106_REG_BEEP;
3623 data->BEEP_BITS = NCT6106_BEEP_BITS;
3625 reg_temp = NCT6106_REG_TEMP;
3626 reg_temp_mon = NCT6106_REG_TEMP_MON;
3627 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3628 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3629 reg_temp_over = NCT6106_REG_TEMP_OVER;
3630 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3631 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3632 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3633 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3634 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3635 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3641 data->auto_pwm_num = 6;
3642 data->has_fan_div = true;
3643 data->temp_fixed_num = 3;
3644 data->num_temp_alarms = 3;
3645 data->num_temp_beeps = 3;
3647 data->ALARM_BITS = NCT6775_ALARM_BITS;
3648 data->BEEP_BITS = NCT6775_BEEP_BITS;
3650 data->fan_from_reg = fan_from_reg16;
3651 data->fan_from_reg_min = fan_from_reg8;
3652 data->target_temp_mask = 0x7f;
3653 data->tolerance_mask = 0x0f;
3654 data->speed_tolerance_limit = 15;
3656 data->temp_label = nct6775_temp_label;
3657 data->temp_mask = NCT6775_TEMP_MASK;
3659 data->REG_CONFIG = NCT6775_REG_CONFIG;
3660 data->REG_VBAT = NCT6775_REG_VBAT;
3661 data->REG_DIODE = NCT6775_REG_DIODE;
3662 data->DIODE_MASK = NCT6775_DIODE_MASK;
3663 data->REG_VIN = NCT6775_REG_IN;
3664 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3665 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3666 data->REG_TARGET = NCT6775_REG_TARGET;
3667 data->REG_FAN = NCT6775_REG_FAN;
3668 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3669 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3670 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3671 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3672 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3673 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3674 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3675 data->REG_PWM[0] = NCT6775_REG_PWM;
3676 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3677 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3678 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3679 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3680 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3681 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3682 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3683 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3684 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3685 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3686 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3687 data->REG_CRITICAL_TEMP_TOLERANCE
3688 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3689 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3690 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3691 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3692 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3693 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3694 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3695 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3696 data->REG_ALARM = NCT6775_REG_ALARM;
3697 data->REG_BEEP = NCT6775_REG_BEEP;
3699 reg_temp = NCT6775_REG_TEMP;
3700 reg_temp_mon = NCT6775_REG_TEMP_MON;
3701 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3702 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3703 reg_temp_over = NCT6775_REG_TEMP_OVER;
3704 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3705 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3706 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3707 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3713 data->auto_pwm_num = 4;
3714 data->has_fan_div = false;
3715 data->temp_fixed_num = 3;
3716 data->num_temp_alarms = 3;
3717 data->num_temp_beeps = 6;
3719 data->ALARM_BITS = NCT6776_ALARM_BITS;
3720 data->BEEP_BITS = NCT6776_BEEP_BITS;
3722 data->fan_from_reg = fan_from_reg13;
3723 data->fan_from_reg_min = fan_from_reg13;
3724 data->target_temp_mask = 0xff;
3725 data->tolerance_mask = 0x07;
3726 data->speed_tolerance_limit = 63;
3728 data->temp_label = nct6776_temp_label;
3729 data->temp_mask = NCT6776_TEMP_MASK;
3731 data->REG_CONFIG = NCT6775_REG_CONFIG;
3732 data->REG_VBAT = NCT6775_REG_VBAT;
3733 data->REG_DIODE = NCT6775_REG_DIODE;
3734 data->DIODE_MASK = NCT6775_DIODE_MASK;
3735 data->REG_VIN = NCT6775_REG_IN;
3736 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3737 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3738 data->REG_TARGET = NCT6775_REG_TARGET;
3739 data->REG_FAN = NCT6775_REG_FAN;
3740 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3741 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3742 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3743 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3744 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3745 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3746 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3747 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3748 data->REG_PWM[0] = NCT6775_REG_PWM;
3749 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3750 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3751 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3752 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3753 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3754 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3755 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3756 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3757 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3758 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3759 data->REG_CRITICAL_TEMP_TOLERANCE
3760 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3761 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3762 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3763 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3764 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3765 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3766 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3767 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3768 data->REG_ALARM = NCT6775_REG_ALARM;
3769 data->REG_BEEP = NCT6776_REG_BEEP;
3771 reg_temp = NCT6775_REG_TEMP;
3772 reg_temp_mon = NCT6775_REG_TEMP_MON;
3773 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3774 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3775 reg_temp_over = NCT6775_REG_TEMP_OVER;
3776 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3777 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3778 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3779 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3785 data->auto_pwm_num = 4;
3786 data->has_fan_div = false;
3787 data->temp_fixed_num = 6;
3788 data->num_temp_alarms = 2;
3789 data->num_temp_beeps = 2;
3791 data->ALARM_BITS = NCT6779_ALARM_BITS;
3792 data->BEEP_BITS = NCT6779_BEEP_BITS;
3794 data->fan_from_reg = fan_from_reg13;
3795 data->fan_from_reg_min = fan_from_reg13;
3796 data->target_temp_mask = 0xff;
3797 data->tolerance_mask = 0x07;
3798 data->speed_tolerance_limit = 63;
3800 data->temp_label = nct6779_temp_label;
3801 data->temp_mask = NCT6779_TEMP_MASK;
3803 data->REG_CONFIG = NCT6775_REG_CONFIG;
3804 data->REG_VBAT = NCT6775_REG_VBAT;
3805 data->REG_DIODE = NCT6775_REG_DIODE;
3806 data->DIODE_MASK = NCT6775_DIODE_MASK;
3807 data->REG_VIN = NCT6779_REG_IN;
3808 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3809 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3810 data->REG_TARGET = NCT6775_REG_TARGET;
3811 data->REG_FAN = NCT6779_REG_FAN;
3812 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3813 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3814 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3815 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3816 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3817 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3818 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3819 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3820 data->REG_PWM[0] = NCT6775_REG_PWM;
3821 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3822 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3823 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3824 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3825 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3826 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3827 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3828 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3829 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3830 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3831 data->REG_CRITICAL_TEMP_TOLERANCE
3832 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3833 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3834 data->CRITICAL_PWM_ENABLE_MASK
3835 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3836 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3837 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3838 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3839 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3840 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3841 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3842 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3843 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3844 data->REG_ALARM = NCT6779_REG_ALARM;
3845 data->REG_BEEP = NCT6776_REG_BEEP;
3847 reg_temp = NCT6779_REG_TEMP;
3848 reg_temp_mon = NCT6779_REG_TEMP_MON;
3849 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3850 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3851 reg_temp_over = NCT6779_REG_TEMP_OVER;
3852 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3853 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3854 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3855 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3864 data->auto_pwm_num = 4;
3865 data->has_fan_div = false;
3866 data->temp_fixed_num = 6;
3867 data->num_temp_alarms = 2;
3868 data->num_temp_beeps = 2;
3870 data->ALARM_BITS = NCT6791_ALARM_BITS;
3871 data->BEEP_BITS = NCT6779_BEEP_BITS;
3873 data->fan_from_reg = fan_from_reg13;
3874 data->fan_from_reg_min = fan_from_reg13;
3875 data->target_temp_mask = 0xff;
3876 data->tolerance_mask = 0x07;
3877 data->speed_tolerance_limit = 63;
3879 switch (data->kind) {
3882 data->temp_label = nct6779_temp_label;
3883 data->temp_mask = NCT6791_TEMP_MASK;
3886 data->temp_label = nct6792_temp_label;
3887 data->temp_mask = NCT6792_TEMP_MASK;
3890 data->temp_label = nct6793_temp_label;
3891 data->temp_mask = NCT6793_TEMP_MASK;
3894 data->temp_label = nct6795_temp_label;
3895 data->temp_mask = NCT6795_TEMP_MASK;
3899 data->REG_CONFIG = NCT6775_REG_CONFIG;
3900 data->REG_VBAT = NCT6775_REG_VBAT;
3901 data->REG_DIODE = NCT6775_REG_DIODE;
3902 data->DIODE_MASK = NCT6775_DIODE_MASK;
3903 data->REG_VIN = NCT6779_REG_IN;
3904 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3905 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3906 data->REG_TARGET = NCT6775_REG_TARGET;
3907 data->REG_FAN = NCT6779_REG_FAN;
3908 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3909 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3910 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3911 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3912 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3913 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3914 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3915 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3916 data->REG_PWM[0] = NCT6775_REG_PWM;
3917 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3918 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3919 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3920 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3921 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3922 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3923 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3924 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3925 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3926 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3927 data->REG_CRITICAL_TEMP_TOLERANCE
3928 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3929 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3930 data->CRITICAL_PWM_ENABLE_MASK
3931 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3932 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3933 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3934 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3935 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3936 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3937 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3938 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3939 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3940 data->REG_ALARM = NCT6791_REG_ALARM;
3941 if (data->kind == nct6791)
3942 data->REG_BEEP = NCT6776_REG_BEEP;
3944 data->REG_BEEP = NCT6792_REG_BEEP;
3946 reg_temp = NCT6779_REG_TEMP;
3947 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3948 if (data->kind == nct6791) {
3949 reg_temp_mon = NCT6779_REG_TEMP_MON;
3950 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3952 reg_temp_mon = NCT6792_REG_TEMP_MON;
3953 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3955 reg_temp_over = NCT6779_REG_TEMP_OVER;
3956 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3957 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3958 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3959 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3965 data->have_in = BIT(data->in_num) - 1;
3966 data->have_temp = 0;
3969 * On some boards, not all available temperature sources are monitored,
3970 * even though some of the monitoring registers are unused.
3971 * Get list of unused monitoring registers, then detect if any fan
3972 * controls are configured to use unmonitored temperature sources.
3973 * If so, assign the unmonitored temperature sources to available
3974 * monitoring registers.
3978 for (i = 0; i < num_reg_temp; i++) {
3979 if (reg_temp[i] == 0)
3982 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3983 if (!src || (mask & BIT(src)))
3984 available |= BIT(i);
3990 * Now find unmonitored temperature registers and enable monitoring
3991 * if additional monitoring registers are available.
3993 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3994 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3997 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3998 for (i = 0; i < num_reg_temp; i++) {
3999 if (reg_temp[i] == 0)
4002 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
4003 if (!src || (mask & BIT(src)))
4006 if (!(data->temp_mask & BIT(src))) {
4008 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4009 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4015 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4016 if (src <= data->temp_fixed_num) {
4017 data->have_temp |= BIT(src - 1);
4018 data->have_temp_fixed |= BIT(src - 1);
4019 data->reg_temp[0][src - 1] = reg_temp[i];
4020 data->reg_temp[1][src - 1] = reg_temp_over[i];
4021 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4022 if (reg_temp_crit_h && reg_temp_crit_h[i])
4023 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4024 else if (reg_temp_crit[src - 1])
4025 data->reg_temp[3][src - 1]
4026 = reg_temp_crit[src - 1];
4027 if (reg_temp_crit_l && reg_temp_crit_l[i])
4028 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4029 data->reg_temp_config[src - 1] = reg_temp_config[i];
4030 data->temp_src[src - 1] = src;
4037 /* Use dynamic index for other sources */
4038 data->have_temp |= BIT(s);
4039 data->reg_temp[0][s] = reg_temp[i];
4040 data->reg_temp[1][s] = reg_temp_over[i];
4041 data->reg_temp[2][s] = reg_temp_hyst[i];
4042 data->reg_temp_config[s] = reg_temp_config[i];
4043 if (reg_temp_crit_h && reg_temp_crit_h[i])
4044 data->reg_temp[3][s] = reg_temp_crit_h[i];
4045 else if (reg_temp_crit[src - 1])
4046 data->reg_temp[3][s] = reg_temp_crit[src - 1];
4047 if (reg_temp_crit_l && reg_temp_crit_l[i])
4048 data->reg_temp[4][s] = reg_temp_crit_l[i];
4050 data->temp_src[s] = src;
4055 * Repeat with temperatures used for fan control.
4056 * This set of registers does not support limits.
4058 for (i = 0; i < num_reg_temp_mon; i++) {
4059 if (reg_temp_mon[i] == 0)
4062 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
4066 if (!(data->temp_mask & BIT(src))) {
4068 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4069 src, i, data->REG_TEMP_SEL[i],
4075 * For virtual temperature sources, the 'virtual' temperature
4076 * for each fan reflects a different temperature, and there
4077 * are no duplicates.
4079 if (src != TEMP_SOURCE_VIRTUAL) {
4080 if (mask & BIT(src))
4085 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4086 if (src <= data->temp_fixed_num) {
4087 if (data->have_temp & BIT(src - 1))
4089 data->have_temp |= BIT(src - 1);
4090 data->have_temp_fixed |= BIT(src - 1);
4091 data->reg_temp[0][src - 1] = reg_temp_mon[i];
4092 data->temp_src[src - 1] = src;
4099 /* Use dynamic index for other sources */
4100 data->have_temp |= BIT(s);
4101 data->reg_temp[0][s] = reg_temp_mon[i];
4102 data->temp_src[s] = src;
4106 #ifdef USE_ALTERNATE
4108 * Go through the list of alternate temp registers and enable
4110 * The temperature is already monitored if the respective bit in <mask>
4113 for (i = 0; i < 31; i++) {
4114 if (!(data->temp_mask & BIT(i + 1)))
4116 if (!reg_temp_alternate[i])
4118 if (mask & BIT(i + 1))
4120 if (i < data->temp_fixed_num) {
4121 if (data->have_temp & BIT(i))
4123 data->have_temp |= BIT(i);
4124 data->have_temp_fixed |= BIT(i);
4125 data->reg_temp[0][i] = reg_temp_alternate[i];
4126 if (i < num_reg_temp) {
4127 data->reg_temp[1][i] = reg_temp_over[i];
4128 data->reg_temp[2][i] = reg_temp_hyst[i];
4130 data->temp_src[i] = i + 1;
4134 if (s >= NUM_TEMP) /* Abort if no more space */
4137 data->have_temp |= BIT(s);
4138 data->reg_temp[0][s] = reg_temp_alternate[i];
4139 data->temp_src[s] = i + 1;
4142 #endif /* USE_ALTERNATE */
4144 /* Initialize the chip */
4145 nct6775_init_device(data);
4147 err = superio_enter(sio_data->sioreg);
4151 cr2a = superio_inb(sio_data->sioreg, 0x2a);
4152 switch (data->kind) {
4154 data->have_vid = (cr2a & 0x40);
4157 data->have_vid = (cr2a & 0x60) == 0x40;
4170 * We can get the VID input values directly at logical device D 0xe3.
4172 if (data->have_vid) {
4173 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4174 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4175 data->vrm = vid_which_vrm();
4181 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4182 tmp = superio_inb(sio_data->sioreg,
4183 NCT6775_REG_CR_FAN_DEBOUNCE);
4184 switch (data->kind) {
4202 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4204 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4208 nct6775_check_fan_inputs(data);
4210 superio_exit(sio_data->sioreg);
4212 /* Read fan clock dividers immediately */
4213 nct6775_init_fan_common(dev, data);
4215 /* Register sysfs hooks */
4216 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4219 return PTR_ERR(group);
4221 data->groups[num_attr_groups++] = group;
4223 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4224 fls(data->have_in));
4226 return PTR_ERR(group);
4228 data->groups[num_attr_groups++] = group;
4230 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4231 fls(data->has_fan));
4233 return PTR_ERR(group);
4235 data->groups[num_attr_groups++] = group;
4237 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4238 fls(data->have_temp));
4240 return PTR_ERR(group);
4242 data->groups[num_attr_groups++] = group;
4243 data->groups[num_attr_groups++] = &nct6775_group_other;
4245 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4246 data, data->groups);
4247 return PTR_ERR_OR_ZERO(hwmon_dev);
4250 static void nct6791_enable_io_mapping(int sioaddr)
4254 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4256 pr_info("Enabling hardware monitor logical device mappings.\n");
4257 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4262 static int __maybe_unused nct6775_suspend(struct device *dev)
4264 struct nct6775_data *data = nct6775_update_device(dev);
4266 mutex_lock(&data->update_lock);
4267 data->vbat = nct6775_read_value(data, data->REG_VBAT);
4268 if (data->kind == nct6775) {
4269 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4270 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4272 mutex_unlock(&data->update_lock);
4277 static int __maybe_unused nct6775_resume(struct device *dev)
4279 struct nct6775_data *data = dev_get_drvdata(dev);
4280 int sioreg = data->sioreg;
4284 mutex_lock(&data->update_lock);
4285 data->bank = 0xff; /* Force initial bank selection */
4287 err = superio_enter(sioreg);
4291 superio_select(sioreg, NCT6775_LD_HWM);
4292 reg = superio_inb(sioreg, SIO_REG_ENABLE);
4293 if (reg != data->sio_reg_enable)
4294 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4296 if (data->kind == nct6791 || data->kind == nct6792 ||
4297 data->kind == nct6793 || data->kind == nct6795)
4298 nct6791_enable_io_mapping(sioreg);
4300 superio_exit(sioreg);
4302 /* Restore limits */
4303 for (i = 0; i < data->in_num; i++) {
4304 if (!(data->have_in & BIT(i)))
4307 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4309 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4313 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4314 if (!(data->has_fan_min & BIT(i)))
4317 nct6775_write_value(data, data->REG_FAN_MIN[i],
4321 for (i = 0; i < NUM_TEMP; i++) {
4322 if (!(data->have_temp & BIT(i)))
4325 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4326 if (data->reg_temp[j][i])
4327 nct6775_write_temp(data, data->reg_temp[j][i],
4331 /* Restore other settings */
4332 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4333 if (data->kind == nct6775) {
4334 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4335 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4339 /* Force re-reading all values */
4340 data->valid = false;
4341 mutex_unlock(&data->update_lock);
4346 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4348 static struct platform_driver nct6775_driver = {
4351 .pm = &nct6775_dev_pm_ops,
4353 .probe = nct6775_probe,
4356 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4357 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4363 err = superio_enter(sioaddr);
4367 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) |
4368 superio_inb(sioaddr, SIO_REG_DEVID + 1);
4369 if (force_id && val != 0xffff)
4372 switch (val & SIO_ID_MASK) {
4373 case SIO_NCT6106_ID:
4374 sio_data->kind = nct6106;
4376 case SIO_NCT6775_ID:
4377 sio_data->kind = nct6775;
4379 case SIO_NCT6776_ID:
4380 sio_data->kind = nct6776;
4382 case SIO_NCT6779_ID:
4383 sio_data->kind = nct6779;
4385 case SIO_NCT6791_ID:
4386 sio_data->kind = nct6791;
4388 case SIO_NCT6792_ID:
4389 sio_data->kind = nct6792;
4391 case SIO_NCT6793_ID:
4392 sio_data->kind = nct6793;
4394 case SIO_NCT6795_ID:
4395 sio_data->kind = nct6795;
4399 pr_debug("unsupported chip ID: 0x%04x\n", val);
4400 superio_exit(sioaddr);
4404 /* We have a known chip, find the HWM I/O address */
4405 superio_select(sioaddr, NCT6775_LD_HWM);
4406 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4407 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4408 addr = val & IOREGION_ALIGNMENT;
4410 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4411 superio_exit(sioaddr);
4415 /* Activate logical device if needed */
4416 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4417 if (!(val & 0x01)) {
4418 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4419 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4422 if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4423 sio_data->kind == nct6793 || sio_data->kind == nct6795)
4424 nct6791_enable_io_mapping(sioaddr);
4426 superio_exit(sioaddr);
4427 pr_info("Found %s or compatible chip at %#x:%#x\n",
4428 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4429 sio_data->sioreg = sioaddr;
4435 * when Super-I/O functions move to a separate file, the Super-I/O
4436 * bus will manage the lifetime of the device and this module will only keep
4437 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4438 * must keep track of the device
4440 static struct platform_device *pdev[2];
4442 static int __init sensors_nct6775_init(void)
4447 struct resource res;
4448 struct nct6775_sio_data sio_data;
4449 int sioaddr[2] = { 0x2e, 0x4e };
4451 err = platform_driver_register(&nct6775_driver);
4456 * initialize sio_data->kind and sio_data->sioreg.
4458 * when Super-I/O functions move to a separate file, the Super-I/O
4459 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4460 * nct6775 hardware monitor, and call probe()
4462 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4463 address = nct6775_find(sioaddr[i], &sio_data);
4469 pdev[i] = platform_device_alloc(DRVNAME, address);
4472 goto exit_device_unregister;
4475 err = platform_device_add_data(pdev[i], &sio_data,
4476 sizeof(struct nct6775_sio_data));
4478 goto exit_device_put;
4480 memset(&res, 0, sizeof(res));
4482 res.start = address + IOREGION_OFFSET;
4483 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4484 res.flags = IORESOURCE_IO;
4486 err = acpi_check_resource_conflict(&res);
4488 platform_device_put(pdev[i]);
4493 err = platform_device_add_resources(pdev[i], &res, 1);
4495 goto exit_device_put;
4497 /* platform_device_add calls probe() */
4498 err = platform_device_add(pdev[i]);
4500 goto exit_device_put;
4504 goto exit_unregister;
4510 platform_device_put(pdev[i]);
4511 exit_device_unregister:
4514 platform_device_unregister(pdev[i]);
4517 platform_driver_unregister(&nct6775_driver);
4521 static void __exit sensors_nct6775_exit(void)
4525 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4527 platform_device_unregister(pdev[i]);
4529 platform_driver_unregister(&nct6775_driver);
4532 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4533 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4534 MODULE_LICENSE("GPL");
4536 module_init(sensors_nct6775_init);
4537 module_exit(sensors_nct6775_exit);